Electronic device

Abstract

An electronic device is provided. The electronic device includes an electronic module; a support member including a through-hole overlapping the electronic module; a display panel disposed on the support member and including a first display area overlapping the through-hole of the support member and a second display area not overlapping the through-hole of the support member, the second display area being adjacent to the first display area; a light control layer disposed on the display panel; and a lower polarizing plate disposed between the electronic module and the display panel, wherein the lower polarizing plate includes a first linearly polarizing layer adjacent to the electronic module and a first phase retardation layer disposed between the first linearly polarizing layer and the display panel.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0104174, filed with the Korean Intellectual Property Office on August 19, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices and to electronic devices including electronic modules. Background Technology

[0004] Various types of display devices are used to provide image information, and such display devices may include electronic modules for receiving external signals or providing output signals to the outside. For example, electronic modules may include camera modules, etc., and there is an increasing demand for display devices capable of obtaining high-quality captured images.

[0005] To increase the image display area in a display device, it is considered to arrange or set up camera modules in the image display area. The improvement in the quality of captured images is a function of this arrangement.

[0006] It will be understood that this background in the technical section is partly intended to provide useful context for understanding the technology. However, this background in the technical section may also include ideas, concepts, or insights that were not part of what was known or understood by a person skilled in the art prior to the corresponding valid application date of the subject matter disclosed herein. Summary of the Invention

[0007] This disclosure provides an electronic device in which distortion of optical signals incident on or emitted from an electronic module disposed or positioned below or below a display panel is reduced.

[0008] This disclosure also provides an electronic device that can improve the quality of images captured using a camera module arranged or positioned below or beneath a display panel.

[0009] The embodiment provides an electronic device that may include: an electronic module; a support member, wherein a through-hole overlapping with the electronic module is defined in the support member; a display panel disposed on the support member and including a first display area and a second display area, wherein the first display area overlaps with the through-hole of the support member, the second display area does not overlap with the through-hole of the support member, and the second display area is adjacent to the first display area; an optical control layer disposed on the display panel; and a lower polarizer disposed between the electronic module and the display panel, wherein the lower polarizer may include a first linear polarization layer and a first phase retardation layer, wherein the first linear polarization layer is adjacent to the electronic module, and the first phase retardation layer is disposed between the first linear polarization layer and the display panel.

[0010] In an embodiment, the first phase retardation layer of the lower polarizer can be a λ / 4 phase retarder, and the angle between the absorption axis of the first linear polarization layer of the lower polarizer and the optical axis of the first phase retardation layer of the lower polarizer can be approximately 45 ± 5 degrees.

[0011] In an embodiment, the light control layer may include an upper polarizer, which may include a second linear polarization layer and a second phase delay layer disposed between the display panel and the second linear polarization layer. The second phase delay layer of the upper polarizer may be a λ / 4 phase delayer, and the angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second phase delay layer of the upper polarizer may be approximately 45 ± 5 degrees.

[0012] In an embodiment, the first phase retardation layer of the lower polarizer may include: a first λ / 4 phase retarder; and a first λ / 2 phase retarder, disposed between the first λ / 4 phase retarder and the first linear polarization layer of the lower polarizer. The angle between the absorption axis of the first linear polarization layer of the lower polarizer and the optical axis of the first λ / 4 phase retarder may be approximately 15 ± 5 degrees, and the angle between the absorption axis of the first linear polarization layer of the lower polarizer and the optical axis of the first λ / 2 phase retarder may be approximately 75 ± 5 degrees.

[0013] In an embodiment, the light control layer may include an upper polarizer, which may include: a second linear polarization layer; a second λ / 4 phase retarder disposed between the display panel and the second linear polarization layer; and a second λ / 2 phase retarder disposed between the second λ / 4 phase retarder and the second linear polarization layer. The angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second λ / 4 phase retarder of the upper polarizer may be approximately 15 ± 5 degrees, and the angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second λ / 2 phase retarder of the upper polarizer may be approximately 75 ± 5 degrees.

[0014] In this embodiment, both the polarization component transmitted through the lower polarizer and the polarization component transmitted through the light control layer can be counterclockwise polarized light.

[0015] In this embodiment, both the polarization component transmitted through the lower polarizer and the polarization component transmitted through the light control layer can be clockwise polarized light.

[0016] In an embodiment, the light control layer may include a first filter portion that transmits blue light, a second filter portion that transmits green light, a third filter portion that transmits red light, and a light-shielding portion that overlaps with the edges of the first filter portion, the second filter portion, and the third filter portion.

[0017] In one embodiment, the lower polarizer may overlap with a portion of the first display area and the second display area of ​​the display panel that is adjacent to the first display area.

[0018] In an embodiment, the electronic device may further include an adhesive layer disposed between the support member and the display panel, wherein the adhesive layer can fill the gap between the support member and the display panel by overlapping with a second display area of ​​the display panel that does not overlap with the lower polarizer.

[0019] In one implementation, the electronic module may include a lens adjacent to the lower polarizer, and in a plan view, the area of ​​the lower polarizer may be larger than the area of ​​the lens of the electronic module.

[0020] In one embodiment, the lower polarizer may include: a first polarization region, which overlaps with the first display region and includes a first polarized portion and a first non-polarized portion, wherein the first non-polarized portion has a higher transmittance than the first polarized portion; and a second polarization region, which is adjacent to the first polarization region and overlaps with the second display region of the display panel.

[0021] In one embodiment, the first linear polarizing layer of the lower polarizer may include a stretched polymer film and light absorbers adsorbed into the stretched polymer film, and the number of light absorbers per unit area in the first non-polarized portion of the lower polarizer may be less than the number of light absorbers per unit area in the first polarized portion of the lower polarizer.

[0022] In one embodiment, the light control layer may include an upper polarizer, and the upper polarizer may include a third polarization region and a fourth polarization region that overlaps with the second polarization region of the lower polarizer. The third polarization region overlaps with the first polarization region of the lower polarizer and includes a second polarized portion and a second non-polarized portion. The second non-polarized portion has a higher transmittance than the second polarized portion.

[0023] In an embodiment, the display panel may include: a base layer; a circuit layer including a masking pattern disposed on the base layer; a light-emitting element layer disposed on the circuit layer; and an upper insulating layer disposed on the light-emitting element layer.

[0024] In an embodiment, the first display area of ​​the display panel may include: a non-pixel area, excluding the masking pattern; and a pixel area, including the masking pattern, wherein the transmittance of light transmitted through the light control layer and the lower polarizer overlapping the non-pixel area may be higher than the transmittance of light transmitted through the light control layer and the lower polarizer overlapping the pixel area.

[0025] In one implementation, the electronic module may be a camera having an optical path along the direction pointing towards the display panel.

[0026] In an implementation, each of the first display area and the second display area of ​​the display panel may include a plurality of pixel units, and the number of pixel units per unit area of ​​the plurality of pixel units in the second display area of ​​the display panel may be greater than the number of pixel units per unit area of ​​the plurality of pixel units in the first display area of ​​the display panel.

[0027] In an embodiment, the electronic device may include: an electronic module; a display panel disposed on the electronic module and including a first display area and a second display area, the second display area having a lower pixel density than the first display area and overlapping the electronic module; an upper polarizer disposed on the display panel; and a lower polarizer disposed between the electronic module and the display panel, wherein the upper polarizer and the lower polarizer circularly polarize the incident light in the same direction to transmit the incident light.

[0028] In one embodiment, the upper polarizer and the lower polarizer can polarize light counterclockwise to transmit counterclockwise polarized light, or the upper polarizer and the lower polarizer can polarize light clockwise to transmit clockwise polarized light.

[0029] In one embodiment, the lower polarizer may include: a first linear polarization layer; and a first λ / 4 phase retarder disposed between the first linear polarization layer and the display panel, wherein the angle between the absorption axis of the first linear polarization layer and the optical axis of the first λ / 4 phase retarder may be approximately 45 ± 5 degrees.

[0030] In one embodiment, the upper polarizer may include: a second linear polarizing layer; and a second λ / 4 phase retarder disposed between the display panel and the second linear polarizing layer, wherein the angle between the absorption axis of the second linear polarizing layer and the optical axis of the second λ / 4 phase retarder may be approximately 45 ± 5 degrees.

[0031] In one embodiment, the lower polarizer may include: a first linear polarization layer; a first λ / 4 phase retarder disposed on the first linear polarization layer; and a first λ / 2 phase retarder disposed between the first λ / 4 phase retarder and the first linear polarization layer. The angle between the absorption axis of the first linear polarization layer and the optical axis of the first λ / 4 phase retarder may be approximately 15 ± 5 degrees, and the angle between the absorption axis of the first linear polarization layer and the optical axis of the first λ / 2 phase retarder may be approximately 75 ± 5 degrees.

[0032] In one embodiment, the upper polarizer may include a second linear polarization layer; a second λ / 4 phase retarder disposed between the display panel and the second linear polarization layer; and a second λ / 2 phase retarder disposed between the second λ / 4 phase retarder and the second linear polarization layer. The angle between the absorption axis of the second linear polarization layer and the optical axis of the second λ / 4 phase retarder may be approximately 15 ± 5 degrees, and the angle between the absorption axis of the second linear polarization layer and the optical axis of the second λ / 2 phase retarder may be approximately 75 ± 5 degrees.

[0033] In one implementation, the electronic module may include a lens adjacent to the lower polarizer, and in a plan view, the area of ​​the lower polarizer may be larger than the area of ​​the lens of the electronic module.

[0034] In an embodiment, the electronic device may include an electronic module; a display panel disposed on the electronic module and including a first display area overlapping the electronic module and a second display area surrounding at least a portion of the first display area; a light control layer disposed on the display panel; and a lower polarizer disposed between the electronic module and the display panel, wherein the lower polarizer may include a first linear polarization layer and a first phase delay layer disposed between the first linear polarization layer and the display panel, the first linear polarization layer being adjacent to the electronic module and including a polarized portion and an unpolarized portion, the unpolarized portion having a higher transmittance than the polarized portion.

[0035] In one embodiment, the first linear polarizing layer may include a stretched polymer film and a light absorber adsorbed into the stretched polymer film, and the non-polarizing portion of the lower polarizer may include a stretched polymer film in which the light absorber can be desorbed.

[0036] In one embodiment, the lower polarizer may include: a first polarization region, which includes a non-polarized portion and overlaps with a first display area of ​​the display panel; and a second polarization region, which overlaps with a second display area of ​​the display panel and does not include a non-polarized portion.

[0037] In an embodiment, the display panel may include: a base layer; a circuit layer including a masking pattern disposed on the base layer; a light-emitting element layer disposed on the circuit layer; and an upper insulating layer disposed on the light-emitting element layer, wherein the masking pattern and the non-polarized portion of the first polarization region of the lower polarizer may not overlap in the first display area of ​​the display panel.

[0038] In an implementation, the first phase retardation layer may be a λ / 4 phase retarder, and the angle between the absorption axis of the first linear polarization layer and the optical axis of the first phase retardation layer may be approximately 45 ± 5 degrees.

[0039] In an embodiment, the light control layer may include an upper polarizer, which may include a second linear polarization layer and a second phase delay layer disposed between the display panel and the second linear polarization layer. The second phase delay layer may be a λ / 4 phase delayer, and the angle between the absorption axis of the second linear polarization layer and the optical axis of the second phase delay layer may be approximately 45 ± 5 degrees.

[0040] In an embodiment, the upper polarizer may include a third polarization region and a fourth polarization region. The third polarization region overlaps with the first polarization region of the lower polarizer and includes a second polarized portion and a second non-polarized portion. The second non-polarized portion has a higher transmittance than the second polarized portion. The fourth polarization region overlaps with the second polarization region of the lower polarizer and does not include the second non-polarized portion. Attached Figure Description

[0041] The accompanying drawings are included to provide a further understanding of this disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0042] Figure 1 This is a perspective view illustrating an electronic device according to an embodiment;

[0043] Figure 2 This is an exploded perspective view of an electronic device according to an embodiment;

[0044] Figure 3 It is along the implementation path Figure 2 A schematic cross-sectional view of the electronic device taken by line I-I';

[0045] Figure 4 It is along the implementation path Figure 2 A schematic cross-sectional view of a portion of the electronic device taken from line II-II';

[0046] Figure 5 This is a schematic cross-sectional view of the lower polarizer according to the embodiment;

[0047] Figure 6 This is a plan view of the lower polarizer according to the embodiment;

[0048] Figure 7 It is according to the corresponding implementation method Figure 6 A schematic cross-sectional view of the lower polarizer of line III-III';

[0049] Figure 8 This is a schematic cross-sectional view of the first linear polarization layer according to the embodiment;

[0050] Figure 9 This is a diagram showing the optical axis in a downpolarizer according to an embodiment;

[0051] Figure 10 This is a schematic cross-sectional view of the display panel according to the embodiment;

[0052] Figure 11 This is a schematic cross-sectional view of the display panel according to the embodiment;

[0053] Figure 12 This is a plan view of the display panel according to the implementation method;

[0054] Figure 13 This is a plan view of a portion of the display panel according to the embodiment;

[0055] Figure 14 It is a plan view of the pixel unit according to the implementation method;

[0056] Figure 15 This is a plan view of a portion of the display panel according to the embodiment;

[0057] Figure 16 It is a plan view showing the structure of pixel units and non-pixel units according to an embodiment;

[0058] Figure 17 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0059] Figure 18 This is a schematic cross-sectional view of the light control layer according to the implementation method;

[0060] Figure 19 This is a schematic cross-sectional view of the light control layer according to the implementation method;

[0061] Figure 20 It is a diagram showing the optical axis relationship in an electronic device according to an embodiment;

[0062] Figure 21 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0063] Figure 22 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0064] Figure 23 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0065] Figure 24 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0066] Figure 25 This is a schematic cross-sectional view of the electronic device according to the embodiment;

[0067] Figure 26 This is a diagram showing the optical axis in a downpolarizer according to an embodiment;

[0068] Figure 27 This is a diagram showing the optical axis relationship in a downpolarizer according to an embodiment;

[0069] Figure 28 It is a diagram showing the optical axis relationship in an electronic device according to an embodiment;

[0070] Figure 29 It is a diagram showing the optical axis relationship in an electronic device according to an embodiment;

[0071] Figure 30A This is a diagram illustrating the optical axis relationship in the optical control layer according to an embodiment;

[0072] Figure 30B This is a diagram showing the optical axis relationship in a downpolarizer according to an embodiment;

[0073] Figure 31 This is a schematic cross-sectional view of a portion of an electronic device according to an embodiment;

[0074] Figure 32 This is an exploded perspective view of an electronic device according to an embodiment; and

[0075] Figure 33 The corresponding implementation method Figure 32 A schematic cross-sectional view of a portion of the electronic device of line IV-IV'. Detailed Implementation

[0076] This disclosure is open to various modifications and may include various modes. However, embodiments are shown in the accompanying drawings and described in detail below. It should be understood, however, that this disclosure is not limited to any particular form, but is intended to cover all modifications, equivalents, or alternatives falling within the spirit and scope of this disclosure.

[0077] It will be understood that when a component (or area, layer, section, etc.) is referred to as being “on”, “connected to”, or “attached to” another component, it can be directly on or directly connected to the other component, or a third component or other component may be present in between.

[0078] As used herein, the term "direct arrangement or setting" may indicate that there is no additional layer, membrane, zone, sheet, etc., between one part of a layer, membrane, zone, sheet, etc. For example, the term "direct arrangement or setting" may indicate that two layers or two components are arranged or set without additional components such as adhesives between them.

[0079] The same reference numerals refer to the same elements. In the accompanying drawings, the thickness, proportions, and dimensions of the elements are exaggerated for clarity.

[0080] As used herein, the term “and / or” includes any combination that can be defined by the associated elements.

[0081] In the specification and claims, for the purposes of its meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or separate sense and are to be understood as equivalent to "and / or".

[0082] In the specification and claims, for the purposes of its meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group consisting of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0083] The terms “first,” “second,” etc., may be used to describe various elements, but the elements should not be construed as being limited by these terms. Such terms are used only to distinguish one element from another or from other elements. For example, without departing from the teachings of this disclosure, a first element may be referred to as a second element, and vice versa. Unless otherwise stated, singular terms may include plural forms.

[0084] Furthermore, the terms "below," "lower side," "above," "upper side," etc., are used to describe the associated relationships between the elements shown in the accompanying drawings. Terms used as relative concepts are based on the directions shown in the accompanying drawings. The term "arranged or positioned on..." as used herein indicates that an element may not only be arranged or positioned on a component, but also below or beneath a component.

[0085] Additionally, for ease of description, the spatial relative terms “below,” “under,” “down,” “above,” “up,” etc., may be used herein to describe the relationship between one element or component and another, as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the spatial relative terms are also intended to cover different orientations of the device in use or operation. For example, in the case where the device shown in the drawings is flipped, a device located “below” or “under” another device may be placed “above” another device. Accordingly, the illustrative term “below” may include both a lower position and an upper position. The device may also be oriented in other directions, and therefore the spatial relative terms may be interpreted differently depending on the orientation.

[0086] The term “overlapping” or “overlapping” means that the first object may be above or below the second object, or on the side of the second object, and vice versa. Additionally, the term “overlapping” may include layering, stacking, facing or oriented, extending over, covering or partially covering, or any other suitable term that will be understood and appreciated by one of ordinary skill in the art.

[0087] When an element is described as “not overlapping” or “will not overlap” with another element, this may include the elements being spaced apart from each other, offset from each other, or separated from each other, or any other suitable terminology that will be understood and appreciated by one of ordinary skill in the art.

[0088] The terms "facing" and "oriented" mean that the first element can be directly or indirectly opposite the second element. In the case where the third element is between the first and second elements, although they are still facing each other, the first and second elements can be understood as being indirectly opposite each other.

[0089] The phrase "in a plan view" refers to viewing an object from above, while the phrase "in a schematic cross-section view" refers to viewing an object from the side as a vertically cut section.

[0090] Given the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), the terms “about” or “approximately” as used herein include stated values ​​and mean within an acceptable range of deviation for a particular value as determined by one of ordinary skill in the art. For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0091] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as understood by one of those skilled in the art. Commonly used terms, such as those defined in common dictionaries, should be interpreted according to the context as they are used in the relevant field, and will not be interpreted in an idealized or overly rigid sense unless expressly so defined herein.

[0092] It will also be understood that the terms “include,” “including,” “has,” “having,” etc., when used in this specification, indicate the presence of the stated features, numbers, steps, operations, elements, components, or combinations thereof, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof.

[0093] In the following description, an electronic device according to an embodiment will be described with reference to the accompanying drawings.

[0094] Figure 1This is a perspective view showing an electronic device according to an embodiment. Figure 2 This is an exploded perspective view of an electronic device according to an embodiment, and Figure 3 and Figure 4 This is a schematic cross-sectional view of an electronic device according to an embodiment. Figure 3 It is along Figure 2 A schematic cross-sectional view of the electronic device taken by line I-I'. Figure 4 It is along Figure 2 A schematic cross-sectional view of the electronic device taken from line II-II'.

[0095] The electronic device DD in the implementation can be a device that can be activated in response to an electrical signal. For example, the electronic device DD can be a mobile phone, tablet computer, vehicle navigation device, game console, or wearable device, but is not limited thereto. Figure 1 The electronic device DD, which is shown as a mobile phone, is illustrated.

[0096] The electronic device DD can display an image IM via an active area AA-DD. The active area AA-DD may include a plane defined by a first directional axis DR1 and a second directional axis DR2. The active area AA-DD may also include a substantially curved surface that may be bent from one or at least one side of the plane defined by the first directional axis DR1 and the second directional axis DR2. Figure 1 The electronic device DD is illustrated as including two substantially curved surfaces that bend from two side surfaces of a plane defined by a first directional axis DR1 and a second directional axis DR2. However, the shape of the active region AA-DD is not limited to this. For example, the active region AA-DD may include only a plane, or it may also include four substantially curved surfaces that bend from at least two or more side surfaces (e.g., four side surfaces) of the plane.

[0097] Although Figure 1 The figures below illustrate the first direction axis DR1 to the third direction axis DR3; however, the directions indicated by the first direction axis DR1 to the third direction axis DR3 described herein are relative and can therefore be changed to other directions. Furthermore, the directions indicated by the first direction axis DR1 to the third direction axis DR3 may be referred to as the first direction to the third direction and may use the same reference numerals.

[0098] In this document, the first direction axis DR1 and the second direction axis DR2 may be perpendicular to each other, and the third direction axis DR3 may be the normal direction of the plane defined by the first direction axis DR1 and the second direction axis DR2.

[0099] The sensing area SA-DD can be defined within the active area AA-DD of the electronic device DD. Although Figure 1A sensing area SA-DD or one sensing area SA-DD is shown, but the number of sensing areas SA-DD is not limited to this. The sensing area SA-DD can be part of the active area AA-DD. Therefore, the electronic device DD can display an image through the sensing area SA-DD.

[0100] The electronic module EM can be arranged or positioned in the area overlapping with the sensing area SA-DD. The electronic module EM can receive external input transmitted through the sensing area SA-DD, or can provide output through the sensing area SA-DD.

[0101] Reference Figures 1 to 4 The electronic device DD may include an active area AA-DD and a peripheral area NAA-DD adjacent to the active area AA-DD. The active area AA-DD may be a part corresponding to the display area AA of the display panel DP described below, and the peripheral area NAA-DD may be a part corresponding to the non-display area NAA of the display panel DP.

[0102] The peripheral region NAA-DD, which blocks optical signals, can be arranged or disposed outside the active region AA-DD, surrounding or adjacent to the active region AA-DD. In an embodiment, the peripheral region NAA-DD can be arranged or disposed on the side surface of the electronic device DD instead of the front surface. In an embodiment, the peripheral region NAA-DD can be omitted.

[0103] The electronic device DD of the embodiment may include an electronic module EM, a display panel DP disposed on or provided on the electronic module EM, an optical control layer ARP disposed on or provided on the display panel DP, and a lower polarizer PM disposed between the electronic module EM and the display panel DP. Furthermore, a support member SP may be disposed below or below the display panel DP, and a through-hole HH overlapping the electronic module EM may be defined in the support member SP.

[0104] The electronic device DD of the embodiment may include a window WM arranged or disposed on a display panel DP. Furthermore, the electronic device DD of the embodiment may include a housing HU arranged or disposed below or beneath the display panel DP. The electronic module EM and the display panel DP may be housed within the housing HU. In the electronic device DD according to the embodiment, the window WM and the housing HU may be combined with each other to form the appearance of the electronic device DD.

[0105] The electronic device DD of the embodiment may include one or more adhesive layers AP1 to AP5. A portion of the adhesive layers AP1 to AP5 may be optically transparent. Alternatively, a portion of the adhesive layers AP1 to AP5 may be omitted.

[0106] In the electronic device DD according to the embodiment, the electronic module EM can be an electronic component for outputting or receiving optical signals. For example, the electronic module EM can be a camera module or camera for capturing external images. Furthermore, the electronic module EM can be a sensor module or sensor, such as a proximity sensor or an infrared emission sensor.

[0107] In the electronic device DD of the embodiment, a display panel DP may be arranged or disposed on an electronic module EM. The display panel DP may include a display area AA for displaying an image IM and a non-display area NAA adjacent to the display area AA. For example, the front surface IS of the display panel DP may include the display area AA and the non-display area NAA. The display area AA may be an area that can be activated in response to an electrical signal.

[0108] The non-display area NAA may be adjacent to the display area AA. The non-display area NAA may surround the display area AA. The drive circuitry or drive wiring for driving the display area AA, various signal lines or pads for providing electrical signals to the display area AA, or electronic components may be arranged or placed in the non-display area NAA.

[0109] The display panel DP may include a first display area SA-EP and a second display area NSA-EP. The first display area SA-EP may be an area overlapping with the electronic module EM, and the second display area NSA-EP may be an area surrounding at least a portion of the first display area SA-EP. The first display area SA-EP may correspond to the sensing area SA-DD of the electronic device DD. The second display area NSA-EP may be a portion corresponding to an active area AA-DD in the electronic device DD, excluding the sensing area SA-DD.

[0110] In the plan view, the area of ​​the first display area SA-EP can be smaller than the area of ​​the second display area NSA-EP. The first display area SA-EP and the second display area NSA-EP can have different transmittances. The transmittance of the first display area SA-EP can be higher than that of the second display area NSA-EP.

[0111] In the display panel DP according to the embodiment, pixels PX (arranged or disposed in the first display area SA-EP) are used for driving. Figure 12 A portion of the driving circuitry or driving wiring may be arranged or disposed in the non-display area (NAA). Therefore, the wiring density in the first display area (SA-EP) may be lower than the wiring density in the second display area (NSA-EP). However, the implementation is not limited to this, and the wiring density in the first display area (SA-EP) may be substantially the same as the wiring density in the second display area (NSA-EP).

[0112] Within the spirit and scope of this disclosure, the display panel DP may include a light-emitting element layer DP-ED (DP-ED). Figure 10DP-ED (Distributed Photoluminescent Element) layers include organic light-emitting elements, quantum dot light-emitting elements, micro LEDs, and nano LEDs. Figure 10 It can essentially generate images.

[0113] In the electronic device DD of the embodiment, the light control layer ARP can be arranged or disposed on the display panel DP. The light control layer ARP can be arranged or disposed between the display panel DP and the window WM. The light control layer ARP can have an anti-reflection function for reducing the reflection of light incident from the outside of the electronic device DD. In the embodiment, the light control layer ARP can be a color filter layer or a polarizer including multiple filter sections.

[0114] Reference Figures 2 to 4 The support member SP can be arranged or positioned below or beneath the display panel DP. The support member SP may include a padding layer CM and a metal support layer MP. Furthermore, the support member SP may include one or more adhesive layers AP5. The adhesive layer AP5 may be an optically transparent adhesive layer.

[0115] The through-hole HH may be defined within the support member SP. The through-hole HH may be defined to pass through the padding layer CM and the metal support layer MP. Furthermore, the through-hole HH may penetrate the adhesive layer AP5 included in the support member SP, so as to be similarly defined.

[0116] The via HH can be defined as being arranged or disposed in the display area AA of the display panel DP. In the electronic device DD, the first display area SA-EP of the display panel DP can be a part corresponding to the via HH. The via HH can also be a part corresponding to the sensing area SA-DD of the electronic device DD.

[0117] The electronic module EM may overlap with the through-hole HH. At least a portion of the electronic module EM may be inserted into the through-hole HH. For example, the electronic module EM may be a camera module including a lens LZ adjacent to the lower polarizer PM. In an embodiment, the lens LZ may be inserted into and arranged or disposed in the through-hole HH.

[0118] The cushioning layer CM can be configured to protect the display panel DP and the electronic module EM from external physical impacts applied to the electronic device DD. Furthermore, the cushioning layer CM can have a predetermined thickness to achieve the through-hole HH. The thickness of the cushioning layer CM can be at least about 50 μm. For example, the thickness of the cushioning layer CM can be at least about 100 μm.

[0119] The cushioning layer CM may include at least one of acrylic polymers, polyurethane polymers, silicone polymers, and imide polymers. The cushioning layer CM may have robust strength for protecting the display panel DP and electronic module EM and defining the through-hole HH.

[0120] The adhesive layer AP4 can be arranged or placed on the padding layer CM. The adhesive layer AP4 can bond the padding layer CM and the lower polarizer PM.

[0121] The metal support layer MP can be a support substrate that supports components (such as a display panel DP) included in an electronic device DD. The metal support layer MP can be a thin-film metal substrate. Within the spirit and scope of this disclosure, the metal support layer MP can have functions such as heat dissipation and electromagnetic wave shielding.

[0122] In the electronic device DD of the embodiment, the support member SP may further include a panel support portion (not shown). The panel support portion (not shown) may be arranged or disposed below or beneath the lower polarizer PM. The panel support portion (not shown) may be arranged or disposed between the lower polarizer PM and the padding layer CM. The panel support portion (not shown) may include a polymer film. The polymer film may be an optically transparent polyethylene terephthalate (PET) film.

[0123] In addition, the support member SP may also include an adhesive layer for bonding the panel support (not shown) and the lower polarizer PM, wherein the adhesive layer may be an optically transparent adhesive layer.

[0124] In the electronic device DD according to an embodiment, a window WM may be arranged or disposed on the light control layer ARP. The window WM may cover or overlap the front surface IS of the display panel DP. The window WM may include a base substrate WM-BS and a border pattern WM-BZ.

[0125] The base substrate WM-BS can be a substrate comprising an optically transparent insulating material. The base substrate WM-BS can be flexible. For example, the base substrate WM-BS may comprise a substrate containing a polymer film or polymer material, or a thin-film glass substrate. The base substrate WM-BS may correspond to a base material with no phase difference or a very low phase difference. Functional layers such as anti-reflective layers, anti-fingerprint layers, and optical layers for phase control may be further arranged or disposed on the base substrate WM-BS.

[0126] The border pattern WM-BZ can be a color layer printed on one or more surfaces of the base substrate WM-BS, or a color layer deposited on the base substrate WM-BS. For example, the border pattern WM-BZ can have a multi-layer structure. The multi-layer structure may include a colored layer and a black light-shielding layer. The colored layer and the black light-shielding layer can be formed by deposition, printing, or coating processes. The border pattern WM-BZ may be omitted, or it may be formed or disposed on another functional layer other than the base substrate WM-BS.

[0127] The window WM may include an upper surface FS exposed to the outside. The upper surface of the electronic device DD may be substantially defined by the upper surface FS of the window WM. In the upper surface FS of the window WM, the transmissive region TA may be an optically transparent region. The transmissive region TA may have a shape substantially corresponding to the display area AA of the display panel DP. For example, the transmissive region TA overlaps with the entire surface or at least a portion of the display area AA. An image displayed in the display area AA of the display panel DP can be viewed from the outside through the transmissive region TA.

[0128] In the upper surface FS of window WM, the border area BZA may be part of a border pattern WM-BZ. The shape of the transmissive area TA may be defined by the border area BZA. The border area BZA may be adjacent to and surround the transmissive area TA. The border area BZA may cover or overlap with the non-display area NAA of the display panel DP to prevent the non-display area NAA from being seen from the outside.

[0129] The sensing area SA can be defined within the transmission area TA of the window WM. The sensing area SA of the window WM can also be defined as the sensing area SA-DD of the electronic device DD.

[0130] The electronic device DD of the embodiment may further include adhesive layers AP1 and AP2 disposed or disposed between the light control layer ARP and the window WM and / or between the display panel DP and the light control layer ARP. Adhesive layers AP1 and AP2 may be optically transparent adhesive layers.

[0131] The electronic device DD of the embodiment may include a lower polarizer PM arranged or disposed between the electronic module EM and the display panel DP. Figure 5 This is a schematic cross-sectional view of a polarizer according to an embodiment.

[0132] Reference Figure 5 In one embodiment, the lower polarizer PM may include a first linear polarization layer PP-1 and a first phase retardation layer RP-1. In another embodiment, the first phase retardation layer RP-1 may be arranged or disposed on the first linear polarization layer PP-1.

[0133] Reference Figures 2 to 5 In the electronic device DD of the embodiment, the lower polarizer PM can be arranged or disposed in the optical path of the electronic module EM. For example, in the embodiment, the optical path can be positioned along the direction pointing to the display panel DP in the electronic module EM. In the embodiment, the first linear polarization layer PP-1 can be arranged or disposed adjacent to the electronic module EM, and the first phase retardation layer RP-1 can be arranged or disposed on the first linear polarization layer PP-1. The first phase retardation layer RP-1 can be arranged or disposed between the first linear polarization layer PP-1 and the display panel DP.

[0134] In one embodiment, the lower polarizer PM may overlap with the entire display area AA of the display panel DP. The lower polarizer PM may be arranged or positioned below or beneath the display panel DP to overlap with both the first display area SA-EP and the second display area NSA-EP. However, in another embodiment, the lower polarizer PM may overlap only with the first display area SA-EP.

[0135] The lower polarizer PM may include a first linear polarizing layer PP-1 that linearly polarizes the provided light in one direction or in another direction, and a first phase retardation layer RP-1 that delays the phase of the provided light. The lower polarizer PM, which includes the stacked first linear polarizing layer PP-1 and the first phase retardation layer RP-1, may be, for example, a circular polarizer that circularly polarizes the incident light.

[0136] The first linear polarization layer PP-1 can be a film-type linear polarizer comprising a stretched polymer film. For example, the stretched polymer film can be a stretched polyvinyl alcohol film. The first linear polarization layer PP-1 may include the stretched polymer film and a light absorber adsorbed into the polymer film. The light absorber can be a dichroic dye or iodine. For example, the first linear polarization layer PP-1 can be manufactured by adsorbing iodine into the stretched polyvinyl alcohol film.

[0137] Here, the direction in which the polymer film is stretched can be the absorption axis of the first linear polarization layer PP-1, and the direction perpendicular to the direction in which the polymer film is stretched can be the transmission axis of the first linear polarization layer PP-1.

[0138] The first linear polarization layer PP-1 can be configured as a coating. A compound having light absorption properties can be arranged or disposed in a certain direction or a given direction and coated to provide the first linear polarization layer PP-1 as an optical coating that linearly polarizes the provided light in one direction or a given direction.

[0139] In one embodiment, the lower polarizer PM may include at least one phase delay layer disposed or disposed on the first linear polarization layer PP-1. The lower polarizer PM may include a first phase delay layer RP-1 disposed or disposed on the first linear polarization layer PP-1, wherein the first phase delay layer RP-1 may include a λ / 4 phase delayer.

[0140] The first phase retardation layer RP-1 may be in the form of a stretched film. The first phase retardation layer RP-1 can be formed by biaxial stretching. However, the implementation is not limited to this, and the first phase retardation layer RP-1 may be a liquid crystal coating.

[0141] In this embodiment, the lower polarizer PM can refer to a structure in which the first linear polarizing layer PP-1 and the first phase retardation layer RP-1 are stacked in the entire area overlapping with the display panel DP, or a structure in which the first linear polarizing layer PP-1 and the first phase retardation layer RP-1 are stacked in at least the entire area overlapping with the electronic module EM. In the lower polarizer PM of this embodiment, the degree of polarization of the first linear polarizing layer PP-1 can be substantially consistent in the entire area overlapping with the display panel DP or in the entire area overlapping with the electronic module EM. Furthermore, the transmittance of the lower polarizer PM can be substantially consistent in the entire area overlapping with the display panel DP or in the entire area overlapping with the electronic module EM. However, the embodiment is not limited to this.

[0142] Figure 6 This is a plan view of the lower polarizer according to the embodiment. Figure 7 This is a schematic cross-sectional view of a portion of a lower polarizer according to an embodiment. Figure 8 This is a schematic cross-sectional view of a portion of the first linear polarization layer according to an embodiment.

[0143] Reference Figures 6 to 8 According to an embodiment, the lower polarizer PM-a may include a first polarization region SA-P and a second polarization region NSA-P with different average transmittances. According to an embodiment, the lower polarizer PM-a may include a first display region SA-EP ( Figure 2 The first polarization region SA-P overlaps with the second display region NSA-EP. Figure 2 The second polarization region NSA-P overlaps with the first polarization region SA-P, which can be the same as the electronic module EM. Figure 2 The second polarization region NSA-P overlaps with and corresponds to a portion of the sensing region SA-DD of the electronic device DD. The second polarization region NSA-P may surround at least a portion of the first polarization region SA-P.

[0144] The average transmittance in the first polarization region SA-P can be higher than the average transmittance in the second polarization region NSA-P. For example, in the second polarization region NSA-P, the average transmittance of the lower polarizer PM-a can be about 50% or less. Furthermore, in the first polarization region SA-P, the average transmittance of the lower polarizer PM-a can exceed about 50%. Specifically, in the first polarization region SA-P, the average transmittance of the lower polarizer PM-a can be at least about 70%.

[0145] Figure 7 Is with Figure 6 A schematic cross-sectional view of the portion corresponding to line III-III'. (Refer to...) Figure 6 and Figure 7The first polarization region SA-P may include a first polarization portion LP1 and a first non-polarization portion NP1. In an embodiment, the first linear polarization layer PP-1a may include a first polarization portion LP1 and a first non-polarization portion NP1.

[0146] According to the embodiment, the lower polarizer PM-a may include: a first linear polarization layer PP-1a, including a first polarization region SA-P and a second polarization region NSA-P; and a first phase delay layer RP-1, disposed or provided on the first linear polarization layer PP-1a. In the first polarization region SA-P, the first linear polarization layer PP-1a may include a first non-polarization portion NP1.

[0147] Reference Figure 8 The first linear polarization layer PP-1a may include a stretched polymer film BF and a light absorber AF adsorbed into the polymer film BF. The polymer film BF may include polyvinyl alcohol. The light absorber AF may be a dichroic dye or iodine. For example, the first linear polarization layer PP-1a may be manufactured by adsorbing iodine into a stretched polyvinyl alcohol film.

[0148] In an embodiment, the first non-polarized portion NP1 may be a portion of the light absorber AF in the polymer film BF of the first linear polarization layer PP-1a that can be desorbed, or it may be a portion of the polymer film BF of the first linear polarization layer PP-1a that can adsorb only a small amount of light absorber AF.

[0149] In this embodiment, the number of light absorbers AF per unit area in the first non-polarized region NP1 may be less than the number of light absorbers AF per unit area in the first polarized region LP1. Furthermore, the average number of light absorbers AF per unit area in the second polarization region NSA-P may be greater than the average number of light absorbers AF per unit area in the first polarization region SA-P.

[0150] In this embodiment, the first non-polarizing portion NP1 may correspond to a portion of the first linear polarizing layer PP-1a that lacks linear polarization function, and the first polarizing portion LP1 may correspond to a portion of the first linear polarizing layer PP-1a that maintains linear polarization function. Furthermore, the second polarizing region NSA-P also corresponds to a portion of the first linear polarizing layer PP-1a that maintains linear polarization function.

[0151] In this embodiment, the transmittance of the first non-polarized portion NP1 may be higher than that of the first polarized portion LP1. Furthermore, the transmittance of the first non-polarized portion NP1 may be higher than that of the second polarized region NSA-P. The average transmittance of the first polarized region SA-P may be the average of the transmittances of the first polarized portion LP1 and the first non-polarized portion NP1. Therefore, the average transmittance of the first polarized region SA-P may be higher than the average transmittance of the second polarized region NSA-P. Figure 9 This is a diagram showing the optical axis relationship in the lower polarizer PM according to an embodiment. Figure 9 In the diagram, the baseline RL is shown as parallel to the first directional axis DR1. The angle between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis RP1-OX of the first phase retardation layer RP-1 can be approximately 45 ± 5 degrees. In this paper, the optical axis of the phase retardation layer can refer to the fast axis. In this paper, the optical axis of the phase retardation layer can be parallel to the stretching direction with a relatively high stretch ratio.

[0152] In an embodiment, the absorption axis PP1-AX of the first linear polarization layer PP-1 included in the lower polarizer PM can have an angle θ relative to the reference line RL. P1 The optical axis RP1-OX of the first phase retardation layer RP-1 can have an angle θ relative to the reference line RL. RP1 Furthermore, the angle between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis RP1-OX of the first phase retardation layer RP-1 can correspond to the angle θ. P1 With angle θ RP1 The difference between them.

[0153] For example, the angle θ of the absorption axis PP1-AX of the first linear polarization layer PP-1 relative to the reference line RL P1 It can be approximately 135 ± 5 degrees. However, the implementation is not limited to this, and the angle θ of the absorption axis PP1-AX of the first linear polarization layer PP-1 is also considered. P1 The angle between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis RP1-OX of the first phase retardation layer RP-1 is approximately 45 ± 5 degrees.

[0154] Reference above Figure 9 The optical axis relationship between the first linear polarization layer PP-1 and the first phase retardation layer RP-1 described herein can also be applied to the reference. Figure 7 and Figure 8 The implementation of the downpolarizer PM-a is described.

[0155] Figure 10 This is a schematic cross-sectional view of the display panel according to the embodiment, and Figure 11 This is a schematic cross-sectional view of an electronic device according to an embodiment. Figure 12 This is a plan view of the display panel according to the implementation method.

[0156] In this embodiment, the display panel DP may include a base layer BL and a circuit layer DP-CL, a light-emitting element layer DP-ED, and an upper insulating layer TFL disposed on or on the base layer BL. The base layer BL may include a plastic substrate, a glass substrate, a metal substrate, an organic / inorganic composite material substrate, etc. For example, the base layer BL may include at least one polyimide layer.

[0157] The circuit layer DP-CL may include one or more insulating layers, semiconductor patterns, and conductive patterns. The insulating layer may include at least one inorganic layer and at least one organic layer. The semiconductor patterns and conductive patterns may constitute signal lines, pixel driving circuits, and scan driving circuits. Furthermore, the circuit layer DP-CL may include a masking pattern BML (Browser Masking Pattern). Figure 17 The circuit layer DP-CL will be described in detail later.

[0158] The DP-ED layer may include display elements, such as ED (electrical emission elements). Figure 17 The DP-ED light-emitting element layer may also include an organic layer, such as a pixel-defining film (PDL). Figure 17 ).

[0159] The light-emitting element layer DP-ED can be arranged or placed in the display area AA. The non-display area NAA can be arranged or placed around the display area AA and adjacent to the display area AA, and the light-emitting elements can be either not arranged or placed in the non-display area NAA.

[0160] The upper insulating layer (TFL) may include multiple thin films. A portion of these films may be arranged or configured to improve optical efficiency, and another portion may be arranged or configured to protect the light-emitting element. The upper insulating layer (TFL) may include a thin-film encapsulation layer, which may comprise a stacked structure of inorganic / organic / inorganic layers.

[0161] The electronic device DD-1 according to an embodiment may further include a display panel DP and a sensor layer TP disposed on or set on the display panel DP. The sensor layer TP can detect external input applied from the outside. The external input may be user input. User input may include various types of external input, such as a part of the user's body, light, heat, pen, or pressure.

[0162] The sensor layer TP can be formed or disposed on the upper insulating layer TFL via a continuous process. The sensor layer TP may be referred to as being disposed or disposed (e.g., directly disposed or disposed) on the upper insulating layer TFL. Direct disposal or disposal may indicate that a third component may not be disposed or disposed between the sensor layer TP and the upper insulating layer TFL. For example, an additional adhesive member may not be disposed or disposed between the sensor layer TP and the upper insulating layer TFL. However, embodiments are not limited thereto, and an adhesive member (not shown) may be further disposed or disposed between the sensor layer TP and the upper insulating layer TFL. In embodiments, the sensor layer TP may include sensing electrodes for detecting external input, wherein, within the spirit and scope of this disclosure, the sensing electrodes may include transparent metal oxides, etc.

[0163] like Figure 12 As shown, the display panel DP may include multiple signal lines SGL, multiple pixels PX, and a driving circuit GDC. The pixels PX are arranged or disposed in the display area AA. Each of the pixels PX may include a light-emitting element and a pixel driving circuit electrically connected thereto. The signal lines SGL and the pixel driving circuit may be included... Figure 10 or Figure 11 In the circuit layer DP-CL shown.

[0164] The first display area SA-EP may be a portion of a pixel density that is lower than the pixel density of the second display area NSA-EP, or a wiring density that is lower than the wiring density of the second display area NSA-EP.

[0165] For example, in the electronic device of the embodiment, the first display area SA-EP may have fewer pixels PX arranged or provided relative to the same unit area than the second display area NSA-EP. Areas where pixels PX may not be arranged or provided may correspond to areas that transmit optical signals. However, the embodiment is not limited to this, and the first display area SA-EP may have a pixel density substantially the same as that of the second display area NSA-EP.

[0166] When the first display area SA-EP and the second display area NSA-EP have substantially the same pixel density, the wiring density of the first display area SA-EP can be lower than that of the second display area NSA-EP. For example, the wiring density of the second pixel unit AR1' (used for driving arrangement or disposed in the first display area SA-EP) Figure 17 transistor TR () Figure 17 The circuit wiring of the first display area (SA-EP) can be moved to the non-display area (NAA) and arranged or set in the NAA. Therefore, the first display area (SA-EP) can have a lower wiring density compared to the second display area (NSA-EP).

[0167] Pixel PX is not arranged or is located in the non-display area NAA. Driving circuit GDC may be arranged or located in the non-display area NAA. In an embodiment, driving circuit GDC may include scan driving circuitry. Scan driving circuitry generates multiple scan signals and sequentially outputs the scan signals to multiple scan lines GL, which will be described later. Scan driving circuitry may further output another control signal to driving circuitry of pixel PX.

[0168] The scan driving circuit may include multiple thin-film transistors formed using the same process as the driving circuit of the pixel PX (e.g., low-temperature polycrystalline silicon (LTPS) process or low-temperature polycrystalline oxide (LTPO) process).

[0169] The signal line SGL includes scan line GL, data lines DL and DL1, power line PWL, and control signal line CSL. The signal line SGL may also include additional reset and emission lines. Scan lines GL are electrically connected to their respective pixels PX, and data lines DL and DL1 are also electrically connected to their respective pixels PX. Power line PWL is electrically connected to a pixel PX. The control signal line CSL provides control signals to the scan drive circuit.

[0170] The signal line SGL can be electrically connected to a circuit board (not shown). The signal line SGL can also be electrically connected to an integrated chip-type timing control circuit mounted or disposed on the circuit board.

[0171] In the display panel DP according to the embodiment, the first display area SA-EP may be a portion overlapping with the electronic module EM. For example, the first display area SA-EP may be a portion overlapping with the lens of the camera module.

[0172] Figure 13 yes Figure 12 Plan view of area AA'. Figure 13 Simplified and shown arrangement or setting Figure 12 The pixel unit in area AA'. Figure 14 It is shown in Figure 13 A plan view of the structure of the light-emitting region included in one of the pixel units shown.

[0173] Pixel PX can be arranged or set in the first pixel unit AR1, where the first pixel unit AR1 can be an area providing the image. Therefore, the first pixel unit AR1 can be referred to as the effective area.

[0174] Reference Figures 12 to 14Multiple first pixel units AR1 arranged or disposed in the second display area NSA-EP may have the same arrangement of light-emitting areas EA-B, EA-G, and EA-R. The first light-emitting area EA-B is the light-emitting area of ​​the first color pixel, the second light-emitting area EA-G is the light-emitting area of ​​the second color pixel, and the third light-emitting area EA-R is the light-emitting area of ​​the third color pixel.

[0175] The plurality of first pixel units AR1 may include a first light-emitting area EA-B, a second light-emitting area EA-G, and a third light-emitting area EA-R. In an embodiment, each of the plurality of first pixel units AR1 is shown as including one first light-emitting area EA-B, two second light-emitting areas EA-G, and one third light-emitting area EA-R. However, the embodiment is not limited thereto.

[0176] Furthermore, although the light-emitting areas EA-B, EA-G, and EA-R included in the first pixel unit AR1 are shown in the plan view as having a generally rhomboid shape, the implementation is not limited to this.

[0177] Reference Figure 14 In a first pixel unit AR1, two second light-emitting areas EA-G can be arranged or disposed spaced apart from each other in the direction of the first direction axis DR1, and the first light-emitting area EA-B and the third light-emitting area EA-R can be arranged or disposed spaced apart from each other with the second light-emitting area EA-G between them. The light-emitting areas EA-B, EA-G, and EA-R can be separated from each other by the non-light-emitting area NPA. The light-emitting areas EA-B, EA-G, and EA-R can be separated by a pixel-defined film PDL (Pixel Limiting Layer). Figure 17 The region is separated from the pixel-defined film PDL (Pixel Limiting Layer). Figure 17 Overlapping areas.

[0178] In an implementation, one of the two second light-emitting areas EA-G included in a first pixel unit AR1 may be defined as a fourth light-emitting area different from the second light-emitting areas EA-G. Although Figure 14 In the plan view, the two second light-emitting areas EA-G are shown as having the same shape and area, but the implementation is not limited to this. Unlike the illustration, in the implementation, the second light-emitting areas EA-G and the fourth light-emitting area may have different shapes in the plan view.

[0179] In the implementation, the structure of the first pixel unit AR1 included in the second display area NSA-EP is not limited to the structure shown in the figures, and the number of light-emitting areas in a first pixel unit AR1, the area ratio between different light-emitting areas, the arrangement relationship between light-emitting areas and the shape of the light-emitting areas can be changed or combined in various ways according to the display quality required for the display panel DP.

[0180] In this implementation, a first luminescent region EA-B generates blue light. Each of the two second luminescent regions EA-G generates green light. A third luminescent region EA-R generates red light. The blue, green, and red light can be converted into three other primary colors.

[0181] Figure 15 yes Figure 12 Floor plan of area BB'. Figure 15 Simplified and shown arrangement or setting Figure 12 The pixel unit in area BB'. Figure 16 yes Figure 15 A plan view of a portion of area BB' shown.

[0182] Figure 15 It is shown Figure 12 The diagram shows a plan view of area BB', which is part of the first display area SA-EP of the display panel DP. The first display area SA-EP may include multiple second pixel units AR1' and multiple non-pixel units AR2.

[0183] Reference Figures 12 to 16 The first display area SA-EP may include alternately arranged or configured second pixel units AR1' and non-pixel units AR2. Multiple second pixel units AR1' and multiple non-pixel units AR2 may be arranged or configured according to predetermined rules.

[0184] Pixel PX can be arranged or set in the second pixel unit AR1', where the second pixel unit AR1' can be an area providing the image. Therefore, the second pixel unit AR1' can be referred to as the effective area.

[0185] The transmittance of the non-pixel unit AR2 may be higher than that of the second pixel unit AR1'. Within the spirit and scope of this disclosure, the non-pixel unit AR2 may be referred to as a transmissive portion, a non-display portion, a semi-transmissive portion, a transmissive area, a non-pixel area, an opening, an opening area, etc.

[0186] Pixels PX may be omitted or disposed within non-pixel units AR2. At least the light-emitting elements may be omitted or disposed within non-pixel units AR2. Therefore, the resolution of the first display area SA-EP, including the second pixel unit AR1' and the non-pixel unit AR2, may be lower than the resolution of the second display area NSA-EP.

[0187] Semiconductor patterns, conductive patterns, metal patterns, or signal lines may be omitted or placed in the non-pixel unit AR2. Furthermore, reflective electrodes, non-transmissive electrodes, etc., may be omitted or placed in the non-pixel unit AR2. Additionally, optical signals can substantially move through the non-pixel unit AR2. For example, from the electronic module EM (… Figure 4The signal provided can be output to the outside via the non-pixel unit AR2, or the external input signal can be transmitted from the electronic module EM via the non-pixel unit AR2. Figure 4 )take over.

[0188] Reference Figure 15 The second pixel unit AR1' and the non-pixel unit AR2 can be arranged or disposed alternately along the first direction axis DR1 and the second direction axis DR2. For example, a second pixel unit AR1' and a non-pixel unit AR2 can be arranged or disposed alternately. The non-pixel unit AR2 can have an area corresponding to the area of ​​the second pixel unit AR1'. However, the implementation is not limited to this, and the non-pixel unit AR2 does not necessarily have the same area as the second pixel unit AR1'.

[0189] Furthermore, the arrangement of the second pixel unit AR1' and the non-pixel unit AR2 is not limited to Figure 15 The arrangement shown. In the first display area SA-EP, the ratio between the number of second pixel units AR1' and the number of non-pixel units AR2 may differ from... Figure 15 The ratio shown is used. In an embodiment, the non-pixel unit AR2 may be arranged or configured in a stripe pattern along the first direction axis DR1 or the second direction axis DR2, or the second pixel unit AR1' and the non-pixel unit AR2 may be arranged or configured such that the number of repetitions of the second pixel unit AR1' is different from the number of repetitions of the non-pixel unit AR2.

[0190] Figure 16 This is a plan view showing in more detail the construction of the second pixel unit AR1' and non-pixel unit AR2 in the first display area SA-EP. In an embodiment, the non-pixel unit AR2 may be arranged or disposed between the second pixel units AR1'.

[0191] like Figure 16 As shown, the second pixel unit AR1' may include at least three light-emitting areas EA-B, EA-G, and EA-R. The second pixel unit AR1' may include a first light-emitting area EA-B, a second light-emitting area EA-G, and a third light-emitting area EA-R. In an embodiment, each of the plurality of second pixel units AR1' is shown as including one first light-emitting area EA-B, two second light-emitting areas EA-G, and one third light-emitting area EA-R. However, the embodiment is not limited thereto.

[0192] Furthermore, although the light-emitting areas EA-B, EA-G, and EA-R included in the second pixel unit AR1' are shown in the plan view as having a generally rectangular shape, the implementation is not limited to this.

[0193] Reference Figure 16In a second pixel unit AR1', two second light-emitting areas EA-G may be arranged or positioned spaced apart from each other, and a first light-emitting area EA-B and a third light-emitting area EA-R may be arranged or positioned spaced apart from each other with the second light-emitting area EA-G between them. The light-emitting areas EA-B, EA-G, and EA-R may be separated from each other by a non-light-emitting area NPA. When the second pixel unit AR1' may include at least three light-emitting areas EA-B, EA-G, and EA-R, the non-pixel unit AR2 may have an area greater than the sum of the areas of at least two of the three light-emitting areas EA-B, EA-G, and EA-R.

[0194] Reference Figure 14 and Figure 16 The first pixel unit AR1 and the second pixel unit AR1' may differ from each other in terms of their arrangement and shape. The size and arrangement of the light-emitting areas included in the first pixel unit AR1 and the second pixel unit AR1', the area ratio between different light-emitting areas, and the shape of the light-emitting areas are not limited to... Figure 14 and Figure 16 Those shown.

[0195] Furthermore, unlike the illustration, in the embodiment, the first pixel unit AR1 and the second pixel unit AR1' may have the same structure of the light-emitting area.

[0196] In some implementations, the second pixel unit AR1' may differ in size from the first pixel unit AR1. For example, the size of the second pixel unit AR1' may be larger than the size of the first pixel unit AR1. However, the implementation is not limited to this.

[0197] Figure 13 The area AA' shown is Figure 15 The area BB' shown can be an area occupying the same unit area. (See reference...) Figures 12 to 16 The number of light-emitting areas per unit area (BB') in the first display area SA-EP may be less than the number of light-emitting areas per unit area (AA') in the second display area NSA-EP. The number of second pixel units AR1' per unit area in the first display area SA-EP may be less than the number of first pixel units AR1 per unit area in the second display area NSA-EP. Furthermore, the pixel density in the first display area SA-EP may be lower than the pixel density in the second display area NSA-EP. However, the implementation is not limited to this, and the pixel density in the first display area SA-EP and the pixel density in the second display area NSA-EP may be substantially the same, and the wiring density in the first display area SA-EP may be lower than the wiring density in the second display area NSA-EP.

[0198] Figure 17This is a schematic cross-sectional view of a portion of the first display area of ​​an electronic device according to an embodiment. (Refer to...) Figure 17 The electronic device DD of the embodiment may include a display panel DP, an optical control layer ARP disposed on or disposed on the display panel DP, and a lower polarizer PM disposed below or beneath the display panel DP. Figure 17 As shown, adhesive layers AP2 and AP3, which can be omitted or disposed between the display panel DP and the light control layer ARP, and between the display panel DP and the lower polarizer PM, can be omitted or disposed elsewhere. Figure 4 ).

[0199] In embodiments, within the spirit and scope of this disclosure, the display panel DP may include multiple insulating layers, semiconductor patterns, conductive patterns, metal patterns, signal lines, etc. Within the spirit and scope of this disclosure, insulating layers, semiconductor layers, conductive layers, and metal layers are formed by coating, deposition, or the like. Subsequently, the insulating layers, semiconductor layers, conductive layers, and metal layers can be selectively patterned by photolithography. In this manner, semiconductor patterns, conductive patterns, masking patterns, metal patterns, and signal lines can be formed, including those in the circuit layer DP-CL and the light-emitting element layer DP-ED. Subsequently, an upper insulating layer TFL covering or overlapping the light-emitting element layer DP-ED can be formed or disposed.

[0200] The transistor TR and the light-emitting element ED can be arranged or disposed on the base layer BL. The light-emitting element ED may include a first electrode AE, a second electrode CE, and an emitter layer EML arranged or disposed between the first electrode AE ​​and the second electrode CE. In addition, the light-emitting element ED may include a hole transport region HTR arranged or disposed between the first electrode AE ​​and the emitter layer EML, and an electron transport region ETR arranged or disposed between the emitter layer EML and the second electrode CE.

[0201] A first buffer layer BFL1 may be disposed or disposed on a base layer BL. The first buffer layer BFL1 may improve the adhesion between a metallic pattern, such as a masking pattern BML, and the base layer BL. The first buffer layer BFL1 may include at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer, wherein the silicon oxide layer, silicon nitride layer, and silicon oxynitride layer may be stacked alternately on top of each other.

[0202] The masking pattern BML can be arranged or disposed on the first buffer layer BFL1. In an embodiment, the first buffer layer BFL1 can be omitted, and the masking pattern BML can be provided or disposed on the upper surface of the base layer BL.

[0203] The masking pattern BML can be overlapped with the transistor TR. The masking pattern BML can serve as a protective layer overlapping the active A1 to prevent degradation of the electrical characteristics of the active pattern. Furthermore, the masking pattern BML can protect the transistor TR from light or moisture from below or beneath the base layer BL during the manufacturing process of electronic devices. The masking pattern BML can be formed from a metallic material with low light transmittance. For example, within the spirit and scope of this disclosure, the masking pattern BML can be a metallic pattern including molybdenum (Mo).

[0204] Light incident on the masking pattern BML can be reflected from the upper or lower surface of the masking pattern BML. Light incident on the masking pattern BML from below or beneath it can be reflected from the masking pattern BML and can be incident on the lower polarizer PM. The lower polarizer PM, which may include a phase retardation layer and a linear polarization layer, can prevent incident light reflected from the masking pattern BML from being reflected back. Accordingly, an electronic device DD, which may be arranged or disposed below or beneath the display panel DP, can exhibit characteristics that prevent the display quality from being degraded due to reflected light from the masking pattern BML or the image capture quality from being degraded due to reflected light from the masking pattern BML. In an embodiment, a second buffer layer BFL2 may be arranged or disposed on the masking pattern BML. The second buffer layer BFL2 may cover the entire masking pattern BML or overlap it. The second buffer layer BFL2 may include at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0205] Semiconductor patterns may be arranged or disposed on the second buffer layer BFL2. The semiconductor patterns may include silicon semiconductors. The semiconductor patterns may include polycrystalline silicon or amorphous silicon. Alternatively, the semiconductor patterns may include metal-oxide-semiconductor semiconductors.

[0206] Semiconductor patterns can have different electrical properties depending on whether they are doped. Semiconductor patterns can include doped and undoped regions depending on the doping level. Doped regions can be doped with N-type or P-type dopants. A P-type transistor may include doped regions doped with P-type dopants.

[0207] Doped regions can have higher doping concentrations and higher conductivity than undoped regions. Doped regions can essentially function as electrodes or signal lines. Undoped regions can correspond to the active (or channel) portion of a transistor. In other words, one portion of the semiconductor pattern can be the active (or channel) portion of a transistor, another portion can be the source (or input electrode region) or drain (or output electrode region) of the transistor, and yet another portion can be a connection signal line (or connection electrode). However, implementations are not limited to this, and the active (or channel) portion of the transistor can also be doped with dopants.

[0208] like Figure 17As shown, the source S1, active A1, and drain D1 of transistor TR are formed from a semiconductor pattern. A first insulating layer 10 may be disposed on or on the semiconductor pattern. The gate G1 of transistor TR may be disposed on or on the first insulating layer 10. A second insulating layer 20 may be disposed on or on the gate G1. Third to fifth insulating layers 30 may be disposed on or on the second insulating layer 20.

[0209] Although not shown, a connecting electrode (not shown) can electrically connect the transistor TR and the light-emitting element ED. For example, the connecting electrode (not shown) can electrically connect the transistor TR and the light-emitting element ED through contact holes defined in the first insulating layer 10 to the sixth insulating layer 60. The sixth insulating layer 60 may be arranged or disposed on the fifth insulating layer 50. Although Figure 17 The first insulating layer 10 to the sixth insulating layer 60 are shown stacked, but can be combined with... Figure 17 The diagrams show different ways to increase or decrease the number of insulation layers.

[0210] The layer from the first buffer layer BFL1 to the sixth insulating layer 60 may be defined as a circuit layer DP-CL. The circuit layer DP-CL may include at least one metal pattern, such as a masking pattern BML, semiconductor patterns S1, A1 and D1, a gate G1, and a connection electrode (not shown). At least one metal pattern may not be included in the non-pixel unit AR2. The non-pixel unit AR2 may not include the masking pattern BML, semiconductor patterns S1, A1 and D1, and gate G1, but may include multiple insulating layers. The non-pixel unit AR2 may correspond to a transmissive region with higher light transmittance compared to the pixel units AR1 and AR1'. In the electronic device DD of the embodiment, a portion corresponding to the non-pixel unit AR2 may be referred to as a non-pixel region, and a portion corresponding to the pixel units AR1 and AR1' may be referred to as a pixel region.

[0211] The transmittance of light transmitted through the light control layer ARP and the lower polarizer PM, which overlap with the non-pixel area, can be higher than that transmitted through the same layer. Since the non-pixel area does not include metal patterns such as the masking pattern BML, semiconductor patterns S1, A1 and D1, gate G1, or connection electrodes (not shown), optical signals can be easily transmitted from the outside to the electronic module EM, even in structures overlapping with the light control layer ARP and the lower polarizer PM. Figure 4 The first electrode AE ​​may be disposed on or on the sixth insulating layer 60. The first electrode AE ​​may be an anode. The pixel defining film PDL may be disposed on or on the first electrode AE ​​and the sixth insulating layer 60. An opening PX_OP may be defined in the pixel defining film PDL to expose a predetermined portion of the first electrode AE.

[0212] Pixel-defined film (PDL) can be formed from polymer resins. For example, PDL may include polyacrylate resins or polyimide resins. In addition to polymer resins, PDL may also include inorganic materials. PDL may include light-absorbing materials or black pigments or dyes. Pixel-defined film PDL including black pigments or dyes can form a black pixel-defined film. In the formation of PDL, carbon black or the like can be used as the black pigment or dye, but the implementation is not limited to this.

[0213] The hole transport region (HTR) can be arranged or disposed on the first electrode AE ​​and the pixel defining film PDL. The hole transport region (HTR) can be arranged together or disposed in the first light-emitting region EA-B and the non-light-emitting region NPA. The hole transport region (HTR) may include a hole transport layer and a hole injection layer.

[0214] The emitter layer EML can be arranged or disposed on the hole transport region HTR. The emitter layer EML can be arranged or disposed in the region corresponding to the opening PX_OP. The emitter layer EML may include organic and / or inorganic materials. Figure 17 In this context, the emitting layer EML can be a portion that emits blue light. The emitting layer EML can be located in the second emitting region EA-G (… Figure 16 Green light is emitted from the emitting layer EML in the third emitting region EA-R ( Figure 16 The second luminescent region, EA-G, emits red light. Figure 16 ) and the third luminescent region EA-R ( Figure 16 It can also have the same as Figure 17 The first luminescent region EA-B shown in the diagram corresponds to the stacked structure.

[0215] The electron transport region (ETR) can be arranged or disposed on the emitter layer (EML) and the hole transport region (HTR). The ETR can be arranged together or disposed in the first light-emitting region (EA-B) and the non-light-emitting region (NPA). The ETR may include an electron transport layer and an electron injection layer.

[0216] The second electrode CE can be arranged or disposed on the electron transport region ETR. The second electrode CE can be a cathode. The second electrode CE can be set as a common layer.

[0217] Although in the embodiment the hole transport region HTR, electron transport region ETR, and second electrode CE are shown to extend into the non-luminescent region NPA, the embodiment is not limited thereto. Therefore, the hole transport region HTR, electron transport region ETR, and second electrode CE can be patterned to correspond to the luminescent region.

[0218] The layer on which light-emitting elements (EDs) can be arranged or disposed can be defined as a light-emitting element layer DP-ED. An upper insulating layer TFL can be arranged or disposed on the light-emitting elements (EDs).

[0219] The first electrode AE ​​may not be included in the non-pixel unit AR2. The non-pixel unit AR2 may overlap with the upper insulating layer TFL. Furthermore, although not shown in the figures, if the second electrode CE is a transparent electrode, the non-pixel unit AR2 may include at least a portion of the second electrode CE.

[0220] In the portion corresponding to the non-pixel unit AR2, optical signals provided from the outside of the electronic device DD can be transmitted through the light control layer ARP, the display panel DP, and the lower polarizer PM and provided to the electronic module EM. Figure 4 ), or from the electronic module EM ( Figure 4 The emitted optical signal can be sequentially transmitted through the lower polarizer PM, the display panel DP, and the light control layer ARP and provided to the outside of the electronic device DD. For example, since the metal pattern or conductive pattern included in the circuit layer DP-CL of the display panel DP may not be arranged or may be arranged in the portion corresponding to the non-pixel unit AR2, the optical signal provided as transmitted light can be freely transmitted. Furthermore, in the case of the electronic device DD of the embodiment, the lower polarizer PM may be arranged or arranged below or below the circuit layer DP-CL, which includes a metal pattern layer that reflects the optical signal, such as a shielding pattern or a semiconductor pattern, and thus prevents the light reflected from the metal pattern layer and provided to the side of the lower polarizer PM from being emitted back, thereby preventing the electronic module EM in the non-pixel unit AR2 from being emitted back. Figure 2 The sensitivity degradation and display quality of the electronic module EM () are due to the degradation of the electronic module EM () Figure 2 And deteriorate.

[0221] In the electronic device DD of the embodiment, the light control layer ARP arranged or disposed on the display panel DP can be a polarizer. For example, the electronic device DD of the embodiment may include an upper polarizer as the light control layer ARP. Figure 18 This is a schematic cross-sectional view of an example of a light control layer. (See reference...) Figure 18 The optical control layer ARP may include a second linear polarization layer PP-2 and a second phase delay layer RP-2 as an upper polarizer. (See reference...) Figure 17 and Figure 18 The second linear polarization layer PP-2 can be arranged or disposed on the second phase delay layer RP-2, and the second phase delay layer RP-2 can be arranged or disposed between the display panel DP and the second linear polarization layer PP-2.

[0222] Reference above Figure 5 and Figure 9The description of the first linear polarization layer PP-1 and the first phase retardation layer RP-1 provided or configured can also be applied to the second linear polarization layer PP-2 and the second phase retardation layer RP-2. For example, the second linear polarization layer PP-2 may be an optical layer that linearly polarizes the provided light in one direction or along one side, and the second phase retardation layer RP-2 may be an optical layer that delays the phase of the provided light. The second phase retardation layer RP-2 may include a λ / 4 phase retarder.

[0223] According to the embodiments, the optical control layer including the upper polarizer can be an optical control layer that includes a non-polarizing portion, such as the one described above. Figures 6 to 8 The described downpolarizer PM-a. Figure 19 This is a schematic cross-sectional view of the light control layer according to the implementation method.

[0224] Reference Figure 19 According to the embodiment, the optical control layer ARP-a may include a third polarization region SA-P2 and a fourth polarization region NSA-P2. In the embodiment, the third polarization region SA-P2 may be the same as the first polarization region SA-P2. Figure 7 The fourth polarization region NSA-P2 may be a portion overlapping with the second polarization region NSA-P. The third polarization region SA-P2 may be a portion overlapping with the electronic module EM. Figure 2 ) overlaps with and is adjacent to the sensing area SA-DD of the electronic device DD ( Figure 1 The fourth polarization region NSA-P2 may surround at least a portion of the third polarization region SA-P2.

[0225] In this embodiment, the third polarization region SA-P2 and the fourth polarization region NSA-P2 may have different average transmittances. The average transmittance in the third polarization region SA-P2 may be higher than that in the fourth polarization region NSA-P2.

[0226] The third polarization region SA-P2 may include a second polarization portion LP2 and a second non-polarization portion NP2. In an embodiment, the second linear polarization layer PP-2a may include a second polarization portion LP2 and a second non-polarization portion NP2.

[0227] According to the embodiment, the optical control layer ARP-a may include a second linear polarization layer PP-2a and a second phase retardation layer RP-2. The second linear polarization layer PP-2a includes a third polarization region SA-P2 and a fourth polarization region NSA-P2. The second phase retardation layer RP-2 is disposed below or below the second linear polarization layer PP-2a. In the third polarization region SA-P2, the second linear polarization layer PP-2a may include a second non-polarization portion NP2.

[0228] As referenced above Figures 6 to 8Similar to the described downpolarizer PM-a, the second non-polarized portion NP2 can be a portion of the light absorber in the polymer film of the second linear polarization layer PP-2a that can be desorbed, or a portion of the polymer film of the second linear polarization layer PP-2a that can be adsorbed with only a small amount of light absorber.

[0229] The lower polarizer has Figure 7 In the case of the structure of the lower polarizer PM-a shown, the optical control layer can have Figure 18 The structure of the upper polarizer shown or Figure 19 The structure of the upper polarizer is shown.

[0230] The lower polarizer has Figure 7 The structure of the lower polarizer PM-a shown is illustrated, and the light control layer has... Figure 19 In the case of the structure of the upper polarizer shown, the first non-polarizing portion NP1 and the second non-polarizing portion NP2 can correspond to each other and overlap. However, the embodiments are not limited to this.

[0231] Figure 20 This is a schematic diagram illustrating the optical axis relationship between the lower polarizer and the optical layer included in the light control layer in an electronic device according to an embodiment. Figure 20 The electronic device shown in the embodiment may include having Figure 18 The upper polarizer shown is constructed with an optical control layer ARP and may include... Figure 5 and Figure 9 The optical axis relationship is shown in the case of the lower polarizer PM.

[0232] The first phase retardation layer RP-1 and the first linear polarization layer PP-1 can be sequentially arranged or set from the display panel DP in the downward direction, and the second phase retardation layer RP-2 and the second linear polarization layer PP-2 can be sequentially arranged or set from the display panel DP in the upward direction. Each of the first phase retardation layer RP-1 and the second phase retardation layer RP-2 can be a λ / 4 phase delayer.

[0233] In one embodiment, the optical control layer ARP may include a second linear polarization layer PP-2 and a second phase delay layer RP-2, wherein the second linear polarization layer PP-2 has an angle θ relative to the reference line RL. P2 The absorption axis PP2-AX, the second phase retardation layer RP-2 is arranged or disposed below or beneath the second linear polarization layer PP-2 and has an angle θ relative to the reference line RL. RP2 The optical axis RP2-OX. The angle between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis RP2-OX of the second phase retardation layer RP-2 can correspond to the angle θ. RP2 With angle θ P2The difference between them, and the angle between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis RP2-OX of the second phase retardation layer RP-2 can be about 45±5 degrees.

[0234] Reference above Figure 20 The optical axis relationship between the second linear polarization layer PP-2 and the second phase retardation layer RP-2 described herein can also be applied to the reference. Figure 19 The implementation of the optical control layer ARP-a is described.

[0235] In one embodiment, the lower polarizer PM may include a first linear polarization layer PP-1 and a first phase delay layer RP-1, wherein the first linear polarization layer PP-1 has an angle θ relative to the reference line RL. P1 The absorption axis PP1-AX, the first phase delay layer RP-1 is arranged or disposed on the first linear polarization layer PP-1 and has an angle θ relative to the reference line RL. RP1 The optical axis RP1-OX. The angle between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis RP1-OX of the first phase retardation layer RP-1 can correspond to the angle θ. RP1 With angle θ P1 The difference between them, and the angle between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis RP1-OX of the first phase retardation layer RP-1 can be about 45±5 degrees.

[0236] In an embodiment, the light supplied to the light control layer ARP from above the light control layer ARP and sequentially transmitted through the second linear polarization layer PP-2 and the second phase retardation layer RP-2 can be counterclockwise polarized light, and the light supplied after sequentially transmitting through the first linear polarization layer PP-1 and the first phase retardation layer RP-1 of the lower polarizer PM can also be counterclockwise polarized light.

[0237] As an example, in an implementation, the light provided after sequentially passing through the second linear polarization layer PP-2 and the second phase retardation layer RP-2 of the light control layer ARP can be clockwise polarized light, and the light provided after sequentially passing through the first linear polarization layer PP-1 and the first phase retardation layer RP-1 of the lower polarizer PM can also be clockwise polarized light.

[0238] For example, in the electronic device of the embodiment, when the light control layer ARP is configured as an upper polarizer, both the upper polarizer and the lower polarizer PM can polarize the supplied light counterclockwise for transmission, or both the upper polarizer and the lower polarizer PM can polarize the supplied light clockwise for transmission. Accordingly, in the electronic device of the embodiment, external optical signals can be transmitted through the non-pixel unit AR2 ( Figure 17A corresponding part and provided to the electronic module EM ( Figure 2 ), and from the electronic module EM ( Figure 2 The emitted optical signals can be transmitted to the outside. Figure 21 and Figure 22 Each of these is a schematic cross-sectional view of a portion of a second display area in an electronic device according to an embodiment.

[0239] Figure 21 and Figure 22 An electronic device including a color filter layer as a light control layer according to an embodiment is shown. (See reference...) Figure 21 and Figure 22 The electronic devices DD-a and DD-1a in the embodiments may include, for example: Figure 17 The diagram shows a lower polarizer PM, a display panel DP arranged or disposed on the lower polarizer PM, and an optical control layer ARP-b arranged or disposed on the display panel DP.

[0240] The lower polarizer PM can have Figure 5 The stacked structure of the linear polarization layer and the phase retardation layer shown in the figure or Figure 7 The diagram shows a stacked structure of a linear polarization layer and a phase delay layer.

[0241] The display panel DP of this embodiment may include three light-emitting areas EA-B, EA-G, and EA-R, and a non-light-emitting area NPA may be arranged or positioned between adjacent light-emitting areas EA-B, EA-G, and EA-R. In this embodiment, the first light-emitting area EA-B may emit blue light, the second light-emitting area EA-G may emit green light, and the third light-emitting area EA-R may emit red light. However, the embodiment is not limited to this, and the blue, green, and red light may be changed to other three primary colors of light.

[0242] The display panel DP may include a base layer BL and a circuit layer DP-CL, a light-emitting element layer DP-ED, and an upper insulating layer TFL disposed on or set on the base layer BL. The above references may apply here. Figure 17 Descriptions of the base layer BL, circuit layer DP-CL, light-emitting element layer DP-ED, and upper insulating layer TFL are provided.

[0243] and Figure 21 and Figure 17 The electronic devices shown are different. Figure 22 A portion of an electronic device DD-1a is shown, which may include a sensor layer TP. The sensor layer TP may include a base layer BS-T, a first conductive layer ML1, a sensing insulating layer PV1, a second conductive layer ML2, and a covering insulating layer PV2.

[0244] The base layer BS-T can be an inorganic layer comprising at least one of silicon nitride, silicon oxynitride, and silicon oxide. As an example, the base layer BS-T can be an organic layer comprising epoxy resin, acrylic resin, or imide resin. The base layer BS-T can have a single-layer structure or a multilayer structure stacked in the direction of the third directional axis DR3. In some embodiments, the base layer BS-T may be omitted.

[0245] Each of the first conductive layer ML1 and the second conductive layer ML2 may have a single-layer structure or may have a multi-layer structure stacked in the direction of the third directional axis DR3.

[0246] The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or alloys thereof. The transparent conductive layer may include a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium tin zinc oxide (ITZO). For example, within the spirit and scope of this disclosure, the transparent conductive layer may include conductive polymers such as PEDOT, metal nanowires, graphene, etc.

[0247] A conductive layer with a multilayer structure may include a metal layer. The metal layer may have a three-layer structure, such as titanium / aluminum / titanium. A conductive layer with a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0248] The sensor layer TP can obtain information about external inputs based on changes in mutual capacitance or self-capacitance. For example, the sensor layer TP may include sensing patterns and bridging patterns. At least a portion of the sensing patterns and bridging patterns may be included in a first conductive layer ML1, and at least another portion of the sensing patterns and bridging patterns may be included in a second conductive layer ML2.

[0249] At least one of the sensing insulating layer PV1 and the covering insulating layer PV2 may include an inorganic layer. The inorganic layer may include at least one of alumina, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0250] At least one of the sensing insulating layer PV1 and the covering insulating layer PV2 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0251] The light control layer ARP-b according to the embodiment may include a light-shielding portion BM and filter portions CF1, CF2 and CF3. The light control layer ARP-b may include a first filter portion CF1 for transmitting blue light, a second filter portion CF2 for transmitting green light, and a third filter portion CF3 for transmitting red light.

[0252] Each of the filter portions CF1, CF2, and CF3 may include a polymeric photosensitive resin and a pigment or dye. The first filter portion CF1 may include a blue pigment or dye, the second filter portion CF2 may include a green pigment or dye, and the third filter portion CF3 may include a red pigment or dye. However, the embodiments are not limited thereto, and the first filter portion CF1 may not include a pigment or dye. The first filter portion CF1 may include a polymeric photosensitive resin, but may not include a pigment or dye. The first filter portion CF1 may be transparent. The first filter portion CF1 may be formed of a transparent photosensitive resin.

[0253] Furthermore, in this embodiment, the second filter section CF2 and the third filter section CF3 can be yellow filters. The second filter section CF2 and the third filter section CF3 can be configured as a single unit and not separated from each other.

[0254] The first filter section CF1, the second filter section CF2, and the third filter section CF3 may be arranged or configured corresponding to the first light-emitting area EA-B (e.g., blue light-emitting area), the second light-emitting area EA-G (e.g., green light-emitting area), and the third light-emitting area EA-R (e.g., red light-emitting area).

[0255] The light-shielding portion BM can be a black matrix. The light-shielding portion BM can include organic light-shielding materials or inorganic light-shielding materials comprising black pigments or dyes. The light-shielding portion BM prevents light leakage and defines a boundary between adjacent filter portions CF1, CF2, and CF3. Furthermore, in an embodiment, the light-shielding portion BM can be formed from a blue light filter.

[0256] In this embodiment, the first filter portion CF1 may be arranged or disposed overlapping with the light-shielding portion BM. The first filter portion CF1 may also be disposed on a portion overlapping the first light-emitting area EA-B and the light-shielding portion BM between adjacent light-emitting areas.

[0257] The light control layer ARP-b may include a capping layer BFL-C. The capping layer BFL-C may include at least one inorganic layer. For example, the capping layer BFL-C may be formed of an inorganic material. For example, the capping layer BFL-C may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, silicon oxynitride, or a thin metal film with stable light transmittance. The capping layer BFL-C may also include an organic layer. The capping layer BFL-C may be constructed as a single layer or multiple layers. In embodiments, the capping layer BFL-C may be omitted.

[0258] Furthermore, unlike the illustration, in this embodiment, the capping layer BFL-C may also include an upper base substrate (not shown). The upper base substrate (not shown) may be a component providing a base surface on which filter portions CF1, CF2, and CF3 can be arranged or disposed. Within the spirit and scope of this disclosure, the upper base substrate (not shown) may be a glass substrate, a metal substrate, a plastic substrate, etc. However, the embodiment is not limited to this, and therefore, the upper base substrate (not shown) may be an inorganic layer, an organic layer, or a composite material layer. The capping layer BFL-C, which also includes the upper base substrate (not shown), may be omitted.

[0259] The light control layer ARP-b, which can be a color filter layer, can be arranged or set in... Figure 21 The upper insulating layer TFL is shown on the electronic device DD-a. Additionally, a light control layer ARP-b, which may be a color filter layer, can be arranged or disposed on it. Figure 22 On the insulating layer PV2 of the electronic device DD-1a shown.

[0260] Figure 23 This is a schematic cross-sectional view of a portion of the electronic device in the embodiment. Figure 24 This is a schematic cross-sectional view of a portion of the first display area of ​​an electronic device according to an embodiment. Figure 24 Can be shown Figure 23 It is part of the sensing area SA-DD.

[0261] Reference Figure 23 and Figure 24 The electronic device DD-2 of the embodiment may include a display panel DP, an optical control layer ARP disposed on or below the display panel DP, and a lower polarizer PM-a disposed below or below the display panel DP. An electronic module EM may be disposed below or below the lower polarizer PM-a. A support member SP, which may define a through-hole HH, may be disposed below or below the lower polarizer PM-a, and at least a portion of the electronic module EM may overlap with the through-hole HH.

[0262] Reference above Figures 4 to 17 The provided description is also applicable Figure 23 and Figure 24The electronic device DD-2 shown includes a display panel DP, a support member SP, and an electronic module EM. However, referring to... Figure 24 ,and Figure 17 Unlike the illustration, in this embodiment, the masking pattern BML included in the circuit layer DP-CL can overlap with the entire second pixel unit AR1'.

[0263] In the electronic device DD-2 of this embodiment, the lower polarizer PM-a may include a first polarization region SA-P overlapping with the first display region SA-EP and a second polarization region NSA-P overlapping with the second display region NSA-EP. The lower polarizer PM-a may include a first non-polarized portion NP1 and a first polarized portion LP1.

[0264] In this embodiment, the first non-polarized portion NP1 may not overlap with the masking pattern BML. Furthermore, the first polarized portion LP1 may overlap with the masking pattern BML. Additionally, although not shown, the second polarized region NSA-P of the lower polarizer PM-a, which is arranged or disposed corresponding to the second display area NSA-EP, may overlap with the entire circuit layer DP-CL.

[0265] According to the embodiment, a lower polarizer PM-a having a first non-polarized portion NP1 and a first polarized portion LP1 can be formed using an opaque layer included in the circuit layer DP-CL as a mask through a patterning process. For example, a masking pattern BML included in the circuit layer DP-CL can be used as a mask to form the lower polarizer PM-a having the first non-polarized portion NP1. The lower polarizer PM-a can be arranged or disposed below or beneath the circuit layer DP-CL having the masking pattern BML, and laser light can be irradiated from above the circuit layer DP-CL so that it can be transmitted through the circuit layer DP-CL and incident on the lower polarizer, such that the laser light can be transmitted to a portion of the lower polarizer that does not overlap with the masking pattern BML. Here, due to the provided laser light, the first non-polarized portion NP1 can be formed or disposed in the portion that does not overlap with the masking pattern BML.

[0266] For example, since the portion overlapping with the masking pattern BML is not irradiated by the laser, the light absorber included in the first linear polarization layer PP-1a is not desorbed in the portion overlapping with the masking pattern BML used as a mask, and the portion not overlapping with the masking pattern BML is irradiated by the laser, causing the light absorber included in the first linear polarization layer PP-1a to be desorbed, thus forming the first non-polarized portion NP1.

[0267] In the electronic device DD-2 of this embodiment, the light control layer ARP can be an upper polarizer or a color filter layer. When the light control layer ARP can be an upper polarizer in the electronic device DD-2 of this embodiment, the light control layer ARP can have... Figure 18 or Figure 19The structure of the light control layer is shown in the diagram. The electronic device DD-2 has... Figure 19 In the case of the upper polarizer structure shown, the optical control layer ARP may include a third polarization region SA-P2 that overlaps with the first polarization region SA-P. Figure 19 ) and the fourth polarization region NSA-P2 (which overlaps with the second polarization region NSA-P) Figure 19 In the following text, reference will be made to... Figures 25 to 33 An electronic device according to an embodiment is described. References are made below. Figures 25 to 33 The description of the electronic device provided according to the embodiments focuses on the reference. Figures 1 to 24 The above descriptions may differ, and overlapping descriptions may be omitted.

[0268] Figure 25 This is a schematic cross-sectional view of the electronic device according to the embodiment. Figure 25 The electronic device DD-3 shown according to the embodiment and the reference Figure 4 The electronic device DD described differs in construction from the lower polarizer PM-1.

[0269] The lower polarizer PM-1 included in the electronic device DD-3 according to the embodiment may include a first linear polarization layer PP-1 and a first phase delay layer RP1-a disposed on the first linear polarization layer PP-1, wherein the first phase delay layer RP1-a may include a first λ / 4 phase delayer RP-Q1 and a first λ / 2 phase delayer RP-H1. The first λ / 2 phase delayer RP-H1 may be disposed between the first linear polarization layer PP-1 and the first λ / 4 phase delayer RP-Q1.

[0270] The electronic device DD-3 of the embodiment may include a lower polarizer PM-1, which includes a first linear polarization layer PP-1, a first λ / 2 phase delayer RP-H1 and a first λ / 4 phase delayer RP-Q1 that can be stacked sequentially on each other in the direction from the electronic module EM to the display panel DP.

[0271] The first λ / 2 phase delay RP-H1 and the first λ / 4 phase delay RP-Q1 can be compared with the above reference. Figure 5 The first phase retardation layer RP-1 described herein is a stretched film of the same type. The λ / 2 phase retarders and λ / 4 phase retarders described herein may be formed by biaxially stretched films or provided in the form of liquid crystal coatings, but this disclosure is not limited thereto.

[0272] Figure 26 This is a schematic diagram illustrating the optical axis in a downpolarizer according to an embodiment, and Figure 27 This is a diagram schematically illustrating the relationship between the optical axes in a downpolarizer according to an embodiment. Figure 28 This is a diagram illustrating the optical axis relationship in an electronic device according to an embodiment.

[0273] Reference Figures 26 to 28 In this embodiment, the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1 is... PQ1 It can be approximately 15 ± 5 degrees, and the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis H1-OX of the first λ / 2 phase retarder RP-H1 is... PH1 It can be approximately 75 ± 5 degrees.

[0274] In the implementation, when the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1... PQ1 It is approximately 15±5, and the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis H1-OX of the first λ / 2 phase retarder RP-H1 is approximately 15±5. PH1 When the condition of approximately 75 ± 5 degrees is met, the angle θ of the absorption axis PP1-AX of the first linear polarization layer PP-1 relative to the reference line RL is... P1 The angle θ of the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1 relative to the baseline RL Q1 The angle θ of the optical axis H1-OX of the first λ / 2 phase retarder RP-H1 relative to the reference line RL H1 Various changes can be made.

[0275] For example, in the lower polarizer PM-1 according to the embodiment, the angle θ of the absorption axis PP1-AX of the first linear polarizing layer PP-1 P1 It can be approximately 135±5 degrees, the angle θ of the optical axis H1-OX of the first λ / 2 phase retarder RP-H1. H1 It can be approximately 60±5 degrees, and the angle θ of the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1. Q1 It can be approximately 120 ± 5 degrees. However, the implementation method is not limited to this.

[0276] In the electronic device DD-3 of the embodiment, the light control layer ARP-1 may be a color filter layer or an upper polarizer including at least one phase delay layer and a linear polarization layer.

[0277] The optical control layer ARP-1 included in the electronic device DD-3 of the embodiment may include a second linear polarization layer PP-2, a second λ / 2 phase retarder RP-H2, and a second λ / 4 phase retarder RP-Q2. In the embodiment, the optical control layer ARP-1, which may be an upper polarizer, may include a second λ / 4 phase retarder RP-Q2, a second λ / 2 phase retarder RP-H2, and a second linear polarization layer PP-2 that may be sequentially stacked on top of each other in a direction away from the display panel DP.

[0278] In the embodiment, the angle (θ) between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2 P2 With θ Q2 The difference between them can be approximately 15 ± 5 degrees, and the angle (θ) between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis H2-OX of the second λ / 2 phase retarder RP-H2 P2 With θ H2 The difference between them can be approximately 75 ± 5 degrees.

[0279] In the implementation, when the conditions are met that the angle between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2 is approximately 15±5 degrees and the angle between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis H2-OX of the second λ / 2 phase retarder RP-H2 is approximately 75±5 degrees, the angle θ of the absorption axis PP2-AX of the second linear polarization layer PP-2 relative to the reference line RL is... P2 The angle θ of the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2 relative to the baseline RL Q2 And the angle θ of the optical axis H2-OX of the second λ / 2 phase retarder RP-H2 relative to the reference line RL H2 Various changes can be made.

[0280] For example, in the optical control layer ARP-1, which may be an upper polarizer according to the embodiment, the angle θ of the absorption axis PP2-AX of the second linear polarization layer PP-2 is... P2 It can be approximately 45±5 degrees, the angle θ of the optical axis H2-OX of the second λ / 2 phase retarder RP-H2. H2 It can be approximately 120±5 degrees, and the angle θ of the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2. Q2 It can be approximately 60 ± 5 degrees. However, the implementation method is not limited to this.

[0281] Although Figure 28The absorption axis PP1-AX of the first linear polarization layer PP-1 and the absorption axis PP2-AX of the second linear polarization layer PP-2 are shown to intersect each other, but the implementation is not limited to this. For example, the absorption axis PP1-AX of the first linear polarization layer PP-1 and the absorption axis PP2-AX of the second linear polarization layer PP-2 are not necessarily perpendicular to each other.

[0282] In this embodiment, when the optical axes of the second linear polarization layer PP-2, the second λ / 2 phase retarder RP-H2, and the second λ / 4 phase retarder RP-Q2 have the aforementioned angular relationship in the upper polarizer, and the optical axes of the first linear polarization layer PP-1, the first λ / 2 phase retarder RP-H1, and the first λ / 4 phase retarder RP-Q1 have the aforementioned angular relationship in the lower polarizer PM-1, the direction of the absorption axis PP1-AX of the first linear polarization layer PP-1 and the direction of the absorption axis PP2-AX of the second linear polarization layer PP-2 can be independent of each other. For example, the absorption axis PP1-AX of the first linear polarization layer PP-1 and the absorption axis PP2-AX of the second linear polarization layer PP-2 can intersect in different directions or be parallel to each other.

[0283] exist Figure 28 In the electronic device DD-3 according to the embodiment shown, the light provided to the light control layer ARP-1 and sequentially transmitted through the second linear polarization layer PP-2, the second λ / 2 phase retarder RP-H2, and the second λ / 4 phase retarder RP-Q2 can be counterclockwise polarized light, and the light provided after sequentially transmitting through the first linear polarization layer PP-1, the first λ / 2 phase retarder RP-H1, and the first λ / 4 phase retarder RP-Q1 of the lower polarizer PM-1 can also be counterclockwise polarized light.

[0284] Figure 29 This is a diagram showing the optical axis in the electronic device DD-4 according to an embodiment. Figure 30A It is a diagram showing the optical axis relationship between the optical layers in the light control layer, and Figure 30B This is a diagram showing the optical axis relationship between the optical layers in the lower polarizer.

[0285] Figure 29The electronic device DD-4 shown according to the embodiment may include an optical control layer ARP-1a as an upper polarizer on the display panel DP and a lower polarizer PM-1a below or below the display panel DP. The optical control layer ARP-1a, which may be an upper polarizer, may include a second λ / 4 phase retarder RP-Q2, a second λ / 2 phase retarder RP-H2, and a second linear polarization layer PP-2 that may be stacked sequentially on each other in a direction away from the display panel DP, and the lower polarizer PM-1a may include a first linear polarization layer PP-1, a first λ / 2 phase retarder RP-H1, and a first λ / 4 phase retarder RP-Q1 that may be stacked sequentially on each other in a direction pointing towards the display panel DP.

[0286] Reference Figures 29 to 30B In this embodiment, the angle θ between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2 is... PQ2 It can be approximately 15 ± 5 degrees, and the angle θ between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis H2-OX of the second λ / 2 phase retarder RP-H2. PH2 It can be approximately 75 ± 5 degrees. Furthermore, the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1... PQ1 It can be approximately 15 ± 5 degrees, and the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis H1-OX of the first λ / 2 phase retarder RP-H1 is... PH1 It can be approximately 75 ± 5 degrees.

[0287] In the implementation, when the angle θ between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2... PQ2 It is approximately 15 ± 5 degrees and the angle θ between the absorption axis PP2-AX of the second linear polarization layer PP-2 and the optical axis H2-OX of the second λ / 2 phase retarder RP-H2. PH2 When the condition of approximately 75 ± 5 degrees is met, the direction of the absorption axis PP2-AX of the second linear polarization layer PP-2 can be changed in various ways. Furthermore, in the embodiment, the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1 is... PQ1 It is approximately 15 ± 5 degrees and the angle θ between the absorption axis PP1-AX of the first linear polarization layer PP-1 and the optical axis H1-OX of the first λ / 2 phase retarder RP-H1. PH1When the condition of approximately 75±5 degrees is met, the direction of the absorption axis PP1-AX of the first linear polarization layer PP-1 can be changed in various ways.

[0288] For example, in the lower polarizer PM-1a according to the embodiment, the angle θ of the absorption axis PP1-AX of the first linear polarizing layer PP-1 relative to the reference line RL parallel to the first direction axis DR1 is... P1 It can be approximately 135±5 degrees, the angle θ of the optical axis H1-OX of the first λ / 2 phase retarder RP-H1 relative to the reference line RL. H1 It can be approximately 30 ± 5 degrees, and the angle θ between the optical axis Q1-OX of the first λ / 4 phase retarder RP-Q1 and the reference line RL. Q1 It can be approximately 150 ± 5 degrees. However, the implementation is not limited to this. Furthermore, in the light control layer ARP-1a, which can be an upper polarizer, the angle θ of the absorption axis PP2-AX of the second linear polarization layer PP-2 relative to the reference line RL parallel to the first direction axis DR1 is... P2 It can be approximately 45±5 degrees, the angle θ of the optical axis H2-OX of the second λ / 2 phase retarder RP-H2 relative to the reference line RL. H2 It can be approximately 150 ± 5 degrees, and the angle θ between the optical axis Q2-OX of the second λ / 4 phase retarder RP-Q2 and the reference line RL. Q2 It can be approximately 30 ± 5 degrees. However, the implementation method is not limited to this.

[0289] exist Figure 29 In the embodiment shown, the light provided to the light control layer ARP-1a and sequentially transmitted through the second linear polarization layer PP-2, the second λ / 2 phase retarder RP-H2, and the second λ / 4 phase retarder RP-Q2 can be clockwise polarized light, and the light provided after sequentially transmitting through the first linear polarization layer PP-1, the first λ / 2 phase retarder RP-H1, and the first λ / 4 phase retarder RP-Q1 of the lower polarizer PM-1a can also be clockwise polarized light.

[0290] Reference Figure 28 and Figure 29 In the electronic devices DD-3 and DD-4 of the embodiments, when the light control layer ARP-1 or ARP-1a can be configured as an upper polarizer, both the upper polarizer and the lower polarizer PM-1 or PM-1a can polarize the supplied light counterclockwise to transmit light, or both the upper polarizer and the lower polarizer PM-1 or PM-1a can polarize the supplied light clockwise to transmit light. Accordingly, in the electronic devices DD-3 and DD-4 of the embodiments, external optical signals can be transmitted through the non-pixel unit AR2 ( Figure 17 A corresponding part and provided to the electronic module EM ( Figure 2 ), and from the electronic module EM ( Figure 2 The emitted optical signals can be transmitted to the outside.

[0291] Reference above Figure 28 and Figure 29 The lower polarizers PM-1 and PM-1a of the described electronic devices DD-3 and DD-4 may have the features described above. Figure 8 The structure of the first linear polarization layer PP-1a in the described embodiment.

[0292] Figure 31 This is a diagram illustrating the direction of light propagation in an electronic device according to an embodiment. The electronic device according to an embodiment may include an electronic module EM, a display panel DP disposed on or provided on the electronic module EM, a lower polarizer PM disposed between the electronic module EM and the display panel DP, and a light control layer ARP disposed on or provided on the display panel DP.

[0293] Light incident on the electronic module EM from above the light control layer ARP (e.g., from outside the electronic device), or light transmitted from the electronic module EM through the display panel DP towards the light control layer ARP, is transmitted as transmitted light TL in a transmissive area that may be a part of the non-pixel unit AR2 that does not overlap with the masking pattern BML. The transmitted light TL is transmitted through the light control layer ARP and the lower polarizer PM without being reflected by the metallic patterns included in the circuit layer DP-CL or the light-emitting element layer DP-ED.

[0294] The upper light SL-U, which is a portion of the light incident toward the masking pattern BML and can be incident on the light control layer ARP toward the electronic module EM, is reflected from the masking pattern BML and incident on the light control layer ARP as the upper reflected light RF-U. The light control layer ARP absorbs the upper reflected light RF-U or blocks the transmission of the reflected light RF-U so that the upper reflected light RF-U is not visible from the outside of the electronic device.

[0295] Furthermore, the lower light SL-D, which is a portion of the light incident on the masking pattern BML and can be incident from the electronic module EM to the display panel DP, is reflected from the masking pattern BML and incident on the lower polarizer PM as the lower reflected light RF-D. The lower polarizer PM blocks the transmission and emission of the incident lower reflected light RF-D to the outside, so that the lower reflected light RF-D cannot be seen from the outside of the electronic device.

[0296] Therefore, the electronic device of the embodiment, which may include a lower polarizer between the display panel and the electronic module and may also include a light control layer on the display panel, can block reflected light from a metallic pattern layer, such as a masking pattern, included in the display panel, thereby providing excellent display quality. Furthermore, the electronic device of the embodiment can prevent the display or capture of distorted images by blocking reflected light.

[0297] Figure 32 This is an exploded perspective view of the electronic device according to the embodiment. Figure 33 This is a schematic cross-sectional view of the electronic device according to the embodiment. Figure 33 It is shown that... Figure 32 A schematic cross-sectional view of a portion corresponding to line IV-IV'.

[0298] Reference Figure 32 and Figure 33 In the electronic device DD-b of the embodiment, the lower polarizer PM-b can be arranged or disposed between the electronic module EM and the display panel DP. The lower polarizer PM-b can be arranged or disposed in the optical path of the electronic module EM.

[0299] In one embodiment, the lower polarizer PM-b may overlap with the first display area SA-EP. The lower polarizer PM-b may overlap the entire first display area SA-EP, and may only not overlap with a portion of the second display area NSA-EP. The lower polarizer PM-b may overlap with a portion of the first display area SA-EP and the second display area NSA-EP adjacent to the first display area SA-EP. However, unlike the illustration, in one embodiment, the lower polarizer PM-b may only overlap with the first display area SA-EP, and may not overlap with the second display area NSA-EP. For example, in one embodiment, the lower polarizer PM-b may be configured to correspond to the first display area SA-EP.

[0300] like Figure 33 As shown, the lower polarizer PM-b can be arranged or disposed in a portion of the sensing area SA-DD and the active area AA-DD adjacent to the sensing area SA-DD. In another portion of the active area AA-DD, where the lower polarizer PM-b may not be arranged or may not be disposed, an adhesive layer AP4 can be arranged or disposed. The adhesive layer AP4 can fill the remaining portion of the lower polarizer PM-b not arranged or disposed between the support member SP and the display panel DP.

[0301] exist Figure 32 and Figure 33 In the electronic device DD-b shown, the lower polarizer PM-b can be arranged or configured to completely overlap with the upper part of the electronic module EM. For example, the lower polarizer PM-b can be arranged or configured to completely overlap with the lens LZ, which may be the upper part of the electronic module EM. Figure 32 and Figure 33 In the embodiment shown, the area of ​​the lower polarizer PM-b can be larger than the area of ​​the lens LZ of the electronic module EM.

[0302] In the electronic device DD-b of the embodiment, the lower polarizer PM-b can be arranged or configured to completely overlap with the upper part of the electronic module EM, so that reflected light reflected from the metal pattern included in the display panel DP and incident on the electronic module EM, or light emitted from the electronic module EM and incident backward on the electronic module EM after being reflected from the metal pattern included in the display panel DP, can be blocked, thereby providing improved display quality and improved image capture quality.

[0303] An implementation may include an electronic device that includes a lower polarizer between the electronic module and the display panel, which can effectively block light reflected from metallic patterns or the like included in the display panel, thereby providing improved display quality and improved performance of the electronic module.

[0304] One implementation may provide an electronic device that suppresses display quality degradation caused by light reflected from a metallic pattern included in the display panel by arranging or setting a downpolarizer between an electronic module and a display panel.

[0305] Furthermore, embodiments may provide an electronic device that suppresses image distortion and image capture quality degradation that may occur due to light reflected from a metallic pattern included in the display panel by arranging or setting a polarizer between the electronic module and the display panel.

[0306] Although embodiments have been described, it should be understood that this disclosure is not intended to be limited to these embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of this disclosure as claimed below.

Claims

1. An electronic device comprising: Electronic module; A support member, wherein a through-hole overlapping with the electronic module is defined in the support member; A display panel, disposed on the support member, includes: The first display area overlaps with the through hole of the support member; and The second display area does not overlap with the through hole of the support member, and the second display area is adjacent to the first display area; A light control layer is disposed on the display panel; and A lower polarizer is disposed between the electronic module and the display panel. The lower polarizer includes: A first linear polarization layer, adjacent to the electronic module; and A first phase delay layer is disposed between the first linear polarization layer and the display panel. The display panel includes: base layer; A circuit layer is disposed on the base layer and includes a masking pattern disposed on the base layer; A light-emitting element layer is disposed on the circuit layer; and An upper insulating layer is disposed on the light-emitting element layer. The first display area of ​​the display panel includes: Non-pixel areas, excluding the masking pattern; and Pixel area, including the masking pattern, The lower polarizer includes: A first polarization region, overlapping with the first display area and including: First polarization section; and The first non-polarized portion has a higher transmittance than the first polarized portion. Wherein, the non-pixel region overlaps with the first non-polarized region, and the pixel region overlaps with the first polarized region.

2. The electronic device according to claim 1, wherein, The first phase delay layer of the lower polarizer is a λ / 4 phase delay unit, and The angle between the absorption axis of the first linear polarizing layer of the lower polarizer and the optical axis of the first phase retardation layer of the lower polarizer is 45 ± 5 degrees, and wherein, The optical control layer includes an upper polarizer. The upper polarizer includes: The second linear polarization layer; and A second phase delay layer is disposed between the display panel and the second linear polarization layer. The second phase delay layer of the upper polarizer is a λ / 4 phase delayer, and The angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second phase retardation layer of the upper polarizer is 45 ± 5 degrees.

3. The electronic device according to claim 1, wherein, The first phase delay layer of the lower polarizer includes: First λ / 4 phase delay; and A first λ / 2 phase retarder is disposed between the first λ / 4 phase retarder and the first linear polarization layer of the lower polarizer. The angle between the absorption axis of the first linear polarization layer of the lower polarizer and the optical axis of the first λ / 4 phase retarder is 15 ± 5 degrees, and The angle between the absorption axis of the first linear polarization layer of the lower polarizer and the optical axis of the first λ / 2 phase retarder is 75 ± 5 degrees. The light control layer includes an upper polarizer. The upper polarizer includes: Second linear polarization layer; A second λ / 4 phase retarder is disposed between the display panel and the second linear polarization layer; and A second λ / 2 phase retarder is disposed between the second λ / 4 phase retarder and the second linear polarization layer. The angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second λ / 4 phase retarder of the upper polarizer is 15 ± 5 degrees, and The angle between the absorption axis of the second linear polarization layer of the upper polarizer and the optical axis of the second λ / 2 phase retarder of the upper polarizer is 75 ± 5 degrees.

4. The electronic device according to claim 3, wherein, The polarization component transmitted through the lower polarizer and the polarization component transmitted through the light control layer are both counterclockwise polarized light.

5. The electronic device according to claim 3, wherein, The polarization component transmitted through the lower polarizer and the polarization component transmitted through the light control layer are both clockwise polarized light.

6. The electronic device according to claim 1, wherein, The electronic module includes a lens adjacent to the lower polarizer, and In the plan view, the area of ​​the lower polarizer is larger than the area of ​​the lens of the electronic module.

7. The electronic device according to claim 1, wherein, The first polarizing portion and the first non-polarizing portion are arranged alternately with each other; The lower polarizer also includes: The second polarization region is adjacent to the first polarization region and overlaps with the second display area of ​​the display panel. The first linear polarizing layer of the lower polarizer comprises a stretched polymer film and a light absorber adsorbed into the stretched polymer film. The number of light absorbers per unit area in the first non-polarized portion of the lower polarizer is less than the number of light absorbers per unit area in the first polarized portion of the lower polarizer.

8. The electronic device according to claim 1, wherein, The lower polarizer includes: A first polarization region, overlapping with the first display area and including: First polarization section; and The first non-polarized portion has a higher transmittance than the first polarized portion; and The second polarization region is adjacent to the first polarization region and overlaps with the second display area of ​​the display panel. The optical control layer includes an upper polarizer, and The upper polarizer includes: The third polarization region overlaps with the first polarization region of the lower polarizer and includes: The second polarization section; and The second non-polarized portion has a higher transmittance than the second polarized portion; and The fourth polarization region overlaps with the second polarization region of the lower polarizer.

9. The electronic device according to claim 1, wherein, The transmittance of light transmitted through the light control layer and the lower polarizer that overlap with the non-pixel area is higher than the transmittance of light transmitted through the light control layer and the lower polarizer that overlap with the pixel area.

10. The electronic device according to claim 1, wherein, Each of the first display area and the second display area of ​​the display panel includes a plurality of pixel units, and The number of pixel units per unit area in the plurality of pixel units in the second display area of ​​the display panel is greater than the number of pixel units per unit area in the plurality of pixel units in the first display area of ​​the display panel.

Images