A ranging code generation method compatible with continuous and pulse navigation signals

Abstract

The present invention discloses a ranging code generation method compatible with continuous and pulse navigation signals, the method comprising: utilizing feedback shift register to shift and generate G1 sequence and G2 sequence; generating a reset control clock at the whole millisecond moment, controlling the reset of G1, G2, chip counter and time slot counter; respectively setting the sequence period of G1 and G2; the shift control clock generates CA sequence and CB sequence by continuously shifting two feedback shift registers; obtaining a two-bit wide ranging code low bit after the CA sequence and the CB sequence are XORed; controlling the chip counter to count the chips, and generating a driving signal when the module value is reached; the time slot counter generates the ranging code high bit according to the driving signal and through the receiving timing selection control signal control; combining the ranging code high bit and the ranging code low bit to generate a ranging code compatible with continuous and pulse navigation signals. The present invention can be compatible with capturing and tracking satellite continuous signals and pseudo-satellite pulse signals, and expands the baseband processing capability.

Description

Technical Field

[0001] The present invention relates to the field of satellite navigation technology, and in particular to a ranging code generation method compatible with continuous and pulse navigation signals. Background Art

[0002] Satellite navigation systems are based on the broadcast of navigation signals by satellites in space, providing positioning, speed measurement and timing functions for satellite navigation receivers. The main navigation systems currently include China's Beidou Satellite Navigation System (BDS), the United States' Global Positioning System (GPS), Russia's Global Navigation Satellite System (GLONASS) and Europe's Galileo System (Galileo).

[0003] The ranging code generator is an important unit of the satellite navigation receiver, which mainly generates the ranging code of the navigation signal. At present, the satellite navigation system mainly adopts the continuous CDMABPSK signal format, that is, the ranging code signal exists continuously throughout the entire time period. The basic tasks of the satellite navigation receiver are: to capture the signals of visible satellites and track the operation of these satellites, to perform a series of processing on the received GNSS signals, so as to measure the distance and the rate of change of the distance from the satellite to the receiver antenna, and to parse the navigation message sent by the satellite, and then calculate the three-dimensional position, speed and time of the receiving antenna. Pseudo-satellites are usually arranged on the ground, independently broadcasting navigation enhancement signals similar to real satellite navigation signals and differential information, which can provide navigation enhancement functions for the pseudo-satellite coverage area. By arranging pseudo-satellites, the number of "visible stars" can be increased to improve the effectiveness of positioning; at the same time, the spatial geometric distribution of satellites can be improved, the spatial position precision factor (PDOP) can be reduced, and the positioning accuracy can be improved.

[0004] In order to effectively suppress the near-far effect, most of the current regional enhanced pseudo-satellite signals use the TDMA+CDMA BPSK signal format, that is, pulse navigation signals. However, the traditional ranging code generator circuit cannot generate pulse ranging codes and is not compatible with continuous navigation signals and pulse navigation signals. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the prior art and provide a ranging code generation method compatible with continuous and pulse navigation signals. The conventional ranging code generator circuit is optimized and improved, and the original ranging code is improved from a 1-bit width representation mode to a 2-bit width mode. The improved ranging code can represent a continuous ranging code and a pulse ranging code, and is compatible with capturing and tracking satellite continuous signals and pseudo-satellite pulse signals.

[0006] The objective of the present invention is achieved through the following technical solutions:

[0007] A ranging code generation method compatible with continuous and pulse navigation signals, comprising:

[0008] Step 1: Use feedback shift register to shift and generate G1 sequence and G2 sequence;

[0009] Step 2: Generate a reset control clock at the whole millisecond to control the reset of the G1 sequence, G2 sequence, chip counter and time slot counter;

[0010] Step 3: Set the sequence period of G1 sequence and G2 sequence respectively;

[0011] Step 4: The shift control clock generates the CA sequence and the CB sequence by continuously shifting two feedback shift registers;

[0012] Step 5: The CA sequence and the CB sequence are XORed to obtain the two-bit wide ranging code low bit pn_l;

[0013] Step 6: Control the chip counter to count chips by shifting the control clock, and when the chip count value reaches the modulus value, generate a time slot counter driving signal;

[0014] Step 7: The time slot counter generates the ranging code high bit pn_h by receiving the timing selection control signal according to the time slot counter driving signal;

[0015] Step 8: Combine the ranging code high bit pn_h and the ranging code low bit pn_l to generate a ranging code that is compatible with continuous and pulse navigation signals.

[0016] Specifically, step 1 specifically includes: G1 sequence and G2 sequence are shifted and generated by feedback shift register, and their generating polynomials are:

[0017] G1(X)=X 13 +X 4 +X 3 +X+1;

[0018] G2(X)=X 13 +X 12 +X 10 +X 9 +X 7 +X 5 +X 5 +X+1.

[0019] Specifically, step three specifically includes: shortening the period of the CA sequence generated by the G1 sequence from 8191 chips by 1 bit to a period of 8190 chips, and setting the phase of the G1 sequence to all "1" at an integer millisecond or when the phase of the G1 sequence is "1111111111100";

[0020] The period of the CB sequence generated by the G2 sequence is set to 8191 chips, and the initial phase of the G2 sequence is set at an integer millisecond.

[0021] Specifically, step seven specifically includes: the time slot counter is controlled by receiving a timing selection control signal, and can be applied to continuous signals and pulse signals; when the ranging code generator is applied to a pulse signal, the time slot counter generates pulse time slots required by different pseudo-satellites, and the time slot of a certain pseudo-satellite is specified by the time slot selection control, and when the time slot counter counts to the specified time slot, the high bit pn_h of the ranging code is set to 1, and is set to 0 at other times; through the time slot selection control, the pseudo-satellite timing can be a fixed time slot or a random time slot;

[0022] When the ranging code generator is applied to a continuous signal, the time slot selection control signal controls the high bit of the ranging code output by the time slot counter to be 1 all the time.

[0023] Furthermore, the method also includes improving the ranging code generating circuit, wherein the improved ranging code generating circuit includes a reset control clock, a shift control clock, a feedback shift register A, a feedback shift register B, a code chip counter, a time slot counter and a low-order signal output circuit; the reset control clock is respectively connected to the feedback shift register A, the feedback shift register B, the code chip counter and the time slot counter; the shift control clock is respectively connected to the feedback shift register A, the feedback shift register B and the code chip counter; the output end of the code chip counter is connected to the time slot counter; the input end of the low-order signal output circuit is respectively connected to the output ends of the feedback shift register A and the feedback shift register B.

[0024] Furthermore, the method also includes improving the capture and tracking circuit, and the improved capture and tracking circuit includes an XOR gate circuit and a selector; the input end of the XOR gate circuit is connected to the output end of the low-order signal output circuit; the output end of the selector is respectively connected to the output end of the XOR gate circuit and the output end of the time slot counter.

[0025] Beneficial effects of the present invention:

[0026] The present invention solves the problem that the traditional code generator cannot generate ranging codes that are compatible with continuous and pulse navigation signals. The receiver adopts this circuit, and the capture and tracking circuit only needs to slightly modify the correlator circuit without modifying other circuits, so that it can be compatible with capturing and tracking satellite continuous signals and pseudo-satellite pulse signals, thereby expanding the baseband processing capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a flow chart of the method of the present invention;

[0028] Figure 2 It is a circuit block diagram of a typical conventional ranging code generator generation method;

[0029] Figure 3 It is a circuit diagram related to the existing traditional continuous navigation signal;

[0030] Figure 4 It is a block diagram of the improved ranging code generation circuit compatible with continuous and pulse navigation signals of the present invention;

[0031] Figure 5 The invention discloses a correlator circuit diagram which is improved and compatible with continuous and pulse navigation signals. DETAILED DESCRIPTION

[0032] In order to have a clearer understanding of the technical features, purposes and beneficial effects of the present invention, the technical solution of the present invention is now described in detail below. Obviously, the implementation cases described are part of the embodiments of the present invention, not all of the embodiments, and cannot be understood as limiting the scope of the implementation of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the protection scope of the present invention.

[0033] Embodiment 1:

[0034] like Figure 2 As shown in the figure, a typical ranging code generator consists of two feedback shift registers, a reset control clock, a shift control clock, an initial phase of the feedback shift register, etc. The feedback shift register is a 13-level register; the reset control clock generates a reset signal at a specific time to input the initial phase of the feedback shift register into the feedback shift register; the shift control clock is the working clock that drives the shift register, which is generally a code rate clock. The ranging code pn is a 1-bit wide pseudo code generated by the circuit for ranging.

[0035] The ranging code generation method implemented by the above-mentioned ranging code generator circuit is as follows:

[0036] (1) The ranging code is generated by truncating two linear sequences G1 and G2, adding them modulo two, and then truncating them. The G1 sequence and the G2 sequence are shifted by the feedback shift register, and their generating polynomials are:

[0037] G1(X)=X 13 +X 4 +X 3 +X+1;

[0038] G2(X)=X 13 +X 12 +X 10 +X 9 +X 7 +X 5 +X 5 +X+1.

[0039] (2) The reset control clock is generated at the whole millisecond to control the reset of the G1 sequence and the G2 sequence. The shift control clock drives the shift operation of the feedback shift register.

[0040] (3) The CA sequence generated by G1 is shortened by 1 bit from 8191 to a period of 8190 chips. G1 sets the phase bits to all "1" at the whole millisecond or when the G1 phase is "1111111111100".

[0041] (4) The CB sequence period generated by G2 is 8191 chips. G2 sets the initial phase of G2 at the whole millisecond, and the initial phases of different satellites are different.

[0042] (5) The shift control clock generates the CA sequence and the CB sequence by continuously shifting two feedback shift registers.

[0043] (6) The CA sequence and the CB sequence are XORed to obtain a 1-bit wide ranging code pn.

[0044] At the same time, traditional related circuits such as Figure 3 As shown, Figure 3 Where data is the intermediate frequency data, pn is 1 for the bit-wide ranging code, and data_xor is the result of the XOR operation between the intermediate frequency data and the 1-bit bit-wide ranging code.

[0045] The corresponding calculation table is shown in Table 1 below:

[0046] Table 1: Table of continuous navigation signal correlation values

[0047]

[0048] For regional enhanced pseudo-satellite signals, in order to effectively suppress the near-far effect, pulse navigation signals, namely TDMA+CDMA signals, are often used. Traditional ranging code generator circuits cannot generate pulse ranging codes.

[0049] In order to effectively suppress the near-far effect, most of the current regional enhanced pseudo-satellite signals use the TDMA+CDMA BPSK signal format, that is, the pulse navigation pulse signal. In order to achieve the receiver's capture and tracking circuit can be compatible with receiving satellite continuous signals and pseudo-satellite pulse signals, the present invention optimizes and improves the traditional ranging code generator circuit, the ranging code generator circuit can generate ranging codes representing continuous form and pulse form; at the same time, only minor changes are needed to the capture and tracking circuit correlator, and under the condition that other circuits in the capture and tracking circuit are not changed, the receiver can be compatible with capturing and tracking satellite continuous signals and pseudo-satellite pulse signals. The improved ranging code generation method is as follows:

[0050] like Figure 1 As shown, a ranging code generation method compatible with continuous and pulse navigation signals includes:

[0051] Step 1: Use feedback shift register to shift and generate G1 sequence and G2 sequence;

[0052] Step 2: Generate a reset control clock at the whole millisecond to control the reset of the G1 sequence, G2 sequence, chip counter and time slot counter;

[0053] Step 3: Set the sequence period of G1 sequence and G2 sequence respectively;

[0054] Step 4: The shift control clock generates the CA sequence and the CB sequence by continuously shifting two feedback shift registers;

[0055] Step 5: The CA sequence and the CB sequence are XORed to obtain the two-bit wide ranging code low bit pn_l;

[0056] Step 6: Control the chip counter to count chips by shifting the control clock, and when the chip count value reaches the modulus value, generate a time slot counter driving signal;

[0057] Step 7: The time slot counter generates the ranging code high bit pn_h by receiving the timing selection control signal according to the time slot counter driving signal;

[0058] Step 8: Combine the ranging code high bit pn_h and the ranging code low bit pn_l to generate a ranging code that is compatible with continuous and pulse navigation signals.

[0059] Specifically, step 1 specifically includes: G1 sequence and G2 sequence are shifted and generated by feedback shift register, and their generating polynomials are:

[0060] G1(X)=X 13 +X 4 +X 3 +X+1;

[0061] G2(X)=X 13 +X 12 +X 10 +X 9 +X 7 +X 5 +X 5 +X+1.

[0062] In this embodiment, step three specifically includes: shortening the period of the CA sequence generated by the G1 sequence from 8191 chips by 1 bit to 8190 chips, and setting the phase of the G1 sequence to all "1" at the whole millisecond or when the phase of the G1 sequence is "1111111111100";

[0063] The period of the CB sequence generated by the G2 sequence is set to 8191 chips, and the initial phase of the G2 sequence is set at an integer millisecond.

[0064] In this embodiment, step seven specifically includes: the time slot counter is controlled by receiving a timing selection control signal, and can be applied to continuous signals and pulse signals; when the ranging code generator is applied to a pulse signal, the time slot counter generates pulse time slots required by different pseudo-satellites, and the time slot of a certain pseudo-satellite is specified by the time slot selection control, and when the time slot counter counts to the specified time slot, the high bit pn_h of the ranging code is set to 1, and is set to 0 at other times; through the time slot selection control, the pseudo-satellite timing can be a fixed time slot or a random time slot;

[0065] When the ranging code generator is applied to a continuous signal, the time slot selection control signal controls the high bit of the ranging code output by the time slot counter to be 1 all the time.

[0066] Embodiment 2:

[0067] In this embodiment, Figure 4 As shown, the method also includes improving the ranging code generating circuit. The improved ranging code generating circuit includes a reset control clock, a shift control clock, a feedback shift register A, a feedback shift register B, a chip counter, a time slot counter and a low-order signal output circuit; the reset control clock is respectively connected to the feedback shift register A, the feedback shift register B, the chip counter and the time slot counter; the shift control clock is respectively connected to the feedback shift register A, the feedback shift register B and the chip counter; the output end of the chip counter is connected to the time slot counter; the input end of the low-order signal output circuit is respectively connected to the output ends of the feedback shift register A and the feedback shift register B.

[0068] This embodiment optimizes and improves the above-mentioned traditional ranging code generator circuit, and adds a chip counter, a time slot counter, and a time slot selection control signal. The chip counter is driven by the shift control clock to count the chips and generate a time slot counter drive signal at the same time; the time slot counter counts the time slots of the pulse navigation signal, and is driven by the time slot counter drive signal and controlled by the time slot selection control signal to output the high-bit pn_h signal of the ranging code of the designated satellite.

[0069] The original ranging code is improved from a 1-bit width representation to a 2-bit width mode, in which the low bit is a continuous code piece, which is the same as the traditional 1-bit width ranging code pn, and is represented here as the ranging code low bit pn_l; the high bit is a pulse enable, and is represented here as the ranging code high bit pn_h; the ranging code with a bit width of 2 is represented as {pn_h, pn_l}. The improved ranging code can represent a continuous ranging code and a pulse ranging code.

[0070] In this embodiment, Figure 5As shown, the method also includes improving the capture and tracking circuit, and the improved capture and tracking circuit includes an XOR gate circuit and a selector; the input end of the XOR gate circuit is connected to the output end of the low-order signal output circuit; the output end of the selector is respectively connected to the output end of the XOR gate circuit and the output end of the time slot counter.

[0071] The corresponding acquisition and tracking circuit correlator after improvement is shown as follows: Figure 5 Where data is the intermediate frequency data, {pn_h, pn_l} is the improved ranging code, and data_xor is the result of the correlation operation between the intermediate frequency data data and the 2-bit wide ranging code. When pn_h is 0, the selector outputs 0, that is, the result of the correlation operation data_xor is 0; when pn_h is 1, the selector outputs the result of the XOR operation of data_ and pn_l.

[0072] The corresponding correlator calculation table is shown in Table 2:

[0073] Table 2 Correlator calculation table compatible with continuous and pulse navigation signals

[0074]

[0075] The main improvements of this embodiment include:

[0076] (1) The ranging code representation is improved from 1 bit to 2 bits. A pulse enable pn_h signal circuit is added to the ranging code generator. The pulse enable signal pn_h is used as the high bit of the ranging code, and the traditional continuous ranging code chip pn is used as the low bit pn_l of the ranging code. By combining the high bit pn_h and the low bit pn_l of the ranging code, a ranging code {pn_h, pn_l} that is compatible with continuous and pulse navigation signals is generated.

[0077] (2) The correlator circuit of the acquisition and tracking circuit is modified to adapt to the correlation operation of the 2-bit width ranging code.

[0078] The present invention optimizes and improves the traditional ranging code generator circuit, and the ranging code generator circuit can generate ranging codes in continuous form and pulse form; at the same time, only minor changes need to be made to the capture and tracking circuit correlator, and under the condition that other circuits in the capture and tracking circuit are not changed, the receiver can be compatible with the capture and tracking satellite continuous signals and pseudo-satellite pulse signals.

[0079] The above shows and describes the basic principles, main features and advantages of the present invention. It should be understood by those skilled in the art that the present invention is not limited by the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, which fall within the scope of the present invention to be protected. The scope of the present invention to be protected is defined by the attached claims and their equivalents.

Claims

1. A ranging code generation method compatible with continuous and pulse navigation signals, characterized in that: include: Step 1: Use feedback shift register to shift and generate G1 sequence and G2 sequence; Step 2: Generate a reset control clock at the whole millisecond to control the reset of the G1 sequence, G2 sequence, chip counter and time slot counter; Step 3: Set the sequence period of G1 sequence and G2 sequence respectively; Step 4: The shift control clock generates the CA sequence and the CB sequence by continuously shifting two feedback shift registers; Step 5: The CA sequence and the CB sequence are XORed to obtain the two-bit wide ranging code low bit pn_l; Step 6: Control the chip counter to count chips by shifting the control clock, and when the chip count value reaches the modulus value, generate a time slot counter driving signal; Step 7: The time slot counter generates the ranging code high bit pn_h by receiving the timing selection control signal according to the time slot counter driving signal; Step 8: Combine the ranging code high bit pn_h and the ranging code low bit pn_l to generate a ranging code that is compatible with continuous and pulse navigation signals.

2. The method for generating ranging codes compatible with continuous and pulse navigation signals according to claim 1, characterized in that: The step 1 specifically includes: the G1 sequence and the G2 sequence are shifted and generated by a feedback shift register, and the generating polynomials thereof are respectively: ； 。 3. The method for generating ranging codes compatible with continuous and pulse navigation signals according to claim 1, characterized in that: The step three specifically includes: shortening the period of the CA sequence generated by the G1 sequence from 8191 chips by 1 bit to 8190 chips, and setting the phase of the G1 sequence to all "1" state at the whole millisecond or when the phase of the G1 sequence is "1111111111100"; The period of the CB sequence generated by the G2 sequence is set to 8191 chips, and the initial phase of the G2 sequence is set at an integer millisecond.

4. The method for generating ranging codes compatible with continuous and pulse navigation signals according to claim 1, characterized in that: The step 7 specifically includes: the time slot counter is controlled by receiving the timing selection control signal and is applied to the continuous signal and the pulse signal; when the ranging code generator is applied to the pulse signal, the time slot counter generates the pulse time slots required by different pseudo-satellites, and the time slot of a certain pseudo-satellite is specified by the time slot selection control, and when the time slot counter counts to the specified time slot, the high bit pn_h of the ranging code is set to 1, and is set to 0 at other times; through the time slot selection control, the pseudo-satellite timing is a fixed time slot or a random time slot; When the ranging code generator is applied to a continuous signal, the time slot selection control signal controls the high bit of the ranging code output by the time slot counter to be 1 all the time.

5. The method for generating ranging codes compatible with continuous and pulse navigation signals according to claim 1, characterized in that: The invention also includes circuit improvement of the ranging code generating circuit. The improved ranging code generating circuit includes a reset control clock, a shift control clock, a feedback shift register A, a feedback shift register B, a chip counter, a time slot counter and a low-order signal output circuit; the reset control clock is respectively connected to the feedback shift register A, the feedback shift register B, the chip counter and the time slot counter; the shift control clock is respectively connected to the feedback shift register A, the feedback shift register B and the chip counter; the output end of the chip counter is connected to the time slot counter; the input end of the low-order signal output circuit is respectively connected to the output ends of the feedback shift register A and the feedback shift register B.

6. The method for generating ranging codes compatible with continuous and pulse navigation signals according to claim 1, characterized in that: It also includes improvements to the capture and tracking circuit, the improved capture and tracking circuit includes an XOR gate circuit and a selector; the input end of the XOR gate circuit is connected to the output end of the low-order signal output circuit; the output end of the selector is respectively connected to the output end of the XOR gate circuit and the output end of the time slot counter.

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