A method for card control yield standard of single process per test station
By comparing the yield difference of the process of each adjacent station, the yield card control of each test station is achieved, which solves the problem that the existing technology cannot distinguish between the yield abnormalities of non-stations, and realizes the single-stop test station for each test station. Accurate card control and abnormal discovery of process yield.
Patent Information
- Application Number
- CN202210164804.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-23
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2042-02-23
AI Technical Summary
The prior art cannot control the single process of each test station, resulting in the inability to distinguish between the yield abnormalities of non-stations.
By comparing the yield differences of the process of each adjacent station, the yield of each test station is controlled by the card. The specific steps include: after the previous test station has completed the test, the current test station has obtained its process yield after the test, and the current test station has obtained its process yield, and the yield difference between the two adjacent stations is controlled by comparing the yield differences.
The single process yield of each test station can be directly determined and the single process of each test station is controlled, which is conducive to distinguishing the yield abnormalities of non-stations, and when the single process yield of any test station does not meet the requirements, Carry out process yield card control to further discover problems.
Smart Images

Figure CN114566438B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of wafer testing, and in particular relates to a method for controlling a yield rate standard of a single process at each testing station. Background Art
[0002] The main purpose of wafer testing is to not package the bad chips that have been tested, so as to reduce the packaging cost. In the field of wafer testing, the probe card is the medium between the wafer and the tester. The probe card is usually placed directly on the probe station prober and connected to the tester with wiring. The purpose of the probe card is to provide a connection between the chip and the tester and complete the wafer test. Figure 1 The figure illustrates the related equipment and MAP diagram of the wafer testing process in the prior art.
[0003] Wafer testing involves yield control of all processes at multiple test stations. In the prior art, the yield control statistics method uses the total test volume to control the final yield of all processes. Moreover, there may be a situation where the actual total number of tested particles at the later station is different from the expected total number of particles. Even if this happens, the prior art ignores this actual situation and still uses the total number of particles for yield statistics to perform final yield control. Therefore, this is obviously not a practical method. Obviously, the prior art cannot control a single process at each test station, but can only control the overall yield of all stations, and naturally cannot distinguish yield anomalies at non-current stations.
[0004] Therefore, there is an urgent need in the art for a technical solution for card control yield of a single process at each test station. Summary of the invention
[0005] In view of this, the present invention proposes a method for controlling the card yield standard of a single process at each test station, the method comprising the following steps:
[0006] S100, after the previous test station completes the wafer test, the process yield rate measured by the previous test station is obtained;
[0007] S200, after the current test station completes the wafer test, the process yield rate measured by the current test station is obtained;
[0008] S300, comparing the process yield measured by the previous test station and the process yield measured by the current test station, and performing yield control of a single process at each test station by comparing the yield difference between two adjacent stations.
[0009] Preferably,
[0010] In step S100, the process yield rate measured by the previous test station = the number of good products tested by the previous station / the total number of chips actually tested by the previous station.
[0011] Preferably,
[0012] In step S200, the process yield rate measured by the current testing station = the number of good products tested by the current station / the total number of chips actually tested by the current station.
[0013] Preferably,
[0014] The total number of chips tested by the current test station is different from the expected total number of chips.
[0015] Preferably,
[0016] The total number of chips tested at the current test station is different from the total number of chips actually tested at the previous station.
[0017] Preferably,
[0018] In step S300, the yield difference between two adjacent stations can be determined by the yield difference between the two stations.
[0019] Preferably,
[0020] In step S300, the yield difference between two adjacent stations can be determined by the yield ratio between the two stations.
[0021] The present invention has the following technical effects:
[0022] Through the above scheme, the present invention can directly determine the single process yield of each test station, and perform card control on the single process of each test station, which is conducive to distinguishing yield anomalies of other stations, and when the single process yield of any test station does not meet the requirements, the process yield of the test station is controlled to further discover the problem. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.
[0024] Figure 1 It is a working schematic diagram of a wafer testing link in the prior art;
[0025] Figure 2 is a schematic diagram of a process yield measured by a previous test station in one embodiment of the present invention;
[0026] Figure 3 It is a schematic diagram of the process yield measured by the latter test station in one embodiment of the present invention. DETAILED DESCRIPTION
[0027] To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the following will be combined with the appended drawings of the embodiments of the present invention. Figures 1 to 3 , the technical solutions in the embodiments of the present invention are clearly and completely described. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.
[0028] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0029] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0030] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the product of the invention is usually placed when used. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0031] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.
[0032] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.
[0033] In one embodiment, the present invention discloses a method for controlling the card yield standard of a single process at each test station, the method comprising the following steps:
[0034] S100, after the previous test station completes the wafer test, the process yield rate measured by the previous test station is obtained;
[0035] S200, after the current test station completes the wafer test, the process yield rate measured by the current test station is obtained;
[0036] S300, comparing the process yield measured by the previous test station and the process yield measured by the current test station, and performing yield control of a single process at each test station by comparing the yield difference between two adjacent stations.
[0037] For this embodiment, since the actual total number of wafers tested at the later stations may be different from the expected total number during wafer testing, this embodiment performs yield control of a single process at each test station by comparing the yield difference between two adjacent stations, so that during the operation, a single process control yield standard for each test station is established and followed to perform test quality control. For this reason, the present invention can directly determine the single process yield of each test station, and control the single process of each test station, which is conducive to distinguishing yield anomalies of non-current stations, and when the single process yield of any test station does not meet the requirements, the process yield of the test station is controlled to further discover problems.
[0038] Preferably,
[0039] In step S100, the process yield rate measured by the previous test station = the number of good products tested by the previous station / the total number of chips actually tested by the previous station.
[0040] Preferably,
[0041] In step S200, the process yield rate measured by the current testing station = the number of good products tested by the current station / the total number of chips actually tested by the current station.
[0042] Preferably,
[0043] The total number of chips tested by the current test station is different from the expected total number of chips.
[0044] Preferably,
[0045] The total number of chips tested at the current test station is different from the total number of chips actually tested at the previous station.
[0046] That is to say, theoretically speaking, the present invention can not only deal with the situation where the total number of chips tested by the current test station is different from the expected total number of chips, but also deal with the situation where the total number of chips tested by the current test station is different from the total number of chips actually tested by the previous station.
[0047] Preferably,
[0048] In step S300, the yield difference between two adjacent stations can be determined by the yield difference between the two stations.
[0049] Preferably,
[0050] In step S300, the yield difference between two adjacent stations can be determined by the yield ratio between the two stations.
[0051] In other words, the yield difference between two adjacent stations can be determined directly by the yield difference between the two stations, or by the yield ratio between the two stations, as the yield of each station generally follows the law of normal distribution. When the requirements are not harsh and the engineering is convenient, the yield difference between the two stations can be determined directly by the yield difference between the two stations, or by the yield ratio between the two stations. By extension, the yield difference between two adjacent stations can also be determined by statistical methods such as normal distribution. Regardless of the specific means, the actual yield of the current station process after the previous station can be examined to determine whether there is any abnormality in the test process.
[0052] More preferably,
[0053] In step S300, when the yield control of a single process at each test station is performed by comparing the yield difference between two adjacent stations, the yield difference between the two adjacent stations is compared with the threshold condition of the control standard.
[0054] Exemplarily, when the yield difference between two adjacent stations is determined by the yield ratio of the two, the smaller of the process yield measured by the previous test station and the process yield measured by the current test station is used as the numerator, and the larger one is used as the denominator, which means that the yield ratio of the two must be less than or equal to 1. Under this premise, 0.98 is used as the threshold of the control standard, and less than 0.98 is used as the threshold condition of the control standard. When the condition is met, the card control is triggered.
[0055] See also Figure 2 In one embodiment, Figure 2 Taking the column of wafer number 3 in as an example, the yield of the CP2 process of the previous station is obtained as follows:
[0056] Good product number 7330 / total number 7523=97.43%;
[0057] See also Figure 3 , still in the column of wafer number 3, the yield of the subsequent CP3 process is obtained as follows:
[0058] Good product number 7158 / total number 7523=95.15%;
[0059] When the yield difference between two adjacent stations is examined in terms of ratio, since 95.15 / 97.43=0.977, the ratio is less than 0.98, so the card control is triggered. Figure 3 In the image, the film number 3 column is automatically marked as not passed, while the film numbers 1, 2, and 4 columns are marked with a check mark. Figure 2 and Figure 3 , according to the ratio method:
[0060] For film number 1, the ratio of the rear station to the front station is 95.25 / 96.66=0.985, which is greater than 0.98, so it passes;
[0061] For film number 2, the ratio of the rear station to the front station is 95.39 / 97.20=0.981, which is greater than 0.98, so it passes;
[0062] For film number 4, the ratio of the rear station to the front station is 95.37 / 96.94=0.984, which is greater than 0.98, so it passes.
[0063] In summary, the method disclosed in the present invention can directly determine the single process yield of each test station, and perform card control on the single process of each test station, which is helpful to distinguish the yield anomalies of other stations, and when the single process yield of any test station does not meet the requirements, the process yield of the test station is controlled to further discover the problem.
[0064] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.
Claims
1. A method for controlling the yield rate standard of a single process at each test station, characterized in that: The method is used for wafer testing to distinguish yield anomalies of non-current stations, and when the single process yield of any test station does not meet the requirements, the process yield of the test station is controlled; The method comprises the following steps: S100, after the previous test station completes the wafer test, the process yield rate measured by the previous test station is obtained; S200, after the current test station completes the wafer test, the process yield rate measured by the current test station is obtained; S300, comparing the process yield measured by the previous test station and the process yield measured by the current test station, and performing yield control of a single process at each test station by comparing the yield difference between two adjacent stations; in, The total number of chips tested at the current test station is different from the expected total number of chips. The total number of chips tested at the current test station is different from the total number of chips actually tested at the previous station.
2. The method of claim 1, wherein: In step S100, the process yield rate measured by the previous test station = the number of good products tested by the previous station / the total number of chips actually tested by the previous station.
3. The method of claim 1, wherein: In step S200, the process yield rate measured by the current test station = the number of good products tested by the current station / the total number of chips actually tested by the current station.
4. The method of claim 1, wherein: In step S300, the yield difference between two adjacent stations is determined by the yield difference between the two stations.
5. The method of claim 1, wherein: In step S300, the yield difference between two adjacent stations is determined by the yield ratio between the two stations.
Citation Information
Patent Citations
Product yield monitoring method and device and computer readable storage medium
CN111199326A
Method of improving production through cost of yield measurement
US20020103560A1