LED epitaxial wafer and preparation method thereof

Abstract

The present invention provides an LED epitaxial wafer and a preparation method thereof. The LED epitaxial wafer comprises a substrate, and a low-temperature buffer layer, a three-dimensional growth layer, a two-dimensional growth layer and a GaN layer grown sequentially on the substrate. The two-dimensional growth layer comprises a first sublayer, a second sublayer and a third sublayer grown sequentially; wherein the first sublayer is a periodic composite layer composed of repeated overlapping AlGaN layers and BGaN layers, the second sublayer is a growth pause layer, and the third sublayer is a periodic composite layer composed of repeated overlapping growth of BN layers and SiN layers. The present invention is advantageous in obtaining an LED epitaxial wafer with higher surface flatness, lower dislocation density, better antistatic ability, fewer defects extending to quantum wells, and improved luminous intensity by specially designing the two-dimensional growth layer and adopting a composite two-dimensional growth layer.

Description

Technical Field

[0001] The invention relates to the technical field of light emitting diodes, and in particular to an LED epitaxial wafer and a preparation method thereof. Background Art

[0002] LED (Light Emitting Diode) is a semiconductor electronic component that can emit light. It is widely used in various fields due to its small size, high brightness, low energy consumption, etc. Among them, GaN-based LED is a common type of LED, which has been widely used in the fields of solid-state lighting and display, attracting more and more attention.

[0003] However, there is a fatal flaw in GaN-based LEDs, that is, there is a large lattice mismatch and thermal mismatch between the GaN layer and the substrate of the epitaxial wafer of GaN-based LEDs, resulting in poor surface flatness of the epitaxial wafer. Currently, a buffer layer is usually grown between the GaN layer and the substrate to alleviate this defect, specifically: first grow a low-temperature nucleation layer, then grow a three-dimensional island growth layer, and finally grow a two-dimensional growth layer to fill the three-dimensional island, thereby reducing the defect density and improving the surface flatness of the epitaxial wafer.

[0004] However, the two-dimensional growth layer currently used is a pure GaN layer, and the temperature and pressure of the two-dimensional growth layer are usually kept unchanged, resulting in that the defect mitigation of this two-dimensional growth layer is effective, the defect density of the epitaxial wafer is still high, and the surface flatness of the epitaxial wafer is still insufficient. Summary of the invention

[0005] Based on this, the purpose of the present invention is to provide an LED epitaxial wafer and a method for preparing the same, aiming to solve at least one technical problem in the background technology.

[0006] An LED epitaxial wafer according to an embodiment of the present invention comprises a substrate, and a low-temperature buffer layer, a three-dimensional growth layer, a two-dimensional growth layer and a GaN layer sequentially grown on the substrate, wherein the two-dimensional growth layer comprises a first sublayer, a second sublayer and a third sublayer grown sequentially;

[0007] The first sublayer is a periodic composite layer composed of repeatedly overlapping AlGaN layers and BGaN layers, the second sublayer is a growth pause layer, and the third sublayer is a periodic composite layer composed of repeatedly overlapping BN layers and SiN layers.

[0008] Preferably, in the growth cycle of the first sublayer, the growth temperature increases with the increase of the cycle number, the growth thickness increases with the increase of the cycle number, the Al component decreases with the increase of the cycle number, and the carrier gas H 2 The content increases gradually with the number of cycles.

[0009] Preferably, the growth temperature of the first sublayer increases gradually from 1040-1070° C. in the first cycle to 1100-1150° C. in the last cycle;

[0010] The growth temperature of the second sub-layer and the third sub-layer is the same as the growth temperature of the last period of the first sub-layer.

[0011] Preferably, the total thickness of the two-dimensional growth layer is 1-2.5 μm, the thickness of the AlGaN layer is 50-100 nm, the thickness of the BGaN layer is 50-100 nm, the thickness of the BN layer is 3-10 nm, the thickness of the SiN layer is 3-10 nm, the B content in the BN layer is 0.1-0.3, and the concentration of Si in the SiN layer is 0.1-0.3.

[0012] Preferably, the number of repeated overlapping periods of the first sub-layer is 1-5, and the number of repeated overlapping periods of the third sub-layer is 1-5.

[0013] Preferably, the growth time of the growth pause layer is 10-30S.

[0014] Preferably, the GaN layer includes an undoped u-GaN layer and a Si-doped n-GaN layer, and the LED epitaxial wafer further includes a stress release layer, a multi-quantum well layer, an electron blocking layer and a Mg-doped p-type GaN layer;

[0015] The undoped u-GaN layer, the Si-doped n-GaN layer, the stress release layer, the multi-quantum well layer, the electron blocking layer and the Mg-doped p-type GaN layer are sequentially grown on the two-dimensional growth layer.

[0016] According to an embodiment of the present invention, a method for preparing an LED epitaxial wafer is used to prepare the above-mentioned LED epitaxial wafer, and the preparation method comprises:

[0017] Providing a substrate required for epitaxial growth;

[0018] epitaxially growing a low-temperature buffer layer, a three-dimensional growth layer and a two-dimensional growth layer in sequence on the substrate;

[0019] Wherein, the growth process of the two-dimensional growth layer includes:

[0020] Passing a MO source required for growth, repeatedly and alternately growing an AlGaN layer and a BGaN layer on the three-dimensional growth layer to prepare a first sublayer of the two-dimensional growth layer;

[0021] Turn off the MO source and only introduce carrier gas and NH 3 , and treating the surface of the first sub-layer to prepare a second sub-layer of the two-dimensional growth layer;

[0022] The MO source required for growth is introduced, and BN layers and SiN layers are repeatedly grown alternately on the second sub-layer to prepare the third sub-layer of the two-dimensional growth layer.

[0023] Preferably, the process of introducing a MO source required for growth and repeatedly growing an AlGaN layer and a BGaN layer alternately on the three-dimensional growth layer to prepare the first sublayer of the two-dimensional growth layer further includes:

[0024] As the number of growth cycles increases, the growth temperature gradient is controlled to increase, the growth thickness gradient is controlled to increase, the AL component gradient is controlled to decrease, and the carrier gas H 2 The content gradient increases;

[0025] Among them, under the premise that the total carrier gas volume remains unchanged, the carrier gas H 2 Content and carrier gas N 2 The content ratio increased gradually from 0.5-1:1 in the first cycle to 4-8:1 in the last cycle.

[0026] Preferably, it also includes: epitaxially growing an undoped u-GaN layer, a Si-doped n-GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a Mg-doped p-type GaN layer in sequence on the two-dimensional growth layer.

[0027] Compared with the prior art: the two-dimensional growth layer is specially designed, specifically the two-dimensional growth layer is composed of three sub-layers, the first sub-layer is a periodic composite structure composed of repeated overlapping AlGaN layer and BGaN layer, its function is to first introduce a small amount of Ga source at the beginning of the transition from three-dimensional to two-dimensional growth of the epitaxial layer, the growth temperature is relatively low, which is conducive to the H growth of two-dimensional growth. 2The smaller the content introduced, the slower the initial growth rate of the three-dimensional island merging, thus avoiding excessively fast merging of the three-dimensional islands and reducing the probability of distortion and annihilation of dislocations when the three-dimensional islands re-merge. In addition, B atoms and Al atoms are introduced. Since the B atom lattice is smaller, the addition of B atoms can fill the vacancies between the lattices and produce fewer dislocations, while the addition of Al atoms can alleviate the lattice mismatch with the sapphire substrate and reduce warping changes. After the first sublayer is grown, the epitaxial layer three-dimensional island merging stage has been basically completed; the second sublayer is a growth pause layer, and its function is to process the surface of the first sublayer. On the one hand, it can release a certain amount of stress and reduce warping during the growth pause process; on the other hand, it allows Al atoms and B atoms enough time to diffuse evenly, and the surface flatness is further increased; the third sublayer is a periodic composite layer composed of repeated overlapping growth of BN layer and SiN layer, and its function is a defect blocking layer. The dislocations generated when the three-dimensional island merges the layer will cause distortion and annihilation on this superlattice layer. The lattice constants of B and Si are very small, and their own lattice quality is also good, and the flatness is relatively high, which increases the antistatic ability of the epitaxial wafer;

[0028] In general, the composite two-dimensional growth layer proposed in the present invention is conducive to obtaining LED epitaxial wafers with higher surface flatness, lower dislocation density, better antistatic ability, fewer defects extending to the quantum well, and improved luminous intensity. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a structural schematic diagram of an LED epitaxial wafer in the first embodiment of the present invention;

[0030] Figure 2 It is a schematic diagram of the structure of the two-dimensional growth layer in the first embodiment of the present invention.

[0031] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0032] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0033] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0034] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0035] Embodiment 1

[0036] See also Figure 1 , shown is an LED epitaxial wafer in embodiment 1 of the present invention, including a substrate 1, and a low-temperature buffer layer 2, a three-dimensional growth layer 3, a two-dimensional growth layer 4, a GaN layer, a stress release layer 7, a multi-quantum well layer 8, an electron blocking layer 9 and a Mg-doped p-type GaN layer 10 sequentially grown on the substrate 1, wherein the GaN layer includes an undoped u-GaN layer 5 and a Si-doped n-GaN layer 6 sequentially grown on the two-dimensional growth layer 4, and the stress release layer 7 is grown on the Si-doped n-GaN layer 6.

[0037] In this embodiment, please refer to Figure 2 The two-dimensional growth layer 4 includes a first sublayer 41, a second sublayer 42 and a third sublayer 43 grown in sequence; wherein the first sublayer 41 is a periodic composite layer composed of AlGaN layers and BGaN layers repeatedly overlapped (alternatingly stacked), and in the growth cycle of the first sublayer 41, the growth temperature increases with the increase of the number of cycles, the growth thickness increases with the increase of the number of cycles, the Al component decreases with the increase of the number of cycles, and the carrier gas H 2 The content increases with the number of cycles, that is, in the growth cycle of the first sublayer 41, the growth temperature of the next overlapping cycle is increased by a gradient, the growth thickness is increased by a gradient, the Al component is reduced by a gradient, and the carrier gas H is increased by a gradient. 2 The content of the first sublayer 41 increases by a gradient, and the number of repeated overlapping cycles of the first sublayer 41 is 1-5 times, for example, 2 or 4 times, and each overlapping cycle is to grow the AlGaN layer and the BGaN layer in sequence. The main function of the first sublayer 41 is: in the early stage of the epitaxial layer turning from three-dimensional growth to two-dimensional growth, a small amount of Ga source is first introduced, and the growth temperature is relatively low, which is conducive to the two-dimensional growth of H 2 The amount of Ga source introduced is relatively small, so that the initial growth rate of the three-dimensional island merging is relatively slow, and the three-dimensional island merging speed is prevented from being too fast, and the probability of the distortion and annihilation of dislocations occurring during the merging of the three-dimensional islands is reduced. During the growth of the first sublayer 41, as the number of cycles increases, the amount of Ga source introduced increases, the temperature rises, and H 2The content increases and the growth rate accelerates, making the epitaxial layer more and more inclined to two-dimensional growth and gradually filling up; in addition, in the two-dimensional growth stage, faster growth is conducive to obtaining an epitaxial layer with better lattice quality, and B atoms and Al atoms are introduced. The B atom lattice is smaller, and the addition of B atoms can fill the vacancies between the lattices and produce fewer dislocations, while the addition of Al atoms can alleviate the lattice mismatch with the sapphire substrate 1 and reduce warping changes. The periodic transition of the Al content is reduced, and the stress generated in the entire merging process is also smaller. After the first sublayer 41 is grown, the three-dimensional island merging stage of the epitaxial layer has been basically completed, but the surface flatness at this time is still insufficient. Therefore, this embodiment also epitaxially grows the second sublayer 42 after the first sublayer 41.

[0038] Specifically, the second sublayer 42 is a growth pause layer, and the growth time of the growth pause layer is 10-30S. The growth pause layer is mainly used to process the surface of the first sublayer 41. On the one hand, it releases a certain amount of stress and reduces warping during the growth pause process; on the other hand, it allows Al atoms and B atoms enough time to diffuse evenly, thereby further increasing the surface flatness.

[0039] In addition, after the second sublayer 42, the third sublayer 43 is epitaxially grown. The third sublayer 43 is a periodic composite layer composed of repeated overlapping growth of BN layer and SiN layer. The number of repeated overlapping cycles of the third sublayer 43 is also 1-5 times, for example, 2 or 4 times. The BN layer and the SiN layer are grown in sequence in each overlapping cycle. The main function of the third sublayer 43 is: this layer is very thin and acts as a defect blocking layer. The dislocations generated when the three-dimensional island merges the layers will cause distortion and annihilation on this superlattice layer. The B and Si lattice constants are very small, the lattice quality itself is also good, and the flatness is relatively high, which increases the antistatic ability of the epitaxial wafer.

[0040] In some preferred cases of the present embodiment, the growth temperature of the first sub-layer 41 increases gradually from 1040-1070°C in the first cycle to 1100-1150°C in the last cycle, for example, increases gradually from 1050°C to 1130°C; at the same time, the growth temperature of the second sub-layer 42 and the third sub-layer 43 is the same as the growth temperature of the last cycle of the first sub-layer 41, that is, the growth temperature of the second sub-layer 42 and the third sub-layer 43 is 1100-1150°C, for example, 1130°C. The total thickness of the two-dimensional growth layer 4 is 1-2.5 μm, for example, 1.8 or 2.2 μm, the thickness of the AlGaN layer is 50-100 nm, for example, 60 or 80 nm, the thickness of the BGaN layer is 50-100 nm, for example, 60 or 80 nm, the thickness of the BN layer is 3-10 nm, for example, 6 or 7 nm, the thickness of the SiN layer is 3-10 nm, for example, 4 or 6 nm, the B content in the BN layer is 0.1-0.3, for example, 0.2 or 0.25, and the concentration of Si in the SiN layer is 0.1-0.3, for example, 0.2 or 0.25. The thickness of the low-temperature buffer layer 2 is about 30-100 nm, for example, 50 or 70 nm. The thickness of the three-dimensional growth layer 3 is about 0.5-1.5 μm, for example, 1 or 1.2 μm. The thickness of the undoped u-GaN layer 5 is about 300-800 nm, for example, 500 or 600 nm. The thickness of the Si-doped n-GaN layer 6 is 1-3 μm, for example, 2 or 2.5 μm, and the Si doping concentration is 5×10 18 -1×10 19 cm -3 . The stress release layer 7 can be a periodic structure of alternatingly grown GaN and InGaN layers, with a thickness of 50-300nm, for example, 150 or 200nm, wherein the molar ratio of In component in the InGaN layer is 10%-20%. The multi-quantum well layer 8 can be a periodic structure of alternatingly stacked quantum barrier layers and quantum well layers, wherein the quantum barrier layers can specifically be InGaN quantum well layers, and the quantum barrier layers can specifically be GaN quantum barrier layers or InAlGaN quantum barrier layers, wherein the molar ratio of In component in the quantum well layer is 10%-35%, and the thickness of a single quantum well layer is 2-5nm, for example, 3 or 4nm, and the thickness of a single quantum barrier layer is 3-15nm, for example, 10 or 12nm. The electron blocking layer 9 is Al a Ga 1-a N and In b Ga 1-bN alternately grows a periodic structure; wherein a can be in the range of 0.05-0.2, such as 0.1 or 0.15, b can be in the range of 0.1-0.5, such as 0.3 or 0.4, and the thickness of the electron blocking layer 9 can be 20-50nm, such as 30 or 40nm. The thickness of the Mg-doped p-GaN layer can be 200-300nm, such as 230 or 270nm, and the Mg doping concentration can be 5×10 17 -1×10 20 cm -3 .

[0041] Embodiment 2

[0042] Embodiment 2 of the present invention provides a method for preparing an LED epitaxial wafer, which is used to prepare the LED epitaxial wafer in the above embodiment 1. The method specifically includes steps S21 to S30, wherein:

[0043] Step S21, providing a substrate required for epitaxial growth, preferably a sapphire substrate.

[0044] Specifically, the temperature can be controlled to be 1000°C to 1200°C. 2 The substrate is subjected to high temperature annealing treatment for about 5 minutes under atmosphere.

[0045] Step S22, growing a low-temperature buffer layer on the substrate, wherein the material of the low-temperature buffer layer may be AlGaN, the temperature of the reaction chamber is 500° C. to 700° C., and the pressure is 200 to 400 Torr.

[0046] Step S23, growing a three-dimensional growth layer on the low-temperature buffer layer, wherein the temperature of the three-dimensional growth layer reaction chamber is 1000° C. to 1050° C. and the pressure is 100 to 400 torr.

[0047] Step S24, growing a two-dimensional growth layer on the three-dimensional growth layer, wherein the growth process of the two-dimensional growth layer may specifically include:

[0048] The MO source required for growth is introduced, and AlGaN layers and BGaN layers are repeatedly grown alternately on the three-dimensional growth layer to prepare the first sublayer of the two-dimensional growth layer;

[0049] Turn off the MO source and only introduce carrier gas and NH 3 , and treating the surface of the first sublayer to prepare a second sublayer of the two-dimensional growth layer;

[0050] The MO source required for growth is introduced, and the BN layer and the SiN layer are repeatedly grown alternately on the second sub-layer to prepare the third sub-layer of the two-dimensional growth layer.

[0051] Wherein, in the process of introducing the MO source required for growth and repeatedly growing the AlGaN layer and the BGaN layer alternately on the three-dimensional growth layer to prepare the first sublayer of the two-dimensional growth layer, the method further includes:

[0052] As the number of growth cycles increases, the growth temperature gradient is controlled to increase, the growth thickness gradient is controlled to increase, the Al component gradient is controlled to decrease, and the carrier gas H 2 Specifically, the carrier gas H can be controlled under the premise that the total carrier gas volume remains unchanged. 2 Content and carrier gas N 2 The content ratio increased gradually from 0.5-1:1 in the first cycle to 4-8:1 in the last cycle.

[0053] That is, the growth process of the two-dimensional growth layer is as follows:

[0054] First, the pressure in the reaction chamber is controlled to be 100-400 Torr, and the source required for growing the first sublayer is introduced. The growth temperature is first controlled to be between 1040°C and 1070°C. At the beginning, H 2 The content is low, H 2 :N 2 The carrier gas flow ratio can be 0.5-1:1. The AlGaN layer and the BGaN layer of the first period of the first sublayer are grown alternately. As the number of periods increases, the growth temperature gradient increases, and H 2 The content gradient increases, N 2 The relative content gradient decreases, the total carrier gas volume remains unchanged, the Al component decreases gradually from 0.2-0.3, and the Ga flow rate increases gradually. For example, the initial amount of TMGa can be 200 sccm, and the B component is 0.1-0.2 and remains unchanged; when growing the AlGaN layer and BGaN layer of the last period of the first sublayer, the growth temperature reaches 1100-1150°C, the Al component reaches 0.05-0.1, the Ga flow rate can be 1.5 times the initial amount, and H 2 :N 2 The carrier gas inlet ratio reaches 4-8:1;

[0055] Then the MO source was turned off, and the growth temperature and pressure were kept constant, and only the carrier gas and NH 3 The surface of the first sub-layer is treated for 10-30 seconds to grow a second sub-layer of the two-dimensional growth layer, i.e., a growth pause layer;

[0056] Finally, the growth temperature and pressure are kept unchanged, and the source required for growing the third sub-layer is introduced to grow the third sub-layer of the two-dimensional growth layer in which BN layers and SiN layers are alternately stacked.

[0057] Step S25, growing an undoped u-GaN layer on the two-dimensional growth layer, the temperature of the undoped u-GaN layer reaction chamber is 1100° C. to 1150° C., and the pressure is 100 to 500 torr.

[0058] Step S26, growing a Si-doped n-GaN layer on the undoped u-GaN layer, the temperature of the Si-doped n-GaN layer reaction chamber is 1100° C. to 1150° C., and the growth pressure is 100 torr to 500 torr.

[0059] Step S27, growing a stress release layer on the Si-doped n-GaN layer, the temperature of the reaction chamber for growing the stress release layer is 700° C. to 950° C., and the pressure is 100 torr to 500 torr.

[0060] Step S28, growing a multi-quantum well layer on the stress release layer, wherein the growth pressure of the multi-quantum well layer is 100-500 Torr.

[0061] The multi-quantum well layer is a periodic structure of quantum barrier layers and quantum well layers alternately stacked. The reaction chamber temperature can be controlled at 720-800°C to grow InGaN quantum well layers, and the reaction chamber temperature can be controlled at 830-950°C to grow quantum barrier layers.

[0062] Step S29, growing an electron blocking layer on the multi-quantum well layer, the temperature of the electron blocking layer reaction chamber is 900-1000° C., and the growth pressure is 100-300 Torr.

[0063] Step S30, growing a Mg-doped p-type GaN layer on the electron blocking layer, wherein the growth temperature of the Mg-doped p-type GaN layer is about 800-1000° C., and the growth pressure is 100-300 torr.

[0064] In summary, the LED epitaxial wafer and the preparation method thereof in the embodiment of the present invention are specially designed for the two-dimensional growth layer. Specifically, the two-dimensional growth layer is composed of three sublayers. The first sublayer is a periodic composite structure composed of repeated overlapping AlGaN layers and BGaN layers. Its function is to first introduce a small amount of Ga source at the initial stage of the epitaxial layer from three-dimensional to two-dimensional growth, and the growth temperature is relatively low, which is conducive to the two-dimensional growth of H 2The smaller the content introduced, the slower the initial growth rate of the three-dimensional island merging, thus avoiding excessively fast merging of the three-dimensional islands and reducing the probability of distortion and annihilation of dislocations when the three-dimensional islands re-merge. In addition, B atoms and Al atoms are introduced. Since the B atom lattice is smaller, the addition of B atoms can fill the vacancies between the lattices and produce fewer dislocations, while the addition of Al atoms can alleviate the lattice mismatch with the sapphire substrate and reduce warping changes. After the first sublayer is grown, the epitaxial layer three-dimensional island merging stage has been basically completed; the second sublayer is a growth pause layer, and its function is to process the surface of the first sublayer. On the one hand, it can release a certain amount of stress and reduce warping during the growth pause process; on the other hand, it allows Al atoms and B atoms enough time to diffuse evenly, and the surface flatness is further increased; the third sublayer is a periodic composite layer composed of repeated overlapping growth of BN layer and SiN layer, and its function is a defect blocking layer. The dislocations generated when the three-dimensional island merges the layer will cause distortion and annihilation on this superlattice layer. The lattice constants of B and Si are very small, and their own lattice quality is also good, and the flatness is relatively high, which increases the antistatic ability of the epitaxial wafer;

[0065] In general, the composite two-dimensional growth layer proposed in the present invention is conducive to obtaining LED epitaxial wafers with higher surface flatness, lower dislocation density, better antistatic ability, fewer defects extending to the quantum well, and improved luminous intensity.

[0066] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. An LED epitaxial wafer, characterized in that: It comprises a substrate, and a low-temperature buffer layer, a three-dimensional growth layer, a two-dimensional growth layer and a GaN layer grown sequentially on the substrate, wherein the two-dimensional growth layer comprises a first sublayer, a second sublayer and a third sublayer grown sequentially; The first sublayer is a periodic composite layer composed of repeated overlapping AlGaN layers and BGaN layers, the second sublayer is a growth pause layer, and the third sublayer is a periodic composite layer composed of repeated overlapping growth of BN layers and SiN layers; Among them, in the growth cycle of the first sublayer, the growth temperature increases with the increase of the cycle number, the growth thickness increases with the increase of the cycle number, the Al component decreases with the increase of the cycle number, and the H2 content of the carrier gas increases with the increase of the cycle number.

2. The LED epitaxial wafer according to claim 1, characterized in that: The growth temperature of the first sublayer increases gradually from 1040-1070° C. in the first cycle to 1100-1150° C. in the last cycle; The growth temperature of the second sub-layer and the third sub-layer is the same as the growth temperature of the last period of the first sub-layer.

3. The LED epitaxial wafer according to claim 1, characterized in that: The total thickness of the two-dimensional growth layer is 1-2.5 μm, the thickness of the AlGaN layer is 50-100 nm, the thickness of the BGaN layer is 50-100 nm, the thickness of the BN layer is 3-10 nm, the thickness of the SiN layer is 3-10 nm, the B component content in the BN layer is 0.1-0.3, and the Si component content in the SiN layer is 0.1-0.

3.

4. The LED epitaxial wafer according to claim 1, characterized in that: The number of repeated overlapping periods of the first sub-layer is 1-5, and the number of repeated overlapping periods of the third sub-layer is 1-5.

5. The LED epitaxial wafer according to claim 1, characterized in that: The growth time of the growth pause layer is 10-30S.

6. The LED epitaxial wafer according to claim 1, characterized in that: The GaN layer includes an undoped u-GaN layer and a Si-doped n-GaN layer, and the LED epitaxial wafer also includes a stress release layer, a multi-quantum well layer, an electron blocking layer and a Mg-doped p-type GaN layer; The undoped u-GaN layer, the Si-doped n-GaN layer, the stress release layer, the multi-quantum well layer, the electron blocking layer and the Mg-doped p-type GaN layer are sequentially grown on the two-dimensional growth layer.

7. A method for preparing an LED epitaxial wafer, characterized in that: Used to prepare the LED epitaxial wafer according to any one of claims 1 to 6, the preparation method comprising: Providing a substrate required for epitaxial growth; epitaxially growing a low-temperature buffer layer, a three-dimensional growth layer and a two-dimensional growth layer in sequence on the substrate; Wherein, the growth process of the two-dimensional growth layer includes: Passing a MO source required for growth, repeatedly and alternately growing an AlGaN layer and a BGaN layer on the three-dimensional growth layer to prepare a first sublayer of the two-dimensional growth layer; Turning off the MO source, only introducing the carrier gas and NH3, and treating the surface of the first sublayer to prepare the second sublayer of the two-dimensional growth layer; The MO source required for growth is introduced, and BN layers and SiN layers are repeatedly grown alternately on the second sub-layer to prepare the third sub-layer of the two-dimensional growth layer.

8. The method for preparing an LED epitaxial wafer according to claim 7, characterized in that: The process of introducing a MO source required for growth and repeatedly growing an AlGaN layer and a BGaN layer alternately on the three-dimensional growth layer to prepare the first sublayer of the two-dimensional growth layer also includes: As the number of growth cycles increases, the growth temperature gradient is controlled to increase, the growth thickness gradient is controlled to increase, the Al component gradient is controlled to decrease, and the carrier gas H2 content gradient is controlled to increase; Among them, under the premise that the total carrier gas volume remains unchanged, the ratio of the carrier gas H2 content to the carrier gas N2 content increases gradually from 0.5-1:1 in the first cycle to 4-8:1 in the last cycle.

9. The method for preparing an LED epitaxial wafer according to claim 7, characterized in that: Also includes: An undoped u-GaN layer, a Si-doped n-GaN layer, a stress release layer, a multi-quantum well layer, an electron blocking layer and a Mg-doped p-type GaN layer are epitaxially grown in sequence on the two-dimensional growth layer.

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