System on chip and signal drive adjustment method for storage device
By combining the control unit and the drive parameter storage unit in the system-on-a-chip, the separation and real-time adjustment of signal drive are achieved, which solves the problem of poor signal quality in DDR memory, improves the power integrity, signal integrity and electromagnetic compatibility of the signal, and improves the overall signal quality of the system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- AMLOGIC (SHANGHAI) CO LTD
- Filing Date
- 2021-03-30
- Publication Date
- 2026-04-24
AI Technical Summary
With limited layout and wiring space, how to ensure signal integrity (SI) of important and sensitive signals while also taking into account power integrity (PI) and electromagnetic interference (EMI) is a challenge. In particular, when adjusting the signal strength of multiple signals in DDR memory, existing technologies struggle to meet the SI, PI, and EMI requirements of each signal simultaneously, resulting in poor overall system signal quality.
By employing a system-on-a-chip (SoC), the control unit is combined with multiple drive units and drive parameter storage units to store the drive parameter information and electrical parameter mapping relationship of the signal, thereby achieving signal drive separation. The drive intensity value is adjusted according to the actual application scenario, and the detection unit detects and adjusts the signal in real time to meet preset conditions.
By separating and adjusting the signal-driven signal in real time, the overall signal quality of the system is improved, and the issues of power integrity, signal integrity and electromagnetic compatibility are resolved, thus enhancing the overall signal quality of the system.
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Figure CN115145862B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of signal driving for storage devices, and more particularly to a system-on-a-chip and a signal driving adjustment method for storage devices. Background Technology
[0002] To meet the demand for high-capacity Double Data Rate (DDR) memory, the number of memory dies added to the DDR controller is constantly increasing, while more Chip Select (CS) signals are used to expand capacity. Given limited layout and routing space, ensuring signal integrity (SI) of critical and sensitive signals while also addressing power integrity (PI) and electromagnetic interference (EMI) issues has become particularly urgent and important.
[0003] Currently, a single driver is typically used to adjust the signal strengths of multiple signals in DDR memory. For example, for the clock signal, instruction address signal, and chip select signal, a compromise drive strength value is set based on the actual scenario, taking into account the requirements of SI, PI, and EMI. Then, the driver can output the clock signal, instruction address signal, and chip select signal corresponding to the drive strength value to drive and control the memory device.
[0004] However, the compromise drive strength value set by a single drive device is insufficient to simultaneously meet the SI, PI, and EMI requirements of various signals. When there are many storage chips in the storage device, the overall signal quality of the system is poor. Summary of the Invention
[0005] In view of this, embodiments of the present invention provide a system-on-a-chip and a signal driving adjustment method for a storage device, which can solve the problems of power integrity, signal integrity and electromagnetic compatibility of signals, and improve the overall signal quality of the system.
[0006] First, this embodiment of the invention provides a system-on-a-chip (SoC) coupled to a storage device, suitable for performing storage control on the storage device, including:
[0007] The control unit, a plurality of drive units and a plurality of drive parameter storage units respectively coupled to the control unit, wherein the drive units and the drive parameter storage units correspond one-to-one, wherein:
[0008] The drive parameter storage unit is adapted to store drive parameter information of the signal and the mapping relationship between the drive parameter information and the electrical parameters of the drive unit;
[0009] The control unit is adapted to receive a drive parameter adjustment signal, obtain drive parameter information of the signal from the drive parameter adjustment signal, obtain electrical parameters corresponding to the drive parameter information of the signal from the mapping relationship between drive parameter information and drive unit electrical parameters stored in the drive parameter storage unit, and output corresponding drive control signals to the corresponding drive unit.
[0010] The drive parameter storage unit is adapted to store the drive parameter information of the signal and the mapping relationship between the drive parameter information and the electrical parameters of the drive unit;
[0011] The driving unit is adapted to output a driving signal to the storage device according to the driving parameter information stored in the corresponding driving parameter storage unit.
[0012] Optionally, the control unit is adapted to receive drive parameter adjustment commands input by the user through human-machine interaction.
[0013] Optionally, the on-chip system further includes: multiple detection units, each of which is coupled to the output terminal of a corresponding drive unit, adapted to detect the corresponding drive signal, and outputting the drive parameter adjustment signal to the control unit when the drive signal does not meet the preset conditions.
[0014] Optionally, the driving parameter information of the signal includes the driving strength value of the signal.
[0015] Optionally, the signal includes at least two of the following types:
[0016] Clock signal;
[0017] Instruction address signal;
[0018] Chip select signal.
[0019] Optionally, the electrical parameters of the drive unit include drive impedance.
[0020] Accordingly, embodiments of the present invention also provide a signal drive adjustment method for a storage device, comprising:
[0021] Receive drive parameter adjustment signals;
[0022] The driving parameter information of the signal is obtained from the driving parameter adjustment signal;
[0023] Based on the mapping relationship between the drive parameter information and the electrical parameters of the drive unit, the electrical parameters corresponding to the drive parameter information of the signal are obtained, and the corresponding drive control signal is output to the corresponding drive unit, so that the corresponding drive unit outputs the drive signal to the storage device according to the drive parameter information stored in the corresponding drive parameter storage unit.
[0024] Optionally, receiving the drive parameter adjustment signal includes:
[0025] The system receives user input commands to adjust drive parameters through human-computer interaction.
[0026] Optionally, the receiving of the drive parameter adjustment signal further includes:
[0027] Receive the drive parameter adjustment signal generated when the drive signal does not meet the preset conditions.
[0028] Optionally, the drive parameter information obtained from the drive parameter adjustment signal includes the drive intensity value.
[0029] Optionally, the signal obtained from the drive parameter adjustment signal includes at least two of the following types:
[0030] Clock signal;
[0031] Instruction address signal;
[0032] Chip select signal.
[0033] Optionally, obtaining the electrical parameters corresponding to the drive parameter information of the signal based on the mapping relationship between the drive parameter information and the electrical parameters of the drive unit includes:
[0034] Based on the mapping relationship between the driving parameter information and the electrical parameters of the driving unit, the driving impedance corresponding to the driving parameter information of the signal is obtained.
[0035] The system-on-a-chip (SoC) of this invention includes: a control unit, a plurality of drive units and a plurality of drive parameter storage units respectively coupled to the control unit, wherein the drive units and the drive parameter storage units correspond one-to-one. The drive parameter storage units store drive parameter information of the signal and a mapping relationship between the drive parameter information and the electrical parameters of the drive units. The control unit adjusts the drive parameter information in the signal according to the drive parameter information, obtains the electrical parameters corresponding to the drive parameter information of the signal from the mapping relationship between the drive parameter information and the electrical parameters of the drive units stored in the drive parameter storage units, and outputs corresponding drive control signals to the corresponding drive units. The drive units output drive signals to the storage device according to the drive parameter information stored in the corresponding drive parameter storage units. By acquiring the driving parameter information of the corresponding signal through the control unit, obtaining the electrical parameters of the corresponding driving unit based on the driving parameter information, and outputting the corresponding driving signal to the storage device through the driving unit, the driving intensity value of the signal can be adjusted according to the actual application scenario. Moreover, by configuring a driving parameter storage unit and a driving unit for each type of signal, the separation of signal driving is achieved. Therefore, the problems of power integrity, signal integrity and electromagnetic compatibility of the signal can be solved, and the overall signal quality of the system can be improved.
[0036] Furthermore, the on-chip system may also include multiple detection units. By coupling each of the multiple detection units to a corresponding driving unit, the corresponding driving signal can be detected in real time. When the driving signal does not meet the preset conditions, the driving intensity value of the driving signal can be quickly adjusted so that the driving signal meets the preset conditions. Attached Figure Description
[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0038] Figure 1 An on-chip system for adjusting drive signals for a storage device is shown.
[0039] Figure 2 A waveform diagram of the driving intensity of a driving signal is shown.
[0040] Figure 3 It shows Figure 2 A waveform diagram of the driving intensity of a driving signal after adjustment.
[0041] Figure 4 An embodiment of the present invention illustrates a system-on-chip for adjusting drive signals for a storage device.
[0042] Figure 5 A schematic diagram of a specific structure of an on-chip system for adjusting drive signals of a storage device is shown in an embodiment of the present invention.
[0043] Figure 6 A schematic diagram of a drive intensity adjustment structure is shown in an embodiment of the present invention.
[0044] Figure 7 An embodiment of the present invention illustrates a signal-driven adjustment method for a storage device. Detailed Implementation
[0045] As can be seen from the background technology, currently, the driving of each signal is achieved by setting a compromise driving strength value through the driving device, which makes it difficult to simultaneously meet the SI, PI and EMI requirements of each signal, resulting in poor overall signal quality of the system.
[0046] To more clearly illustrate the process of setting the signal drive strength value in the prior art, the following detailed explanation is provided with reference to specific figures and examples.
[0047] Reference Figure 1 The diagram shows a system-on-a-chip (SoC) for adjusting drive signals to a storage device. The SoC 10 is coupled to a storage module 1A and is adapted to perform storage control on the storage module 1A. The SoC 10 may include a control unit 11, a register 12, and a drive unit 13.
[0048] When the control unit 11 receives a drive parameter adjustment signal, it obtains the drive strength value of the signal from the drive parameter adjustment signal. Based on the mapping relationship between the drive strength value and the electrical parameters of the drive unit stored in the register 12, it obtains the electrical parameters corresponding to the drive strength of the signal. The control unit 11 then sends the corresponding electrical parameters to the drive unit 13, which adjusts its own electrical parameters so that it outputs a drive signal value storage device 1A according to the drive strength value stored in the register 12. Subsequently, the drive unit 13 can output other types of drive signals to the storage module 1A according to the drive strength value; that is, all signals share a single drive strength value until the control unit 11 receives the drive parameter adjustment signal again and resets the drive strength value.
[0049] Because all signals use the same drive strength value, each signal has very low adjustment freedom, and there are certain constraints between the signals. While satisfying the SI, PI, and EMI of one signal, it is difficult to meet the drive strength requirements of other signals.
[0050] Specifically, refer to Figure 2 The diagram shows the waveform of the driving signal's driving intensity value. The horizontal axis represents time, and the vertical axis represents voltage. Curve 2A represents the driving intensity waveform of the clock signal, and curve 2B represents the driving intensity waveform of EMI. During actual operation, EMI radiation exceeded the standard. After inspection by professionals, the source of the EMI radiation was located to the clock signal line, specifically, the driving intensity value of the clock signal line was too high, causing the EMI radiation to exceed the standard. By adjusting the driving intensity value corresponding to the clock signal line, the problem of excessive EMI radiation was effectively suppressed.
[0051] By adjusting the drive strength value of the clock signal, the following can be obtained: Figure 3 The waveforms of the adjusted drive signal's drive strength are shown below. The horizontal axis represents time, and the vertical axis represents voltage. Curve 3A represents the waveform of the adjusted clock signal's drive strength, and curve 3B represents the waveform of the adjusted EMI drive strength. Figure 2 and Figure 3 It can be seen that the amplitude of the clock signal drive strength, the slew rate (SR) at the edge, and the amplitude of the EMI drive strength are all significantly reduced after the adjustment. For example, the range of the clock signal drive strength is reduced from -1V to 1V to 0.38V to 0.98V, and the amplitude of the EMI drive strength is reduced from 1.5V to 1.28V.
[0052] However, since all signals use the same drive strength value, a uniform reduction in drive strength revealed that other signals related to the clock signal experienced insufficient drive due to the adjustment, even though the drive strength was already the maximum drive setting to meet EMI requirements. In this situation, to ensure EMI performance, the quality of other signals must be sacrificed. Moreover, in many cases, it may be difficult to strike a good balance between EMI and signal quality, resulting in significant drawbacks.
[0053] To address the aforementioned issues, embodiments of the present invention store the signal driving parameter information in corresponding driving parameter storage units. Based on the signal driving parameter information stored in the driving parameter storage units and the mapping relationship between the stored driving parameter information and the electrical parameters of the driving units, the driving units corresponding to the driving parameter storage units output corresponding driving signals to the storage devices according to the driving parameter information. Furthermore, by configuring a driving parameter storage unit and a driving unit for each type of signal, signal driving is separated, which can solve the problems of power integrity, signal integrity, and electromagnetic compatibility, thereby improving the overall signal quality of the system.
[0054] To enable those skilled in the art to better understand, implement and realize the embodiments of the present invention, the following detailed description is provided with reference to the accompanying drawings and specific embodiments.
[0055] Reference Figure 4 The illustrated embodiment of the present invention provides a system-on-a-chip (SoC) for adjusting drive signals to a storage device. The SoC 40 is coupled to the storage device 4A and is adapted to perform storage control on the storage device 4A. The storage device 4A may include multiple memory chips, and the SoC 40 may include a control unit 41, multiple drive units coupled to the control unit 41, and multiple drive parameter storage units, with each drive unit corresponding to a drive parameter storage unit.
[0056] For example, such as Figure 4 As shown, the system-on-chip 40 may include drive parameter storage units 421, 422, ... 42i, ... 42n, and drive units 431, 432, ... 43i, ... 43n, where n is an integer greater than or equal to 2, and i is an integer greater than or equal to 2 and less than or equal to n. The drive unit 43i and the drive parameter storage unit 42i have a one-to-one correspondence. The drive unit 43i can represent any drive unit of the system-on-chip 40, and the drive parameter storage unit 42i can represent any drive parameter storage unit of the system-on-chip 40.
[0057] In this embodiment of the invention, the drive parameter storage unit 42i is adapted to store drive parameter information of the signal and the mapping relationship between the drive parameter information and the electrical parameters of the drive unit;
[0058] The control unit 41 is adapted to receive a drive parameter adjustment signal, obtain drive parameter information of the signal from the drive parameter adjustment signal, obtain the electrical parameters corresponding to the drive parameter information of the signal from the mapping relationship between the drive parameter information and the electrical parameters of the drive unit stored in the drive parameter storage unit 42i, and output the corresponding drive control signal to the corresponding drive unit 43i.
[0059] The drive unit 43i is adapted to output a drive signal to the storage device 4A according to the drive parameter information stored in the corresponding drive parameter storage unit.
[0060] In practical implementation, as the memory capacity of the storage device increases, the number of internal memory chips also increases. Therefore, the storage device 4A may include multiple memory chips. For example, such as Figure 4 As shown, the storage device 4A may include memory chips 4A1, 4A2, ..., 4Aj, ..., 4Am, where m is an integer greater than or equal to 1, and j is an integer greater than or equal to 1 and less than or equal to m.
[0061] In this embodiment of the invention, the control unit 41 can receive a drive parameter adjustment signal from an external source, wherein the drive parameter adjustment signal includes drive parameter information of the signal. For example, the drive parameter information of the signal in the drive parameter adjustment command may be the drive intensity value of the signal; in this embodiment of the invention, the drive intensity value may be a voltage value.
[0062] When the control unit 41 receives a drive parameter adjustment signal, it will, according to the type of the signal and the drive parameter information of the signal, obtain the electrical parameters corresponding to the drive parameter information of the signal from the mapping relationship between the drive parameter information and the electrical parameters of the drive unit stored in the drive parameter storage unit 42i corresponding to the signal, and output the corresponding drive control signal to the corresponding drive unit 43i. The drive unit 43i can adjust its own electrical parameters according to the electrical parameters corresponding to the drive parameter information of the signal obtained from the control unit 41, so that the drive unit 43i outputs a drive signal to the storage device 4A according to the drive parameter information stored in the corresponding drive parameter storage unit 42i.
[0063] In specific implementations, depending on different application scenarios, the control unit 41 can receive drive parameter adjustment signals in various ways. Specifically, the state of the corresponding drive signal can be manually obtained, and the user-input drive parameter adjustment command can be received through human-computer interaction; or, the on-chip system 40 further includes: multiple detection units, each of which is coupled to the output terminal of a corresponding drive unit, adapted to detect the corresponding drive signal, and outputting the drive parameter adjustment signal to the control unit when the drive signal does not meet preset conditions.
[0064] In this embodiment of the invention, when the detection unit detects an abnormality in any one of the parameters SI, PI, and EMI of the corresponding signal, it generates a drive signal corresponding to the signal and outputs the drive signal to the control unit 41, which then adjusts the signal according to the drive signal.
[0065] By setting multiple detection units in the system-on-chip 40, each detection unit can be coupled to the output terminal of a corresponding drive unit, thereby enabling real-time detection of the corresponding drive signal and rapid adjustment of the drive intensity value of the drive signal.
[0066] In this embodiment of the invention, since the driving unit and the driving parameter storage unit are in a one-to-one correspondence, the control unit 41 can simultaneously acquire at least two types of signals, and the driving parameter storage unit and the driving unit can simultaneously set the driving strength values of the at least two types of signals. For example, the signals may include at least two of the following types: clock signal, instruction address signal, chip select signal, etc. By adjusting the driving strength values of each signal separately, while reducing the driving strength value of one signal, the driving strength settings of other signals can be effectively maintained, achieving maximum compatibility.
[0067] In a specific implementation, the control unit 41 can obtain the corresponding drive unit electrical parameters based on the drive parameter information of the signal stored in the drive parameter storage unit 42i and the mapping relationship between the drive parameter information and the drive unit electrical parameters. The drive unit 43i then adjusts its own electrical parameters according to these drive unit electrical parameters. Specifically, the drive unit's electrical parameters include drive impedance. The drive unit 43i can adjust its own drive impedance to output a drive signal to the storage device 4A according to the drive parameter information stored in the corresponding drive parameter storage unit.
[0068] In this embodiment of the invention, the control unit 41 can be implemented by a processing chip such as a central processing unit (CPU) or a field programmable gate array (FPGA), or by an application specific integrated circuit (ASIC) or one or more integrated circuits configured to implement this embodiment of the invention.
[0069] The drive parameter storage unit 42i can be located inside the control unit 41, as part of the memory controller. In a specific implementation, the drive parameter storage unit can be a register, which is used to store the mapping relationship between drive parameter information and drive unit electrical parameters.
[0070] In this embodiment of the invention, for a specific signal drive strength value, for example, a clock signal, the larger the drive strength value of the clock signal, the larger the signal edge SR, and the larger the drive strength amplitude of the clock signal, resulting in better SI quality. However, for the signal PI and EMI, the smaller the drive strength, the better. Therefore, a balance and trade-off needs to be made between the SI, EMI, and PI of the signal.
[0071] In practical implementation, the minimum drive strength value, the maximum drive strength value, and the drive strength value in the middle position of the signal can be obtained through the signal eye diagram. The drive strength value in the middle position is used as the drive strength value of the signal, and the drive strength value in the middle position is stored by the drive parameter storage unit. While ensuring SI, the quality of EMI and PI are also taken into account.
[0072] To enable those skilled in the art to better understand and implement the process of adjusting the driving parameters of the signal in the embodiments of the present invention, the following detailed description is provided in conjunction with the accompanying drawings and specific application scenarios.
[0073] like Figure 5 The present invention provides a schematic diagram of a specific structure of a system-on-a-chip (SoC) for adjusting drive signals of a storage device. The SoC 50 is coupled to a storage device 5A and is adapted to perform storage control on the storage device 5A. The storage device 5A may include memory chips U1, U2, U3, and U4. The SoC 50 may include a control unit 51, a first drive parameter storage unit 521, a second drive parameter storage unit 522, a third drive parameter storage unit 523, a first drive unit 531, a second drive unit 532, and a third drive unit 533. The control unit 51 is coupled to the first drive parameter storage unit 521, the second drive parameter storage unit 522, the third drive parameter storage unit 523, and the first drive unit 531, the second drive unit 532, and the third drive unit 533, respectively.
[0074] In a specific implementation, the first drive parameter storage unit 521 and the first drive unit 531 are adapted to adjust the drive strength value of the clock signal Clock; the second drive parameter storage unit 522 and the second drive unit 532 are adapted to adjust the drive strength value of the instruction address signal Ad; and the third drive parameter storage unit 523 and the third drive unit 533 are adapted to adjust the drive strength value of the chip select signal CS.
[0075] In this embodiment of the invention, the control unit 51 can receive drive parameter adjustment signals from an external source. These drive parameter adjustment signals may include drive parameter information for a clock signal, drive parameter information for an address command signal, and drive parameter information for a chip select signal. The control unit 51 can store the drive parameter information for the clock signal in a first drive parameter storage unit 521, the drive parameter information for the address command signal in a second drive parameter storage unit 522, and the drive parameter information for the chip select signal in a third drive parameter storage unit 523. The corresponding drive unit of each drive parameter storage unit then outputs a corresponding drive signal to the storage device 5A according to the drive parameter information of the signals.
[0076] As a specific example, the parameter adjustment signal received by the control unit 51 includes a clock signal. The control unit 51 obtains the electrical parameters of the first drive unit 531 corresponding to the drive parameter information of the clock signal based on the obtained drive parameter information of the clock signal and the mapping relationship between the drive parameter information stored in the first drive parameter storage unit 521 and the electrical parameters of the drive unit. The control unit 51 then sends the electrical parameters to the first drive unit 531, which adjusts its own electrical parameters according to the electrical parameters, so that the first drive unit 531 can output a drive signal to the storage device 5A according to the drive parameter information stored in the first drive parameter storage unit 521.
[0077] In practice, the control unit 51 can receive drive parameter adjustment commands input by the user through manual interaction.
[0078] In addition, in order to enable the on-chip system 50 to automatically detect the corresponding drive signal in real time and quickly adjust the intensity value of the corresponding drive signal when the drive signal does not meet the preset conditions, the on-chip system 50 may also include multiple detection units. Each of the multiple detection units is coupled to the output terminal of the corresponding drive unit, and is adapted to detect the corresponding drive signal. When the drive signal does not meet the preset conditions, the detection unit outputs the drive parameter adjustment signal to the control unit.
[0079] In specific implementation, such as Figure 5 As shown, the on-chip system may include a first detection unit 541, a second detection unit 542, and a third detection unit 543. The first detection unit 541 is coupled between the first driving unit 531 and the control unit 51, the second detection unit 542 is coupled between the second driving unit 532 and the control unit 51, and the third detection unit 543 is coupled between the third driving unit 533 and the control unit 51.
[0080] In specific implementations, the drive parameter information may include the drive strength value of the signal, which may be a voltage value. For example, the drive strength value in the drive parameter information of the clock signal is D1, the drive strength value in the drive parameter information of the address instruction signal is D2, and the drive strength value in the drive parameter information of the chip select signal is D3.
[0081] As a specific example, the drive strength value D1 in the drive parameter information of the clock signal received by the control unit 51 is 3.3V. The first drive parameter storage unit 521 obtains the electrical parameter E1 of the first drive unit 531 corresponding to the first drive parameter storage unit 521 from the mapping relationship between the drive parameter information and the electrical parameters of the drive unit based on the drive strength value of 3.3V. The control unit 51 sends the electrical parameter E1 to the first drive unit 531. The first drive unit 531 adjusts its own electrical parameters according to the obtained electrical parameter E1, so that the first drive unit 531 can continuously output the clock signal to the storage device 5A with a drive strength value of 3.3V, thereby realizing the storage control of the storage device 5A.
[0082] In practical implementation, the drive strength values of the instruction address signal and chip select signal can be adjusted in the same way. By configuring a drive parameter storage unit and a drive unit for each type of signal, the separation of signal drive is achieved, which can solve the problems of power integrity, signal integrity and electromagnetic compatibility of the signal, and improve the overall signal quality of the system.
[0083] Specifically, you can refer to Figure 6 The schematic diagram shown in this embodiment of the invention illustrates a structure for adjusting the drive intensity value of a signal, such as... Figure 6 As shown, it may include: a variable resistor R1, a resistor R2, a voltage input terminal VDDQ, a drive strength output terminal DRAM IO, and a resistor R3 connected in parallel with the drive strength output terminal DRAM IO. The variable resistor R1 is the equivalent resistance value of the internal impedance of the drive unit, the resistor R2 is the trace impedance of the printed circuit board (PCB), and the resistor R3 is the equivalent resistance of the memory chip in the storage device.
[0084] Depend on Figure 6 It can be seen that the drive strength value V of the drive strength output terminal DRAM IO is... DRAM IO =V VDDQ *R3 / (R1+R2+R3).
[0085] By adjusting the equivalent resistance value R1 of the internal impedance of the drive unit, the drive strength value of the signal received by the storage device can be adjusted. Specifically, when the drive strength value of the corresponding signal in the drive parameter adjustment command received by the control unit is greater than the expected drive strength value, the resistance value of the variable resistor R1 can be increased to decrease the voltage of the DRAM IO at the drive strength output terminal, thereby achieving the expected drive strength value. Conversely, when the drive strength value in the drive parameter adjustment command received by the control unit is less than the expected drive strength value, the resistance value of the variable resistor R1 can be decreased to increase the voltage of the DRAM IO at the drive strength output terminal, thereby achieving the expected drive strength value.
[0086] This invention also provides a signal driving adjustment method for a storage device, which will be described in detail below with reference to the accompanying drawings and specific embodiments.
[0087] Reference Figure 7 The signal drive adjustment method for a storage device shown in the embodiment of the present invention can be specifically adjusted by the following steps.
[0088] S71 receives drive parameter adjustment signals.
[0089] Specifically, depending on the application scenario, the state of the corresponding drive signal can be obtained manually, and the drive parameter adjustment signal input by the user can be received through human-computer interaction; or, the drive parameter adjustment signal generated when the drive signal does not meet the preset conditions can be received, and the drive intensity value of the signal can be automatically adjusted.
[0090] In this embodiment of the invention, when any one of the parameters SI, PI, and EMI of the drive signal is detected to be abnormal and does not meet the preset conditions, the drive parameter adjustment signal can be output to the control unit. The control unit then controls the drive parameter storage unit and drive unit corresponding to the drive signal to adjust the drive intensity value of the drive signal.
[0091] S72, obtain the driving parameter information of the signal from the driving parameter adjustment instruction.
[0092] Specifically, the drive parameter adjustment command may include drive parameter information for multiple different types of signals, and the drive parameter information for each signal may include a drive strength value. In a specific implementation, the drive strength value may be a voltage value.
[0093] S73, based on the mapping relationship between the drive parameter information and the electrical parameters of the drive unit, obtain the electrical parameters corresponding to the drive parameter information of the signal, and output the corresponding drive control signal to the corresponding drive unit, so that the corresponding drive unit outputs the drive signal to the storage device according to the drive parameter information stored in the corresponding drive parameter storage unit.
[0094] Specifically, the drive parameter adjustment signal may include multiple different types of signals. When the control unit receives a drive parameter adjustment command, it receives the drive parameter information of the corresponding signal. For example, the signal in the drive parameter adjustment command may include at least two types of signals such as a clock signal, an instruction address signal, and a chip select signal. When the received drive parameter adjustment signal includes a clock signal and an instruction address signal or a chip select signal, the control unit stores the drive parameter information of the clock signal and the drive parameter information of the instruction address signal or the chip select signal into the corresponding drive parameter storage units.
[0095] In a specific implementation, the drive parameter adjustment information includes a drive intensity value. The drive parameter storage unit can store the drive intensity value. The control unit can obtain the electrical parameters of the drive unit corresponding to the drive parameter storage unit based on the drive parameter adjustment information of the acquired signal, from the mapping relationship between the drive parameter information stored in the drive parameter storage unit corresponding to the signal and the electrical parameters of the drive unit. The control unit then transmits the electrical parameters of the corresponding drive unit to the drive unit corresponding to the drive parameter storage unit. The drive unit adjusts its own electrical parameters according to the electrical parameters, so that the drive unit outputs a drive signal to the storage device according to the drive parameter information stored in the corresponding drive parameter storage unit.
[0096] In this embodiment of the invention, the electrical parameters include driving impedance. The control unit can obtain the driving impedance corresponding to the driving parameter information of the signal according to the mapping relationship between the stored driving parameter information and the electrical parameters of the driving unit. The driving unit can adjust its own driving impedance and output a corresponding driving strength value, so that the driving unit can output a driving signal to the storage device according to the driving parameter information obtained by the corresponding driving parameter storage unit.
[0097] While the embodiments of the present invention have been disclosed above, the present invention is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A system-on-a-chip coupled to a storage device, adapted to perform storage control on the storage device, characterized in that, The system-on-a-chip includes: a control unit, multiple drive units coupled to the control unit, and multiple drive parameter storage units, wherein the drive units and the drive parameter storage units correspond one-to-one. The drive parameter storage unit is adapted to store drive parameter information of the signal and the mapping relationship between the drive parameter information and the electrical parameters of the drive unit. The signal includes at least two types of signals, the drive parameter storage unit stores the mapping relationship corresponding to at least two types of signals, and the drive parameter information of the signal includes the drive strength value of the signal. The control unit is adapted to receive a drive parameter adjustment signal, obtain drive parameter information of the signal from the drive parameter adjustment signal, obtain electrical parameters corresponding to the drive parameter information of the signal from the mapping relationship between drive parameter information and drive unit electrical parameters stored in the drive parameter storage unit, and output corresponding drive control signals to the corresponding drive unit. The driving unit is adapted to output driving signals to the storage device according to the driving parameter information stored in the corresponding driving parameter storage unit, including: the driving unit can adjust its own driving impedance and output driving signals to the storage device according to the driving intensity values stored in the corresponding driving parameter storage unit.
2. The system-on-a-chip according to claim 1, characterized in that, The control unit is adapted to receive drive parameter adjustment commands input by the user through human-computer interaction.
3. The system-on-a-chip according to claim 1, characterized in that, The on-chip system further includes: multiple detection units, each of which is coupled to the output terminal of a corresponding drive unit, adapted to detect the corresponding drive signal, and outputting the drive parameter adjustment signal to the control unit when the drive signal does not meet the preset conditions.
4. The system-on-a-chip according to claim 1, characterized in that, The signal includes at least two of the following types: Clock signal; Instruction address signal; Chip select signal.
5. A signal drive adjustment method for a storage device, characterized in that, include: Receive drive parameter adjustment signals; The driving parameter information of the signal is obtained from the driving parameter adjustment signal, and the driving parameter information includes the driving intensity value; Based on the mapping relationship between the drive parameter information and the electrical parameters of the drive unit, the drive impedance corresponding to the drive parameter information of the signal is obtained, and a corresponding drive control signal is output to the corresponding drive unit, so that the corresponding drive unit outputs a drive signal to the storage device according to the drive parameter information stored in the corresponding drive parameter storage unit. The signal includes at least two types of signals, and the drive parameter storage unit stores the mapping relationship corresponding to at least two types of signals. The step of making the corresponding drive unit output a drive signal to the storage device according to the drive parameter information stored in the corresponding drive parameter storage unit includes adjusting the drive impedance of the drive unit itself and outputting drive signals to the storage device according to the drive intensity value stored in the corresponding drive parameter storage unit.
6. The signal drive adjustment method for a storage device according to claim 5, characterized in that, The received drive parameter adjustment signal includes: The system receives user input commands to adjust drive parameters through human-computer interaction.
7. The signal drive adjustment method for a storage device according to claim 5, characterized in that, The receiving drive parameter adjustment signal further includes: Receive the drive parameter adjustment signal generated when the drive signal does not meet the preset conditions.
8. The signal drive adjustment method for a storage device according to claim 5, characterized in that, The acquisition of signals from the drive parameter adjustment signal includes at least two of the following types: Clock signal; Instruction address signal; Chip select signal.
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