Semiconductor device and method for manufacturing semiconductor device

Abstract

A stacked body (22) is formed on a semiconductor substrate (10). Two or more grooves (54) are formed in the stacked body (22). A table (24) is formed with two of the two or more grooves (54) arranged on both sides. An insulating resin film (30) is buried in the two or more grooves (54). A first opening (32) is formed in the insulating resin film (30) buried in one of the two or more grooves (54), and an electrode (46) is formed extending upward from the bottom surface (36). The first side surface (34) of the insulating resin film (30) has an inclination in the positive cone direction.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art

[0002] In order to operate an optical semiconductor device such as a semiconductor laser at high speed, it is important to reduce the parasitic capacitance of the electrode. If two electrodes are arranged to face each other, the parasitic capacitance increases. The increase in the parasitic capacitance hinders high-speed operation.

[0003] In order to reduce the parasitic capacitance of the electrode, a surface mounted semiconductor laser is used. The two electrodes of the surface mounted semiconductor laser are formed on the same side. That is, the two electrodes are not opposite to each other. Therefore, the parasitic capacitance of the electrode can be reduced.

[0004] In a surface mounted semiconductor laser, the electrode led out from the lower side is led out to the upper side along the opening dug out from the upper surface. In a semiconductor laser, since the current flows vertically relative to the substrate at the light emitting portion, in a surface mounted semiconductor laser, it is necessary to lead the lower electrode from a position close to the substrate to the upper side. In order to realize this structure, the electrode connected at the bottom of the opening is led out to the upper side.

[0005] If the angle of the side of the opening becomes steep, it is easy to cause the electrode to peel off or break. The electrode has a bent portion from the bottom of the opening to the top. If the angle of the side of the opening is steep, the angle of the bend also becomes steep. If the angle is steep, it is easy to cause the electrode to peel off or break.

[0006] A surface-mounted semiconductor laser having a side surface of an opening that is not steep is disclosed (see, for example, Patent Document 1). The semiconductor laser disclosed in Patent Document 1 is provided with a high-resistance semiconductor buried layer on the left and right sides of a table surface including a light-emitting portion. An opening is provided in the high-resistance semiconductor buried layer, and an electrode is led out. The side surface of the high-resistance semiconductor buried layer in contact with the opening is formed at an angle of about 70° using the characteristics of the MOVPE method.

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 7-135369

[0008] In the above semiconductor laser, the effect of reducing parasitic capacitance may be insufficient. Since such semiconductor lasers have high-resistance semiconductor buried layers with a relatively high dielectric constant buried on both sides of the mesa, the parasitic capacitance of the electrode may not be reduced sufficiently. Summary of the invention

[0009] The present disclosure has been made to solve the above-mentioned problems, and an object of the present disclosure is to obtain a semiconductor device and a method for manufacturing the semiconductor device in which the parasitic capacitance of the electrode is suppressed and the electrode peeling and disconnection are unlikely to occur.

[0010] The semiconductor device disclosed in the present invention comprises: a semiconductor substrate; a stacked body formed on the semiconductor substrate, wherein the bottom layer is composed of a first conductive type cladding layer, the top layer is composed of a second conductive type cladding layer, and two or more grooves are formed from the upper surface of the second conductive type cladding layer to the middle of the first conductive type cladding layer; a terrace having a ridge waveguide and two of the two or more grooves are arranged on both sides, wherein the ridge waveguide is composed of a first conductive type cladding layer, an active layer, and a second conductive type cladding layer in sequence from the side close to the semiconductor substrate; and an insulating resin film buried in the two or more grooves, wherein a first opening portion is formed in the insulating resin film buried in one of the two or more grooves to expose the first conductive type cladding layer at the bottom surface, and the semiconductor device is formed with an electrode, which is connected to the first conductive type cladding layer at the bottom surface and is led out upward from the insulating resin film along a first side surface of the insulating resin film in contact with the first opening portion, and the first side surface has an inclination in the direction of a positive cone.

[0011] In addition, the manufacturing method of the semiconductor device disclosed in the present invention comprises the following steps: a step of sequentially forming a first conductive type cladding layer, an active layer, and a second conductive type cladding layer on a semiconductor substrate; a step of etching from the upper surface of the second conductive type cladding layer to the middle of the first conductive type cladding layer to form two or more grooves, and a step of forming a table having a ridge waveguide and two grooves of the two or more grooves arranged on both sides, wherein the ridge waveguide is composed of the first conductive type cladding layer, the active layer, and the second conductive type cladding layer from the side close to the semiconductor substrate; a step of forming an insulating resin film that fills the two or more grooves; a step of forming an insulating film on the insulating resin film and the second conductive type cladding layer. Steps; a step of forming a second opening by etching an insulating film on an insulating resin film buried in one of two or more grooves, and making the second side surface of the insulating film in contact with the second opening have an inclination in the direction of a positive cone; a step of forming a first opening by etching the insulating resin film below the second opening in a manner that exposes the first conductive type cladding layer using the insulating film as a mask, and making the first side surface of the insulating resin film in contact with the first opening have an inclination in the direction of a positive cone; and a step of forming an electrode, which is connected to the first conductive type cladding layer at the bottom surface of the first opening and is led out upward from the insulating resin film along the first side surface.

[0012] According to the semiconductor device and the method for manufacturing the semiconductor device disclosed in the present invention, the insulating resin film is buried in the grooves on both sides of the table, and the electrode is led out to the top from the opening portion opened in the insulating resin film. In addition, the side surface of the insulating resin film in contact with the opening portion has an inclination in the positive taper direction. Therefore, a semiconductor device can be obtained in which the parasitic capacitance of the electrode is suppressed and the electrode is not easily peeled off or disconnected. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a cross-sectional view showing the semiconductor device according to the first embodiment.

[0014] Figure 2 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0015] Figure 3 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0016] Figure 4 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0017] Figure 5 This is a SEM photograph showing the experimental results of etching the insulating film in the first embodiment.

[0018] Figure 6 This is a diagram showing the experimental results of the etching rate and the selectivity in the first embodiment.

[0019] Figure 7 This is a SEM photograph showing the experimental results of etching the insulating resin film according to the first embodiment.

[0020] Figure 8 It is a diagram for explaining the inclination angle of etching of the insulating film and the insulating resin film according to the first embodiment.

[0021] Fig. 9 This is a cross-sectional view showing a modification of the semiconductor device according to the first embodiment.

[0022] Fig.10 This is a cross-sectional view showing another modified example of the semiconductor device according to the first embodiment.

[0023] Fig.11 It is a cross-sectional view showing a semiconductor device according to a second embodiment.

[0024] Fig.12 It is a top view showing a semiconductor device according to a second embodiment.

[0025] Fig.13 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the second embodiment.

[0026] Fig.14 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the second embodiment.

[0027] Fig.15 This is a cross-sectional view showing a modification of the semiconductor device according to the second embodiment.

[0028] Fig.16 This is a cross-sectional view showing another modified example of the semiconductor device according to the second embodiment. DETAILED DESCRIPTION

[0029] Implementation method 1.

[0030] The structure of the semiconductor device according to the first embodiment will be described. The semiconductor device according to the first embodiment is Figure 1 A semiconductor laser 10 is shown. Figure 1 It is a cross-sectional view of the semiconductor laser 10 including a plane perpendicular to the cavity direction.

[0031] The semiconductor laser 10 includes a semiconductor substrate 12. The semiconductor substrate 12 is a semi-insulating substrate made of, for example, InP.

[0032] A first conductivity type cladding layer 14 is formed on the semiconductor substrate 12. The first conductivity type cladding layer 14 is made of, for example, n-type InP. The impurity concentration of the first conductivity type cladding layer 14 in a portion connected to the electrode 46 may be increased to reduce resistance.

[0033] A ridge waveguide 26 is formed, which is composed of a first conductive type cladding layer 14, an active layer 16, and a second conductive type cladding layer 18 in order from the bottom. The active layer 16 includes, for example, a multi-quantum well structure composed of i-type AlGaInAs. Here, i-type refers to a semiconductor that is not doped as desired. The second conductive type cladding layer 18 is composed of, for example, p-type InP.

[0034] The current blocking layer 20 is buried on the left and right of the ridge waveguide 26. The current blocking layer 20 is made of, for example, Fe-InP (InP doped with Fe).

[0035] A second conductivity type cladding layer 18 is further formed on the ridge waveguide 26 and the current blocking layer 20 .

[0036] A mesa 24 is formed by the first conductivity type cladding layer 14, the ridge waveguide 26, the current blocking layer 20, and the second conductivity type cladding layer 18. The mesa 24 has a width of, for example, 4.0 μm to 10.0 μm and a height of 6.0 μm to 8.0 μm.

[0037] A groove 54 is formed in the stacked body 22, which has the first conductive type cladding layer 14 as the bottom layer and the second conductive type cladding layer 18 as the top layer. The groove 54 is located in the manufacturing process. Figure 2 The groove 54 is dug on both sides of the terrace 24. The groove 54 is dug from the upper surface of the second conductivity type cladding layer 18 to the middle of the first conductivity type cladding layer 14.

[0038] The insulating resin film 30 is embedded in the groove 54. The insulating resin film 30 is made of BCB (benzocyclobutene) resin or polyimide resin, etc., which has a low dielectric constant and excellent embedding flatness.

[0039] A first opening 32 is formed on one side of the insulating resin film 30 on both sides of the terrace 24. The first conductive type cladding layer is exposed at the bottom surface 36 of the first opening 32. The side surface (first side surface 34) of the insulating resin film 30 in contact with the first opening 32 is inclined in a positive tapered direction in which the insulating resin film expands as it approaches the semiconductor substrate 12. An angle α formed between the first side surface 34 and the lower surface of the insulating resin film 30 is greater than 20° and less than 60°.

[0040] An insulating film 38 is formed on the insulating resin film 30 and the second conductive type cladding layer 18. A second opening 40 is formed in the insulating film 38 so as to be connected to the first opening 32. Figure 1 In the figure, a dotted line is drawn to indicate the position of the second opening 40. The side surface (second side surface 42) of the insulating film 38 in contact with the second opening 40, that is, the second side surface 42 of the insulating film 38 connected to the first side surface 34, has an inclination in the positive tapered direction. The insulating film 38 is composed of, for example, a silicon oxide film.

[0041] An electrode 46 is formed on the bottom surface 36 and connected to the first conductive type cladding layer 14 and is drawn above the insulating film 38 along the first side surface 34 and the second side surface 42. The electrode 46 is formed of a stacked structure of Ti / Pt / Au, for example.

[0042] An electrode 48 is formed to pass through a third opening 44 of the insulating film 38 formed on the mesa 24 and connected to the second conductivity type cladding layer 18. The electrode 48 is formed of a stacked structure of Ti / Pt / Au, for example.

[0043] use Figure 2 to Figure 4 A method for manufacturing the semiconductor laser 10 will be described.

[0044] First, if Figure 2 As shown in (a) of FIG. 1 , a first conductivity type cladding layer 14, an active layer 16, and a second conductivity type cladding layer 18 are sequentially formed on a semiconductor substrate 12. These are formed by epitaxial growth.

[0045] Then, if Figure 2As shown in (b), the ridge waveguide 26 is formed. To form the ridge waveguide 26, a mask 50 having a stripe pattern made of a silicon oxide film is first formed. Next, dry etching is performed using the mask 50 as an etching mask. At this time, etching is performed to the middle of the first conductivity type cladding layer 14.

[0046] Next, if Figure 2 As shown in (c), the current blocking layer 20 is buried on the left and right of the ridge waveguide 26. For the buried current blocking layer 20, the current blocking layer 20 is selectively epitaxially grown using a mask 50. At this time, the current blocking layer 20 is buried up to the upper surface of the ridge waveguide 26.

[0047] Then, if Figure 2 As shown in (d), the second conductivity type cladding layer 18 is further grown on the ridge waveguide 26 and the current blocking layer 20. To grow the second conductivity type cladding layer 18, the mask 50 is removed by hydrofluoric acid such as buffered hydrofluoric acid, and then the second conductivity type cladding layer 18 is epitaxially grown.

[0048] Next, if Figure 2 As shown in (e), two grooves 54 are formed and a mesa 24 is formed. In this process, a mask 52 is used to dry-etch from the upper surface of the second conductive type cladding layer 18 to the middle of the first conductive type cladding layer 14, thereby forming two grooves 54. Thus, a mesa 24 with two grooves 54 arranged on both sides is formed.

[0049] Next, if Figure 3 As shown in (a), from Figure 2 The mask 52 is removed from the state (e), and an insulating resin film 30 is formed on the entire surface. For the formation of the insulating resin film 30, an adhesion enhancer is first applied, and a non-photosensitive BCB resin as an insulating resin is applied thereon by spin coating to form a film, and then a thermal curing treatment is performed. The insulating resin shrinks and deforms through a polymerization reaction during the thermal curing treatment, so the shrinkage amount is estimated in advance to design the film thickness. The insulating resin preferably uses a non-photosensitive BCB resin with a low dielectric constant (for example, a relative dielectric constant of 2.50 to 2.65) that shrinks less during the thermal curing treatment. The film thickness of the insulating resin film can be obtained by adjusting the viscosity and the main rotation speed during spin coating, for example, a value of 1.0μm to 26.0μm. In addition, the thermal curing treatment can be performed by a baking furnace, for example, by heating at 250°C to 350°C, but it is easily affected by oxidation when the temperature is increased, so it is necessary to perform the heat treatment in an inert gas environment such as nitrogen and argon so as to keep the oxygen concentration, for example, below 100ppm. Since it is necessary to form an electrode on the mesa 24 later, the thickness of the insulating resin film 30 on the mesa 24 is preferably 1.0 μm or less.

[0050] Next, if Figure 3As shown in (b), the insulating resin film 30 is etched back to expose the mesa 24, thereby forming the insulating resin film 30 that fills the two grooves 54 on both sides of the mesa 24. When BCB resin is used as the insulating resin, the etch back can be applied by plasma etching based on a mixed gas of, for example, oxygen gas and CF4, CHF3, C2F6, C3F8, C4F8 or other fluorocarbon-based gas.

[0051] Next, if Figure 3 As shown in (c), an insulating film 38 is formed on the insulating resin film 30 and the second conductivity type cladding layer 18. The insulating film 38 is formed by, for example, CVD (Chemical Vapor Deposition).

[0052] Next, if Figure 3 As shown in (d) of FIG. 5 , a photoresist 56 is formed. The photoresist 56 is formed by, for example, a spin coating method. As the photoresist 56 , a positive resist or a negative resist for i-line used in a normal stepper exposure can be used.

[0053] Next, if Figure 3 As shown in FIG. 5 (e), an opening pattern 58 is formed by photolithography on the photoresist 56 on the insulating resin film 30 that is buried in one of the two grooves 54.

[0054] Next, if Figure 4 As shown in (a), the second opening 40 is formed in the insulating film 38 under the opening pattern 58. For the formation of the second opening 40, a wet etching process using a solution containing hydrofluoric acid is performed. At this time, the second side surface 42 of the insulating film 38 in contact with the second opening 40 is inclined in the positive tapered direction. This is because the insulating film 38 is isotropically etched.

[0055] Next, if Figure 4 As shown in (b), the photoresist 56 is removed. The photoresist 56 is removed by, for example, a stripping solution, oxygen ashing, etc. The removal of the photoresist 56 can also be continuously processed in the same chamber as the etching of the insulating resin film 30 in the next step, thereby simplifying the process.

[0056] Next, if Figure 4As shown in (c), the insulating resin film 30 below the second opening 40 is etched in such a manner that the first conductive type cladding layer 14 is exposed, thereby forming a first opening 32, and making the first side surface 34 of the insulating resin film 30 in contact with the first opening 32 have an inclination in the positive tapered direction. The etching is performed using the insulating film 38 as a hard mask. For example, the etching can be performed by plasma etching using a fluorocarbon gas and oxygen. At this time, the etching rate (R BCB ) and the etching rate (R SiO ) ratio (R BCB / R SiO Here, a mixed gas of C3F8 gas and oxygen gas is used, for example, the mixing ratio of oxygen gas is set to 57% and the selectivity is adjusted to about 4 to etch the insulating resin film 30. Thus, the inclination of the insulating film 38 can be transferred to the insulating resin film 30. At this time, the insulating film 38 retreats by etching and the film thickness becomes thinner.

[0057] Next, if Figure 4 As shown in (d) of FIG. 1 , a third opening 44 is formed in the insulating film 38 on the mesa 24. To form the third opening 44, photolithography and reactive ion etching containing, for example, a fluorine-based gas are performed again.

[0058] Next, the electrode 46 and the table electrode 48 are formed to obtain Figure 1 Semiconductor laser 10. For forming the above-mentioned electrode, for example, first, an opening pattern is formed by photolithography using an image reversal resist or a stripping resist. Then, an electrode consisting of a stacked structure of Ti / Pt / Au is stacked on the entire surface of the crystal by evaporation or sputtering, and then peeled off. In this way, an electrode can be formed in the portion where the resist is opened. The electrode 46 formed at this time is led out to the top of the insulating film 38 along the first side surface 34 and the second side surface 42 having an inclined positive tapered direction.

[0059] Three experimental results confirming that the second side surface 42 of the insulating film 38 composed of a silicon oxide film and the first side surface 34 of the insulating resin film 30 composed of BCB have an inclination in the forward tapered direction will be described.

[0060] In the first experiment, Figure 5As shown in FIG. 1 , it is confirmed that the second side surface 42 of the insulating film 38 has an inclination in the positive tapered direction. In this experiment, first, a structure is prepared in which an insulating resin film 30 composed of BCB and an insulating film 38 composed of a silicon oxide film are formed on a semiconductor substrate 12 composed of semi-insulating InP. Next, a photoresist is formed on the insulating film 38, and an opening pattern is further provided in the photoresist. The insulating film 38 is wet-etched using hydrofluoric acid. Finally, the photoresist is removed, thereby obtaining Figure 5 The angle β formed between the second side surface 42 of the insulating film 38 and the upper surface of the insulating resin film 30 is 20° or less.

[0061] In the second experiment, Figure 6 As shown in the figure, the etching selectivity (R BCB / R SiO ) increases with the increase of the mixing ratio of oxygen. In this experiment, the process of forming the first opening 32 described above ( Figure 4 (c)) Similarly, plasma etching was performed using a mixed gas of C3F8 gas and oxygen. At this time, the mixing ratio of oxygen was changed to study the selectivity. The results show that the etching rates of BCB and SiO become Figure 6 As (a) of . Figure 6 As shown in (b), as the mixing ratio of oxygen increases, the selectivity also increases.

[0062] In the third experiment, Figure 7 As shown in FIG. 1 , the insulating resin film 30 was etched by changing the mixing ratio of oxygen and observing the first side surface 34 of the insulating resin film 30. The mixing ratio of oxygen was 57%, 67%, and 83%. In this experiment, the first side surface 34 of the insulating resin film 30 was observed. Figure 5 The structure in the state was subjected to plasma etching in the same manner as in the second experiment.

[0063] Under the condition of mixing ratio of 57%, Figure 7 As shown in (a), it can be seen that the inclination angle α of the insulating resin film 30 is about 55°, and burrs and irregularities are not noticeable on the first side surface 34. This condition is suitable for electrode formation.

[0064] Under the condition of mixing ratio of 67%, Figure 7 As shown in (b), the result is burrs and uneven spots. The second side surface 42 of the insulating film 38 is formed with tiny unevenness by wet etching. The unevenness is transferred to the first side surface 34 of the insulating resin film 30 when the insulating resin film 30 is etched. When the mixing ratio is 57%, as shown in Figure 6As shown, the etching selectivity is 4. On the other hand, if the mixing ratio is 67%, the selectivity is 7.1. Therefore, if the mixing ratio is 67%, the first side surface 34 becomes steep, thereby emphasizing the unevenness and burrs.

[0065] Under the condition of 83% mixing ratio, Figure 7 As shown in (c), the first side surface 34 becomes almost vertical. Under the condition of the mixing ratio of 83%, the etching selectivity is not Figure 6 , but it is expected to be a higher value. In this case, no concavity or convexity is formed on the first side surface 34, and it becomes almost vertical. That is, the inclination in the positive taper direction cannot be obtained.

[0066] The selectivity may be around 4, and specifically preferably 3 to 5. If the selectivity is reduced, there is an advantage that unevenness is less likely to occur. However, there is a disadvantage that the insulating film 38 must be thickened. Considering this, the selectivity is preferably 3 to 5.

[0067] When the selection ratio is 3 to 5, the inclination angle α of the first side surface of the insulating resin film and the inclination angle β of the second side surface of the insulating film have a relationship of 3≤tanα / tanβ≤5. Figure 8 This relationship is explained below. The insulating film 38 and the insulating resin film 30 are both removed by etching. The etching rate of the insulating resin film 30 is R BCB , the etching rate of the insulating film 38 is R SiO If the lengths of the insulating film 38 and the insulating resin film 30 to be removed at a certain time in the longitudinal direction are d SiO ,d BCB , then d SiO With R SiO Proportional, d BCB With R BCB So, R SiO / R BCB =tanα / tanβ. SiO / R BCB is the etching selectivity R, so it can be said that R = R SiO / R BCB =tanα / tanβ. Therefore, if 3≤R≤5, then 3≤tanα / tanβ≤5 holds.

[0068] As described above, according to Embodiment 1, the insulating resin film 30 is buried in the grooves 54 on both sides of the table 24, and the electrode 46 connected to the first conductive type cladding layer 14 is led out from the surface side, so that a semiconductor device with suppressed parasitic capacitance of the electrode can be obtained. Compared with insulating films such as semiconductor materials, silicon oxide films or silicon nitride films, the insulating resin film generally has a lower dielectric constant, so the parasitic capacitance of the electrode is suppressed by forming the insulating resin film on both sides of the table 24. In addition, even if it is a surface mounting type in which the electrode 46 is led out to the surface side, the parasitic capacitance is also reduced.

[0069] In addition, since the first side surface 34 of the insulating resin film 30 and the second side surface 42 of the insulating film 38 are inclined in the direction of a positive cone, the bending angle of the electrode 46 from the bottom surface 36 of the first opening portion 32 to the top of the insulating film 38 is an obtuse angle, which can prevent the electrode 46 from peeling off and breaking.

[0070] In addition, the deviation of the inclination angle (α and β) between the first side surface 34 and the second side surface 42 is small. The second side surface 42 is formed by isotropically wet etching the insulating film 38, so the deviation of the inclination angle is small. The first side surface 34 transfers the inclination of the second side surface 42 according to the etching selectivity of the insulating resin film 30 and the insulating film 38, so the deviation of the inclination angle is small. As a result, the inclination angle will not be steepened by mistake, so the peeling and disconnection of the electrode 46 can be prevented.

[0071] In the first embodiment, the insulating film 38 is not removed but left as it is, but it may be replaced as follows. Fig. 9 The insulating film is removed as shown. The insulating film is removed before forming the electrode 46 and the electrode 48 on the mesa. In this figure, the electrode 46 is led out onto the insulating resin film 30. By removing the insulating film 38, it is sometimes possible to prevent the adhesion of the electrode, etc. from being deteriorated. The insulating film 38 sometimes remains in the upper layer as a reaction product depending on the etching conditions, so if the insulating film 38 is not removed, it may become a cause of deterioration of adhesion when the electrode, etc. is formed later. If the insulating film 38 is removed, there is no such concern.

[0072] In this embodiment, two grooves 54 are formed on both sides of the table 24 , but three or more grooves may be formed. That is, two or more grooves 54 are formed in the stacked body 22 . Two of the two or more grooves 54 are located on both sides of the table 24 . Fig.10 3 shows a case where there are three grooves. In this figure, the electrodes 46 are provided in the grooves 32 at positions away from both sides of the terrace 24.

[0073] Here, the first conductivity type and the second conductivity type are either p-type or n-type semiconductors, and have different conductivity types. For example, when the first conductivity type is p-type, the second conductivity type is n-type, and when the first conductivity type is n-type, the second conductivity type is p-type.

[0074] Implementation method 2.

[0075] A semiconductor device according to Embodiment 2 will be described. In Embodiment 1, the semiconductor device is a semiconductor laser, but in Embodiment 2, it is a Mach-Zehnder phase modulator. Here, the differences from Embodiment 1 will be mainly described.

[0076] The structure of the semiconductor device according to the second embodiment is described. Fig.11 A Mach-Zehnder type phase modulator 60 is shown. Fig.11 yes Fig.12 The top view of the Mach-Zehnder type phase modulator 60 is shown in a cross-sectional view at AA. Fig.12 For the sake of explanation, the illustration of the mesa electrode 98, the insulating film 88, etc. is omitted.

[0077] like Fig.11 As shown, the Mach-Zehnder phase modulator 60 includes a semiconductor substrate 62 .

[0078] A first conductivity type cladding layer 64 is formed on the semiconductor substrate 62 .

[0079] A mesa 74 is formed which is composed of, from the bottom, a first conductive type cladding layer 64, an active layer 66, and a second conductive type cladding layer 68. The active layer 66 includes, for example, a multi-quantum well structure composed of i-type AlGaInAs. The second conductive type cladding layer 68 is composed of, for example, p-type InP. The mesa 74 is also a ridge waveguide of a high mesa structure. That is, the mesa 74 has a ridge waveguide.

[0080] A groove 104 is formed in the stacked body 72 composed of the first conductive type cladding layer 64 as the lowermost layer and the second conductive type cladding layer 68 as the uppermost layer. The position of the groove 104 is shown in FIG. Fig.14(b) shows. The intermediate layer of the stack 72 between the first conductive type cladding layer 64 and the second conductive type cladding layer 68 is the active layer 66 in the table 74, and the current blocking layer 70 except the table 74. A total of three grooves 104 are dug, which are the grooves on both sides of the table 74 and the grooves in a place away from them. The grooves 104 are dug from the upper surface of the second conductive type cladding layer 68 to the middle of the first conductive type cladding layer 64. A protective insulating film 100 is formed on the side wall of the stack 72. The protective insulating film 100 is composed of, for example, a silicon oxide film or a silicon nitride film. The protective insulating film 100 has the purpose of protecting the table 74 from moisture intrusion. For this purpose, a silicon nitride film is preferably used. However, it does not matter if there is no protective insulating film 100. An insulating resin film 80 is buried in the groove 104.

[0081] The first opening 82 is formed in the groove 104 at a location on both sides away from the terrace 74. The first side surface 84 has an inclination in the forward tapered direction.

[0082] An insulating film 88 is formed on the insulating resin film 80 and the second conductive type cladding layer 68. The insulating film 88 has a second opening 90 formed therein. Fig.11 A dotted line is drawn in the figure to indicate the position of the second opening 90. The side surface (second side surface 92) of the insulating film 88 in contact with the second opening 90, that is, the second side surface 92 of the insulating film 88 connected to the first side surface 84, is inclined in the forward tapered direction.

[0083] An electrode 96 connected to the first conductivity type cladding layer 64 is formed on the bottom surface 86 .

[0084] An upper mesa electrode 98 is formed on the mesa 74 .

[0085] use Figure 13-14 A method for manufacturing the Mach-Zehnder phase modulator 60 will be described.

[0086] First, if Fig.13 As shown in (a), a first conductivity type cladding layer 64, an active layer 66, and a second conductivity type cladding layer 68 are sequentially formed on a semiconductor substrate 62.

[0087] Next, if Fig.13 As shown in (b) of FIG. 1 , etching is performed using the mask 102. In this step, dry etching is performed from the upper surface of the second conductivity type cladding layer 68 to the middle of the first conductivity type cladding layer 64.

[0088] Then, if Fig.13 As shown in (c), the current blocking layer 70 is buried. For burying the current blocking layer 70, the current blocking layer 70 is selectively epitaxially grown using a mask 102. At this time, the current blocking layer 70 is buried up to the upper surface of the second conductivity type cladding layer 68.

[0089] Then, if Fig.14 As shown in (a), the second conductivity type cladding layer 68 is further grown. To grow the second conductivity type cladding layer 68, after removing the mask 102 with hydrofluoric acid such as buffered hydrofluoric acid, the second conductivity type cladding layer 68 is epitaxially grown. In this step, the stacked body 72 is formed.

[0090] Next, if Fig.14 As shown in (b), three grooves 104 are formed, and a mesa 74 is formed. In this process, a mask 103 is used to dry-etch from the upper surface of the second conductive type cladding layer 68 to the middle of the first conductive type cladding layer 64, thereby forming three grooves 104. Thus, a mesa 74 with two grooves 104 of the three grooves 104 arranged on both sides is formed.

[0091] Next, if Fig.14 As shown in (c), after forming a silicon nitride film on the entire surface by, for example, a CVD method, the silicon nitride film on the side wall of the stacked body 72 is left by dry etching and the silicon nitride film is etched back to form a protective insulating film 100. For dry etching, for example, reactive ion etching based on fluorine-based gases such as CF4 and CHF3 can be used. At this time, in order to suppress the loss caused by the side etching of the silicon nitride film on the side wall, the etching is preferably performed at a low pressure, specifically, below 0.5 Pa.

[0092] Then, the same process as in Embodiment 1 is performed to obtain Fig.11 Specifically, the same method as in Embodiment 1 is performed. Figure 3 (a)~ Figure 4 (d) process and from Figure 4 (d) to Figure 1 However, in the first embodiment, Figure 1 As shown, the first opening 32 is formed in the insulating resin film 30 formed on the side of the mesa 24, but in this second embodiment, as shown in FIG. Fig.11 As shown, the first opening 82 is formed in the groove 104 at locations away from both sides of the table 74 .

[0093] As described above, according to the second embodiment, it is possible to obtain a semiconductor device in which the parasitic capacitance of the electrode is suppressed and the separation and disconnection of the electrode are unlikely to occur.

[0094] In addition, you can Fig.15 As in the first embodiment, the insulating film is removed to prevent the adhesion of electrodes and the like from being deteriorated.

[0095] In this embodiment, three grooves 104 are formed, but at least two grooves 104 may be formed on both sides of the terrace 74. That is, two or more grooves 104 are formed in the stacked body 72. Two of the two or more grooves 104 are located on both sides of the terrace 74. Fig.16 The case where there are two grooves is shown. In this figure, the electrode 96 is provided in one of the grooves on both sides of the terrace 74.

[0096] Description of Reference Numerals

[0097] 10, 110, 120…semiconductor laser; 12, 62…semiconductor substrate; 14, 64…first conductivity type cladding layer; 16, 66…active layer; 18, 68…second conductivity type cladding layer; 20, 70…current blocking layer; 22, 72…laminated body; 24, 74…table; 26, 76…ridge waveguide; 30, 80…insulating resin film; 32, 82…first opening; 34, 84…first side surface; 36 , 86…bottom surface; 38, 88…insulating film; 40, 90…second opening; 42, 92…second side surface; 44, 94…third opening; 46, 96…electrode; 48, 98…top electrode; 50, 102, 52, 103…mask; 54, 104…groove; 56…photoresist; 58…opening pattern; 60, 130, 140…Mach-Zehnder type phase modulator; 100…protective insulating film.

Claims

1. A semiconductor device, characterized in that: have: Semiconductor substrates; A laminated body formed on the semiconductor substrate, wherein the lowermost layer is composed of a first conductive type cladding layer, the uppermost layer is composed of a second conductive type cladding layer, and two or more grooves are formed from the upper surface of the second conductive type cladding layer to the middle of the first conductive type cladding layer; a mesa having a ridge waveguide and two of the two or more grooves arranged on both sides, wherein the ridge waveguide is composed of the first conductive type cladding layer, the active layer, and the second conductive type cladding layer in order from the side close to the semiconductor substrate; as well as an insulating resin film filling the two or more grooves, The insulating resin film filling one of the two or more grooves has a first opening formed therein for exposing the first conductive type cladding layer at the bottom surface. The semiconductor device is provided with an electrode connected to the first conductive type cladding layer on the bottom surface and led upward from the insulating resin film along the first side surface of the insulating resin film in contact with the first opening. The first side surface has an inclination in a positive tapered direction, An insulating film is formed on a portion of the insulating resin film excluding the first opening and on the second conductive type cladding layer, The second side surface of the insulating film connected to the first side surface has an inclination in a positive tapered direction, The electrode is led out above the insulating film along the second side surface.

2. The semiconductor device according to claim 1, wherein: When an angle formed between the first side surface and the lower surface of the insulating resin film is α, 20°≤α≤60° is satisfied.

3. The semiconductor device according to claim 1, wherein: If the angle between the first side surface and the lower surface of the insulating resin film is α, The angle between the second side surface and the upper surface of the insulating resin film is β, Then 3≤tanα / tanβ≤5 is satisfied.

4. The semiconductor device according to any one of claims 1 to 3, wherein: The insulating resin film is made of BCB or polyimide resin.

5. The semiconductor device according to any one of claims 1 to 3, wherein: The ridge waveguide is a resonator of a semiconductor laser.

6. The semiconductor device according to any one of claims 1 to 3, wherein: The ridge waveguide is a modulation waveguide of a Mach-Zehnder type phase modulator.

7. A method for manufacturing a semiconductor device, characterized in that: The following processes are available: The step of sequentially forming a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer on a semiconductor substrate; A step of etching from the upper surface of the second conductive type cladding layer to the middle of the first conductive type cladding layer to form two or more grooves, and forming a table having a ridge waveguide and two grooves of the two or more grooves arranged on both sides, the ridge waveguide being composed of the first conductive type cladding layer, the active layer, and the second conductive type cladding layer from the side close to the semiconductor substrate, forming an insulating resin film filling the two or more grooves; forming an insulating film on the insulating resin film and the second conductive type cladding layer; A step of forming a second opening by etching the insulating film on the insulating resin film buried in one of the two or more grooves, and making a second side surface of the insulating film in contact with the second opening have an inclination in a forward tapered direction; The step of etching the insulating resin film below the second opening to form a first opening by using the insulating film as a mask so as to expose the first conductive type cladding layer, and making a first side surface of the insulating resin film in contact with the first opening inclined in a forward tapered direction; as well as A step of forming an electrode connected to the first conductive type cladding layer at the bottom surface of the first opening and extending upward from the insulating resin film along the first side surface.

8. The method for manufacturing a semiconductor device according to claim 7, wherein: A step of removing the insulating film is provided between the step of making the first side surface inclined in the forward tapered direction and the step of forming the electrode.

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