Control circuit of a power converter

Abstract

A control circuit (50) of a power converter includes: a switching drive section (71a, 72a) that drives switches (SWH, SWL) of upper and lower arms; a short-circuit control section (60, 61H, 61L, 75, 76) that causes the switching drive section to perform short-circuit control in which a switch of either of the upper and lower arms, i.e., an on-side switch, is set to an on state and a switch of the other arm, i.e., an off-side switch, is set to an off state, in a case where it is determined that an abnormality has occurred in the system; a check processing section that performs check processing of determining whether the short-circuit control can be performed normally; and a protection control section (61H, 61L) that causes the switching drive section to perform protection control of setting a switch in which it is determined that an abnormality has occurred to an off state in a case where it is determined that an abnormality has occurred in the switch of either of the upper and lower arms, and causes the protection control to be effective during execution of the check processing.

Description

[0001] Citation of relevant applications

[0002] This application is based on Japanese Patent Application No. 2020-041029, filed on March 10, 2020, the contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a control circuit for a power converter having upper and lower arms of switches electrically connected to the windings of each phase of a rotating electric motor. Background Technology

[0004] As such a control circuit, it is known to execute a shutdown control that forcibly sets the switches of the upper and lower arms to the open state when an abnormality is determined to have occurred in the rotating motor or other components constituting the system. During the execution of the shutdown control, when a back electromotive force is generated in the windings due to the rotation of the rotor constituting the rotating motor, the line-to-line voltage of the windings may sometimes become higher than the voltage of the energy storage unit connected in parallel with the series connection of the switches of the upper and lower arms. This increased line-to-line voltage may occur, for example, when the rotor's excitation flux is large or the rotor's rotational speed is high.

[0005] When the line-to-line voltage of the winding is higher than the voltage of the energy storage unit, even if a shutdown control is performed, a so-called regeneration will occur, in which a current induced by the winding flows through the closed circuit, including the diode, winding, and energy storage unit connected in reverse parallel with the switch. As a result, an overvoltage anomaly may occur, causing a significant rise in the DC voltage on the energy storage unit side of the power converter, and at least one of the following: the energy storage unit, the power converter, and other equipment connected to the energy storage unit.

[0006] To address such problems, as described in Patent Document 1, a control circuit is known that performs short-circuit control by setting the switch of one arm (the on-side switch) to the on state and setting the switch of the other arm (the off-side switch) to the off state.

[0007] Existing technical documents

[0008] Patent documents

[0009] Patent Document 1: Japanese Patent Application Publication No. 2017-225236 Summary of the Invention

[0010] In order to reliably execute short-circuit control when it is required, it is desirable to perform a prior check to ensure that short-circuit control can be executed normally. However, the following problems may occur when performing this prior check.

[0011] A short-circuit anomaly may occur in the disconnect side switch of the upper and lower arms. If, in the event of this short-circuit anomaly, the contact side switch is switched to the contact state to determine whether short-circuit control is being performed correctly, a short circuit will occur in the upper and lower arms. As a result, overcurrent (short-circuit current) may flow through each switch in the upper and lower arms, potentially causing them to malfunction.

[0012] The main objective of this disclosure is to provide a control circuit for a power converter that, while checking whether short-circuit control is being performed correctly, can protect the switch from overcurrent.

[0013] This disclosure relates to a control circuit for a power converter.

[0014] The control circuit of the aforementioned power converter is applicable to a system including an energy storage unit, a multi-phase rotating motor, and a power converter. The power converter has upper and lower arm switches electrically connected to the windings of each phase of the rotating motor. The control circuit of the power converter includes:

[0015] The switch driving unit drives the switches on the upper and lower arms.

[0016] The short-circuit control unit determines that an abnormality has occurred in the system and causes the switch drive unit to perform short-circuit control. The short-circuit control sets the switch on the on side of one arm of the upper and lower arms to the on state and sets the switch on the off side of the other arm to the off state.

[0017] The inspection and processing unit performs inspection and processing to determine whether the short-circuit control can be performed normally; and

[0018] The protection control unit, upon determining that a malfunction has occurred in either the upper or lower arm's switch, causes the switch drive unit to execute protection control by setting the malfunctioning switch to an open state.

[0019] The aforementioned inspection and processing procedures ensure the effectiveness of the protection and control measures.

[0020] In the event of a short-circuit fault on the disconnecting side switch, if a check is performed to determine whether short-circuit control can be properly executed, a short circuit may occur between the upper and lower arms. In this case, an overcurrent will flow through the switch. In this disclosure, during the check process, the protection control implemented by the protection control unit is activated. Therefore, the protection control unit determines that an abnormality has occurred in the switch experiencing an overcurrent, and the switch determined to be abnormal is set to the disconnected state by the protection control unit. Thus, when the check process is performed, the switch can be protected from the effects of overcurrent. Attached Figure Description

[0021] The above-mentioned objects, other objects, features, and advantages of this disclosure will become clearer with reference to the accompanying drawings and the following detailed description. The accompanying drawings are described below.

[0022] Figure 1 This is an overall structural diagram of the control system of the first embodiment.

[0023] Figure 2 It is a diagram showing the control circuit and its surrounding structure.

[0024] Figure 3 This is a flowchart illustrating the processing steps for three-phase short-circuit control.

[0025] Figure 4 This is a flowchart illustrating the steps involved in the inspection and processing.

[0026] Figure 5 It is a timing diagram that shows the progression of the drive states of switches during inspection and processing.

[0027] Figure 6 It is a timing diagram showing the transition of the drive state of the switch, etc., during the inspection and processing of the comparative example.

[0028] Figure 7 This is a flowchart illustrating the inspection process steps of a modified example of the first embodiment.

[0029] Figure 8 This is a timing diagram illustrating the invalidation method of the shutdown control in the second embodiment.

[0030] Figure 9 It is a diagram showing the control circuit and its surrounding structure.

[0031] Figure 10 This is a diagram showing the control circuit and its surrounding structure in the third embodiment.

[0032] Figure 11 This is a diagram showing the control circuit and its surrounding structure in the fourth embodiment. Detailed Implementation

[0033] <First Implementation>

[0034] Hereinafter, a first embodiment of the control circuit of this disclosure will be described with reference to the accompanying drawings. The control circuit of this embodiment is applicable to a three-phase inverter as a power converter. In this embodiment, the control system including the inverter is installed in a vehicle such as an electric vehicle or a hybrid vehicle.

[0035] like Figure 1 As shown, the control system includes a rotary motor 10 and an inverter 15. The rotary motor 10 is an on-board unit, and its rotor is capable of transmitting power to a drive wheel (not shown). In this embodiment, a synchronous machine is used as the rotary motor 10, and more specifically, a permanent magnet synchronous machine is used.

[0036] The inverter 15 has a switching device section 20. The switching device section 20 includes a series connection of upper arm switches SWH and lower arm switches SWL corresponding to the three phases. In each phase, the first end of the winding 11 of the rotary motor 10 is connected to the connection point of the upper arm switch SWH and the lower arm switch SWL. The second end of each phase winding 11 is connected at the neutral point. The phase windings 11 are arranged with their electrical angles offset from each other by 120°. In this embodiment, voltage-controlled semiconductor switching elements are used as each of the switches SWH and SWL, and more specifically, IGBTs are used. Upper arm diodes DH and lower arm diodes DL, which serve as freewheeling diodes, are connected in reverse parallel to the upper arm switches SWH and the lower arm switches SWL.

[0037] The positive terminal of the high-voltage power supply 30 is connected to the collector of the high-potential side terminal of each upper arm switch SWH via the high-potential side circuit 22H. The negative terminal of the high-voltage power supply 30 is connected to the emitter of the low-potential side terminal of each lower arm switch SWL via the low-potential side circuit 22L. In this embodiment, the high-voltage power supply 30 is a secondary battery with an output voltage (rated voltage) of, for example, 100V or higher.

[0038] A first disconnect switch 23a is provided in the high-potential side circuit 22H, and a second disconnect switch 23b is provided in the low-potential side circuit 22L. Each switch 23a and 23b is, for example, a relay or a semiconductor switching element. Here, each switch 23a and 23b can be driven by the control circuit 50 included in the inverter 15, or by a higher-level ECU (not shown). The higher-level ECU is a higher-level control device relative to the control circuit 50.

[0039] The inverter 15 includes a smoothing capacitor 24 as an "energy storage unit". The smoothing capacitor 24 electrically connects a portion of the high-potential side circuit 22H that is closer to the switching device section 20 than the first cut-off switch 23a to a portion of the low-potential side circuit 22L that is closer to the switching device section 20 than the second cut-off switch 23b.

[0040] The control system includes on-board electrical equipment 25. Electrical equipment 25 includes, for example, at least one of an electric compressor and a DC-DC converter. The electric compressor constitutes the vehicle interior air conditioning system and is driven by a high-voltage power supply 30 to circulate refrigerant in the on-board refrigeration cycle. The DC-DC converter steps down the output voltage of the high-voltage power supply 30 and supplies it to the on-board low-voltage loads. Low-voltage loads include... Figure 2 The low-voltage power supply 31 is shown. In this embodiment, the low-voltage power supply 31 is a secondary battery, such as a lead-acid battery, whose output voltage (rated voltage) is lower than the output voltage (rated voltage) of the high-voltage power supply 30 (e.g., 12V).

[0041] use Figure 2 The structure of the control circuit 50 is described.

[0042] The control circuit 50 includes a power supply circuit 51. The positive terminal of the low-voltage power supply 31 is connected to the power supply circuit 51 via a fuse (not shown). A grounding element, serving as a grounding point, is connected to the negative terminal of the low-voltage power supply 31. Based on the voltage supplied from the low-voltage power supply 31, the power supply circuit 51 generates a power supply voltage Vm to be supplied to each structure on the low-voltage side of the control circuit 50. The power supply circuit 51 generates the power supply voltage Vm, for example, by stepping down the output voltage of the low-voltage power supply 31. In practice, the low-voltage region of the control circuit 50 includes multiple power supply circuits, but in this embodiment, they are collectively referred to as the power supply circuit 51.

[0043] The control circuit 50 includes a microcomputer 60 in its low-voltage region. The microcomputer 60 includes a CPU and peripheral circuitry. For example, the peripheral circuitry includes input / output units and AD converters for exchanging signals with external systems. The microcomputer 60 is configured to operate by supplying a power supply voltage Vm to the power supply circuit 51.

[0044] The control circuit 50 includes a voltage sensor 52, an upper arm processing unit 61H, and a lower arm processing unit 61L. The voltage sensor 52 is electrically connected to the high-potential side circuit 22H and the low-potential side circuit 22L, and detects the terminal voltage of the smoothing capacitor 24. The terminal voltage detected by the voltage sensor 52 is input to the microcomputer 60. The microcomputer 60 determines whether the terminal voltage of the smoothing capacitor 24 detected by the voltage sensor 52 exceeds its upper limit voltage. If the microcomputer 60 determines that the terminal voltage of the smoothing capacitor 24 exceeds the upper limit voltage, it determines that an overvoltage abnormality has occurred.

[0045] The upper arm processing unit 61H and the lower arm processing unit 61L are located in a low-voltage region and can operate by supplying the power supply voltage Vm to the power supply circuit 51. Furthermore, in this embodiment, each processing unit 61H and 61L is configured as an ASIC.

[0046] The microcomputer 60 functions as a switch command generation unit, which generates switch commands for each switch SWH and SWL of the switch device unit 20 in order to control the control quantity of the rotary motor 10 to its command value. The control quantity is, for example, torque. The switch command is either an on command that instructs the switch to turn on or an off command that instructs the switch to turn off. In addition, the microcomputer 60 generates switch commands that alternately set the upper arm switch SWH and the lower arm switch SWL to the on state in each phase.

[0047] The control circuit 50 includes an isolated power supply 70, an upper arm driver 71, and a lower arm driver 72. In this embodiment, the upper arm driver 71 is individually configured corresponding to each upper arm switch SWH, and the lower arm driver 72 is individually configured corresponding to each lower arm switch SWL. Therefore, a total of six drivers 71 and 72 are provided.

[0048] The isolated power supply 70 generates and outputs an upper arm drive voltage VdH supplied to the upper arm driver 71 and a lower arm drive voltage VdL supplied to the lower arm driver 72, based on the voltage supplied from the low-voltage power supply 31. The isolated power supply 70 is positioned in the control circuit 50, spanning the boundary between the low-voltage and high-voltage regions. Each driver 71, 72 is positioned in the high-voltage region.

[0049] Additionally, the insulating power supply 70 includes an upper arm insulating power supply separately provided for each of the three-phase upper arm drivers 71 and a lower arm insulating power supply shared by the three-phase lower arm drivers 72. Incidentally, the lower arm insulating power supply can also be separately provided for each of the three-phase lower arm drivers 72.

[0050] The upper arm switch SWH includes an upper arm sensing terminal StH. A small current flows through the upper arm sensing terminal StH, which is correlated with the collector current of the upper arm switch SWH. The current flowing through the upper arm sensing terminal StH is detected as the potential difference (hereinafter referred to as the upper arm sensing voltage VsH) of the upper arm sensing resistor 73H connected to the sensing terminal StH.

[0051] The lower arm switch SWL includes a lower arm sensing terminal StL. A small current flows through the lower arm sensing terminal StL, which is correlated with the collector current of the lower arm switch SWL. The current flowing through the lower arm sensing terminal StL is detected as the potential difference (hereinafter referred to as the lower arm sensing voltage VsL) of the lower arm sensing resistor 73L connected to the sensing terminal StL.

[0052] Inverter 15 includes an upper arm temperature sensor 74H and a lower arm temperature sensor 74L. The upper arm temperature sensor 74H detects the temperature of the upper arm switch SWH, and the lower arm temperature sensor 74L detects the temperature of the lower arm switch SWL. Each temperature sensor 74H and 74L is, for example, a thermistor or a thermistor.

[0053] The upper arm driver 71 includes an upper arm driving unit 71a and an upper arm determination unit 71b, which function as a "switch driving unit". The upper arm driver 71 is configured to operate by supplying an upper arm driving voltage VdH to the insulating power supply 70. An upper arm switch command INH from the microcomputer 60 is input to the upper arm driving unit 71a via a first upper arm transmission unit 62a. The first upper arm transmission unit 62a is located across the boundary between the low-voltage and high-voltage regions, and performs signal transmission between the low-voltage and high-voltage regions while electrically isolating them. The first upper arm transmission unit 62a is, for example, an optocoupler or a magnetic coupler.

[0054] When the input upper arm switch command INH is an ON command, the upper arm drive unit 71a supplies charging current to the gate of the upper arm switch SWH. This causes the gate voltage of the upper arm switch SWH to be above the threshold voltage Vth, thus putting the upper arm switch SWH in the ON state. Conversely, when the input upper arm switch command INH is an OFF command, the upper arm drive unit 71a causes discharge current to flow from the gate of the upper arm switch SWH to the emitter side. This causes the gate voltage of the upper arm switch SWH to be below the threshold voltage Vth, thus putting the upper arm switch SWH in the OFF state.

[0055] The upper arm sensing voltage VsH and the detection values ​​of the upper arm temperature sensor 74H are input to the upper arm determination unit 71b. If the upper arm sensing voltage VsH exceeds the overcurrent threshold, the upper arm determination unit 71b determines that an overcurrent abnormality has occurred in the upper arm switch SWH. Similarly, if the temperature detected by the upper arm temperature sensor 74H exceeds the temperature threshold, the upper arm determination unit 71b determines that an overheating abnormality has occurred in the upper arm switch SWH. Upon determining that either an overcurrent or overheating abnormality has occurred in the upper arm switch SWH, the upper arm determination unit 71b outputs an information indicating an abnormality, namely an upper arm fault signal FailH, via the upper arm fault transmission unit 63 to the microcomputer 60 and the upper arm processing unit 61H. In this embodiment, when the upper arm determination unit 71b determines that either an overcurrent or overheating abnormality has occurred in the upper arm switch SWH, it switches the logic of the upper arm fault signal FailH from L to H. The upper arm fault transmission unit 63 is, for example, an optocoupler or a magnetic coupler.

[0056] The lower arm driver 72 includes a lower arm drive unit 72a, which functions as a "switch drive unit," and a lower arm determination unit 72b. The lower arm driver 72 is configured to operate by supplying a lower arm drive voltage VdL to the isolated power supply 70. A lower arm switch command INL from the microcomputer 60 is input to the lower arm drive unit 72a via a first lower arm transmission unit 64a. The first lower arm transmission unit 64a is, for example, an optocoupler or a magnetic coupler.

[0057] When the input lower arm switch command INL is an ON command, the lower arm drive unit 72a supplies charging current to the gate of the lower arm switch SWL. This causes the gate voltage of the lower arm switch SWL to be above the threshold voltage Vth, thus putting the lower arm switch SWL in the ON state. Conversely, when the input lower arm switch command INL is an OFF command, the lower arm drive unit 72a causes discharge current to flow from the gate of the lower arm switch SWL to the emitter side. This causes the gate voltage of the lower arm switch SWL to be below the threshold voltage Vth, thus putting the lower arm switch SWL in the OFF state.

[0058] The lower arm sensing voltage VsL and the detection values ​​of the lower arm temperature sensor 74L are input to the lower arm determination unit 72b. If the lower arm sensing voltage VsL exceeds the overcurrent threshold, the lower arm determination unit 72b determines that an overcurrent abnormality has occurred in the lower arm switch SWL. Additionally, if the temperature detected by the lower arm temperature sensor 74L exceeds the temperature threshold, the lower arm determination unit 72b determines that an overheating abnormality has occurred in the lower arm switch SWL. Upon determining that either an overcurrent or overheating abnormality has occurred in the lower arm switch SWL, the lower arm determination unit 72b outputs an abnormality signal, namely the lower arm fault signal FailL, via the lower arm fault transmission unit 65 to the microcomputer 60 and the lower arm processing unit 61L. In this embodiment, upon determining that either an overcurrent or overheating abnormality has occurred in the lower arm switch SWL, the lower arm determination unit 72b switches the logic of the lower arm fault signal FailL from L to H. The lower arm fault transmission unit 65 is, for example, an optocoupler or a magnetic coupler.

[0059] The control circuit 50 is capable of implementing three-phase short-circuit control (ASC: Active Short Circuit). Specifically, the microcomputer 60 outputs an upper arm ASC command CmASCH to the upper arm drive unit 71a via the second upper arm transmission unit 62b, and outputs a lower arm ASC command CmASCL to the lower arm drive unit 72a via the second lower arm transmission unit 64b. Furthermore, the second upper arm transmission unit 62b and the second lower arm transmission unit 64b are, for example, optocouplers or magnetic couplers. Additionally, in this embodiment, the microcomputer 60 includes a "short-circuit control unit".

[0060] The control circuit 50 is capable of implementing overcurrent and overheat protection control. Specifically, when the logic of the input upper arm fault signal FailH is determined to be H, the upper arm processing unit 61H outputs an upper arm shutdown command CmSDNH to the upper arm drive unit 71a via the third upper arm transmission unit 62c. When the input upper arm shutdown command CmSDNH is determined, the upper arm drive unit 71a is unaffected by the input upper arm switch command INH and upper arm ASC command CmASCH, and keeps the upper arm switch SWH in the open state.

[0061] When the logic of the input lower arm fault signal FailL is determined to be H, the lower arm processing unit 61L outputs a lower arm shutdown command CmSDNL to the lower arm drive unit 72a via the third lower arm transmission unit 64c. When the input lower arm shutdown command CmSDNL is determined, the lower arm drive unit 72a is unaffected by the input lower arm switch command INL and lower arm ASC command CmASCL, and keeps the lower arm switch SWL in the open state. Furthermore, the third upper arm transmission unit 62c and the third lower arm transmission unit 64c are, for example, optocouplers or magnetic couplers. Additionally, in this embodiment, the upper arm processing unit 61H and the lower arm processing unit 61L include a "protection control unit".

[0062] The microcomputer 60 instructs the upper arm processing unit 61H to output the upper arm invalidation signal SgAH. The upper arm invalidation signal SgAH output from the upper arm processing unit 61H is input to the upper arm drive unit 71a via the fourth upper arm transmission unit 62d. The fourth upper arm transmission unit 62d is, for example, an optocoupler or a magnetic coupler.

[0063] In this embodiment, when the logic of the upper arm invalidation signal SgAH is determined to be H, the upper arm drive unit 71a enables the shutdown control. That is, when the logic of the upper arm invalidation signal SgAH is determined to be H, the upper arm drive unit 71a performs the function of turning the upper arm switch SWH into the off state when the upper arm shutdown command CmSDNH is input.

[0064] On the other hand, when the logic for determining the upper arm invalidation signal SgAH is L, the upper arm drive unit 71a disables the shutdown control. That is, when the logic for determining the upper arm invalidation signal SgAH is L, the upper arm drive unit 71a does not perform the function of turning the upper arm switch SWH off, even when the upper arm shutdown command CmSDNH is input. In this case, the upper arm drive unit 71a turns the upper arm switch SWH on or off according to the upper arm ASC command CmASCH.

[0065] The microcomputer 60 instructs the lower arm processing unit 61L to output the lower arm invalidation signal SgAL. The lower arm invalidation signal SgAL output from the lower arm processing unit 61L is input to the lower arm drive unit 72a via the fourth lower arm transmission unit 64d. The fourth lower arm transmission unit 64d is, for example, an optocoupler or a magnetic coupler.

[0066] In this embodiment, when the logic of the lower arm invalidation signal SgAL is determined to be H, the lower arm drive unit 72a enables the shutdown control. That is, when the logic of the lower arm invalidation signal SgAL is determined to be H, the lower arm drive unit 72a performs the function of turning the lower arm switch SWL into the off state when the lower arm shutdown command CmSDNL is input.

[0067] On the other hand, when the logic of the lower arm invalidation signal SgAL is determined to be L, the lower arm drive unit 72a disables the shutdown control. That is, when the logic of the lower arm invalidation signal SgAL is determined to be L, the lower arm drive unit 72a does not perform the function of turning the lower arm switch SWL off even when the lower arm shutdown command CmSDNL is input. In this case, the lower arm drive unit 72a turns the lower arm switch SWL on or off according to the lower arm ASC command CmASCL. In addition, in this embodiment, the upper arm processing unit 61H and the lower arm processing unit 61L include an "invalidation control unit".

[0068] Next, use Figure 3 The flowchart illustrates the three-phase short-circuit control performed by the microcomputer 60 in normal control. Normal control, for example, refers to the control generated and output by the microcomputer 60 to control the control quantity of the rotating motor 10 to its command value, namely, the upper arm switch command INH and the lower arm switch command INL.

[0069] In step S10, it is determined whether the execution conditions for the three-phase short-circuit control are met. In this embodiment, the execution conditions include the occurrence of an overvoltage anomaly. Furthermore, as described above, the determination of whether an overvoltage anomaly has occurred is based on the detection value of the voltage sensor 52.

[0070] If a negative determination is made in step S10, normal control continues. On the other hand, if a positive determination is made in step S10, the process proceeds to step S11 to determine whether a short-circuit fault has occurred in the upper arm switch SWH or an open-circuit fault has occurred in the lower arm switch SWL. For example, it is sufficient to determine whether a fault has occurred in each upper arm switch SWH and lower arm switch SWL of any phase and the nature of the fault based on the fault signals FailH and FailL output from each determination unit 71b and 72b of each driver 71 and 72.

[0071] If a positive determination is made in step S11, proceed to step S12 and execute the upper arm ASC. The upper arm ASC is a process that sets the upper arm ASC instruction CmASCH for the three corresponding upper arm drivers 71 as an on instruction, and sets the lower arm ASC instruction CmASCL for the three corresponding lower arm drivers 72 as an off instruction. In this case, the upper arm switch SWH is equivalent to an "on-side switch," and the lower arm switch SWL is equivalent to an "off-side switch."

[0072] If a negative determination is made in step S11, proceed to step S13 and execute the lower arm ASC. The lower arm ASC is a process that sets the lower arm ASC instruction CmASCL for the three corresponding lower arm drivers 72 as an on instruction and sets the upper arm ASC instruction CmASCH for the three corresponding upper arm drivers 71 as an off instruction. In this case, the lower arm switch SWL is equivalent to an "on-side switch" and the upper arm switch SWH is equivalent to an "off-side switch".

[0073] Thus, when the microcomputer 60 determines that at least one switch in one of the upper or lower arms has a short-circuit fault, it outputs an "on" command to the corresponding number of switches in the arm with the short-circuit fault (three-phase ratio) and an "off" command to the corresponding number of switches in the other arms. Conversely, when the microcomputer 60 determines that at least one switch in one of the upper or lower arms has an open-circuit fault, it outputs an "on" command to the corresponding number of switches in the upper or lower arms that are different from the arm with the open-circuit fault (three-phase ratio) and an "off" command to the corresponding number of switches in the other arms.

[0074] in addition, Figure 3 The processing shown assumes that the lower arm ASC is executed when the upper arm switch SWH and the lower arm switch SWL are normal. Incidentally, it can also be configured to execute the upper arm ASC when the upper arm switch SWH and the lower arm switch SWL are normal.

[0075] Next, use Figure 4 The procedure for checking whether the three-phase short-circuit control can be executed normally is explained. This procedure is set from the point of view of functional safety and is executed by the microcomputer 60. In addition, this procedure is executed at least once at any time during one cycle from the start of normal control to the stop of the control system.

[0076] In step S20, if the logic of the upper arm invalidation signal SgAH is L, the upper arm processing unit 61H is instructed to set the logic of the upper arm invalidation signal SgAH to H. Similarly, if the logic of the lower arm invalidation signal SgAL is L, the lower arm processing unit 61L is instructed to set the logic of the lower arm invalidation signal SgAL to H. Step S20 is a process for validating the execution instructions for the shutdown control of the upper arm drive unit 71a and the upper arm determination unit 71b.

[0077] In step S21, the upper arm switch SWH is checked for any abnormalities. This check includes checking whether the upper arm switch SWH has experienced an open-circuit or short-circuit abnormality. For example, when the upper arm ASC command CmASCH is set to the ON command, if the collector-emitter voltage VcH of the upper arm switch SWH is determined to be near the terminal voltage of the smoothing capacitor 24, an open-circuit abnormality is determined to have occurred. Conversely, if the upper arm ASC command CmASCH is set to the OFF command, if the collector-emitter voltage VcH of the upper arm switch SWH is determined to be near 0V, a short-circuit abnormality is determined to have occurred.

[0078] In step S22, based on the processing result of step S21, it is determined whether a short-circuit abnormality has occurred in the upper arm switch SWH. If an affirmative determination is made in step S22, the process proceeds to step S23, where the aforementioned upper arm ASC is executed.

[0079] If a negative determination is made in step S22, proceed to step S24, where a determination is made based on the processing result of step S21 to determine whether an open-circuit abnormality has occurred in the upper arm switch SWH. If a positive determination is made in step S24, proceed to step S25 and execute the aforementioned lower arm ASC.

[0080] If a negative determination is made in step S24, the upper arm switch SWH is determined to be normal, and the process proceeds to step S26. In step S26, the lower arm switch SWL is checked for any abnormalities. For example, if the lower arm ASC command CmASCL is set to the ON command, and the collector-emitter voltage VcL of the lower arm switch SWH is determined to be near the terminal voltage of the smoothing capacitor 24, an open-circuit abnormality is determined to have occurred in the lower arm switch SWL. Conversely, if the lower arm ASC command CmASCL is set to the OFF command, and the collector-emitter voltage VcL of the lower arm switch SWL is determined to be near 0V, a short-circuit abnormality is determined to have occurred in the lower arm switch SWL.

[0081] In step S27, based on the processing result of step S26, it is determined whether a short-circuit abnormality has occurred in the lower arm switch SWL. If an affirmative determination is made in step S27, proceed to step S25 and execute the lower arm ASC.

[0082] If a negative determination is made in step S27, proceed to step S28, where a determination is made based on the processing result of step S26 to determine whether an open-circuit abnormality has occurred in the lower arm switch SWL. If a positive determination is made in step S28, proceed to step S23 and execute the upper arm ASC.

[0083] If a negative determination is made in step S28, the lower arm switch SWL is determined to be normal, and the process proceeds to step S29. In step S29, the upper arm processing unit 61H is instructed to set the logic of the upper arm invalidation signal SgAH to L. Additionally, the lower arm processing unit 61L is instructed to set the logic of the lower arm invalidation signal SgAL to L. The process in step S29 is used to invalidate the execution instructions for the shutdown control of the upper arm drive unit 71a and the upper arm determination unit 71b. Furthermore, in this embodiment, the processes in steps S21, S22, S24, and S26 to S28 are equivalent to a "checking processing unit". Alternatively, if it is not necessary to invalidate the shutdown control, the process in step S29 may be omitted.

[0084] In this embodiment, the processing of step S20 is performed for the reasons explained below. For example, the lower arm switch SWL in the upper arm switch SWH and lower arm switch SWL may experience a short-circuit fault. In the event of this short-circuit fault, if... Figure 4 The processing in step S21 sets the upper arm ASC command CmASCH to the ON command, thus switching the upper arm switch SWH to the ON state, resulting in a short circuit between the upper and lower arms. As a result, overcurrent (short-circuit current) flows through the upper arm switch SWH and the lower arm switch SWL, potentially reducing their reliability. In particular, when the first disconnect switch 23a and the second disconnect switch 23b are in the ON state, the reliability of the upper arm switch SWH and the lower arm switch SWL is significantly reduced, potentially leading to a malfunction.

[0085] Here, when the aforementioned upper and lower arm short circuit occurs, the upper arm processing unit 61H and lower arm processing unit 61L, which receive the upper arm fault signal FailH and the lower arm fault signal FailL respectively, output upper arm shutdown command CmSDNH and lower arm shutdown command CmSDNL. During the execution of step S20, the execution instructions for shutdown control of the upper arm drive unit 71a and upper arm determination unit 71b are made valid during the subsequent inspection process. Therefore, even in the event of an upper and lower arm short circuit, the upper arm drive unit 71a and lower arm drive unit 72a keep the upper arm switch SWH and lower arm switch SWL in an open state. Thus, during the inspection process, the upper arm switch SWH and lower arm switch SWL can be protected from overcurrent.

[0086] use Figure 5 The timing diagram illustrates the inspection and handling procedures performed when a short circuit occurs in the lower arm switch SWL. Figure 5 (a) represents the shift of the upper arm invalidation signal SgAH. Figure 5 (b) indicates the shift of the upper arm ASC instruction CmASCH. Figure 5 (c) represents the shift of the upper arm fault signal FailH. Figure 5 (d) indicates the shift in the driving state of the upper arm switch SWH.

[0087] At time t1, the upper arm ASC instruction CmASCH is switched to an ON instruction, and the upper arm switch SWH is switched to the ON state. This causes a short circuit between the upper and lower arms. At time t2, the logic of the upper arm fault signal FailH output from the upper arm determination unit 71b is switched to H. Since the logic of the upper arm invalidation signal SgAH output from the upper arm processing unit 61H to the upper arm drive unit 71a is H, when the upper arm shutdown instruction CmSDNH output from the upper arm processing unit 61H is input to the upper arm drive unit 71a, the upper arm switch SWH is switched to the OFF state.

[0088] In contrast, such as Figure 6 As shown, in the comparative example where the upper arm invalidation signal SgAH has a logic value of L, even if the upper arm fault signal FailH switches to a logic value of H at time t2, the upper arm switch SWH does not switch to the open state. Furthermore, Figure 6 (a)~(d) and Figure 5 The correspondence between (a) and (d).

[0089] According to the detailed description of this embodiment above, when performing inspection procedures, the upper arm switch SWH and the lower arm switch SWL can be protected from overcurrent.

[0090] <Modifications of the First Embodiment>

[0091] ·like Figure 7 As shown, the lower arm switch SWL check and processing can be performed first, followed by the upper arm switch SWH check and processing. Additionally, in Figure 7 For convenience, regarding the previous... Figure 4 The processes shown are the same, and the symbols are the same.

[0092] • The invalidation signal output from each arm processing unit 61H, 61L can also be a pulse signal. In this case, taking the upper arm side as an example, for instance, if the logic of the upper arm invalidation signal SgAH alternately switches to a pulse signal of H and L, it is sufficient to invalidate the execution instruction of the shutdown control. If the logic of the upper arm invalidation signal SgAH is fixed to H or L, it is sufficient to make the execution instruction of the shutdown control valid.

[0093] • When the upper arm determination unit 71b determines that an overcurrent or overheating abnormality has occurred, it can also output an upper arm shutdown command CmSDNH to the upper arm drive unit 71a. Similarly, when the lower arm determination unit 72b determines that an overcurrent or overheating abnormality has occurred, it can also output a lower arm shutdown command CmSDNL to the lower arm drive unit 72a.

[0094] Alternatively, instead of using insulating transmission components such as optocouplers or magnetic couplers, signal processing can be performed via communication between the low-voltage and high-voltage regions of the control circuit 50. For example, SPI (trademarked), CAN, UART, Ethernet (trademarked), and parallel communication can be used for communication. Furthermore, the communication can be, for example, binary digital signals or duty cycle signals.

[0095] <Second Implementation>

[0096] Hereinafter, with reference to the accompanying drawings, the second embodiment will be described focusing on the differences from the first embodiment.

[0097] During the execution of three-phase short-circuit control, when the upper arm turn-off command CmSDNH and the lower arm turn-off command CmSDNL are output from the upper arm processing unit 61H and the lower arm processing unit 61L, the control switches from three-phase short-circuit control to turn-off control. In this case, the terminal voltage of the smoothing capacitor 24 rises sharply, which may cause an overvoltage abnormality.

[0098] Therefore, in this embodiment, as Figure 8As shown, during the period from the start of the three-phase short-circuit control at time t1 to the elapsed time t2, the logic of the upper arm invalidation signal SgAH and the lower arm invalidation signal SgAL output from the upper arm processing unit 61H and the lower arm processing unit 61L is set to L. This prevents overvoltage abnormalities from occurring. Furthermore, at time t2, the microcomputer 60 instructs the upper arm processing unit 61H to set the logic of the upper arm invalidation signal SgAH to H, and instructs the lower arm processing unit 61L to set the logic of the lower arm invalidation signal SgAL to H. In this case, subsequently, for example, the previous... Figure 4 The inspection and processing shown.

[0099] Here, if the upper arm invalidation signal SgAH and lower arm invalidation signal SgAL input to the upper arm drive unit 71a and lower arm drive unit 72a are not normal signals, it may be impossible to invalidate the shutdown control even if it is desired. In this case, as described above, shutdown control may be executed during the execution of three-phase short-circuit control.

[0100] Therefore, in this embodiment, the microcomputer 60 performs invalidation signal checking processing, which checks whether the upper arm invalidation signal SgAH and the lower arm invalidation signal SgAL are output normally from the upper arm processing unit 61H and the lower arm processing unit 61L, and whether the output upper arm invalidation signal SgAH and lower arm invalidation signal SgAL are input normally to the upper arm drive unit 71a and the lower arm drive unit 72a. Furthermore, in this embodiment, the microcomputer 60 includes a "signal determination unit".

[0101] Figure 9 This describes the control circuit 50 and its peripheral structure in this embodiment. Additionally, in Figure 9 For convenience, the previous... Figure 2 Structures with the same structure shown are labeled with the same symbols.

[0102] The control circuit 50 includes an upper arm signal transmission unit 66 and a lower arm signal transmission unit 67. Each signal transmission unit 66, 67 is, for example, an optocoupler or a magnetic coupler.

[0103] During periods when the microcomputer 60 is not performing three-phase short-circuit control, it instructs the upper arm processing unit 61H and the lower arm processing unit 61L to output the upper arm ASC command CmASCH and the lower arm ASC command CmASCL corresponding to the upper arm ASC or lower arm ASC. Then, the upper arm driver 71 and the lower arm driver 72 output the received upper arm ASC command CmASCH and lower arm ASC command CmASCL as upper arm check signals SgH and lower arm check signals SgL, respectively, to the microcomputer 60 via the upper arm signal transmission unit 66 and the lower arm signal transmission unit 67.

[0104] The microcomputer 60 monitors the input upper arm inspection signal SgH and lower arm inspection signal SgL, and compares the input upper arm inspection signal SgH and lower arm inspection signal SgL with the upper arm ASC instruction CmASCH and lower arm ASC instruction CmASCL output from the upper arm processing unit 61H and lower arm processing unit 61L to check whether the upper arm invalidation signal SgAH and lower arm invalidation signal SgAL are output normally, and whether the output upper arm invalidation signal SgAH and lower arm invalidation signal SgAL are input normally to the upper arm drive unit 71a and lower arm drive unit 72a.

[0105] According to the embodiment described above, it is possible to reliably prevent the shutdown control from being performed during the period from the start of the three-phase short-circuit control until a predetermined time has elapsed.

[0106] <Third Implementation Method>

[0107] Hereinafter, with reference to the accompanying drawings, the third embodiment will be described focusing on the differences from the first embodiment. Figure 10 This describes the control circuit 50 and its peripheral structure in this embodiment. Additionally, in Figure 10 For convenience, the previous... Figure 2 Structures with the same structure shown are labeled with the same symbols.

[0108] In this embodiment, instead of the microcomputer 60, the upper arm processing unit 61H outputs the upper arm ASC instruction CmASCH. Additionally, instead of the microcomputer 60, the lower arm processing unit 61L outputs the lower arm ASC instruction CmASCL.

[0109] For example, when the upper arm processing unit 61H and the lower arm processing unit 61L obtain information indicating an overvoltage anomaly from the microcomputer 60, they can output the upper arm ASC instruction CmASCH and the lower arm ASC instruction CmASCL corresponding to the upper arm ASC or lower arm ASC, respectively. Alternatively, instead of obtaining the information indicating an overvoltage anomaly from the microcomputer 60, the upper arm processing unit 61H and the lower arm processing unit 61L can also obtain the detection value of the voltage sensor 52 and determine whether an overvoltage anomaly has occurred based on the obtained detection value. Furthermore, in this embodiment, the upper arm processing unit 61H and the lower arm processing unit 61L include a "short-circuit control unit".

[0110] According to the above description, this embodiment can achieve the same effect as the first embodiment.

[0111] <Fourth Implementation>

[0112] Hereinafter, with reference to the accompanying drawings, the fourth embodiment will be described focusing on the differences from the first embodiment. Figure 11 This describes the control circuit 50 and its peripheral structure in this embodiment. Additionally, in Figure 11 For convenience, the previous... Figure 2 Structures with the same structure shown are labeled with the same symbols.

[0113] In this embodiment, the upper arm ASC command CmASCH and the lower arm ASC command CmASCL are not output from the microcomputer 60. The control circuit 50 includes an upper arm ASC command unit 75 and a lower arm ASC command unit 76 in its high-voltage region. The upper arm drive voltage VdH of the insulating power supply 70 is supplied to the upper arm ASC command unit 75, and the lower arm drive voltage VdL of the insulating power supply 70 is supplied to the lower arm ASC command unit 76.

[0114] The upper arm ASC command unit 75 outputs an upper arm ASC command CmASCH to the upper arm drive unit 71a based on the decrease in the upper arm drive voltage VdH. This upper arm ASC command CmASCH causes the upper arm switch SWH to be in a drive state corresponding to either the upper arm ASC or the lower arm ASC. Specifically, when the upper arm ASC command unit 75 determines that the upper arm drive voltage VdH has decreased and is below a first predetermined voltage, it outputs an upper arm ASC command CmASCH to the upper arm drive unit 71a. This upper arm ASC command CmASCH causes the upper arm switch SWH to be in a drive state corresponding to either the upper arm ASC or the lower arm ASC.

[0115] The lower arm ASC command unit 76 outputs a lower arm ASC command CmASCL to the lower arm drive unit 72a based on the lower arm drive voltage VdL starting to decrease. This lower arm ASC command CmASCL causes the lower arm switch SWL to be in a drive state corresponding to either the upper arm ASC or the lower arm ASC. Specifically, when the lower arm ASC command unit 76 determines that the lower arm drive voltage VdL has decreased and is below a second predetermined voltage, it outputs a lower arm ASC command CmASCL to the lower arm drive unit 72a. This lower arm ASC command CmASCL causes the lower arm switch SWL to be in a drive state corresponding to either the upper arm ASC or the lower arm ASC.

[0116] Furthermore, the upper arm ASC command unit 75 and the lower arm ASC command unit 76 only need to obtain information from the microcomputer 60 regarding which phase of the upper arm switch SWH or lower arm switch SWL has experienced a short circuit or open circuit fault. In this embodiment, the upper arm ASC command unit 75 and the lower arm ASC command unit 76 are equivalent to "short circuit control units".

[0117] According to the embodiment described above, conventionally, even in the event of an abnormality within the control circuit 50, which is in a shutdown state, three-phase short-circuit control can still be implemented. A shutdown state refers to the upper arm switches SWH and lower arm switches SWL corresponding to the three phases being in an open state. Here, abnormalities within the control circuit 50 include abnormalities in the microcomputer 60, abnormalities in the power supply circuit 51, and abnormalities in the inability to output voltage from the isolated power supply 70. Abnormalities in the inability to output voltage from the isolated power supply 70 include abnormalities in the isolated power supply 70 itself and abnormalities in the inability to supply power from the low-voltage power supply 31 to the isolated power supply 70. Here, the abnormality in the inability to supply power from the low-voltage power supply 31 to the isolated power supply 70 occurs, for example, due to a break in the electrical path from the low-voltage power supply 31 to the isolated power supply 70. Additionally, the aforementioned abnormalities can occur, for example, due to a vehicle collision.

[0118] <Other Implementation Methods>

[0119] In addition, the above-described embodiments can also be implemented with the following modifications.

[0120] • Each driver 71, 72 can also be located in the low-voltage region and high-voltage region in the control circuit 50, crossing the boundary between the low-voltage region and the high-voltage region.

[0121] In the above Figure 1 In the structure shown, a boost converter may also be included between the smoothing capacitor 24 and each cut-off switch 23a, 23b.

[0122] • The switch constituting the switching device is not limited to IGBTs; for example, it can also be an N-channel MOSFET with a built-in body diode. In this case, the drain corresponds to the high-potential side terminal, and the source corresponds to the low-potential side terminal.

[0123] • The switches that constitute each phase and arm of the switching device can be two or more switches connected in parallel. In this case, the combination of switches connected in parallel can be, for example, a combination of SiC switching elements and Si switching elements, or a combination of IGBTs and MOSFETs.

[0124] • As a control quantity for a rotating electric machine, it is not limited to torque; for example, it can also be the rotational speed of the rotor of the rotating electric machine.

[0125] • As a rotating electric motor, it is not limited to a permanent magnet synchronous machine; for example, it can also be a winding-excited synchronous machine. Furthermore, as a rotating electric motor, it is not limited to a synchronous machine; for example, it can also be an induction motor. Moreover, as a rotating electric motor, it is not limited to a rotating electric motor used as a vehicle host; it can also be used for other applications such as constituting an electric power steering system or an electric motor for an air conditioning compressor.

[0126] The control unit and methods described in this disclosure can also be implemented using a dedicated computer, which is provided by comprising a processor and memory, the processor being programmed to perform one or more functions embodied in the computer program. Alternatively, the control unit and methods described in this disclosure can be implemented using a dedicated computer, which is provided by comprising a processor composed of one or more dedicated hardware logic circuits. Alternatively, the control unit and methods described in this disclosure can be implemented using one or more dedicated computers, which are configured by a combination of a processor and memory programmed to perform one or more functions and a processor composed of one or more hardware logic circuits. Furthermore, the computer program can also be stored on a computer-readable, non-transitory tangible storage medium as instructions executable by a computer.

[0127] While this disclosure has been described based on embodiments, it should be understood that this disclosure is not limited to the above embodiments and structures. This disclosure also includes various modifications and equivalent variations. Furthermore, various combinations and arrangements, including combinations and arrangements with only one element, or more than one or fewer elements, also fall within the scope and spirit of this disclosure.

Claims

1. A control circuit of a power converter, the control circuit of a power converter being adapted for a system including an electric power storage unit, a multi-phase rotary electric machine, and a power converter having switches of upper and lower arms electrically connected to windings of each phase of the rotary electric machine, the control circuit of a power converter comprising: a switch drive section that drives the switches of the upper and lower arms; a short-circuit control section that causes the switch drive section to execute short-circuit control that sets the switch of either one of the upper and lower arms, i.e., an on-side switch, to an on state and sets the switch of the other arm, i.e., an off-side switch, to an off state, in a case where it is determined that an abnormality has occurred in the system; a check processing section that executes check processing that determines whether the short-circuit control can be normally executed, due to the on-side switch being set to the on state by the switch drive section; and a protection control section that causes the switch drive section to execute protection control that sets the switch determined to have the abnormality to the off state, in a case where it is determined that the switch of either one of the upper and lower arms has the abnormality, wherein the protection control section causes the switch drive section to execute the protection control that sets the on-side switch to the off state, in a case where it is determined that the on-side switch has an overcurrent abnormality, during execution of the check processing, the control circuit of a power converter further comprising: an invalidation control section that outputs an invalidation signal that invalidates an execution instruction of the protection control to the switch drive section, even if the switch drive section is instructed to execute the protection control from the protection control section, during execution of the short-circuit control; and a signal determination section that monitors the invalidation signal output from the invalidation control section, in a case where the short-circuit control is not executed, and determines whether the invalidation signal is normally output from the invalidation control section, based on a result of the monitoring. ​ ​ ​ ​ ​ ​ ​ ​ ​ ​

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