Real-time equivalent time oscilloscope with time domain reflectometry

Abstract

Real equivalent time oscilloscope with time domain reflectometer. A test and measurement device includes one or more ports configured to connect to a device under test (DUT), a time domain reflectometer (TDR) source configured to receive a source control signal and generate an incident signal to be applied to the DUT, one or more analog-to-digital converters (ADCs) configured to receive a sampling clock and sample the incident signal from the TDR source and a time domain reflectometry (TDR) signal or a time domain transmission (TDT) signal from the DUT to generate an incident waveform and a TDR / TDT waveform, one or more processors configured to execute code to cause the one or more processors to control a clock synthesizer to generate the sampling clock and the source control signal and determine time positions of samples in the incident waveform and the TDR / TDT waveform using a period of the TDR source, a period of the sampling clock, and a number of samples, and a display configured to display the incident waveform and the TDR / TDT waveform.

Description

[0001] Cross-references to related applications

[0002] This disclosure claims the benefit of U.S. Provisional Application No. 63 / 184,723, filed May 5, 2021, entitled “REAL EQUIVALENT TIME OSCILLOSCOPEWITH TIME DOMAIN REFLECTOMETER,” the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to test and measurement instruments, and more particularly to real-equivalent-time (RET) oscilloscopes. Background Technology

[0004] High-speed system testing / debugging involves signal integrity analysis of waveforms acquired by an oscilloscope (“scope”), including real-time (RT) oscilloscopes, equivalent-time (ET) or sampling oscilloscopes, and true equivalent-time (RET) oscilloscopes. RT oscilloscopes typically capture the entire waveform representing the signal generated by the device under test (DUT) in a single trigger event, capturing a large number of data points in a continuous recording. ET oscilloscopes typically measure one input sample for each trigger event and repeat the process, adding a small delay each time, until enough samples have been collected to reconstruct the entire waveform. RET oscilloscopes sample at a rate lower than RT oscilloscopes but higher than ET oscilloscopes and use a software clock to reconstruct the waveform without using hardware triggers.

[0005] High-speed system testing / debugging also involves network analysis. Network analysis can be performed using a time-domain reflectometer (TDR) and / or a time-domain transmissometer (TDT) and / or a vector network analyzer (VNA). More information on network analysis can be found in Tektronix's "IConnect SW for DSA8300 Sampling Oscilloscope" (hereinafter referred to as "IConnect"), available at https: / / www.tek.com / datasheet / product-software / iconnect-dsa8300. Another resource is Keysight Technologies' "S-Parameter Design" (hereinafter referred to as "S-Parameter Design"), available at https: / / www.keysight.com / us / en / assets / 7018-06743 / application-notes / 5952-1087.pdf.

[0006] Typically, an ET oscilloscope with a TDR source can measure TDR and / or TDT in the time domain. The time-domain TDR / TDT results are then converted to frequency-domain S-parameters. TDR / TDT and S-parameters allow one to examine the impedance of the data link, channel reflections and insertion loss, and the impact of crosstalk on the affected channel. High-speed serial data testing can use S-parameters to perform embedding / de-embedding processes. Attached Figure Description

[0007] Figure 1 An embodiment of the test and measurement equipment is shown.

[0008] Figure 2 A graphical representation of S-parameter measurement or TDR / TDT measurement is shown.

[0009] Figure 3 A block diagram of a portion of an embodiment of a test and measurement apparatus having a TDR source including a step signal is shown.

[0010] Figure 4 A diagram illustrating an embodiment of the TDR step signal is shown.

[0011] Figure 5 A diagram showing a portion of the entire TDR cycle used for time-domain measurements is presented.

[0012] Figure 6 The return loss curve of the printed circuit board trace is shown.

[0013] Figure 7 The insertion loss curve of the printed circuit board trace is shown.

[0014] Figure 8 Eye diagrams of the measured and de-embedded signals using S-parameters measured by VNA and TDR / TDT are shown.

[0015] Figure 9 A block diagram of a portion of an embodiment of a test and measurement apparatus having a TDR source including a DAC and a mixer source is shown.

[0016] Figure 10 The spectrum diagram of the DAC and mixer TDR source is shown.

[0017] Figure 11 The spectrum diagrams of different TDR sources are shown.

[0018] Figure 12 A block diagram of a portion of an embodiment of a test and measurement apparatus having a scanning sine wave signal source is shown. Detailed Implementation

[0019] The embodiments described here incorporate TDR functionality into a RET oscilloscope to perform TDR and TDT measurements. Two other types of signals are also considered for measuring TDR / TDT on the RET oscilloscope. In this embodiment, the TDR source and the sampling circuitry in the oscilloscope share the system clock. The device directly maps the acquired samples to the pattern waveform without requiring standard RET software clock recovery, which is typically used to recover the clock of high-speed digital signals. However, as discussed further in more detail, the embodiments involve more than just incorporating a TDR source into a RET oscilloscope.

[0020] Figure 1 An embodiment of a test and measurement device 10 with TDR functionality is shown. The following discussion refers to such a device as a RET oscilloscope (“RET oscilloscope”), but there is no limitation on the oscilloscope intended to be illustrated. Figure 1 An example block diagram of a true equivalent time test and measurement instrument 10 according to some configurations of this disclosure is illustrated. The test and measurement instrument 10 includes one or more ports 12, which can be any electrical signal medium. Ports 12 can include receivers, transmitters, and / or transceivers. Each port 12 can include a channel of the test and measurement instrument 10. An example of a RET oscilloscope is discussed in the following U.S. patent application: U.S. Patent Application No. 17 / 182,056 ('056 application), filed February 22, 2021, and published as U.S. Patent Application Publication No. 2021 / 0263085, the entire contents of which are incorporated herein by reference.

[0021] Port 12 receives signals from the DUT and sends them to the sampler track-and-hold circuit 14. The track-and-hold circuit 14 holds each signal steady for a period of time sufficient for one or more high-resolution analog-to-digital converters (ADCs) 18 to acquire it. The ADCs can receive a sampling clock from the clock synthesizer 16 under the control of one or more processors 22.

[0022] ADC 18 converts the analog signal from track-and-hold circuit 14 into a digital signal. ADC 18 can have a sampling rate greater than that of equivalent-time test and measurement instruments but less than that of real-time test and measurement instruments. For example, ADC 18 can sample signals from a few GS / s to tens of GS / s. In some configurations, ADC 18 can sample analog signals between 1 GS / s and 100 GS / s. In other configurations, ADC 18 can sample analog signals between 2 GS / s and 25 GS / s. The digitized signal from the ADC can then be stored in acquisition memory 20. That is, the sampling rate is set such that the Nyquist frequency, half the sampling rate, is lower than the analog bandwidth of ADC 18. ADC 18 can be a single high-resolution ADC, such as a 12-bit ADC.

[0023] One or more processors 22 may be configured to execute instructions from memory and may perform any methods and / or associated steps indicated by such instructions. These may include receiving acquired signals from acquisition memory 20 and reconstructing the signal under test without using hardware triggers, or acquiring samples at a high acquisition rate.

[0024] The memory 20 or any other memory on the test and measurement instrument 10 can be implemented as a processor cache, random access memory (RAM), read-only memory (ROM), solid-state memory, hard disk drive, or any other type of memory. The memory acts as a medium for storing data, computer program products, and other instructions.

[0025] User interface 24 is coupled to one or more processors 22. User interface 24 may include a keyboard, mouse, trackball, touchscreen, and / or any other controls that a user can use to interact with a GUI on display 26. Display 26 may be a digital screen, a cathode ray tube-based display, or any other monitor to display waveforms, measurements, and other data to the user.

[0026] The test and measurement apparatus of the embodiment includes a time domain reflectometer (TDR) source 28, which receives control signals 30 from a clock synthesizer 16, which is typically controlled by one or more processors 22.

[0027] Although the components of test and measurement instrument 10 are depicted as integrated within test and measurement instrument 10, those skilled in the art will appreciate that any of these components may be external to test and measurement instrument 10. They may be coupled to test and measurement instrument 10 in any conventional manner, such as wired and / or wireless communication media and / or mechanisms. For example, in some examples, display 26 may be remotely located within test and measurement instrument 10.

[0028] Figure 2 A basic measurement diagram of TDR / TDT and S-parameters is shown. Incident 1 is the incident waveform sent to the device under test (DUT) 32, and reflected 1 includes the TDR waveform terminating at incident 2. Pass-through 2 is the TDT waveform. The waveforms are acquired by an oscilloscope or other data acquisition device, such as a digitizer. The ratio of the reflected signal to the incident signal in the frequency domain is defined as the reflection ratio. The ratio of the pass-through signal to the incident signal in the frequency domain is defined as the insertion loss. See S-parameter design for example.

[0029] In the following discussion, the term "incident signal" or "incident" refers to a signal or waveform generated by a TDR source. The terms "time-domain signal," "time-domain waveform," or "TD waveform" refer to other signals generated by time-domain reflection (TDR), time-domain transmission (TDT), or a DUT in response to an incident signal.

[0030] Figure 3 Test and measurement equipment (such as) is shown. Figure 1 As part of an embodiment of the test and measurement equipment 10), the TDR source (such as...) Figure 1 The TDR source 28 includes a TDR step signal 36 (typically a voltage or current source) and a clock divider 34. The TDR clock generated by the clock divider 34 drives the TDR step signal, which includes... Figure 2 The incident signal shown. In this embodiment, from Figure 1 The TDR control signal 30 includes TDR clock preparation signals from clock synthesizer 16 to clock divider 34.

[0031] Figure 3 The time-domain (TD) signal includes Figure 2 The reflected / through signal is shown in the diagram. The RET oscilloscope channel acquires both the incident signal and the reflected / through signal as the incident waveform and the TD / TDT waveform (also collectively referred to as the "time domain (TD) waveform") as shown in box 38. Network analysis (such as S-parameter analysis, Z-line analysis) on the RET oscilloscope can be performed as in the ET oscilloscope once it has acquired the pattern waveform. This embodiment may use only one of the one or more ADCs 18.

[0032] The RET oscilloscope ADC 18 samples at a fixed sampling rate asynchronous to the repetition rate of the TDR step signal. Figure 4 In the TDR step signal, there is T TDR The period. RET oscilloscopes sample at a sampling period of Tsample. In RET oscilloscopes, the sampling rate is insufficient to prevent aliasing. Equation (1) is used to place the sample at the corresponding position in the signal pattern waveform:

[0033] t RET (i) = mod(i*Ts) ample T TDR (1)

[0034] The mod function yields i*T sample Divide by T TDR The remainder.

[0035] The RET sampling rate is not high enough to prevent aliasing. For example, for a sampling rate of 2 GS / s, the sampling period could be T. sample =500ps, while the analog bandwidth can be 70GHz, as discussed in application '056. The "clock synthesizer" and "clock divider" can be represented by t in equation (1). RET Configure it in a way that covers the waveform span with sufficient density. For example:

[0036] Reference clock = 10MHz. This is a typical characteristic of the test instrument.

[0037] The clock synthesizer creates a "sampling clock" = 2 GHz multiplied by 200 * reference clock.

[0038] =200 * 10MHz = 2GHz.

[0039] The clock synthesizer creates a "TDR clock pre" of 2.01 GHz multiplied by 201 * reference clock.

[0040] 201 * 10MHz = 2.01GHz.

[0041] Select the TDR clock to cover the set-off time of the TDR / TDT waveform. For a target TDR clock period of more than 10 seconds, the following equations (2) and (3) can be used to select the clock divider value for the equivalent sampling period of the RET oscilloscope:

[0042] T sample_RET =mod(T) TDR ,T sample (2)

[0043] Here, mod is the modulo operation that produces the remainder after division.

[0044] T TDR=TDR clock pre-* clock divider (3).

[0045] The value of the clock divider can be selected from (2) and (3) to make T sample_RET The value of T TDR The values ​​of both are close to the desired values. For example, the following values ​​of the clock divider can be chosen to obtain approximately 2.5 ps as the remainder in equation (2), which is T. sample_RET :

[0046] Clock divider = 20099.

[0047] Using this configuration, the TDR period T TDR Approximately 10us:

[0048]

[0049] Figure 5 This shows that oscilloscopes typically operate at T... TDR TD waveform measurement is performed within the window portion, and the window duration is denoted as T. window RET oscilloscope in T TDR Samples are acquired over the entire duration, meaning that only a portion of the original acquired samples are useful for TD waveform measurements.

[0050] For typical S-parameter measurements, the frequency resolution is approximately 10 MHz. It requires a 100 ns time window. A typical TDR signal with a repetition rate of 100 kHz has a period of 10 μs. In this case, T... window For T TDR For a RET oscilloscope sampling at 2 GS / s, as discussed in application '056, the effective sampling rate of TDR / TDT is 1% of the RET sampling rate, resulting in an effective sampling rate of 20 MS / s. This 20 MS / s effective sampling rate is 100 times higher than the 200 kS / s sampling rate of a typical ET sampling oscilloscope. The speed advantage of the RET oscilloscope over the ET oscilloscope enables faster measurements and higher accuracy because it acquires more data in the same acquisition time. With an average of 100 times more data, random noise in the measurement system can be reduced by 20 dB because:

[0051]

[0052] With an average of 10 times more data, the noise reduction would be 10 dB.

[0053] Bypassing the gain stage in a RET oscilloscope can improve vertical noise in TDR / TDT measurements because it avoids vertical noise introduced by the preamplifier. A higher resolution ADC also helps reduce noise.

[0054] RET oscilloscopes with TDR sources and TD measurements can include procedures for short-open load pass-through (SOLT) or similar calibrations using a calibration kit (Calkit). Calibration accurately establishes a reference plane. The calibration kit can be used instead of the DUT 32 to provide a known signal to the ADC 18 for calibration, such as... Figure 3 As shown in the image.

[0055] The inventors demonstrated a RET oscilloscope with TDR / TDT functionality using a real-time oscilloscope with an external fast step signal source. Figure 6 A comparison is shown of the return loss term (referred to as S11) of a 2.4-inch printed circuit board trace, measured by a RET oscilloscope with a TDR as curve 40 and by a VNA as curve 42. Figure 7 A similar comparison of the insertion loss, referred to as S21, is shown, which has the same two curve sources 40 and 42.

[0056] Figure 8 Eye diagrams for a 16Gb / s NRZ (non-return-to-zero) signal are shown. These are because longer PCB traces are used to better demonstrate the de-embedding effect, as longer PCB traces create greater ISI (inter-symbol interference). Eye diagram 44 in the upper left shows the waveform acquired at the end of a 12-inch PCB trace. The eye diagram shows a large ISI mainly caused by channel insertion loss. Eye diagram 46 shows the waveform acquired before the 12-inch PCB trace. Eye diagram 46 has a wide, open eye. This eye diagram serves as the gold reference for the de-embedding waveform acquired at the end of the channel. Eye diagram 47 in the lower left shows an eye diagram representing the de-embedding waveform using S-parameters measured with a VNA, and eye diagram 48 in the lower right shows an eye diagram representing the de-embedding waveform using S-parameters measured with an oscilloscope with TDR / TDT.

[0057] Numerical examples show that the S-parameters measured by the VNA and the TDR are closely matched at lower frequencies, with the difference increasing at higher frequencies. The de-embedding results between the S-parameters measured using the VNA and those measured using an oscilloscope are comparable, and the de-embedding eye diagram matches the golden reference eye diagram.

[0058] The spectrum of a step signal has magnitudes that follow a 1 / f profile, such as... Figure 11 As shown in the diagram, energy decreases at higher frequencies. At a constant noise level, the signal-to-noise ratio (SNR) decreases at higher frequencies. This is a limitation of step-based TDR / TDT solutions. Figure 6and Figure 7 The numerical examples shown illustrate the increased inaccuracy at higher frequencies. Increasing the averaging amount can mitigate SNR. However, increasing the averaging amount increases the time spent performing TDR / TDT measurements.

[0059] Figure 9 Another embodiment of the TDR source 28 in the RET oscilloscope 10 is shown. In this embodiment, the TDR source includes a digital-to-analog converter (DAC) 52 to create bandwidth-limited mode waveforms, a local oscillator (LO) 56, and a mixer 54 to cover different frequency bands. In this embodiment, the source control signal 30 is a DAC clock 50 sent from the clock synthesizer 16 to the DAC 52.

[0060] DAC 16 can create a pattern waveform signal containing multiple harmonics with constant energy over a finite bandwidth and provide this pattern waveform signal to mixer 54. An arbitrary waveform generator (AWG) is a commercially available DAC-based signal generator. For TDR / TDT measurements, the pattern waveform signal contains multiple harmonics and is typically achieved by programming the phase of each harmonic. This better utilizes the DAC's vertical range. For example, to generate 100 harmonics, aligning the phases of all harmonics results in a time-domain signal that appears as a narrow pulse. With a finite DAC vertical range, the signal output by the DAC will have finite energy. Randomizing the phases of the harmonics results in a pattern waveform signal that appears as random noise and reduces the peak value of the time-domain signal. With the same DAC vertical range, the signal output by the DAC will have higher energy. This will help with SNR, leading to more accurate TDR / TDT measurements at higher frequencies.

[0061] The pattern waveform signal received at mixer 54 is mixed with the LO signal from local oscillator 56 to generate the incident signal. In this embodiment, ADC 18 includes two ADCs. One ADC 58 receives the incident signal to generate the incident waveform as shown in box 62. DUT 32 also receives the incident signal and generates a TD / TDT signal for ADC 60 to produce a TDR / TDT waveform as shown in box 64. This waveform can be used for display, analysis, etc.

[0062] Mixers can be used to shift the spectrum of signals generated by a DAC to higher frequency bands, allowing for wider spectrum coverage. For example... Figure 10 As shown, the mixed signals at frequencies f1, f2… create a higher frequency band for TDR / TDT measurements. Note that when the mixer has sufficient bandwidth, the harmonic energy remains at a constant energy level as the frequency is mixed to higher frequencies. This characteristic gives DAC- and mixer-based TDR sources a better SNR advantage at higher frequencies compared to step-based TDR sources, such as… Figure 11 As shown, this will be discussed in more detail later.

[0063] Figure 9 Test and measurement equipment, such as RET oscilloscopes, acquires samples and uses the same equation (1) to create pattern waveforms. SOLT calibration works in the same way as when the system uses a step-based TDR source.

[0064] In another embodiment, in Figure 12 As shown, the TDR source 28 in the RET oscilloscope 10 includes a sine wave generator. In this embodiment, the oscilloscope measures one frequency at a time. The source control signal 30 includes a frequency control signal sent from the clock synthesizer 16 to the sine wave scanning source 68. Performing TDR / TDT measurements at each frequency takes longer than using a step-based TDR source or a DAC- and mixer-based TDR source. This method achieves optimal SNR at each frequency because all signal energy is concentrated on a single harmonic, similar to how a VNA measures S-parameters at one frequency at a time.

[0065] Figure 12 Test and measurement equipment, such as a RET oscilloscope, acquires samples and then creates a sine waveform using the same equation (1) as the period of a known sine signal. SOLT calibration works in the same way as when using a step-based TDR source. The sine sweep generator 68 sends the incident signal to the incident ADC 58 to produce the incident waveform as shown in box 62, and then sends it to the DUT 32. The DUT 32 then generates a TD / TDT signal for the ADC 60 to produce a TDR / TDT waveform as shown in box 64. This waveform can be used for display, analysis, etc.

[0066] Figure 11 A comparison of magnitudes and frequencies for the three different embodiments discussed herein is shown. Figure 11 The spectrum of the step signal is shown on the left, the spectrum of the DAC mixer is shown in the middle, and the sine wave is shown on the right.

[0067] This disclosure describes various embodiments of RET oscilloscopes with TDR. RET oscilloscopes are capable of measuring S-parameters up to higher frequencies and capturing and measuring high-speed data waveforms, thus becoming versatile tools for network analysis and waveform analysis required to perform high-speed serial data test / measurement. RET oscilloscope solutions offer significant advantages over ET oscilloscope solutions. In the case of a DAC-based TDR source, RET oscilloscope solutions have the potential to provide accurate S-parameters at high frequencies.

[0068] Various aspects of this disclosure can operate on specially created hardware, firmware, digital signal processors, or on a specially programmed general-purpose computer including a processor that operates according to programmed instructions. As used herein, the terms controller or processor are intended to include microprocessors, microcomputers, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and special-purpose hardware controllers. One or more aspects of this disclosure can be embodied in computer-usable data and computer-executable instructions, such as in one or more program modules executed by one or more computers (including monitoring modules) or other devices. Typically, program modules include routines, programs, objects, components, data structures, etc., which perform specific tasks or implement specific abstract data types when executed by a processor in a computer or other device. Computer-executable instructions can be stored on non-transitory computer-readable media, such as hard disks, optical disks, removable storage media, solid-state storage, random access memory (RAM), etc. As those skilled in the art will appreciate, the functionality of program modules can be combined or distributed in various aspects as desired. Furthermore, this functionality can be wholly or partially embodied in firmware or hardware equivalents such as integrated circuits, FPGAs, etc. Specific data structures may be used to more efficiently implement one or more aspects of this disclosure, and such data structures are considered to be within the scope of the computer-executable instructions and computer-usable data described herein.

[0069] In some cases, the disclosed aspects may be implemented using hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried on or stored thereon by one or more non-transitory computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As discussed herein, a computer-readable medium means any medium that can be accessed by a computing device. By way of example and not limitation, a computer-readable medium may include computer storage media and communication media.

[0070] Computer storage media means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, optical disc read-only memory (CD-ROM), digital video disc (DVD) or other optical disc storage devices, magnetic tape cassettes, magnetic tape, disk storage devices or other magnetic storage devices, and any other volatile or non-volatile, removable or non-removable medium implemented in any technology. Computer storage media excludes signals themselves and transient forms of signal transmission.

[0071] Communication medium means any medium that can be used for computer-readable information communication. By way of example and not limitation, communication medium may include coaxial cable, fiber optic cable, air, or any other medium suitable for communication of electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals.

[0072] Furthermore, this written description references specific features. It should be understood that the disclosure in this specification includes all possible combinations of these specific features. For example, where a specific feature is disclosed in the context of a particular aspect, that feature can also be used in the context of other aspects to the greatest extent possible.

[0073] Furthermore, when a method having two or more defined steps or operations is mentioned in this application, the defined steps or operations may be performed in any order or simultaneously, unless the context precludes those possibilities.

[0074] Example

[0075] The following provides illustrative examples of the disclosed technology. Embodiments of the technology may include one or more of the examples below, as well as any combination thereof.

[0076] Example 1 is a test and measurement device comprising: one or more ports configured to connect to a device under test (DUT); a time-domain reflectometer (TDR) source configured to receive a source control signal and generate an incident signal to be applied to the DUT; one or more analog-to-digital converters (ADCs) configured to receive a sampling clock and sample the incident signal from the TDR source and a time-domain reflected (TDR) or time-domain transmitted (TDT) signal from the DUT to generate an incident waveform and a TDR / TDT waveform; one or more processors configured to execute code such that the one or more processors: control a clock synthesizer to generate a sampling clock and a source control signal, and determine the time position of samples in the incident waveform and the TDR / TDT waveform using the period of the TDR source, the period of the sampling clock, and the number of samples; and a display configured to display the incident waveform and the TDR / TDT waveform.

[0077] Example 2 is a test and measurement device of Example 1, wherein the one or more processors are further configured to execute code such that the one or more processors determine the time position according to the following formula: t RET (i) = mod(i * T) sample T TDR ), where T sample It is the period of the sampling clock, and T TDR It is the period of the TDR clock signal, and is equal to the initial TDR clock signal multiplied by the clock divider.

[0078] Example 3 is the test and measurement equipment of Example 2, where the sampling period is equal to: T sample_RET =mod(T) TDR T sample ).

[0079] Example 4 is a test and measurement device of any one of Examples 1 to 3, wherein: the source control signal includes a preliminary TDR clock signal; and the TDR source includes a clock divider and a step signal generator, the clock divider being configured to receive the source control signal to generate a TDR clock, and the step signal generator receiving the TDR clock and generating an incident signal to be applied to the DUT.

[0080] Example 5 is a test and measurement device of any one of Examples 1 to 4, wherein the one or more ADCs include an ADC configured to receive an incident signal from a TDR source and a TDR / TDT signal from a DUT.

[0081] Example 6 is a test and measurement device of any one of Examples 1 to 5, wherein: the source control signal includes a digital-to-analog converter (DAC) clock signal; and the TDR source includes: a DAC configured to receive the DAC clock signal and generate a pattern waveform; a local oscillator for generating an oscillation signal; and a mixer configured to receive the pattern waveform from the DAC and the oscillation signal from the local oscillator and generate an incident signal to be applied to the DUT.

[0082] Example 7 is a test and measurement apparatus of Example 6, wherein the one or more ADCs include an incident ADC configured to receive an incident signal from a mixer, and a TDR / TDT ADC configured to receive a TDR / TDT signal from a DUT.

[0083] Example 8 is a test and measurement apparatus of Example 6, wherein the mixer and local oscillator are further configured to shift the spectrum of the pattern waveform to a higher frequency band.

[0084] Example 9 is a test and measurement device of any one of Examples 1 to 8, wherein: the source control signal includes a frequency selection signal; and the TDR source includes a signal generator configured to receive the frequency selection signal and generate a sine wave as the incident signal.

[0085] Example 10 is a test and measurement apparatus of Example 9, wherein the one or more ADCs include an incident ADC configured to receive an incident signal from a signal generator and a TDR / TDT ADC configured to receive a TDR / TDT signal from a DUT.

[0086] Example 11 is a method for sampling a waveform using a true equivalent time oscilloscope with a time-domain reflectometer source, comprising: controlling a clock synthesizer to generate a sampling clock and a source control signal; using a time-domain reflectometer (TDR) source to receive the source control signal and generate an incident signal to be applied to the device under test (DUT); receiving the sampling clock at one or more analog-to-digital converters (ADCs) and sampling the incident signal from the TDR source and the TDR / TDT signal from the DUT to generate an incident waveform and a TDR / TDT waveform; determining the time position of the sampling in the incident waveform and the TDR / TDT waveform using the period of the TDR source, the period of the sampling clock, and multiple samples; and displaying the incident waveform and the TDR / TDT waveform.

[0087] Example 12 is the method of Example 11, wherein determining the time position of a sample further includes determining the time position of the sample according to the following formula: t RET (i) = mod(i*T) sample T TDR ), where T sample It is the period of the sampling clock, and T TDR It is the period of the TDR clock signal, and is equal to the initial TDR clock signal multiplied by the clock divider.

[0088] Example 13 is the method of Example 12, where the sampling period is equal to: T sample_RET =mod(T) TDR T sample ).

[0089] Example 14 is a method of any one of Examples 11 to 14, wherein: the source control signal includes a preliminary TDR clock signal; and wherein receiving the source control signal using a TDR source and generating an incident signal to be applied to the DUT includes: applying a clock divider to the preliminary TDR clock signal to generate a TDR clock; and using a step signal generator to receive the TDR clock and generate an incident signal to be applied to the DUT.

[0090] Example 15 is a method of Example 14, wherein sampling the incident signal at one or more ADCs includes sampling the incident signal from a TDR source and the TDR / TDT signal from the DUT at one ADC.

[0091] Example 16 is a method of any one of Examples 11 to 15, wherein: the source control signal includes a digital-to-analog converter (DAC) clock signal; and wherein using a TDR source to receive the source control signal and generate an incident signal to be applied to the DUT includes: using the DAC to receive the DAC clock signal and generate a pattern waveform; generating an oscillation signal; and mixing the pattern waveform and the oscillation signal from the DAC to generate the incident signal to be applied to the DUT.

[0092] Example 17 is a method of Example 16, wherein sampling the incident signal at one or more ADCs includes sampling the incident signal from the TDR source at the incident ADC and sampling the TDR / TDT signal from the DUT at the TDR / TDT ADC.

[0093] Example 18 is the method of claim 16, wherein the mixed-mode waveform and oscillating signal include shifting the spectrum of the mode waveform to a higher frequency band.

[0094] Example 19 is a method of any one of Examples 11 to 16, wherein: the source control signal includes a frequency selection signal; and wherein receiving the source control signal using a TDR source and generating an incident signal to be applied to the DUT includes: receiving the frequency selection signal using a signal generator and generating a sine wave as the incident signal to be applied to the DUT.

[0095] Example 20 is a method of any of Examples 16 to 19, wherein sampling the incident signal at one or more ADCs includes sampling the incident signal from the TDR source at the incident ADC and sampling the TDR / TDT signal from the DUT at the TDR / TDT ADC.

[0096] All features disclosed in the specification, including the claims, abstract, and drawings, and all steps in any disclosed method or process, may be combined in any combination, except for combinations in which at least some such features and / or steps are mutually exclusive. Unless otherwise expressly stated, each feature disclosed in the specification, including the claims, abstract, and drawings, may be replaced by an alternative feature for the same, equivalent, or similar purpose.

[0097] Although specific aspects of this disclosure have been illustrated and described for illustrative purposes, it will be understood that various modifications may be made without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be limited except for the appended claims.

Claims

1. A testing and measuring apparatus, comprising: One or more ports are configured to connect to the device under test (DUT); A time-domain reflectometer (TDR) source is configured to receive a source control signal and generate an incident signal that will be applied to the DUT; One or more analog-to-digital converters (ADCs) are configured to receive a sampling clock and sample an incident signal from a TDR source and a time-domain reflected (TDR) or time-domain transmitted (TDT) signal from a DUT to generate an incident waveform and a TDR / TDT waveform. One or more processors are configured to execute code such that the one or more processors: The control clock synthesizer generates the sampling clock and source control signals, and The timing of the samples in the incident waveform and the TDR / TDT waveform is determined by the period of the TDR source, the period of the sampling clock, and the number of samples. and The display is configured to display the incident waveform and the TDR / TDT waveform.

2. The testing and measuring equipment according to claim 1, wherein, The one or more processors are further configured to execute code such that the one or more processors determine the time position according to the following formula: t RET (i) = mod(i*T) sample T TDR ), where T sample It is the period of the sampling clock, and T TDR It is the period of the TDR clock signal, and is equal to the initial TDR clock signal multiplied by the clock divider.

3. The testing and measuring apparatus according to claim 2, wherein the sampling period is equal to: T sample_RET =mod(T TDR ,T sample )。 4. The testing and measuring apparatus according to claim 1, wherein: The source control signals include the initial TDR clock signal; and The TDR source includes a clock divider and a step signal generator. The clock divider is configured to receive a source control signal to generate a TDR clock, and the step signal generator receives the TDR clock and generates an incident signal that will be applied to the DUT.

5. The test and measurement apparatus of claim 4, wherein the one or more ADCs include an ADC configured to receive an incident signal from a TDR source and a TDR / TDT signal from a DUT.

6. The testing and measuring apparatus according to claim 1, wherein: The source control signals include the digital-to-analog converter (DAC) clock signal; and TDR sources include: The DAC is configured to receive the DAC clock signal and generate a pattern waveform; A local oscillator is used to generate an oscillation signal; and The mixer is configured to receive the mode waveform from the DAC and the oscillation signal from the local oscillator, and generate the incident signal to be applied to the DUT.

7. The test and measurement apparatus of claim 6, wherein the one or more ADCs include an incident ADC configured to receive an incident signal from a mixer, and a TDR / TDT ADC configured to receive a TDR / TDT signal from a DUT.

8. The test and measurement apparatus of claim 6, wherein the mixer and local oscillator are further configured to shift the spectrum of the mode waveform to a higher frequency band.

9. The testing and measuring apparatus according to claim 1, wherein: Source control signals include frequency selection signals; and A TDR source includes a signal generator configured to receive a frequency-selective signal and generate a sine wave as the incident signal.

10. The test and measurement apparatus of claim 9, wherein the one or more ADCs include an incident ADC configured to receive an incident signal from a signal generator and a TDR / TDT ADC configured to receive a TDR / TDT signal from a DUT.

11. A method for sampling a waveform using a true equivalent time oscilloscope with a time-domain reflectometry source, comprising: The control clock synthesizer generates the sampling clock and source control signal; A time domain reflectometer (TDR) source is used to receive the source control signal and generate the incident signal to be applied to the device under test (DUT); The sampling clock is received at one or more analog-to-digital converters (ADCs), and the incident signal from the TDR source and the TDR / TDT signal from the DUT are sampled to generate the incident waveform and the TDR / TDT waveform. The timing of the samples in the incident waveform and the TDR / TDT waveform is determined by using the period of the TDR source, the period of the sampling clock, and multiple samples. and Displays the incident waveform and the TDR / TDT waveform.

12. The method of claim 11, wherein determining the time position of the sample further comprises determining the time position of the sample according to the following formula: t RET (i) = mod(i*T) sample， T TDR ), where T sample It is the period of the sampling clock, and T TDR It is the period of the TDR clock signal, and is equal to the initial TDR clock signal multiplied by the clock divider.

13. The method of claim 12, wherein the sampling period is equal to: T sample_RET =mod(T TDR ,T sample )。 14. The method of claim 11, wherein: The source control signals include the initial TDR clock signal; and The process of using a TDR source to receive source control signals and generate incident signals to be applied to the DUT includes: Apply a clock divider to the initial TDR clock signal to generate the TDR clock; and A step signal generator is used to receive the TDR clock and generate the incident signal that will be applied to the DUT.

15. The method of claim 14, wherein sampling the incident signal at one or more ADCs comprises sampling the incident signal from a TDR source and the TDR / TDT signal from the DUT at one ADC.

16. The method of claim 11, wherein: The source control signals include the digital-to-analog converter (DAC) clock signal; and The use of a TDR source to receive source control signals and generate incident signals to be applied to the DUT includes: Use a DAC to receive the DAC clock signal and generate the pattern waveform; Generates an oscillating signal; and The mode waveform and oscillation signal from the DAC are mixed to generate the incident signal that will be applied to the DUT.

17. The method of claim 16, wherein sampling the incident signal at one or more ADCs includes sampling the incident signal from the TDR source at the incident ADC and sampling the TDR / TDT signal from the DUT at the TDR / TDT ADC.

18. The method of claim 16, wherein the mixed-mode waveform and oscillation signal include shifting the spectrum of the mode waveform to a higher frequency band.

19. The method according to claim 11, wherein: The source control signal includes a frequency selection signal; and The process of using a TDR source to receive source control signals and generate incident signals to be applied to the DUT includes: A signal generator is used to receive a frequency selection signal and generate a sine wave as the incident signal to be applied to the DUT.

20. The method of claim 19, wherein sampling the incident signal at one or more ADCs includes sampling the incident signal from the TDR source at the incident ADC and sampling the TDR / TDT signal from the DUT at the TDR / TDT ADC.

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