Method for implementing content addressable memory based on bipolar characteristic field effect transistor

Abstract

The application provides a method for realizing content addressable memory based on bipolar characteristic field effect transistor, and belongs to the technical field of novel storage and calculation. The application inserts a storage layer between the gate dielectric layer and the control gate of the field effect transistor with bipolar characteristics and symmetric source and drain, modulates the threshold voltage for information storage, and uses the non-monotonic transfer characteristic for input search, so as to realize the linear non-separable comparison operation required by the CAM unit on a single field effect transistor with bipolar characteristics and adjustable threshold. Compared with the CAM design based on the traditional MOSFET, the application has a significantly reduced unit area and a more simple programming and search operation process, and accordingly has higher energy efficiency, and has a very wide application space.

Description

Technical Field

[0001] This invention relates to the field of novel storage and computing technologies, specifically to a content-addressable memory design based on a field-effect transistor with bipolar characteristics. Background Technology

[0002] Content-addressable memory (CAM) can perform search operations efficiently and in parallel, and is widely used in high-performance machine learning models such as routers, database searches, in-memory computing, and neuromorphic computing. CAM is a special type of memory used for parallel search; in addition to the read and write operations of regular memory, it can perform unique search operations. CAM was initially used to accelerate table lookup operations related to packet forwarding and classification in network routers. Because CAM can complete the entire search operation within a single clock cycle, it offers a significant speedup compared to other hardware- or software-based search systems, and this speedup will become even more pronounced with the transition from Internet Protocol version 4 (IPv4) to Internet Protocol version 6 (IPv6) and higher. In the era of big data, CAM is extremely attractive in edge machine learning tasks such as pattern matching, video and image processing, because it can match the input vector (query) with all stored vectors (entries) within a single search cycle and perform distance-based feature retrieval based on the degree of mismatch.

[0003] CAM designs based on traditional static random access memory (SRAM) occupy a huge cell area, limiting their storage density for mapping computationally intensive algorithms. Furthermore, the resulting large parasitic capacitance further increases search latency and power consumption. CAM designs based on various emerging non-volatile memories, such as resistive random access memory (RRAM), phase-change memory (PCM), and ferroelectric field-effect transistors (FeFETs), offer reduced cell area, search latency, and power consumption. However, since these CAM implementations all utilize traditional metal-oxide-semiconductor field-effect transistors (MOSFETs) as the logic transistors controlling the search, their monotonic transfer characteristic curves mean that CAM designs are based on circuit topologies with two complementary branch paths to store the two states of an entry, thus achieving a linearly inseparable comparison operation between the input query and the stored entry, inevitably leading to increased hardware costs.

[0004] Based on their switching characteristics and the dominant charge carriers in the semiconductor, field-effect transistors (FETs) can be classified into unipolar (hole-dominated p-type or electron-dominated n-type) and bipolar (both holes and electrons participate in conduction) types. FETs with bipolar characteristics exhibit non-monotonic transfer characteristic curves. In recent years, various semiconductor materials with bipolar conductivity and special structural designs have been used to realize bipolar FETs, providing new ideas for achieving more compact and simpler CAM circuit designs. Summary of the Invention

[0005] To address the problems existing in the prior art, this invention proposes a method for implementing CAM based on a field-effect transistor with bipolar characteristics. Compared with the CAM design based on traditional MOSFETs, this invention overcomes the limitation of requiring a dual-branch complementary path circuit topology. The linearly inseparable comparison operation required for the CAM cell can be realized on a single field-effect transistor with an adjustable threshold and bipolar characteristics. It has a smaller cell area and a simpler programming and search operation process, which can bring higher search energy efficiency.

[0006] The technical solution of the present invention is as follows:

[0007] A method for realizing CAM based on a field-effect transistor with bipolar characteristics, characterized in that,

[0008] 1) By using semiconductor materials with bipolar conductivity of electrons and holes as the channel, or by using metals or metal silicides as the source and drain materials, the field-effect transistor with a source-drain symmetric structure exhibits a non-monotonic bipolar transfer characteristic curve.

[0009] 2) Insert a storage layer between the gate dielectric layer and the control gate of the above-mentioned bipolar field-effect transistor. The storage layer adopts a floating gate / trapping layer and a tunneling dielectric layer. The threshold voltage of the transistor is modulated by the charge trapping / detrapping of the semiconductor channel. Alternatively, a layer of ferroelectric material can be used. The threshold voltage of the transistor is modulated by changing the polarization state of the ferroelectric material, thus forming a bipolar field-effect transistor AMFET with modulated threshold voltage.

[0010] 3) The Content Addressable Memory (CAM) cell is composed of the AMFET field-effect transistor obtained in step 2);

[0011] 4) The drain and gate of the AMFET serve as the ML and SL terminals of the CAM, respectively. The source of the AMFET is grounded. During the writing of the AMFET storage entry, the ML terminal is grounded, and a programming / erasing write voltage pulse is applied to the SL terminal. The threshold voltage of the AMFET is modulated by charge trapping / detrapping or ferroelectric polarization switching. This is reflected on the device's transfer characteristic curve as a shift along the gate voltage. The gate voltage corresponding to the minimum drain current is called V. OFF Then the V corresponding to the programming / erasing operation OFF0 and V OFF1 These represent storing entry 0 and entry 1 respectively. During the search operation, a DC bias voltage V is applied to the SL terminal. SL0 (=V OFF0 ) and V SL1 (=V OFF1 ), representing input query 0 and query 1 respectively. A fixed read voltage is applied to the ML terminal. The matching status is determined by detecting the current at the ML terminal. The AMFET is in the off state only when the input query matches the storage entry, and has a very low drain current, indicating a match. When the input query does not match the storage entry, the AMFET will be in the on state, and has a high drain current, indicating a mismatch. This completes the search and matching operation of one CAM cell.

[0012] 5) For a CAM array, each row of CAM cells shares the ML. Based on the input query vector, a corresponding search voltage is applied to all SL terminals simultaneously. Depending on the different mismatches between the input query vector and the stored entry vector, each row of the ML in the CAM array will have a different magnitude of current. The magnitude of the current is proportional to the degree of mismatch. Distance measurement can be achieved based on the magnitude of this current.

[0013] In summary, by utilizing the non-monotonic transfer characteristics of bipolar field-effect transistors and the modulation of the threshold voltage by charge trapping or ferropolar polarization reversal, the linearly inseparable comparison operation required by the CAM cell can be implemented in a single transistor. Furthermore, based on the CAM array, distance measurement can be performed according to the degree of mismatch, enabling a wider range of applications.

[0014] The CAM design proposed in this invention is based on a field-effect transistor with adjustable threshold bipolar characteristics. The field-effect transistor with bipolar characteristics has a source-drain symmetrical structure similar to that of a traditional MOSFET. It can be made to have bipolar characteristics by using semiconductor materials with electronic and hole bipolar conductivity, such as organic small molecules (e.g., pyrrolopyrrole dione, naphthalimide derivatives, etc.), polymers (e.g., P(NDI2OD-T2) etc.), two-dimensional materials (e.g., graphene, tungsten disulfide, black phosphorus, etc.), oxides (e.g., tin oxide, etc.), and organic-inorganic hybrid materials (e.g., hybrid perovskites, etc.), as the channel. Alternatively, a silicon-based Schottky barrier field-effect transistor can be used as the source-drain material, such as a metal or metal silicide.

[0015] The CAM design proposed in this invention is based on a field-effect transistor with adjustable threshold bipolar characteristics. The method of writing the storage entry can be to insert a storage layer between the gate dielectric layer and the control gate. The threshold voltage of the transistor is modulated by the charge trapping / detrapping of the semiconductor channel or by changing the polarization state of the ferroelectric material. The ferroelectric material can be various HfO2-doped ferroelectric materials such as HfO2-doped Zr (HZO) or HfO2-doped Al (HfAlO), or traditional ferroelectric materials such as perovskite ferroelectric materials (such as PZT, BFO, SBT, etc.) or ferroelectric polymers (such as P(VDF-TrFE) etc.). The device gate stack can be based on various structures such as MFMIS, MFIS, and MFS.

[0016] The technical effects of this invention are as follows:

[0017] 1. The CAM design based on a bipolar adjustable threshold field-effect transistor proposed in this invention overcomes the limitation of the circuit topology that requires two complementary branch paths in the traditional MOSFET-based CAM design by utilizing the non-monotonic transfer characteristics. It realizes the complete function of the CAM unit on a single transistor, reduces hardware costs, and correspondingly reduces parasitic effects on ML and SL, which can further improve search efficiency.

[0018] 2. The CAM design based on the field-effect transistor with adjustable threshold bipolar characteristics proposed in this invention can further reduce the complexity of programming and searching as well as energy consumption. Compared with the CAM design based on traditional MOSFETs, each cell needs to program at least two memory elements and apply voltage to two SLs during searching, which has significant advantages. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the CAM cell structure and array structure of the field-effect transistor based on the bipolar characteristic adjustable threshold of the present invention;

[0020] Figure 2This is a schematic diagram illustrating the functional implementation of the CAM unit of the field-effect transistor with adjustable threshold based on bipolar characteristics according to the present invention. Detailed Implementation

[0021] The present invention will be further clearly and completely described below with reference to the accompanying drawings and specific embodiments.

[0022] The schematic diagrams of the CAM cell structure and array structure of the field-effect transistor based on the bipolar characteristic adjustable threshold of this invention are shown below. Figure 1 As shown, taking a field-effect transistor based on a bipolar conductive semiconductor material as an example, a threshold-adjustable bipolar field-effect transistor is formed by inserting a storage layer between the gate dielectric layer and the control gate. This storage layer can be a floating gate / trapping layer and a tunneling dielectric layer, or a ferroelectric material can be inserted between the gate dielectric layer and the control gate. By changing the polarization state of the ferroelectric material, the threshold voltage of the transistor is modulated. The drain of the AMFET serves as the ML terminal of the CAM cell, used to detect whether the input query matches the storage entry during the search operation. The gate of the AMFET serves as the SL terminal of the CAM cell. During the write operation, a voltage pulse is applied to program or erase the AMFET to obtain the corresponding storage entry state. During the search operation, a DC voltage corresponding to the input query is applied to complete the search operation. The source of the AMFET is connected to ground potential. The current I at the ML terminal is detected during the search process. ML The size is used to determine whether the input query and the stored entry match. If, during the search process, I... ML If the value is below the reference threshold, it indicates a match; otherwise, it indicates a non-match.

[0023] Figure 2 This is a schematic diagram illustrating the functional implementation of the CAM cell based on the bipolar adjustable threshold field-effect transistor in this embodiment. When writing the entry state to the CAM cell, different write voltage pulses are applied to the SL terminal to change the amount of trapped charge in the floating gate / trapping layer or the polarization state of the ferroelectric layer, thereby changing the V of the AMFET. OFF Move to V respectively OFF0 and V OFF1 This represents storing entry 0 and entry 1. During the search process, a V is applied to the SL end. SL0 and V SL1 , representing input query 0 and query 1 respectively. When the input query and the stored entry are the same, the search voltage at the SL terminal is the same as V. OFF When they are equal, the AMFET is in a completely off state, I ML The low off-state current of the device indicates matching. When the input query and the stored entry are inconsistent, the search voltage at the SL terminal will cause the AMFET to be turned on.ML The high-state current of the device represents the mismatch. For a parallel-search CAM array, since each row of CAM cells shares the ML, the mismatch is determined by I, which is proportional to the number of mismatches between the stored entry vector and the input query vector in each row. ML The size of the value can be used to further measure the distance based on the degree of mismatch.

[0024] This embodiment fully and in detail illustrates the implementation principle and method of CAM based on a single bipolar characteristic adjustable threshold field-effect transistor. Compared with the current CAM design based on traditional MOSFETs, it has significantly reduced hardware costs, is simpler to operate, and has higher search efficiency.

[0025] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art will understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection of the present invention is defined by the scope of the claims.

Claims

1. A method for realizing CAM based on a field-effect transistor with bipolar characteristics, characterized in that, 1) By using a semiconductor material with both electron and hole bipolar conductivity as the channel; 2) A storage layer is inserted between the gate dielectric layer and the control gate of the above-mentioned bipolar field-effect transistor. The storage layer uses a floating gate / trapping layer and a tunneling dielectric layer to modulate the threshold voltage of the transistor by trapping / detrapping the charge of the semiconductor channel; or a layer of ferroelectric material is used to modulate the threshold voltage of the transistor by changing the polarization state of the ferroelectric material, thus forming a bipolar field-effect transistor AMFET with modulated threshold voltage. 3) The Content Addressable Memory (CAM) cell is composed of the AMFET field-effect transistor obtained in step 2); 4) The drain and gate of the AMFET serve as the ML and SL terminals of the CAM, respectively. The source of the AMFET is grounded. During the writing of the AMFET storage entry, the ML terminal is grounded, and a programming / erasing write voltage pulse is applied to the SL terminal. The threshold voltage of the AMFET is modulated by charge trapping / detaching or ferroelectric polarization switching. This is reflected on the device's transfer characteristic curve as a shift along the gate voltage. The gate voltage corresponding to the minimum drain current is called V. OFF Then the V corresponding to the programming / erasing operation OFF0 and V OFF1 These represent storing entry 0 and entry 1 respectively. During the search operation, a DC bias voltage V is applied to the SL terminal. SL0 and V SL1 , representing input query 0 and query 1 respectively. A fixed read voltage is applied to the ML terminal. The matching status is determined by detecting the current at the ML terminal. The AMFET is in the off state only when the input query matches the storage entry, and has a very low drain current, indicating a match. When the input query does not match the storage entry, the AMFET will be in the on state, and has a high drain current, indicating a mismatch. This completes the search and matching operation of one CAM cell.

2. The method for implementing CAM based on a field-effect transistor with adjustable threshold bipolar characteristics as described in claim 1, characterized in that, In step 1), the semiconductor material is an organic small molecule, a polymer, a two-dimensional material, an oxide, or an organic-inorganic hybrid material.

3. The method for realizing CAM based on a field-effect transistor with adjustable threshold bipolar characteristics as described in claim 1, characterized in that, In step 2), the ferroelectric material is HfO2 doped with Zr (HZO), HfO2 doped with Al (HfAlO), or perovskite-type ferroelectric material or ferroelectric polymer.

4. The method for implementing CAM based on a field-effect transistor with adjustable threshold bipolar characteristics as described in claim 1, characterized in that, The gate stack-up on the gate dielectric layer is based on MFMIS, MFIS, and MFS structures.

5. The method for implementing CAM based on a field-effect transistor with adjustable threshold bipolar characteristics as described in claim 1, characterized in that, The content addressable memory (CAM) cells form an array. Each row of CAM cells in the array shares the ML. According to the input query vector, the corresponding search voltage is applied to all SL terminals at the same time. Depending on the different mismatches between the input query vector and the stored entry vector, each row of ML in the CAM array will have a different current, the magnitude of which is proportional to the degree of mismatch. The distance is measured based on the magnitude of this current.

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