Test methods, apparatus, computer equipment, and storage media for the reset capability of NVMESSD controllers.

Abstract

The present application relates to a test method, device, computer equipment and storage medium for the reset capability of an NVME SSD controller, which comprises the following steps: determining whether the SSD is in a basic scenario test; if so, the test machine sends a reset command; the SSD executes a reset operation according to the reset command; the control machine analyzes the reset command and the reset operation process of the SSD to obtain a basic scenario test result; if not, the SSD is in a write data scenario test, the test machine sends a write command; the SSD executes a write operation according to the write command for a set time, and then the test machine sends a reset command; the SSD executes a reset operation according to the reset command and continues to execute the write operation until the write data is completed; the control machine analyzes the reset command and the reset operation process of the SSD, and the test machine sorts the write data log to obtain a write data scenario test result. The present application realizes simple and effective testing and result evaluation of the reset capability of an NVME SSD controller.

Description

Technical Field

[0001] This invention relates to the field of SSD controller reset capability technology, and in particular to a test method, apparatus, computer equipment, and storage medium for the reset capability of NVMe SSD controllers. Background Technology

[0002] NVMe SSDs are becoming increasingly widely used in consumer and enterprise applications. In the field of SSD testing, controller reset is a basic function, but there is a lack of simple and effective testing methods and standards for judging the quality of this function. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a testing method, apparatus, computer equipment, and storage medium for the reset capability of NVMe SSD controllers.

[0004] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0005] Firstly, this embodiment provides a method for testing the reset capability of an NVMe SSD controller, including the following steps:

[0006] Determine if the SSD is in the basic scenario test;

[0007] If the SSD is under basic scenario testing, the test machine sends a reset command;

[0008] The SSD performs a reset operation based on the reset command;

[0009] The controller parses the reset command and SSD reset operation process to obtain the basic scenario test results;

[0010] If the SSD is not in the basic scenario test, then the SSD is in the write data scenario test, and the test machine sends a write command;

[0011] The SSD executes a write operation according to the write command until the set time, and then the test machine sends a reset command;

[0012] The SSD performs a reset operation based on the reset command and continues writing operations until the data writing is complete;

[0013] The control unit parses the reset command and SSD reset operation process, and the test unit organizes the write data logs to obtain the test results of the write data scenario.

[0014] The further technical solution is as follows: the basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

[0015] The further technical solution is that the set time is 5-7 minutes.

[0016] The further technical solution is as follows: the test results of the write data scenario include recording the time required for the SSD to go from receiving the reset command to the end of the reset, the controller reset time as the basic scenario of the SSD, and recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

[0017] Secondly, this embodiment provides a test device for the reset capability of an NVMe SSD controller, including: a judgment unit, a first sending unit, an execution unit, a parsing unit, a second sending unit, an execution sending unit, a second execution unit, and a parsing and sorting unit;

[0018] The judgment unit is used to determine whether the SSD is in a basic scenario test;

[0019] The first sending unit is used to send a reset command to the test machine if the SSD is under basic scenario testing.

[0020] The execution unit is used for the SSD to perform a reset operation according to the reset command;

[0021] The parsing unit is used to control the machine to parse the reset command and SSD reset operation process in order to obtain the basic scenario test results;

[0022] The second sending unit is used to send a write command when the SSD is in a write data scenario test if the SSD is not in a basic scenario test.

[0023] The execution sending unit is used for the SSD to perform a write operation according to the write command until a set time, and then the test machine sends a reset command;

[0024] The second execution unit is used to perform a reset operation on the SSD according to the reset command, and continue to perform the write operation until the data writing is completed;

[0025] The parsing and organizing unit is used to control the machine to parse the reset command and SSD reset operation process, and the test machine to organize the write data logs to obtain the test results of the write data scenario.

[0026] The further technical solution is as follows: the basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

[0027] The further technical solution is that the set time is 5-7 minutes.

[0028] The further technical solution is as follows: the test results of the write data scenario include recording the time required for the SSD to go from receiving the reset command to the end of the reset, the controller reset time as the basic scenario of the SSD, and recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

[0029] Thirdly, this embodiment provides a computer device, which includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, it implements the test method for the reset capability of the NVMe SSD controller as described above.

[0030] Fourthly, this embodiment provides a storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, can implement the test method for the reset capability of the NVMe SSD controller as described above.

[0031] The advantages of this invention compared to the prior art are: it enables a simple and effective test and result evaluation of the reset capability of NVME SSD controllers.

[0032] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 A flowchart illustrating the test method for the reset capability of an NVMe SSD controller provided in an embodiment of the present invention;

[0035] Figure 2 A schematic block diagram of a test apparatus for the reset capability of an NVMe SSD controller provided in an embodiment of the present invention;

[0036] Figure 3 A schematic block diagram of a computer device provided for an embodiment of the present invention. Detailed Implementation

[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0038] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0039] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0040] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0041] Please see Figure 1 The specific embodiment shown in this invention discloses a method for testing the reset capability of an NVMe SSD controller, comprising the following steps:

[0042] The test environment for this test method is as follows: SSD: NVMe SSD under test; Control machine: Desktop or laptop computer with Windows system, and the control software required by the protocol analyzer is installed; Test machine: Desktop computer with Linux system, and the open-source software fio (SSD read / write tool) and nvme-cli (general SSD management tool that can send common SSD commands) are installed. The SSD is connected to the protocol analyzer, and the protocol analyzer is connected to the test machine.

[0043] S1, determine whether the SSD is in basic scenario testing;

[0044] Before step S1, the process includes: starting the protocol analyzer, turning on the test machine and the control machine to receive mode, in order to provide a good testing environment.

[0045] S2, if the SSD is under basic scenario testing, the test machine sends a reset command;

[0046] S3, the SSD performs a reset operation based on the reset command;

[0047] S4, the controller parses the reset command and SSD reset operation process to obtain the basic scenario test results;

[0048] The basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

[0049] Furthermore, in this embodiment, the controller reset time is <250ms.

[0050] S5. If the SSD is not in the basic scenario test, then the SSD is in the write data scenario test, and the test machine sends a write command.

[0051] S6, the SSD performs a write operation according to the write command until the set time, and then the test machine sends a reset command;

[0052] The set time is 5-7 minutes.

[0053] S7, the SSD performs a reset operation according to the reset command, and continues to perform write operations until the data writing is completed;

[0054] The entire write operation takes 15 minutes. The SSD executes the write operation according to the write command for 7 minutes, then the test machine sends a reset command. The SSD executes the reset operation according to the reset command and continues to execute the write operation until the data writing is completed (up to 15 minutes).

[0055] Among them, the write command:

[0056] fio-filename= / dev / nvme0n1-direct=1-iodepth1-thread-rw=write-ioengine=psync-bs=16k-size=2G-numjobs=30-runtime=900-group_reporting-name=wbtest; -runtime=900 means that writing data should take 900 seconds.

[0057] S8, the controller parses the reset command and SSD reset operation process, and the test machine organizes the write data log to obtain the test results of the write data scenario.

[0058] The test results for the write data scenario include recording the time required for the SSD to complete the reset from receiving the reset command, the controller reset time as the basic scenario for the SSD, recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

[0059] Among them, after obtaining the basic scenario test results and the write data scenario test results, the determination of the NVMe SSD controller reset capability includes the following conditions:

[0060] 1. Basic Scenarios

[0061] Controller reset time <250ms;

[0062] 2. Data writing scenario:

[0063] The controller reset time is <250ms, and the increase in reset time compared to the basic scenario is <10%;

[0064] The minimum write speed during controller reset is not 0;

[0065] The average write speed during controller reset is no less than 70% of the average write speed in the 5 minutes prior to reset;

[0066] The average write speed difference was less than 5% within 5 minutes before and after the controller reset.

[0067] Among them, the SSD controller with the best reset capability is the one that meets all the criteria for both the basic scenario and the write data scenario.

[0068] This invention enables a simple and effective test and result evaluation of the reset capability of NVME SSD controllers.

[0069] Please see Figure 2 As shown, the present invention also discloses a test device for the reset capability of an NVMe SSD controller, comprising: a judgment unit 10, a first sending unit 20, an execution unit 30, a parsing unit 40, a second sending unit 50, an execution sending unit 60, a second execution unit 70, and a parsing and sorting unit 80.

[0070] The judgment unit 10 is used to determine whether the SSD is in a basic scenario test;

[0071] The first sending unit 20 is used to send a reset command to the test machine if the SSD is under basic scenario testing.

[0072] The execution unit 30 is used for the SSD to perform a reset operation according to the reset command;

[0073] The parsing unit 40 is used to control the machine to parse the reset command and SSD reset operation process in order to obtain the basic scenario test results;

[0074] The second sending unit 50 is used to send a write command when the SSD is in a write data scenario test if the SSD is not in a basic scenario test.

[0075] The execution sending unit 60 is used for the SSD to perform a write operation according to the write command until a set time, and then the test machine sends a reset command;

[0076] The second execution unit 70 is used for the SSD to perform a reset operation according to the reset command, and to continue the write operation until the write data is finished;

[0077] The parsing and organizing unit 80 is used to control the machine to parse the reset command and SSD reset operation process, and the test machine to organize the write data logs to obtain the write data scenario test results.

[0078] The basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

[0079] The set time is 5-7 minutes.

[0080] The test results for the write data scenario include recording the time required for the SSD to complete the reset from receiving the reset command, the controller reset time as the basic scenario for the SSD, recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

[0081] It should be noted that those skilled in the art can clearly understand that the specific implementation process of the above-mentioned NVME SSD controller reset capability test device and each unit can be referred to the corresponding description in the foregoing method embodiments. For the sake of convenience and brevity, it will not be repeated here.

[0082] The aforementioned test device for the reset capability of the NVMe SSD controller can be implemented as a computer program, which can, for example... Figure 3 It runs on the computer device shown.

[0083] Please see Figure 3 , Figure 3 This is a schematic block diagram of a computer device 500 provided in an embodiment of this application; the computer device 500 can be a terminal or a server, wherein the terminal can be an electronic device with communication functions such as a smartphone, tablet computer, laptop computer, desktop computer, personal digital assistant, and wearable device. The server can be a standalone server or a server cluster composed of multiple servers.

[0084] See Figure 3The computer device 500 includes a processor 502, a memory, and a network interface 505 connected via a system bus 501. The memory may include a non-volatile storage medium 503 and internal memory 504.

[0085] The non-volatile storage medium 503 may store an operating system 5031 and a computer program 5032. The computer program 5032 includes program instructions that, when executed, cause the processor 502 to perform a test method for the reset capability of an NVMe SSD controller.

[0086] The processor 502 provides computing and control capabilities to support the operation of the entire computer device 500.

[0087] The internal memory 504 provides an environment for the execution of the computer program 5032 in the non-volatile storage medium 503. When the computer program 5032 is executed by the processor 502, the processor 502 can execute a test method for the reset capability of an NVME SSD controller.

[0088] This network interface 505 is used for network communication with other devices. Those skilled in the art will understand that... Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device 500 to which the present application is applied. The specific computer device 500 may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0089] The processor 502 is used to run a computer program 5032 stored in the memory to perform the following steps:

[0090] Step S1: Determine if the SSD is in the basic scenario test;

[0091] Step S2: If the SSD is in the basic scenario test, the test machine sends a reset command.

[0092] Step S3: The SSD performs a reset operation according to the reset command;

[0093] Step S4: The controller parses the reset command and SSD reset operation process to obtain the basic scenario test results;

[0094] Step S5: If the SSD is not in the basic scenario test, then the SSD is in the write data scenario test, and the test machine sends a write command.

[0095] Step S6: The SSD performs a write operation according to the write command until the set time, and then the test machine sends a reset command;

[0096] Step S7: The SSD performs a reset operation according to the reset command, and continues to perform the write operation until the data writing is completed;

[0097] Step S8: The controller parses the reset command and SSD reset operation process, and the test machine organizes the write data log to obtain the test results of the write data scenario.

[0098] It should be understood that in the embodiments of this application, the processor 502 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0099] It will be understood by those skilled in the art that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program includes program instructions and can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiments of the above methods.

[0100] Therefore, the present invention also provides a storage medium. This storage medium can be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program includes program instructions that, when executed by a processor, can implement the above-described test method for the reset capability of an NVMe SSD controller. The storage medium stores a computer program, which includes program instructions that, when executed by a processor, can implement the above-described method. The program instructions include the following steps:

[0101] Step S1: Determine if the SSD is in the basic scenario test;

[0102] Step S2: If the SSD is in the basic scenario test, the test machine sends a reset command.

[0103] Step S3: The SSD performs a reset operation according to the reset command;

[0104] Step S4: The controller parses the reset command and SSD reset operation process to obtain the basic scenario test results;

[0105] Step S5: If the SSD is not in the basic scenario test, then the SSD is in the write data scenario test, and the test machine sends a write command.

[0106] Step S6: The SSD performs a write operation according to the write command until the set time, and then the test machine sends a reset command;

[0107] Step S7: The SSD performs a reset operation according to the reset command, and continues to perform the write operation until the data writing is completed;

[0108] Step S8: The controller parses the reset command and SSD reset operation process, and the test machine organizes the write data log to obtain the test results of the write data scenario.

[0109] In one embodiment, the basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

[0110] In one embodiment, the set time is 5-7 minutes.

[0111] In one embodiment, the write data scenario test results include recording the time required for the SSD to complete the reset from receiving the reset command, the controller reset time as the basic scenario for the SSD, recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

[0112] The storage medium can be any computer-readable storage medium capable of storing program code, such as a USB flash drive, portable hard drive, read-only memory (ROM), magnetic disk, or optical disk.

[0113] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0114] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For example, the division of each unit is merely a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0115] The steps in the method of this invention can be adjusted, merged, or reduced in order according to actual needs. The units in the device of this invention can be merged, divided, or reduced according to actual needs. Furthermore, the functional units in the various embodiments of this invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0116] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a terminal, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention.

[0117] The above embodiments are preferred implementations of the present invention. In addition, the present invention can be implemented in other ways. Any obvious substitutions without departing from the concept of the present technical solution are within the protection scope of the present invention.

Claims

1. A test method for the reset capability of an NVMe SSD controller, characterized in that, Includes the following steps: Determine if the SSD is in the basic scenario test; If the SSD is under basic scenario testing, the test machine sends a reset command; The SSD performs a reset operation based on the reset command; The controller parses the reset command and SSD reset operation process to obtain the basic scenario test results; If the SSD is not in the basic scenario test, then the SSD is in the write data scenario test, and the test machine sends a write command; The SSD executes a write operation according to the write command until the set time, and then the test machine sends a reset command; The SSD performs a reset operation based on the reset command and continues writing operations until the data writing is complete; The control unit parses the reset command and SSD reset operation process, and the test unit organizes the write data logs to obtain the test results of the write data scenario. The test results for the write data scenario include recording the time required for the SSD to complete the reset from receiving the reset command, the controller reset time as the basic scenario for the SSD, recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

2. The test method for the reset capability of the NVMe SSD controller according to claim 1, characterized in that, The basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

3. The test method for the reset capability of the NVMe SSD controller according to claim 1, characterized in that, The set time is 5-7 minutes.

4. A testing device for the reset capability of an NVMe SSD controller, characterized in that, include: The system includes a judgment unit, a first sending unit, an execution unit, a parsing unit, a second sending unit, an execution sending unit, a second execution unit, and a parsing and sorting unit. The judgment unit is used to determine whether the SSD is in a basic scenario test; The first sending unit is used to send a reset command to the test machine if the SSD is under basic scenario testing. The execution unit is used for the SSD to perform a reset operation according to the reset command; The parsing unit is used to control the machine to parse the reset command and SSD reset operation process in order to obtain the basic scenario test results; The second sending unit is used to send a write command when the SSD is in a write data scenario test if the SSD is not in a basic scenario test. The execution sending unit is used for the SSD to perform a write operation according to the write command until a set time, and then the test machine sends a reset command; The second execution unit is used to perform a reset operation on the SSD according to the reset command, and continue to perform the write operation until the data writing is completed; The parsing and organizing unit is used to control the machine to parse the reset command and SSD reset operation process, and the test machine to organize the write data logs to obtain the test results of the write data scenario. The test results for the write data scenario include recording the time required for the SSD to complete the reset from receiving the reset command, the controller reset time as the basic scenario for the SSD, recording the SSD write speed, finding the lowest write speed during the controller reset, and calculating the average write speed during the controller reset, the average write speed in the 5 minutes before the controller reset, and the average write speed in the 5 minutes after the controller reset.

5. The test apparatus for the reset capability of the NVMe SSD controller according to claim 4, characterized in that, The basic scenario test result refers to the time required for the SSD to complete the reset from receiving the reset command, which serves as the controller reset time for the basic SSD scenario.

6. The test apparatus for the reset capability of an NVMe SSD controller according to claim 4, characterized in that, The set time is 5-7 minutes.

7. A computer device, characterized in that, The computer device includes a memory and a processor. The memory stores a computer program, and when the processor executes the computer program, it implements the test method for the reset capability of the NVME SSD controller as described in any one of claims 1-3.

8. A storage medium, characterized in that, The storage medium stores a computer program, which includes program instructions that, when executed by a processor, implement the test method for the NVMESSD controller reset capability as described in any one of claims 1-3.

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