Physical downlink shared channel transmission for multiple points

Abstract

An apparatus of a user equipment (UE) operable to communicate with a fifth generation evolved Node B (eNB) on a wireless network is described. The apparatus may include a first circuit and a second circuit. The first circuit may be operable to determine a first parameter set and a second parameter set for establishing a physical downlink shared channel (PDSCH) resource. The second circuit may be operable to process a first portion of a PDSCH transmission from a first group of multiple-input multiple-output (MIMO) layers corresponding to a first multimedia broadcast single frequency network (MBSFN) configuration based on the first parameter set. The second circuit may also be operable to process a second portion of a PDSCH transmission from a second group of MIMO layers corresponding to a second MBSFN configuration based on a second parameter set.

Description

Technical Field

[0001] The present application relates generally to the field of communications, and more particularly to physical downlink shared channel transmission for multiple points. Background Art

[0002] A variety of wireless cellular communication systems have been implemented, including the 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications System (UMTS) system, the 3GPP Long Term Evolution (LTE) system, and the 3GPP Enhanced LTE (LTE-A) system. Next generation wireless cellular communication systems based on the LTE and LTE-A systems, such as the fifth generation (5G) wireless system / 5G mobile network system, are being developed.

[0003] Next generation wireless cellular communication systems may provide support for higher bandwidths in part by supporting non-coherent joint transmission (NC-JT). Summary of the invention

[0004] The present application provides a user equipment (UE) operable to communicate with a base station on a wireless network, comprising: one or more processors, the one or more processors being used to: establish a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero padding bits; establish a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero padding bits; and encode a polarization-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component, and an interface, the interface being used to send the polarization-coded CSI transmission to a transmission circuit.

[0005] On the other hand, the present application also provides one or more non-transitory machine-readable storage media having machine-executable instructions, which, when executed, enable one or more processors of a user equipment (UE) to operate to communicate with a base station on a wireless network to perform operations including the following: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero padding bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size of the CSI transmission payload in bits, and the second CSI component corresponding to a second number of zero padding bits; and encoding a polarization-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component.

[0006] On the other hand, the present application also provides a method performed by a user equipment (UE), comprising: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponds to a first number of zero padding bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size in bits of the CSI transmission payload, and the second CSI component corresponds to a second number of zero padding bits; and encoding a polarization-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Through the detailed description given below and the drawings of various embodiments of the present disclosure, the embodiments of the present disclosure will be more fully understood. However, while the drawings are helpful for explanation and understanding, they are only an aid and should not be considered to limit the present disclosure to the specific embodiments depicted therein.

[0008] Figure 1 A scenario of non-coherent joint transmission (NC-JT) from multiple transmission points (TPs) to a user equipment (UE) according to some embodiments of the present disclosure is shown.

[0009] Figure 2 A scenario of transmitting different channel state information (CSI) components and parts thereof using polar codes according to some embodiments of the present disclosure is shown.

[0010] Figure 3 An evolved Node B (eNB) and a UE are shown according to some embodiments of the present disclosure.

[0011] Figure 4 Hardware processing circuitry for physical downlink shared channel (PDSCH) start symbol determination of a UE according to some embodiments of the present disclosure is shown.

[0012] Figure 5 A hardware processing circuit for universally encoding CSI of a UE according to some embodiments of the present disclosure is shown.

[0013] Figure 6 A method for PDSCH start symbol determination of a UE according to some embodiments of the present disclosure is shown.

[0014] Figure 7 A method of universally encoding CSI for a UE according to some embodiments of the present disclosure is shown.

[0015] Figure 8 Example components of an apparatus according to some embodiments of the present disclosure are shown.

[0016] Fig. 9 An example interface of a baseband circuit according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0017] Various wireless cellular communication systems have been implemented or are being proposed, including the 3rd Generation Partnership Project (3GPP) Universal Mobile Telecommunications System (UMTS), 3GPP Long Term Evolution (LTE) system, 3GPP Enhanced LTE (LTE-A) system, and the fifth generation (5G) wireless system / 5G mobile network system / 5G New Radio (NR) system. With respect to various implementations, the 5G system and / or the NR system may support a further enhanced coordinated multi-point (FeCoMP) function.

[0018] With respect to various implementation schemes, Figure 1 A scenario of non-coherent joint transmission (NC-JT) from multiple transmission points (TPs) to a user equipment (UE) according to some embodiments of the present disclosure is shown. UE 110 may be in wireless communication with both a first TP 121 and a second TP 122. The first TP 121 may be a serving TP, and the second TP 122 may be a boost TP.

[0019] In NC-JT, different multiple-input multiple-output (MIMO) layers and corresponding demodulation reference signal (DM-RS) antenna ports (APs) can be transmitted from different TPs. For example, the transmission from the first TP 121 can correspond to two MIMO layers and DM-RS APs 7 and 8, while the transmission from the second TP 122 can correspond to one MIMO layer and DM-RS AP 9.

[0020] Various parameters corresponding to physical downlink shared channel (PDSCH) transmissions from each TP may be configured in a parameter set (e.g., a PDSCH RE Mapping QCL set). For actual PDSCH transmissions, the UE may be provided with two or more actual parameter sets associated with the scheduled PDSCH. Due to transmissions from different TPs, some transmission parameters (such as the PDSCH start position) may not be aligned. Therefore, various embodiments may involve rules for resolving possible ambiguities in parameter settings.

[0021] In addition, to support frequency selective dynamic point selection (DPS) using the NC-JT framework, the resource allocation (RA) of a set of MIMO layers corresponding to the first TP and the RA of another set of MIMO layers corresponding to the second TP may be different. Therefore, in various embodiments, to support such transmission schemes, RA information may also be provided based on MIMO layer groups or based on DM-RS AP groups (or both). Therefore, there may be additional overhead in the downlink control information (DCI) indication.

[0022] Mechanisms and methods for PDSCH start symbol determination are disclosed herein. In some embodiments, for a given subframe (for at least one TP) that is a Multimedia Broadcast Single Frequency Network (MBSFN) subframe, the PDSCH start symbol may be determined according to the MBSFN subframe rule; otherwise, the PDSCH start symbol may be determined according to the non-MBSFN subframe rule. For some embodiments, the MBSFN subframe configuration may be set to be the same across TPs.

[0023] Mechanisms and methods for RA indication are also disclosed herein. Some embodiments may involve indication of two or more RAs, wherein the resource block group (RBG) size of the two or more RAs is scaled to fit the payload size of a DCI (e.g., with a conventional DCI format) into a single RA field.

[0024] For various embodiments, due to the dependencies between the channel state information (CSI) components in the conventional LTE system, the encoding of the CSI reference signal resource index (CRI) / rank indication (RI) and the precoding matrix indication (PMI) / channel quality indicator (CQI) may be performed independently of each other. The bandwidth of the CRI / RI may typically be known by the base station based on a higher layer configuration, or may be derived from the CSI reference signal (CSI-RS) AP configuration and / or reported UE capabilities. Based on the decoded CRI / RI, the UE may determine the payload size of the PMI / CQI report. For example, for LTE, if the reported RI is "1", the uplink control information (UCI) may be set to carry a single CQI report; otherwise, the UCI may be set to carry two CQI reports. In addition, the bit width of the PMI report may also depend on the reported RI.

[0025] From a coding perspective, it may be advantageous to use a common coding for all CSI components.However, due to the variable size of UCI, conventional approaches may assume the largest possible payload size for UCI reporting.

[0026] Mechanisms and methods for universal encoding of CSI are disclosed herein. In some embodiments, the minimum portion of the PMI, the minimum portion of the CQI, the RI, and the CRI may be placed on a first set of bit indices in the polar code, and the remainder of the PMI and the remainder of the CQI may be placed on a second set of bit indices in the polar code. Universal encoding for all CSI components may advantageously have better coding efficiency.

[0027] In the following description, many details are discussed to provide a more thorough explanation of the embodiments of the present disclosure. However, it will be apparent to those skilled in the art that the embodiments of the present disclosure may be implemented without these specific details. In other cases, well-known structures and devices are shown in block diagram form rather than in detail in order to avoid obscuring the embodiments of the present disclosure.

[0028] It should be noted that in the corresponding drawings of the embodiments, signals are represented by lines. Some lines may be thicker to indicate more constituent signal paths, and / or have arrows at one or more ends to indicate the direction of information flow. Such indications are not intended to be limiting. Instead, these lines are used in conjunction with one or more exemplary embodiments to facilitate easier understanding of circuits or logic units. Any represented signal indicated by design requirements or preferences may actually include one or more signals that may travel in either direction and may be implemented using any suitable type of signal scheme.

[0029] Throughout the specification and claims, the term "connection" refers to a direct electrical connection, mechanical connection, or magnetic connection between connected things without any intermediate devices. The term "coupling" refers to a direct electrical connection, mechanical connection, or magnetic connection between connected things, or an indirect connection through one or more passive or active intermediate devices. The term "circuit" or "module" may refer to one or more passive components and / or active components arranged to cooperate with each other to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data / clock signal. The meaning of "one", "a", and "the" includes plural references. The meaning of "in..." includes "in..." and "on...".

[0030] The terms "substantially," "close," "about," "approximately," and "approximately" generally refer to within + / -10% of a target value. Unless otherwise indicated, the use of ordinal adjectives "first," "second," and "third," etc. to describe common objects merely indicates that different instances of similar objects are referenced, and are not intended to imply that the objects so described must be in a given order in time, space, order, or in any other manner.

[0031] It is to be understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the invention described herein are, for example, capable of operation in orientations other than those illustrated or otherwise described herein.

[0032] In the description and claims, the terms "left", "right", "front", "back", "top", "bottom", "above", "below" and the like, if any, are used for descriptive purposes and not necessarily for describing permanent relative positions.

[0033] For the purpose of the embodiment, the transistors in various circuits, modules and logic blocks are tunneling FETs (TFETs). Some transistors of various embodiments may include metal oxide semiconductor (MOS) transistors, which include drains, sources, gates and block ends. Transistors may also include tri-gate transistors and fin field effect transistors, cylinder all-around gate transistors, square wires or rectangular ribbon transistors or other devices that implement transistor functions such as carbon nanotubes or spintronics. MOSFET symmetric source and drain terminals are the same terminals and are used interchangeably here. On the other hand, TFET devices have asymmetric source and drain terminals. Those skilled in the art will appreciate that other transistors (e.g., bipolar junction transistors-BJT PNP / NPN, BiCMOS, CMOS, etc.) may be used for some transistors without departing from the scope of the present disclosure.

[0034] For purposes of this disclosure, the phrases "A and / or B" and "A or B" mean (A), (B), or (A and B). For purposes of this disclosure, the phrases "A, B, and / or C" mean (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0035] Furthermore, the various elements of the combinatorial and sequential logic discussed in this disclosure may involve both physical structures (such as AND gates, OR gates, or XOR gates), or a synthetic or otherwise optimized collection of devices that implement logic structures that are Boolean equivalents of the logic discussed.

[0036] In addition, for the purpose of this disclosure, the term "eNB" may refer to an evolved Node B (eNB) supporting traditional LTE, an eNB supporting next generation or 5G, an access point (AP), a transmission point (TP), and / or another base station for a wireless communication system. The term "gNB" may refer to an eNB supporting 5G or supporting NR. For the purpose of this disclosure, the term "UE" may refer to a user equipment (UE) supporting traditional LTE, a station (STA), and / or another mobile equipment for a wireless communication system. The term "UE" may also refer to a UE supporting next generation or 5G.

[0037] Various embodiments of the eNB and / or UE discussed below may process one or more transmissions of various types. Some processing of the transmission may include demodulating, decoding, detecting, parsing, and / or otherwise processing the received transmission. In some embodiments, the eNB or UE processing the transmission may determine or identify the type of transmission and / or the conditions associated with the transmission. For some embodiments, the eNB or UE processing the transmission may operate according to the type of transmission, and / or may operate conditionally based on the type of transmission. The eNB or UE processing the transmission may also identify one or more data values ​​or fields carried by the transmission. Processing the transmission may include moving the transmission through one or more layers of a protocol stack (which may be implemented in, for example, hardware and / or software configured elements), such as by moving the transmission received by the eNB or UE through one or more layers of the protocol stack.

[0038] Various embodiments of the eNB and / or UE discussed below may also generate one or more transmissions of various types. Some generation of transmissions may include modulation, coding, formatting, assembly and / or otherwise processing the transmission to be transmitted. In some embodiments, the eNB or UE generating the transmission may establish the type of transmission and / or the conditions associated with the transmission. For some embodiments, the eNB or UE generating the transmission may operate according to the type of transmission, and / or may operate conditionally based on the type of transmission. The eNB or UE generating the transmission may also determine one or more data values ​​or fields carried by the transmission. Generating the transmission may include moving the transmission through one or more layers of a protocol stack (which may be implemented in, for example, hardware and / or software configured elements), such as by moving the transmission to be sent by the eNB or UE through one or more layers of the protocol stack.

[0039] In various embodiments, resources may span various resource blocks (RBs), physical resource blocks (PRBs), and / or time periods (e.g., frames, subframes, and / or time slots) of a wireless communication system. In some cases, the allocated resources (e.g., channels, orthogonal frequency division multiplexing (OFDM) symbols, subcarrier frequencies, resource elements (REs), and / or portions thereof) may be formatted for transmission via a wireless communication link (and formatted prior to this). In other cases, the allocated resources (e.g., channels, OFDM symbols, subcarrier frequencies, REs, and / or portions thereof) may be detected from reception via a wireless communication link (and detected thereafter).

[0040] For various implementations, in conventional LTE, the PDSCH starting position may depend on whether the current subframe is an MBSFN subframe or a non-MBSFN subframe. If the PDSCH is allocated or semi-persistently scheduled by a physical downlink control channel (PDCCH) with DCI format 2D and / or an enhanced PDCCH (EPDCCH), then the starting data symbol parameters (e.g., L DataStart ).

[0041] In establishing L DataStart When the subframe in which the PDSCH is received is indicated by a higher layer parameter (e.g., mbsfn-SubframeConfigList-r11) determined by the DCI of the serving cell receiving the PDSCH, or if the PDSCH is received on subframe 1 or 6 of frame structure type 2, L DataStart Set to 2 or L provided by DCI (DCI format 2D) DataStart Otherwise, L DataStart Set to the value L provided by DCI (e.g., DCI format 2D) DataStart .

[0042] In some embodiments, when the current subframe is a non-MBSFN subframe, the PDSCH start symbol may be directly derived from the value L provided by DCI format 2D. DataStart For MBSFN subframes, the L DataStart Which is the minimum value? DataStart Converted to the actual PDSCH start symbol.

[0043] For some embodiments, for NC-JT operation, different TPs may have different MBSFN configurations (where each TP is associated with a parameter set), so a given DL subframe may be an MBSFN subframe and a non-MBSFN subframe for two parameter sets. In order to obtain the same PDSCH start symbol for both parameter sets, special rules for PDSCH start symbol determination may be defined. If the current subframe corresponds to an MBSFN subframe in at least one parameter set (e.g., at one TP), the DSCH start symbol determination may be set to follow the MBSFN subframe rules; otherwise, the PDSCH start symbol may be determined according to the non-MBSFN subframe rules.

[0044] In some embodiments, the MBSFN subframe configuration may be set to be the same for both TPs (eg, the same for both parameter sets).

[0045] For some implementations, to support frequency selective DPS using the NC-JT framework, the RA of one set of MIMO layers corresponding to the first TP and the RA of another set of MIMO layers corresponding to the second TP may be different. To support such transmission schemes, the RA information may be set to be provided based on the MIMO layer settings.

[0046] Since RA indication may consume a large number of DCI bits, the RBG size may be reduced to advantageously reduce the amount of bits required to indicate RA. The RBG size may be arranged to be selected so that the total overhead from two RAs may correspond to a maximum number of bits lower than the number of bits supported by RA indication in existing DCI formats.

[0047] Figure 2 A scenario of transmitting different CSI components and parts thereof using polar codes according to some embodiments of the present disclosure is shown. Scenario 200 may have a first CSI component and a second CSI component. The first CSI component may include a first set of zero padding bits 210 (e.g., frozen bits), a lowest set of PMI bits and / or CQI bits 220, a set of RI bits 230, and a set of CRI bits 240. The second CSI component may include a second set of zero padding bits 260 (e.g., frozen bits) and the remaining payload 270 of PMI bits and / or CQI bits.

[0048] Therefore, in various embodiments, for CSI encoding, the UE may first determine the CSI to be transmitted. The CSI may include (and / or consist of) CRI, RI, PMI, CQI, and the number of bits required. Note that some components of the CSI (e.g., CRI) may not be present based on network configuration.

[0049] For the first CSI component, based on the maximum CSI payload size M MAX , the UE may determine the number of bits in the first group of zero-filled bits (eg, frozen bits) as NM MAX , where N may be the polar code length (e.g., 512). Using fixed payload sizes for CRI and RI and minimum payload sizes for PMI and CQI (which may be denoted as PMI, respectively MIN and CQI MIN ), the UE may determine the minimum possible payload size X of the first part of the CSI for encoding.

[0050] For the second CSI component, the number of bits in the first set of zero-fill bits (eg, frozen bits) may be determined based on the actual CSI payload size (which may be represented as K CSI ), the number of bits in the first group of zero padding bits and the polar code block length are determined as N-(NM MAX )-K CSI =M MAX -K CSI For example, if the actual CSI payload size is the maximum value, the number of bits in the second set of zero padding bits may be 0.

[0051] In some implementations, the first CSI component or the second CSI component may include a layer indication (LI) bit.

[0052] For a given polar code interleaving sequence of size N, the UE may first use X entries sorted based on bit quality to transmit a portion of the bits of the PMI and CQI reports (according to the minimum payload size of the CSI component) and all the bits of the RI and CRI reports. The remaining NX entries of the polar code interleaving sequence may be used to transmit the remaining portion of the CSI (e.g., the remaining bits of the PMI and CQI). For example, the minimum payload size of the CQI may correspond to the CQI corresponding to the first codeword (CW). If the CSI reported by the UE corresponds to up to four MIMO layers (e.g., a single CW), the remaining portion of the CQI may not exist and may not be transmitted due to single codeword support. If the CSI corresponds to more than four MIMO layers (e.g., two CWs), the remaining portion of the CQI may correspond to the second CQI of the second codeword.

[0053] At the receiver end, the gNB may first decode X bits to determine the first portion of the CRI, RI, and CQI / PMI payloads, assuming the maximum payload size for CSI, taking into account the bits in the first set of zero padding bits, and assuming some of the bits in the second set of zero padding bits. Based on the estimated CRI and RI values, the gNB may determine the actual payload size for CSI, and may derive the remaining payload size for CQI and PMI (which may be a variable number) and the actual number of bits in the second set of zero padding bits, and may continue decoding the remaining portion of the CSI taking this information into account.

[0054] Figure 3 An eNB and a UE according to some embodiments of the present disclosure are shown. Figure 3 A block diagram of an eNB 310 and a UE 330 operable to coexist with each other and with other elements of an LTE network is included. A high-level simplified architecture of the eNB 310 and the UE 330 is described so as not to obscure the embodiments. It should be noted that in some embodiments, the eNB 310 may be a static non-mobile device.

[0055] The eNB 310 is coupled to one or more antennas 305, and the UE 330 is similarly coupled to one or more antennas 325. However, in some embodiments, the eNB 310 may include or comprise antennas 305, and in various embodiments, the UE 330 may include or comprise antennas 325.

[0056] In some embodiments, antenna 305 and / or antenna 325 may include one or more directional or omnidirectional antennas, including monopole antennas, dipole antennas, loop antennas, patch antennas, microstrip antennas, coplanar wave antennas, or other types of antennas suitable for RF signal transmission. In some MIMO (multiple input multiple output) embodiments, antenna 305 is separated to take advantage of spatial diversity.

[0057] The eNB 310 and the UE 330 are operable to communicate with each other over a network such as a wireless network. The eNB 310 and the UE 330 can communicate with each other via a wireless communication channel 350 having a downlink (DL) path from the eNB 310 to the UE 330 and an uplink (UL) path from the UE 330 to the eNB 310.

[0058] like Figure 3 As shown, in some embodiments, the eNB 310 may include a physical layer circuit 312, a MAC (media access control) circuit 314, a processor 316, a memory 318, and a hardware processing circuit 320. Those skilled in the art will appreciate that in addition to the components shown, other components not shown may be used to form a complete eNB.

[0059] In some embodiments, the physical layer circuit 312 includes a transceiver 313 for providing signals to and from the UE 330. The transceiver 313 uses one or more antennas 305 to provide signals to and from the UE or other devices. In some embodiments, the MAC circuit 314 controls access to the wireless medium. The memory 318 may be or may include a storage medium / medium such as a magnetic storage medium (e.g., a tape or disk), an optical storage medium (e.g., an optical disk), an electronic storage medium (e.g., a conventional hard drive, a solid-state disk drive, or a flash memory-based storage medium), or any tangible storage medium or non-transitory storage medium. The hardware processing circuit 320 may include logic devices or circuits for performing various operations. In some embodiments, the processor 316 and the memory 318 are arranged to perform the operations of the hardware processing circuit 320, such as the operations described herein with reference to the logic devices and circuits within the eNB 310 and / or the hardware processing circuit 320.

[0060] Thus, in some embodiments, the eNB 310 may be a device that includes an application processor, memory, one or more antenna ports, and an interface for allowing the application processor to communicate with another device.

[0061] For example Figure 3 As shown, in some embodiments, UE 330 may include physical layer circuitry 332, MAC circuitry 334, processor 336, memory 338, hardware processing circuitry 340, wireless interface 342, and display 344. Those skilled in the art will appreciate that in addition to the components shown, other components not shown may be used to form a complete UE.

[0062] In some embodiments, the physical layer circuit 332 includes a transceiver 333 for providing signals to and from the eNB 310 (and other eNBs). The transceiver 333 uses one or more antennas 325 to provide signals to and from the eNB or other devices. In some embodiments, the MAC circuit 334 controls access to the wireless medium. The memory 338 may be or may include a storage medium / medium such as a magnetic storage medium (e.g., a tape or disk), an optical storage medium (e.g., an optical disk), an electronic storage medium (e.g., a conventional hard drive, a solid-state disk drive, or a flash memory-based storage medium), or any tangible storage medium or non-transitory storage medium. The wireless interface 342 may be arranged to allow the processor to communicate with another device. The display 344 may provide a user with a visual and / or tactile display for interacting with the UE 330 such as a touch screen display. The hardware processing circuit 340 may include logic devices or circuits for performing various operations. In some embodiments, processor 336 and memory 338 may be arranged to perform operations of hardware processing circuitry 340 , such as those described herein with reference to logic devices and circuits within UE 330 and / or hardware processing circuitry 340 .

[0063] Thus, in some embodiments, UE 330 may be a device that includes an application processor, memory, one or more antennas, a wireless interface to allow the application processor to communicate with another device, and a touch screen display.

[0064] Figure 3 Elements with the same name or reference number in other figures may operate or function in the manner described herein with reference to any such figures (although the operation and function of such elements are not limited to such description). For example, Figures 4 to 5 and Figures 8 to 9 Also shown are implementations of an eNB, a hardware processing circuit of an eNB, a UE, and / or a hardware processing circuit of a UE, and with respect to Figure 3 and Figures 4 to 5 and Figures 8 to 9 The described embodiments may be operable or function as described herein with reference to any of the accompanying drawings.

[0065] In addition, although the eNB 310 and the UE 330 are each described as having several separate functional elements, one or more of the functional elements may be combined and may be implemented by a combination of software-configured elements and / or other hardware elements. In some embodiments of the present disclosure, the functional elements may involve one or more processes operating on one or more processing elements. Examples of software and / or hardware-configured elements include digital signal processors (DSPs), one or more microprocessors, DSPs, field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), radio frequency integrated circuits (RFICs), etc.

[0066] Figure 4 A hardware processing circuit for PDSCH start symbol determination of a UE according to some embodiments of the present disclosure is shown. Figure 5 FIG. 4 shows a hardware processing circuit for universally encoding CSI of a UE according to some embodiments of the present disclosure. Figure 3 , the UE may include various hardware processing circuits described herein (such as Figure 4 The hardware processing circuit 400 and Figure 5 500), which in turn may include logic devices and / or circuits operable to perform various operations. Figure 3 In the present invention, UE 330 (or various elements or components therein, such as hardware processing circuit 340, or a combination of elements or components therein) may include some or all of these hardware processing circuits.

[0067] In some embodiments, one or more devices or circuits within these hardware processing circuits may be implemented by a combination of software-configured elements and / or other hardware elements. For example, processor 336 (and / or one or more other processors that UE 330 may include), memory 338, and / or other elements or components of UE 330 (which may include hardware processing circuit 340) may be arranged to perform operations of these hardware processing circuits, such as those described herein with reference to devices and circuits within these hardware processing circuits. In some embodiments, processor 336 (and / or one or more other processors that UE 330 may include) may be a baseband processor.

[0068] return Figure 4 , an apparatus of a UE 330 (or another UE or mobile handset) operable to communicate with one or more eNBs on a wireless network may include hardware processing circuitry 400. In some embodiments, the hardware processing circuitry 400 may include one or more antenna ports 405 operable to provide various transmissions over a wireless communication channel, such as wireless communication channel 350. Antenna ports 405 may be coupled to one or more antennas 407 (which may be antennas 325). In some embodiments, the hardware processing circuitry 400 may include antennas 407, while in other embodiments, the hardware processing circuitry 400 may be coupled only to antennas 407.

[0069] Antenna port 405 and antenna 407 are operable to provide signals from the UE to the wireless communication channel and / or the eNB, and are operable to provide signals from the eNB and / or the wireless communication channel to the UE. For example, antenna port 405 and antenna 407 are operable to provide transmissions from UE 330 to wireless communication channel 350 (and from there to eNB 310 or another eNB). Similarly, antenna 407 and antenna port 405 are operable to provide transmissions from wireless communication channel 350 (and, in addition, from eNB 310 or another eNB) to UE 330.

[0070] Hardware processing circuit 400 may include various circuits capable of operating in accordance with the various embodiments described herein. Figure 4 , the hardware processing circuit 400 may include a first circuit 410 and / or a second circuit 420 .

[0071] The first circuit 410 is operable to determine a first parameter set and a second parameter set for establishing a PDSCH resource. The second circuit 420 is operable to process a first portion of a PDSCH transmission from a first group of MIMO layers, the first group of MIMO layers corresponding to a first MBSFN configuration based on a first parameter set. The second circuit 420 is also operable to process a second portion of a PDSCH transmission from a second group of MIMO layers, the second group of MIMO layers corresponding to a second MBSFN configuration based on a second parameter set. The first circuit 410 is operable to provide information about the first parameter set and / or the second parameter set to the second circuit 420 via an interface 412. The hardware processing circuit 400 may include an interface for receiving a PDSCH transmission from a receiving circuit.

[0072] In some implementations, the second circuit 420 is operable to process a configuration transmission carrying at least one of the first set of parameters and the second set of parameters.

[0073] For some embodiments, the scheduled DL subframes may be MBSFN subframes for the first parameter set and non-MBSFN subframes for the second parameter set. In some embodiments, the starting PDSCH OFDM symbol index for the PDSCH transmission may be the minimum of: two or the starting PDSCH symbol index of the first parameter set. For some embodiments, the starting PDSCH OFDM symbol index for the PDSCH transmission, the starting PDSCH symbol index of the first parameter set, and the starting PDSCH symbol index of the second parameter set may be the same value.

[0074] In some embodiments, the first circuit 410 and / or the second circuit 420 may be implemented as separate circuits. In other embodiments, the first circuit 410 and / or the second circuit 420 may be combined and implemented together in a circuit without changing the essence of the embodiment.

[0075] return Figure 5 , an apparatus of a UE 330 (or another UE or mobile handset) operable to communicate with one or more eNBs on a wireless network may include hardware processing circuitry 500. In some embodiments, the hardware processing circuitry 500 may include one or more antenna ports 505 operable to provide various transmissions over a wireless communication channel, such as wireless communication channel 350. Antenna ports 505 may be coupled to one or more antennas 507 (which may be antennas 325). In some embodiments, the hardware processing circuitry 500 may include antennas 507, while in other embodiments, the hardware processing circuitry 500 may be coupled only to antennas 507.

[0076] Antenna port 505 and antenna 507 are operable to provide signals from the UE to the wireless communication channel and / or the eNB, and are operable to provide signals from the eNB and / or the wireless communication channel to the UE. For example, antenna port 505 and antenna 507 are operable to provide transmissions from UE 330 to wireless communication channel 350 (and from there to eNB 310 or another eNB). Similarly, antenna 507 and antenna port 505 are operable to provide transmissions from wireless communication channel 350 (and, in addition, from eNB 310 or another eNB) to UE 330.

[0077] Hardware processing circuit 500 may include various circuits capable of operating in accordance with the various embodiments described herein. Figure 5 , the hardware processing circuit 500 may include a first circuit 510 and / or a second circuit 520 .

[0078] The first circuit 510 is operable to establish a first CSI component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponds to a first number of zero padding bits. The first circuit 510 is also operable to establish a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size of the CSI transmission payload in bits, and the second CSI component corresponds to a second number of zero padding bits. The second circuit 520 is operable to encode a polar-coded CSI transmission carrying a first number of zero padding bits, a first CSI component, a second number of zero padding bits, and a second CSI component. The first circuit 510 is operable to provide information about the first CSI component of the CSI transmission payload, the first number of zero padding bits, the second CSI component of the CSI transmission payload, and / or the second number of zero padding bits to the second circuit 520 via an interface 512. The hardware processing circuit 500 may include an interface for sending a polar-coded CSI transmission to a transmission circuit.

[0079] In some embodiments, the first circuit 510 is further operable to calculate the size in bits of the CSI transmission payload.

[0080] For some embodiments, the first number of zero padding bits may be set to a difference between a mother code length in bits for the corresponding polar code and a maximum CSI payload size in bits. In some embodiments, encoding the polar coded CSI transmission may be performed by mapping the first CSI component to a set of most reliable entries in a subset of entries of the polar encoder corresponding to the first CSI component, and encoding the polar coded CSI transmission may also be performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of the polar encoder corresponding to the second CSI component.

[0081] For some embodiments, the subset of entries corresponding to the first CSI component may include a number N1 of polar encoder entries corresponding to the first decoded bits, where N1 is the sum of the number of bits of the first CSI component and the first number of zero padding bits, and the subset of entries corresponding to the second CSI component may include a number N2 of polar encoder entries, where N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

[0082] In some embodiments, the actual CSI payload size in bits may be the sum of the number of bits of the first CSI component and the number of bits of the second CSI component, and the second number of zero padding bits may be set to the difference between the maximum CSI payload size in bits and the actual CSI payload size in bits. For some embodiments, the first CSI component may include one or more of the following: a minimum number of PMI bits; a minimum number of CQI bits; a plurality of RI bits; a minimum number of LI bits; or a plurality of CRI bits. For some embodiments, the second CSI component may include one or more of the following: a remaining number of PMI bits; a remaining number of CQI bits; or a remaining number of LI bits.

[0083] In some embodiments, the first circuit 510 and / or the second circuit 520 may be implemented as separate circuits. In other embodiments, the first circuit 510 and / or the second circuit 520 may be combined and implemented together in a circuit without changing the essence of the embodiment.

[0084] Figure 6 A method for PDSCH start symbol determination of a UE according to some embodiments of the present disclosure is shown. Figure 7 A method for universally encoding CSI of a UE according to some embodiments of the present disclosure is shown. Figure 3 , methods that may be associated with UE 330 and hardware processing circuit 340 are discussed herein. Figure 6Method 600 and Figure 7 The actions in method 700 are shown in a particular order, but the order of the actions may be modified. Therefore, the illustrated embodiments may be performed in a different order, and some actions may be performed in parallel. According to some embodiments, Figure 6 and Figure 7 Some of the actions and / or operations listed in are optional. The numbering of the proposed actions is for clarity and is not intended to dictate the order in which the various actions must be performed. In addition, the operations from the various flows can be used in various combinations.

[0085] Furthermore, in some embodiments, the machine-readable storage medium may have executable instructions that, when executed, cause the UE 330 and / or the hardware processing circuit 340 to perform operations including: Figure 6 and Figure 7 Such machine-readable storage media may include any of a variety of size media, such as magnetic storage media (e.g., magnetic tapes or disks), optical storage media (e.g., optical disks), electronic storage media (e.g., conventional hard drives, solid-state disk drives, or flash memory-based storage media), or any other tangible storage media or non-transitory storage media.

[0086] In some embodiments, the apparatus may include a device for performing Figure 6 and Figure 7 The various actions and / or operations of the method.

[0087] return Figure 6 , various methods may be in accordance with various embodiments discussed herein. Method 600 may include determining 610, processing 615, and processing 620. Method 600 may also include processing 630.

[0088] In determining 610, a first parameter set and a second parameter set for establishing PDSCH resources may be determined. In process 615, a first portion of PDSCH transmissions from a first group of MIMO layers corresponding to a first MBSFN configuration based on the first parameter set may be processed. In process 620, a second portion of PDSCH transmissions from a second group of MIMO layers corresponding to a second MBSFN configuration based on a second parameter set may be processed.

[0089] In some implementations, in process 630, a configuration transmission carrying at least one of the first parameter set and the second parameter set may be processed.

[0090] For some embodiments, the scheduled DL subframes may be MBSFN subframes for the first parameter set and non-MBSFN subframes for the second parameter set. In some embodiments, the starting PDSCH OFDM symbol index for the PDSCH transmission may be the minimum of: two or the starting PDSCH symbol index of the first parameter set. For some embodiments, the starting PDSCH OFDM symbol index for the PDSCH transmission, the starting PDSCH symbol index of the first parameter set, and the starting PDSCH symbol index of the second parameter set may be the same value.

[0091] return Figure 7 , various methods may be in accordance with various embodiments discussed herein. Method 700 may include establishing 710, establishing 715, and encoding 720. Method 700 may also include calculating 730.

[0092] In establishing 710, a first CSI component of a CSI transmission payload may be established, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padding bits. In establishing 715, a second CSI component of the CSI transmission payload may be established, the second CSI component having a number of bits based on a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero-padding bits. In encoding 720, a polar-coded CSI transmission carrying the first number of zero-padding bits, the first CSI component, the second number of zero-padding bits, and the second CSI component may be encoded.

[0093] In some implementations, in calculation 730, the size in bits of the CSI transmission payload may be calculated.

[0094] For some embodiments, the first number of zero padding bits may be set to a difference between a mother code length in bits for the corresponding polar code and a maximum CSI payload size in bits. In some embodiments, encoding the polar coded CSI transmission may be performed by mapping the first CSI component to a set of most reliable entries in a subset of entries of the polar encoder corresponding to the first CSI component, and encoding the polar coded CSI transmission may also be performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of the polar encoder corresponding to the second CSI component.

[0095] For some embodiments, the subset of entries corresponding to the first CSI component may include a number N1 of polar encoder entries corresponding to the first decoded bits, where N1 is the sum of the number of bits of the first CSI component and the first number of zero padding bits, and the subset of entries corresponding to the second CSI component may include a number N2 of polar encoder entries, where N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

[0096] In some embodiments, the actual CSI payload size in bits may be the sum of the number of bits of the first CSI component and the number of bits of the second CSI component, and the second number of zero padding bits may be set to the difference between the maximum CSI payload size in bits and the actual CSI payload size in bits. For some embodiments, the first CSI component may include one or more of the following: a minimum number of PMI bits; a minimum number of CQI bits; a plurality of RI bits; a minimum number of LI bits; or a plurality of CRI bits. For some embodiments, the second CSI component may include one or more of the following: a remaining number of PMI bits; a remaining number of CQI bits; or a remaining number of LI bits.

[0097] Figure 8 Example components of devices according to some embodiments of the present disclosure are shown. In some embodiments, the device 800 may include an application circuit 802, a baseband circuit 804, a radio frequency (RF) circuit 806, a front-end module (FEM) circuit 808, one or more antennas 810, and a power management circuit (PMC) 812 (at least coupled together as shown). The components of the illustrated device 800 may be included in a UE or a RAN node. In some embodiments, the device 800 may include fewer elements (e.g., the RAN node cannot utilize the application circuit 802, but includes a processor / controller to process IP data received from the EPC). In some embodiments, the device 800 may include additional elements, such as a memory / storage device, a display, a camera, a sensor, or an input / output (I / O) interface. In other embodiments, the components described below may be included in more than one device (e.g., the circuit may be separately included in more than one device for a specific implementation of a cloud-RAN (C-RAN)).

[0098] The application circuit 802 may include one or more application processors. For example, the application circuit 802 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The processor may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). The processor may be coupled to or may include a memory / storage device, and may be configured to execute instructions stored in the memory / storage device to enable various applications or operating systems to run on the device 800. In some embodiments, the processor of the application circuit 802 may process IP data packets received from the EPC.

[0099] The baseband circuit 804 may include circuits such as, but not limited to, one or more single-core or multi-core processors. The baseband circuit 804 may include one or more baseband processors or control logic components to process baseband signals received from the receive signal path of the RF circuit 806 and generate baseband signals for the transmit signal path of the RF circuit 806. The baseband processing circuit 804 may interact with the application circuit 802 to generate and process baseband signals and control the operation of the RF circuit 806. For example, in some embodiments, the baseband circuit 804 may include a third generation (3G) baseband processor 804A, a fourth generation (4G) baseband processor 804B, a fifth generation (5G) baseband processor 804C, or other baseband processors 804D of other existing generations, generations under development or generations to be developed in the future (e.g., second generation (2G), sixth generation (6G), etc.). The baseband circuit 804 (e.g., one or more of the baseband processors 804A-D) may handle various radio control functions that can communicate with one or more radio networks via the RF circuit 806. In other embodiments, some or all of the functionality of the baseband processors 804A-D may be included in a module stored in the memory 804G and executed via the central processing unit (CPU) 804E. The radio control functions may include, but are not limited to, signal modulation / demodulation, encoding / decoding, radio frequency shifting, etc. In some embodiments, the modulation / demodulation circuitry of the baseband circuitry 804 may include fast Fourier transform (FFT), precoding, or constellation mapping / demapping functions. In some embodiments, the encoding / decoding circuitry of the baseband circuitry 804 may include convolution, tail-biting convolution, turbo, Viterbi, or low-density parity check (LDPC) encoder / decoder functions. The implementation of the modulation / demodulation and encoder / decoder functions is not limited to these examples, and may include other suitable functions in other embodiments.

[0100] In some embodiments, the baseband circuit 804 may include one or more audio digital signal processors (DSPs) 804F. The audio DSP 804F may include elements for compression / decompression and echo cancellation, and may include other suitable processing elements in other embodiments. In some embodiments, the components of the baseband circuit may be appropriately combined in a single chip, a single chipset, or disposed on the same circuit board. In some embodiments, some or all of the components of the baseband circuit 804 and the application circuit 802 may be implemented together, such as, for example, on a system on a chip (SOC).

[0101] In some embodiments, the baseband circuit 804 can provide communications compatible with one or more radio technologies. For example, in some embodiments, the baseband circuit 804 can support communications with an Evolved Universal Terrestrial Radio Access Network (EUTRAN) or other wireless metropolitan area network (WMAN), wireless local area network (WLAN), wireless personal area network (WPAN). Embodiments in which the baseband circuit 804 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuits.

[0102] The RF circuit 806 may enable modulated electromagnetic radiation to communicate with a wireless network through a non-solid medium. In various embodiments, the RF circuit 806 may include switches, filters, amplifiers, etc. to facilitate communication with the wireless network. The RF circuit 806 may include a receive signal path, which may include circuits for down-converting RF signals received from the FEM circuit 808 and providing baseband signals to the baseband circuit 804. The RF circuit 806 may also include a transmit signal path, which may include circuits for up-converting baseband signals provided by the baseband circuit 804 and providing an RF output signal for transmission to the FEM circuit 808.

[0103] In some embodiments, the receive signal path of the RF circuit 806 may include a mixer circuit 806A, an amplifier circuit 806B, and a filter circuit 806C. In some embodiments, the transmit signal path of the RF circuit 806 may include a filter circuit 806C and a mixer circuit 806A. The RF circuit 806 may also include a synthesizer circuit 806D for synthesizing the frequencies used by the mixer circuit 806A of the receive signal path and the transmit signal path. In some embodiments, the mixer circuit 806A of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 808 based on the synthesized frequency provided by the synthesizer circuit 806D. The amplifier circuit 806B may be configured to amplify the down-converted signal, and the filter circuit 806C may be a low pass filter (LPF) or a band pass filter (BPF) configured to remove unwanted signals from the down-converted signal to generate an output baseband signal. The output baseband signal may be provided to the baseband circuit 804 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, although this is not required.In some embodiments, mixer circuit 806A of the receive signal path may include a passive mixer, although the scope of the embodiments is not limited in this respect.

[0104] In some embodiments, mixer circuit 806A of the transmit signal path can be configured to up-convert an input baseband signal based on a synthesized frequency provided by synthesizer circuit 806D to generate an RF output signal for FEM circuit 808. The baseband signal can be provided by baseband circuit 804 and can be filtered by filter circuit 806C.

[0105] In some embodiments, the mixer circuit 806A of the receive signal path and the mixer circuit 806A of the transmit signal path may include two or more mixers and may be arranged for quadrature down-conversion and up-conversion, respectively. In some embodiments, the mixer circuit 806A of the receive signal path and the mixer circuit 806A of the transmit signal path may include two or more mixers and may be arranged for image suppression (e.g., Hartley image suppression). In some embodiments, the mixer circuit 806A of the receive signal path and the mixer circuit 806A of the transmit signal path may be arranged for direct down-conversion and direct up-conversion, respectively. In some embodiments, the mixer circuit 806A of the receive signal path and the mixer circuit 806A of the transmit signal path may be configured for superheterodyne operation.

[0106] In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, the RF circuit 806 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, and the baseband circuit 804 may include a digital baseband interface to communicate with the RF circuit 806.

[0107] In some dual-mode embodiments, separate radio IC circuits may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.

[0108] In some embodiments, synthesizer circuit 806D may be a fractional-N synthesizer or a fractional-N / N+1 synthesizer, but the scope of the embodiments is not limited in this respect, as other types of frequency synthesizers may also be suitable. For example, synthesizer circuit 806D may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase-locked loop with a frequency divider.

[0109] Synthesizer circuit 806D may be configured to synthesize an output frequency based on the frequency input and the divider control input for use by mixer circuit 806A of RF circuit 806. In some embodiments, synthesizer circuit 806D may be a fractional-N / N+1 synthesizer.

[0110] In some embodiments, the frequency input may be provided by a voltage controlled oscillator (VCO), although this is not required. The divider control input may be provided by the baseband circuit 804 or the application circuit 802 according to the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a lookup table based on the channel indicated by the application circuit 802.

[0111] The synthesizer circuit 806D of the RF circuit 806 may include a frequency divider, a delay locked loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the frequency divider may be a dual-mode frequency divider (DMD), and the phase accumulator may be a digital phase accumulator (DPA). In some embodiments, the DMD may be configured to divide the input signal by N or N+1 (e.g., based on carry) to provide a fractional division ratio. In some example embodiments, the DLL may include a cascaded, tunable, delay element, a phase detector, a charge pump, and a D-type flip-flop set. In these embodiments, the delay element may be configured to divide the VCO cycle into Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this way, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.

[0112] In some embodiments, the synthesizer circuit 806D can be configured to generate a carrier frequency as an output frequency, while in other embodiments, the output frequency can be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used with a quadrature generator and divider circuit to generate multiple signals with multiple different phases relative to each other at the carrier frequency. In some embodiments, the output frequency can be the LO frequency (fLO). In some embodiments, the RF circuit 806 can include an IQ / polarity converter.

[0113] The FEM circuitry 808 may include a receive signal path that may include circuitry configured to operate on RF signals received from one or more antennas 810, amplify the received signals, and provide an amplified version of the received signals to the RF circuitry 806 for further processing. The FEM circuitry 808 may also include a transmit signal path that may include circuitry configured to amplify transmit signals provided by the RF circuitry 806 for transmission via one or more of the one or more antennas 810. In various embodiments, amplification by either the transmit or receive signal path may be accomplished only in the RF circuitry 806, only in the FEM 808, or in both the RF circuitry 806 and the FEM 808.

[0114] In some embodiments, the FEM circuit 808 may include a TX / RX switch to switch between transmit mode and receive mode operation. The FEM circuit may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuit may include an LNA to amplify a received RF signal and provide the amplified received RF signal as an output (e.g., to the RF circuit 806). The transmit signal path of the FEM circuit 808 may include a power amplifier (PA) for amplifying an input RF signal (e.g., provided by the RF circuit 806); and one or more filters for generating an RF signal for subsequent transmission (e.g., through one or more of the one or more antennas 810).

[0115] In some embodiments, the PMC 812 can manage the power provided to the baseband circuit 804. Specifically, the PMC 812 can control power selection, voltage scaling, battery charging, or DC-DC conversion. When the device 800 is capable of being powered by a battery, for example, when the device is included in a UE, the PMC 812 can generally be included. The PMC 812 can improve power conversion efficiency while providing a desired specific implementation size and heat dissipation characteristics.

[0116] Although Figure 8 The PMC 812 is shown coupled only to the baseband circuit 804. However, in other embodiments, the PMC 812 may be additionally or alternatively coupled to other components (such as, but not limited to, the application circuit 802, the RF circuit 806, or the FEM 808) and perform similar power management operations.

[0117] In some embodiments, the PMC 812 may control or otherwise be part of various power saving mechanisms of the device 800. For example, if the device 800 is in an RRC connected state, where the device is still connected to a RAN node as expected to receive traffic for a short period of time, then after a period of inactivity, the device may enter a state known as discontinuous reception mode (DRX). During this state, the device 800 may be powered off for short time intervals, thereby saving power.

[0118] If there is no data communication activity for a long period of time, the device 800 can transition to the RRC idle state, in which the device is disconnected from the network and does not perform operations such as channel quality feedback, handover, etc. The device 800 enters a very low power state, and it performs paging, in which the device wakes up again periodically to listen to the network, and then enters low power again. The device 800 cannot receive data in this state, and in order to receive data, it must transition back to the RRC connected state.

[0119] An additional power saving mode can keep a device from using the network for longer than the paging interval (which can range from a few seconds to several hours). During this time, the device is completely unable to connect to the network and can be completely powered down. Any data sent during this time will be significantly delayed, and it is assumed that the delay is acceptable.

[0120] The processor of the application circuit 802 and the processor of the baseband circuit 804 can be used to execute elements of one or more instances of the protocol stack. For example, the processor of the baseband circuit 804 can be used alone or in combination to perform layer 3, layer 2, or layer 1 functions, while the processor of the application circuit 804 can utilize data received from these layers (e.g., packet data) and further perform layer 4 functions (e.g., transport communication protocol (TCP) and user datagram protocol (UDP) layers). As mentioned herein, layer 3 may include a radio resource control (RRC) layer, which will be described in further detail below. As mentioned herein, layer 2 may include a medium access control (MAC) layer, a radio link control (RLC) layer, and a packet data convergence protocol (PDCP) layer, which will be described in further detail below. As mentioned herein, layer 1 may include a physical (PHY) layer of a UE / RAN node, which will be described in further detail below.

[0121] Fig. 9 1 shows an example interface of a baseband circuit according to some embodiments of the present disclosure. As discussed above, Figure 8 The baseband circuit 804 may include processors 804A-804E and a memory 804G used by the processors. Each of the processors 804A-804E may include a memory interface 904A-904E for sending / receiving data to / from the memory 804G, respectively.

[0122] The baseband circuit 804 may also include: one or more interfaces to communicatively couple to other circuits / devices, such as a memory interface 912 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 804); an application circuit interface 914 (e.g., an interface for sending / receiving data to / from a memory external to the baseband circuit 804); Figure 8 RF circuit interface 916 (for example, for sending / receiving data to / from the application circuit 802); Figure 8 an interface for sending / receiving data to / from a RF circuit 806); a wireless hardware connection interface 918 (e.g., for sending / receiving data to / from a near field communication (NFC) component, Components (e.g. Low Energy), components and other communication components to send / receive data); and a power management interface 920 (for example, an interface for sending / receiving power or control signals to / from PMC812).

[0123] It should be noted that, in various embodiments, elements in any figure herein having figure numbers and / or names corresponding to figure numbers and / or names of any other figure herein may be operated or functioned in a manner similar to those corresponding elements of that other figure (but not limited to operating or functioning in this manner).

[0124] Reference in this specification to "an embodiment," "one embodiment," "some embodiments," or "other embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least some embodiments, but not necessarily all embodiments. The various appearances of "an embodiment," "one embodiment," or "some embodiments" do not necessarily all refer to the same embodiment. If the specification states that a component, feature, structure, or characteristic "may," "might," or "could" be included, that particular component, feature, structure, or characteristic need not be included. If the specification or claims refer to "an" or "an" element, this does not mean that there is only one element. If the specification or claims refer to "additional" elements, this does not exclude the presence of more than one additional element.

[0125] In addition, specific features, structures, functions or characteristics can be combined in any appropriate manner in one or more embodiments. For example, the first embodiment and the second embodiment can be combined in any case where the specific features, structures, functions or characteristics associated with the two embodiments are not mutually exclusive.

[0126] Although the present disclosure has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of such embodiments will be apparent to those of ordinary skill in the art from the above description. For example, other memory architectures such as dynamic RAM (DRAM) may use the embodiments discussed. The embodiments of the present disclosure are intended to encompass all such alternatives, modifications, and variations to fall within the broad scope of the appended claims.

[0127] In addition, for ease of description and discussion, and without obscuring the present disclosure, the well-known power / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the given figure. In addition, the arrangement can be shown in block diagram form to avoid obscuring the present disclosure, and also taking into account the fact that the details of the specific implementation of such block diagram arrangements are highly dependent on the platform in which the present disclosure will be implemented (that is, such details should be completely within the scope of those skilled in the art). In the case of elaborating specific details (e.g., circuits) for describing exemplary embodiments of the present disclosure, it should be apparent to those skilled in the art that the present disclosure can be practiced without these specific details or with variations of these specific details. Therefore, the description is to be regarded as exemplary and not restrictive.

[0128] The following examples relate to additional embodiments. The specific details in the examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented relative to the method or process.

[0129] Embodiment 1 provides a device of a user equipment (UE) operable to communicate with an evolved Node B (eNB) on a wireless network, the device comprising: one or more processors, the one or more processors being used to: determine a first parameter set and a second parameter set for establishing a physical downlink shared channel (PDSCH) resource; process a first part of a PDSCH transmission from a first group of multiple-input multiple-output (MIMO) layers corresponding to a first multimedia broadcast single frequency network (MBSFN) configuration based on the first parameter set; and process a second part of a PDSCH transmission from a second group of MIMO layers corresponding to a second MBSFN configuration based on a second parameter set, and an interface for receiving the PDSCH transmission from a receiving circuit.

[0130] In embodiment 2, according to the apparatus of embodiment 1, the one or more processors are used to: process a configuration transmission carrying at least one of the first parameter set and the second parameter set.

[0131] In embodiment 3, the apparatus according to any one of embodiments 1 to 2, wherein the scheduled downlink (DL) subframes are MBSFN subframes for the first parameter set and non-MBSFN subframes for the second parameter set.

[0132] In embodiment 4, according to the device described in any one of embodiments 1 to 3, the starting PDSCH orthogonal frequency division multiplexing (OFDM) symbol index of the PDSCH transmission is the minimum of the following values: two; or the starting PDSCH symbol index of the first parameter set.

[0133] In embodiment 5, the device is according to any one of embodiments 1 to 4, wherein the starting PDSCH orthogonal frequency division multiplexing (OFDM) symbol index of the PDSCH transmission, the starting PDSCH symbol index of the first parameter set and the starting PDSCH symbol index of the second parameter set are the same value.

[0134] Embodiment 6 provides a user equipment (UE) device, which includes an application processor, a memory, one or more antennas, a wireless interface for allowing the application processor to communicate with another device, and a touch screen display, and the UE device includes any one of the apparatuses described in Embodiments 1 to 5.

[0135] In embodiment 7, a machine-readable storage medium having machine-executable instructions is provided, which, when executed, enables one or more processors of a user equipment (UE) to operate to communicate with an evolved Node B (eNB) on a wireless network to perform the following operations, the operations including: determining a first parameter set and a second parameter set for establishing a physical downlink shared channel (PDSCH) resource; processing a first part of a PDSCH transmission from a first group of multiple-input multiple-output (MIMO) layers corresponding to a first multimedia broadcast single frequency network (MBSFN) configuration based on the first parameter set; and processing a second part of a PDSCH transmission from a second group of MIMO layers corresponding to a second MBSFN configuration based on a second parameter set.

[0136] In embodiment 8, according to the machine-readable storage medium of embodiment 7, the operation includes: processing a configuration transmission carrying at least one of the first parameter set and the second parameter set.

[0137] In embodiment 9, the machine-readable storage medium of any one of embodiments 7 to 8, wherein the scheduled downlink (DL) subframes are MBSFN subframes for the first parameter set and non-MBSFN subframes for the second parameter set.

[0138] In embodiment 10, a machine-readable storage medium according to any one of embodiments 7 to 9, wherein the starting PDSCH orthogonal frequency division multiplexing (OFDM) symbol index of the PDSCH transmission is the minimum of the following values: two; or the starting PDSCH symbol index of the first parameter set.

[0139] In embodiment 11, a machine-readable storage medium according to any one of embodiments 7 to 10, wherein the starting PDSCH orthogonal frequency division multiplexing (OFDM) symbol index of the PDSCH transmission, the starting PDSCH symbol index of the first parameter set, and the starting PDSCH symbol index of the second parameter set are the same value.

[0140] Embodiment 12 provides an apparatus of a user equipment (UE) operable to communicate with an evolved Node B (eNB) on a wireless network, the apparatus comprising: one or more processors, the one or more processors being used to: establish a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero padding bits; establish a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero padding bits; and encode a polarization-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component, and an interface for sending the polarization-coded CSI transmission to a transmission circuit.

[0141] In embodiment 13, the apparatus according to embodiment 12, wherein the one or more processors are used to: calculate the size of the CSI transmission payload in bits.

[0142] In embodiment 14, the apparatus according to embodiment 13, wherein the first number of zero padding bits is set to a difference between a mother code length in bits of the corresponding polar code and a maximum CSI payload size in bits.

[0143] In embodiment 15, the apparatus of embodiment 12, wherein encoding the polar coded CSI transmission is performed by mapping a first CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to the first CSI component; wherein the encoding of the polar coded CSI transmission is performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to the second CSI component.

[0144] In embodiment 16, the apparatus according to embodiment 15, wherein the subgroup of entries corresponding to the first CSI component includes a number N1 polar encoder entries corresponding to the first decoded bits, N1 being the sum of the number of bits of the first CSI component and the first number of zero padding bits; and wherein the subgroup of entries corresponding to the second CSI component includes a number N2 polar encoder entries, N2 being the sum of the number of bits of the second CSI component and the second number of zero padding bits.

[0145] In embodiment 17, the apparatus according to embodiment 14, wherein the actual CSI payload size in bits is the sum of the number of bits of the first CSI component and the number of bits of the second CSI component; and wherein the second number of zero padding bits can be set to the difference between the maximum CSI payload size in bits and the actual CSI payload size in bits.

[0146] In embodiment 18, an apparatus according to any one of embodiments 12 to 17, wherein the first CSI component includes one or more of the following items: a minimum number of precoding matrix indication (PMI) bits; a minimum number of channel quality indicator (CQI) bits; multiple rank indication (RI) bits; a minimum number of layer indicator (LI) bits; or multiple channel state information reference signal (CSI-RS) resource index (CRI) bits.

[0147] In embodiment 19, the apparatus of embodiment 18, wherein the second CSI component comprises one or more of: a remaining number of PMI bits; a remaining number of CQI bits; or a remaining number of LI bits.

[0148] Embodiment 20 provides a user equipment (UE) device comprising an application processor, a memory, one or more antennas, a wireless interface for allowing the application processor to communicate with another device, and a touch screen display, the UE device comprising the apparatus described in any one of embodiments 12 to 19.

[0149] Embodiment 21 provides a machine-readable storage medium having machine-executable instructions, which when executed enable one or more processors of a user equipment (UE) to be operable to communicate with an evolved Node B (eNB) on a wireless network to perform the following operations, the operations comprising: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero padding bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size in bits of the CSI transmission payload, and the second CSI component corresponding to a second number of zero padding bits; and encoding a polarization-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component.

[0150] In embodiment 22, according to the machine-readable storage medium of embodiment 21, the operation includes: calculating the size of the CSI transmission payload in bits.

[0151] In embodiment 23, the machine-readable storage medium according to embodiment 22, wherein the first number of zero padding bits is set to a difference between a mother code length in bits of the corresponding polar code and a maximum CSI payload size in bits.

[0152] In embodiment 24, according to the machine-readable storage medium of embodiment 21, the encoding of the polar coded CSI transmission is performed by mapping the first CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to the first CSI component; wherein the encoding of the polar coded CSI transmission is performed by mapping the second CSI component to a set of most reliable entries in the subset of entries of the polar encoder corresponding to the second CSI component.

[0153] In embodiment 25, according to the machine-readable storage medium of embodiment 24, the entry subgroup corresponding to the first CSI component includes a number N1 polar encoder entries 1 corresponding to the first decoding bit, N1 is the sum of the number of bits of the first CSI component and the first number of zero padding bits; wherein the entry subgroup corresponding to the second CSI component includes a number N2 polar encoder entries, N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

[0154] In embodiment 26, a machine-readable storage medium according to embodiment 23, wherein the actual CSI payload size in bits is the sum of the number of bits of the first CSI component and the number of bits of the second CSI component; and wherein the second number of zero padding bits can be set to the difference between the maximum CSI payload size in bits and the actual CSI payload size in bits.

[0155] In embodiment 27, a machine-readable storage medium according to any one of embodiments 21 to 26, wherein the first CSI component includes one or more of the following items: a minimum number of precoding matrix indication (PMI) bits; a minimum number of channel quality indicator (CQI) bits; multiple rank indication (RI) bits; a minimum number of layer indicator (LI) bits; or multiple channel state information reference signal (CSI-RS) resource index (CRI) bits.

[0156] In embodiment 28, the machine-readable storage medium of embodiment 27, wherein the second CSI component comprises one or more of: a remaining number of PMI bits; a remaining number of CQI bits; or a remaining number of LI bits.

[0157] In embodiment 29, the apparatus according to any one of embodiments 1 to 5 and 12 to 19, wherein the one or more processors include a baseband processor.

[0158] In embodiment 30, the apparatus according to any one of embodiments 1 to 5 and 12 to 19 includes a memory for storing instructions, the memory coupled to one or more processors.

[0159] In embodiment 31, the apparatus of any one of embodiments 1 to 5 and 12 to 19 comprises a transceiver circuit for performing at least one of the following operations: generating a transmission, encoding a transmission, processing a transmission, or decoding a transmission.

[0160] In embodiment 32, the apparatus of any one of embodiments 1 to 5 and 12 to 19 includes a transceiver circuit for generating transmissions and processing transmissions.

[0161] The present invention provides an abstract that will allow the reader to ascertain the essence and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The following claims are hereby incorporated into the detailed description, with each claim standing on its own as a separate embodiment.

Claims

1. A user equipment (UE) operable to communicate with a base station on a wireless network, comprising: One or more processors configured to: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padded bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a number of bits based on a total size in bits of the CSI transmission payload and corresponding to a second number of zero padding bits; as well as encoding a polar-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component, and An interface is used to send the polarization-coded CSI transmission to a transmission circuit.

2. The UE according to claim 1, wherein: The one or more processors are configured to: The total size in bits of the CSI transmission payload is calculated.

3. The UE according to claim 2, wherein the first number of zero padding bits is set to a difference between a mother code length in bits of a corresponding polar code and a maximum CSI payload size in bits.

4. The UE according to claim 1, wherein said encoding of said polar coded CSI transmission is performed by mapping said first CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to said first CSI component; Wherein the encoding of the polar-coded CSI transmission is performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of another polar encoder corresponding to the second CSI component.

5. The UE according to claim 4, wherein the subset of entries corresponding to the first CSI component includes a number N1 of polar encoder entries corresponding to first decoded bits, N1 being the sum of the number of bits of the first CSI component and the first number of zero padding bits; The entry subset corresponding to the second CSI component includes N2 polar encoder entries, where N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

6. The UE according to claim 3, wherein the actual CSI payload size in bits is the sum of the number of bits of the first CSI component and the number of bits of the second CSI component; and Wherein the second number of zero padding bits is set to a difference between the maximum CSI payload size in bits and the actual CSI payload size in bits.

7. A UE according to claim 1, wherein the first CSI component includes one or more of the following items: a minimum number of precoding matrix indication (PMI) bits; a minimum number of channel quality indicator (CQI) bits; multiple rank indication (RI) bits; a minimum number of layer indicator (LI) bits; or multiple channel state information reference signal (CSI-RS) resource index (CRI) bits.

8. One or more non-transitory machine-readable storage media having machine-executable instructions that, when executed, cause one or more processors of a user equipment (UE) to be operable to communicate with a base station on a wireless network to perform operations comprising: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padded bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a plurality of bits based on a total size in bits of the CSI transmission payload and corresponding to a second number of zero padding bits; and A polar-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component is encoded.

9. The one or more non-transitory machine-readable storage media of claim 8, wherein the operations comprise: The total size in bits of the CSI transmission payload is calculated.

10. One or more non-transitory machine-readable storage media according to claim 9, The first number of zero padding bits is set to a difference between a mother code length in bits of the corresponding polar code and a maximum CSI payload size in bits.

11. One or more non-transitory machine-readable storage media according to claim 8, wherein said encoding of said polar coded CSI transmission is performed by mapping said first CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to said first CSI component; Wherein the encoding of the polar-coded CSI transmission is performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of another polar encoder corresponding to the second CSI component.

12. One or more non-transitory machine-readable storage media according to claim 11, wherein the subset of entries corresponding to the first CSI component includes a number N1 of polar encoder entries corresponding to first decoded bits, N1 being the sum of the number of bits of the first CSI component and the first number of zero padding bits; The entry subset corresponding to the second CSI component includes N2 polar encoder entries, where N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

13. One or more non-transitory machine-readable storage media according to claim 10, wherein the actual CSI payload size in bits is the sum of the number of bits of the first CSI component and the number of bits of the second CSI component; and Wherein the second number of zero padding bits is set to a difference between the maximum CSI payload size in bits and the actual CSI payload size in bits.

14. One or more non-transitory machine-readable storage media according to claim 8, The first CSI component includes one or more of the following items: a minimum number of precoding matrix indication (PMI) bits; a minimum number of channel quality indicator (CQI) bits; multiple rank indication (RI) bits; a minimum number of layer indicator (LI) bits; or multiple channel state information reference signal (CSI-RS) resource index (CRI) bits.

15. A method performed by a user equipment (UE), comprising: establishing a first channel state information (CSI) component of a CSI transmission payload, the first CSI component having a predetermined number of bits, and the first CSI component corresponding to a first number of zero-padded bits; establishing a second CSI component of the CSI transmission payload, the second CSI component having a number of bits based on a total size in bits of the CSI transmission payload and corresponding to a second number of zero padding bits; as well as A polar-coded CSI transmission carrying the first number of zero padding bits, the first CSI component, the second number of zero padding bits, and the second CSI component is encoded.

16. The method according to claim 15, further comprising: The total size in bits of the CSI transmission payload is calculated.

17. The method of claim 16, wherein the first number of zero padding bits is set to a difference between a mother code length in bits of a corresponding polar code and a maximum CSI payload size in bits.

18. The method according to claim 15, wherein said encoding of said polar coded CSI transmission is performed by mapping said first CSI component to a set of most reliable entries in a subset of entries of a polar encoder corresponding to said first CSI component; Wherein the encoding of the polar-coded CSI transmission is performed by mapping the second CSI component to a set of most reliable entries in a subset of entries of another polar encoder corresponding to the second CSI component.

19. The method according to claim 18, wherein the subset of entries corresponding to the first CSI component includes a number N1 of polar encoder entries corresponding to first decoded bits, N1 being the sum of the number of bits of the first CSI component and the first number of zero padding bits; The entry subset corresponding to the second CSI component includes N2 polar encoder entries, where N2 is the sum of the number of bits of the second CSI component and the second number of zero padding bits.

20. The method according to claim 17, wherein the actual CSI payload size in bits is the sum of the number of bits of the first CSI component and the number of bits of the second CSI component; and Wherein the second number of zero padding bits is set to a difference between the maximum CSI payload size in bits and the actual CSI payload size in bits.

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