Method of equalizing a signal and equalizer

Abstract

An equalizer includes a graphic equalizer circuit, a first multiplication circuit, a second multiplication circuit, a summing circuit, and a gain control circuit. The graphic equalizer circuit processes a first input signal and outputs a first output signal and a second output signal. The first multiplication circuit multiplies the first output signal by one of an adjustable gain value and a fixed gain value to produce a first adjusted output signal. The second multiplication circuit multiplies the second output signal by the other of the adjustable gain value and the fixed gain value to produce a second adjusted output signal. The summing circuit combines the first adjusted output signal and the second adjusted output signal to produce an equalizer output signal. The gain control circuit dynamically adjusts the adjustable gain value based on the equalizer output signal.

Description

Technical Field

[0001] This invention relates to equalizer design, and more particularly to a method for dynamically adjusting an adjustable gain value to equalize an input signal to generate an equalizer output signal, and a related leveling equalizer. Background Technology

[0002] As the volume of a playback device (such as speakers or headphones) gradually decreases, human hearing becomes less sensitive to low frequencies (e.g., below 1 kHz) or high frequencies (e.g., above 7 kHz). Therefore, when a user listens to music at low volume late at night, they will not be able to clearly distinguish between low and high frequency sound components, thus reducing listening quality. To allow users to listen to music at various volume levels with a perceived flat frequency response, an optimized equalizer is needed that adjusts gain according to the volume in the low or high frequency bands and has a flat frequency response. Summary of the Invention

[0003] Therefore, one of the objectives of this invention is to provide a method for dynamically adjusting an adjustable gain value to equalize an input signal to generate an equalizer output signal, and a related leveling equalizer, to solve the above-mentioned problems.

[0004] According to an embodiment of the present invention, a leveling equalizer is disclosed. The leveling equalizer may include a graphic equalizer circuit, a first multiplication circuit, a second multiplication circuit, an adder circuit, and a gain control circuit. The graphic equalizer circuit is used to process a first input signal and output a first output signal and a second output signal. The first multiplication circuit is coupled to the graphic equalizer circuit and is used to multiply the first output signal by one of an adjustable gain value and a fixed gain value to generate a first adjusted output signal. The second multiplication circuit is coupled to the graphic equalizer circuit and is used to multiply the second output signal by the other of the adjustable gain value and the fixed gain value to generate a second adjusted output signal. The adder circuit is coupled to the first multiplication circuit and the second multiplication circuit and is used to combine the first adjusted output signal and the second adjusted output signal to generate an equalizer output signal. The gain control circuit is coupled to one of the first multiplication circuit and the second multiplication circuit and the adder circuit, and is used to dynamically adjust the adjustable gain value according to the equalizer output signal.

[0005] According to embodiments of the present invention, a method for dynamically adjusting an adjustable gain value to equalize a first input signal to generate an equalizer output signal is disclosed. The method may include: performing graphic equalization on the first input signal to generate and output a first output signal and a second output signal; multiplying the first output signal by one of an adjustable gain value and a fixed gain value to generate a first adjusted output signal; multiplying the second output signal by the other of the adjustable gain value and the fixed gain value to generate a second adjusted output signal; combining the first adjusted output signal and the second adjusted output signal to generate the equalizer output signal; and dynamically adjusting the adjustable gain value based on the equalizer output signal.

[0006] As the volume of a playback device (such as a speaker or headphones) gradually decreases, the sensitivity of human hearing to frequency bands below 1 kHz or above 7 kHz becomes increasingly lower. However, the equalizer of the present invention can be used to compensate for the auditory characteristics at both ends (i.e., frequency bands below 1 kHz or above 7 kHz) to improve the above-mentioned problem. Therefore, even if the volume received by the human ear is very small, the human ear can hear a flat frequency response and clearly hear low-frequency and high-frequency sound components through the equalizer of the present invention. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of a leveling equalizer according to an embodiment of the present invention.

[0008] Figure 2 This is a schematic diagram of a graphic equalizer circuit according to an embodiment of the present invention.

[0009] Figure 3 This is a schematic diagram of a gain control circuit according to an embodiment of the present invention.

[0010] Figure 4 According to embodiments of the present invention Figure 1 The diagram shows different gain settings for the leveling equalizer under different adjustable gain values.

[0011] Figure 5 This is a flowchart of a method for dynamically adjusting an adjustable gain value to equalize an input signal, according to an embodiment of the present invention. Detailed Implementation

[0012] Figure 1This is a schematic diagram of a leveling equalizer 100 according to an embodiment of the present invention. The leveling equalizer 100 may include a graphic equalizer circuit 10, multiple multiplication circuits 12 and 14, an adder circuit 16, and a gain control circuit 18. The graphic equalizer circuit 10 can be used to process the first input signal A_IN in a graphic equalization manner to divide the frequency band of the first input signal A_IN into two frequency bands (i.e., a high-frequency band and a low-frequency band) to provide respective frequency response compensation, and output a first output signal A_OUT_1 and a second output signal A_OUT_2, wherein the frequency band of the first output signal A_OUT_1 and the frequency band of the second output signal A_OUT_2 are the low-frequency band and the high-frequency band, respectively.

[0013] The multiplication circuit 12 can be coupled to the graphic equalizer circuit 10 and can be used to multiply the first output signal A_OUT_1 with one of the adjustable gain value AG and the fixed gain value FG to generate the first adjusted output signal AD_OUT_1. Multiplication circuit 14 can be coupled to graphic equalizer circuit 10 and can be used to multiply the second output signal A_OUT_2 with the adjustable gain value AG and the fixed gain value FG to generate the second adjusted output signal AD_OUT_2. For example, the fixed gain value is 1 (that is, if the second output signal A_OUT_2 is multiplied by the fixed gain value, the gain value of the second adjusted output signal AD_OUT_2 remains unchanged). In this embodiment, leveling equalizer 100 has an adjustable gain value AG applied to multiplication circuit 12 and a fixed gain value FG applied to multiplication circuit 14. Due to the fixed gain value FG, the gain value of the second output signal A_OUT_2 is equal to the gain value of the second adjusted output signal AD_OUT_2. On the other hand, due to the adjustable gain value AG, the gain value of the first output signal A_OUT_1 and the gain value of the first adjusted output signal AD_OUT_1 are not necessarily the same.

[0014] Adder circuit 16 can be coupled to multiplier circuit 12 and multiplier circuit 14, and can be used to combine the first adjustment output signal AD_OUT_1 and the second adjustment output signal AD_OUT_2 to generate equalizer output signal EQ_OUT (i.e., EQ_OUT = AD_OUT_1 + AD_OUT_2). Gain control circuit 18 can be coupled to one of multiplier circuit 12 and multiplier circuit 14 and adder circuit 16, and can be used to dynamically adjust the adjustable gain value AG according to the equalizer output signal EQ_OUT. In this embodiment, leveling equalizer 100 has gain control circuit 18 coupled to adder circuit 16 and multiplier circuit 12.

[0015] For the sake of simplicity, it is assumed that the first output signal A_OUT_1 is multiplied by the adjustable gain value AG, the second output signal A_OUT_2 is multiplied by the fixed gain value FG, and the gain control circuit 18 is coupled to the adder circuit 16 and the multiplier circuit 12. However, this is only for illustrative purposes and the invention is not limited thereto. In some embodiments, the leveling equalizer 100 may be adjusted to have a first output signal A_OUT_1 multiplied by the fixed gain value FG, a second output signal A_OUT_2 multiplied by the adjustable gain value AG, and a gain control circuit 18 coupled to the adder circuit 16 and the multiplier circuit 14, wherein the frequency bands of the first output signal A_OUT_1 and the second output signal A_OUT_2 are the low-frequency band and the high-frequency band, respectively.

[0016] Figure 2 This is a schematic diagram of a graphic equalizer circuit 200 according to an embodiment of the present invention. Figure 1 The graphic equalizer circuit 10 in the leveling equalizer 100 shown can utilize Figure 2 The graphic equalizer circuit 200 shown is used to implement this, as follows: Figure 2 As shown, the graphic equalizer circuit 200 may include multiple filters 20 and 22, an adder circuit 24, a subtractor circuit 26, and an attenuator circuit 28 (labeled "Att" for simplicity). Filter 20 can be used to generate a first filtered signal F_OUT_1 based on a second input signal AD_IN obtained from a first input signal A_IN. Filter 22 can be used to generate a second filtered signal F_OUT_2 based on the second input signal AD_IN. The adder circuit 24 can be coupled to filters 20 and 22 and is used to combine the first filtered signal F_OUT_1 and the second filtered signal F_OUT_2. The first output signal A_OUT_1 is obtained from the output of the adder circuit 24, and the first output signal A_OUT_1 is a low-pass filtered signal. Subtraction circuit 26 can be coupled to filter 20 and filter 22, and is used to subtract second filter signal F_OUT_2 from first filter signal F_OUT_1, wherein the second output signal A_OUT_2 is obtained from an output of subtraction circuit 26, and the second output signal A_OUT_2 is a high-pass filtered signal. Attenuator circuit 28 can be coupled to filter 20 and filter 22, and can be used to attenuate first input signal A_IN (e.g., attenuate first input signal A_IN by half) to generate second input signal AD_IN (i.e., AD_IN = (1 / 2) * A_IN).

[0017] In this embodiment, filters 20 and 22 can be all-pass filters, Linkwitz filters, or other filters capable of frequency division. Furthermore, the first input signal A_IN is divided into a low-pass filtered signal (i.e., the first output signal A_OUT_1) and a high-pass filtered signal (i.e., the second output signal A_OUT_2). For example, the low-pass filtered signal is obtained by combining the first filtered signal F_OUT_1 and the second filtered signal F_OUT_2 through the adder circuit 24, and then dividing by 2 through the attenuator circuit 28 (i.e.,...). The high-pass filtered signal is obtained by subtracting the second filtered signal F_OUT_2 from the first filtered signal F_OUT_1 using the subtraction circuit 26, and then dividing by 2 using the attenuator circuit 28 (i.e., ...). However, the invention is not limited thereto. For example, in some embodiments, attenuator circuit 28 can be replaced by two attenuator circuits respectively coupled after adder circuit 24 and subtractor circuit 26, wherein the second input signal AD_IN is the same as the first input signal A_IN, and the equalization results (A_OUT_1 and A_OUT_2) produced by the modified graphic equalizer circuit (which couples two attenuator circuits after adder circuit 24 and subtractor circuit 26) are substantially the same as the equalization results produced by the original graphic equalizer circuit 200 (which couples a single attenuator circuit 28 before filter 20 and filter 22). These alternative designs all fall within the scope of the invention.

[0018] Figure 3 This is a schematic diagram of a gain control circuit 300 according to an embodiment of the present invention. Figure 1 The gain control circuit 18 in the leveling equalizer 100 shown can utilize Figure 3 The gain control circuit 300 shown is used to achieve this, such as Figure 3As shown, the gain control circuit 300 may include an energy detection circuit 30 and an adjustable gain value generator 32. The energy detection circuit 30 can be used to measure a peak energy PE of the equalizer output signal EQ_OUT. The adjustable gain value generator 32 can be coupled to the energy detection circuit 30 and can be used to dynamically adjust the adjustable gain value AG according to the peak energy PE of the equalizer output signal EQ_OUT. In this embodiment, the energy detection circuit 30 may include an absolute value circuit 34 and an alpha filter 36. The absolute value circuit 34 can be used to generate the absolute value AV of the equalizer output signal EQ_OUT by performing an absolute value calculation on the equalizer output signal EQ_OUT. The alpha filter 36 can be coupled to the absolute value circuit 34 and the adjustable gain value generator 32 and can be used to generate the peak energy PE according to the absolute value calculation result (i.e., the absolute value AV), and transmit the peak energy PE to the adjustable gain value generator 32. For example, the alpha filter 36 can be a second-order alpha filter, and the coefficients of the second-order alpha filter are powers of 2 (i.e.,... …etc.), but the invention is not limited thereto.

[0019] To directly control the adjustable gain value AG through slope adjustment to dynamically adjust the adjustable gain value AG based on the peak energy PE of the equalizer output signal EQ_OUT, the adjustable gain value generator 32 employs attack control and release control. When the peak energy PE is less than the threshold value TH, the release control can be used to release the equalizer output signal EQ_OUT; conversely, when the peak energy PE is not less than the threshold TH, the attack control can be used to suppress the equalizer output signal EQ_OUT. Therefore, the adjustable gain value generator 32 can also receive a reference threshold RTH, an attack rate setting AR, and a release rate setting RR. The threshold TH used internally by the adjustable gain value generator 32 is obtained by multiplying the reference threshold RTH by a predetermined coefficient (e.g., TH = RTH * 0.635, where 0.635 is the predetermined coefficient), and the attack rate setting AR can be greater than the release rate setting RR. After receiving the peak energy PE from the alpha filter 36, the adjustable gain generator 32 can compare the peak energy PE with the threshold TH. If the peak energy PE is less than the threshold TH (i.e., within the release control range), the adjustable gain generator 32 can control the adjustable gain value AG by adjusting the slope specified by the release rate setting RR. If the peak energy PE is not less than the threshold TH (i.e., within the attack control range), the adjustable gain generator 32 can control the adjustable gain value AG by adjusting the slope specified by the attack rate setting AR.

[0020] It should be noted that the gain control circuit 300 is only an example of the implementation of the gain control circuit 18 in the leveling equalizer 100. In fact, any circuit architecture that can dynamically adjust the adjustable gain value AG according to the equalizer output signal EQ_OUT can be used by the gain control circuit 18, and these alternative designs all fall within the scope of this invention.

[0021] Figure 4 According to embodiments of the present invention Figure 1 The diagram shows different gain values ​​set in the equalizer 100 under different adjustable gain values ​​AG. Assume... Figure 1 The graphic equalizer circuit 10 in the leveling equalizer 100 shown utilizes... Figure 2 The graphic equalizer circuit 200 shown is used to implement this. Filters 20 and 22 are configured as first-order full-pass filters and second-order full-pass filters, respectively. In addition, the first output signal A_OUT_1 (e.g., a low-pass filtered signal) is multiplied by an adjustable gain value AG (that is, the gain value of the first output signal A_OUT_1 is dynamically adjusted by the adjustable gain value AG), and the second output signal A_OUT_2 (e.g., a high-pass filtered signal) is multiplied by a fixed gain value FG (that is, the gain value of the second output signal A_OUT_2 is fixed to 1).

[0022] like Figure 4 As shown, the adjustable gain value AG is directly controlled by slope adjustment to obtain 64 frequency response curves. The number of frequency response curves can be determined according to the accuracy. In this embodiment, 64 frequency response curves are only used as an example and the invention is not limited thereto. The gain control range of the present invention is basically unlimited, that is, the gain control range of the gain value of the first output signal A_OUT_1 is not limited by the selection of multiple filters 20 and 22.

[0023] In this embodiment, Figure 4All response curves are smooth, exhibiting minimal signal and power variations when using the equalizer 100. Furthermore, the equalizer 100 of this invention covers a wide frequency range (approximately from 0 Hz to 8000 Hz). As the volume of a playback device (e.g., a speaker or headphones) gradually decreases, human hearing becomes less sensitive to frequencies below 1 kHz or above 7 kHz. The equalizer 100 of this invention can compensate for these differences in auditory characteristics at both ends (i.e., frequencies below 1 kHz or above 7 kHz). Therefore, even at low volumes, the equalizer 100 allows the human ear to hear a flat frequency response and clearly perceive both low and high frequency components. However, when the first input signal A_IN is the out-of-band signal of the equalizer 100... When the frequency of the first input signal A_IN is 9000 Hz, the equalizer output signal EQ_OUT is the same as the first input signal A_IN (that is, the equalizer 100 of the present invention will not dynamically adjust the adjustable gain value AG to equalize the first input signal A_IN).

[0024] Figure 5 This is a flowchart illustrating a method for dynamically adjusting an adjustable gain value AG to equalize an input signal, according to an embodiment of the present invention. The steps do not necessarily need to be strictly followed if the same result can be obtained. Figure 5 The process shown will be executed sequentially. For example... Figure 5 The method shown can be derived from Figure 1 The leveling equalizer 100 shown is used to achieve this.

[0025] In step S60, the first input signal A_IN is attenuated to generate the second input signal AD_IN.

[0026] In step S62, the first filtered signal F_OUT_1 is generated based on the second input signal AD_IN.

[0027] In step S64, the second filter signal F_OUT_2 is generated based on the second input signal AD_IN.

[0028] In step S66, the first filtered signal F_OUT_1 and the second filtered signal F_OUT_2 are combined to obtain the first output signal A_OUT_1.

[0029] In step S68, the second output signal A_OUT_2 is obtained by subtracting the second filter signal F_OUT_2 from the first filter signal F_OUT_1.

[0030] In step S70, the first output signal A_OUT_1 is multiplied by one of the adjustable gain value AG and the fixed gain value FG to generate the first adjusted output signal AD_OUT_1.

[0031] In step S72, the second output signal A_OUT_2 is multiplied by another of the adjustable gain value AG and the fixed gain value FG to generate the second adjusted output signal AD_OUT_2.

[0032] In step S74, the first adjustment output signal AD_OUT_1 and the second adjustment output signal AD_OUT_2 are combined to generate the equalizer output signal EQ_OUT.

[0033] In step S76, the adjustable gain value AG is dynamically adjusted based on the equalizer output signal EQ_OUT.

[0034] Because those skilled in the art can access relevant information Figure 1 The instructions for the leveling equalizer 100 can be easily understood. Figure 5 For the sake of simplicity, the operations shown in each step will not be repeated in this embodiment.

[0035] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

[0036] [Symbol Explanation]

[0037] 100: Leveling Equalizer

[0038] 10,200: Graphic equalizer circuit

[0039] 12, 14: Multiplication Circuit

[0040] 16,24: Adder circuit

[0041] 18,300: Gain control circuit

[0042] AG: Adjustable gain value

[0043] FG: Fixed gain value

[0044] A_IN: First input signal

[0045] A_OUT_1: First output signal

[0046] A_OUT_2: Second output signal

[0047] AD_OUT_1: First adjustment output signal

[0048] AD_OUT_2: Second adjustment output signal

[0049] EQ_OUT: Equalizer output signal

[0050] 20, 22: Filters

[0051] 26: Subtraction Circuit

[0052] 28: Attenuator Circuit

[0053] AD_IN: Second input signal

[0054] F_OUT_1: First filtered signal

[0055] F_OUT_2: Second filtered signal

[0056] 30: Energy detection circuit

[0057] 32: Adjustable gain generator

[0058] 34: Absolute value circuits

[0059] 36: Alpha Filter

[0060] AV: Absolute Value

[0061] PE: Peak Energy

[0062] TH: Threshold

[0063] RTH: Reference Threshold

[0064] AR: Attack Rate Settings

[0065] RR: Release rate setting

[0066] S60~S76: Steps

Claims

1. A leveling equalizer, comprising: A graphic equalizer circuit is used to process a first input signal and output a first output signal and a second output signal; A first multiplication circuit is coupled to the graphic equalizer circuit and is used to multiply the first output signal by one of an adjustable gain value and a fixed gain value to generate a first adjusted output signal. The second multiplication circuit is coupled to the graphic equalizer circuit and is used to multiply the second output signal by the adjustable gain value and another of the fixed gain value to generate a second adjusted output signal. An adder circuit, coupled to the first multiplier circuit and the second multiplier circuit, is used to combine the first adjustment output signal and the second adjustment output signal to generate an equalizer output signal. as well as A gain control circuit, coupled to one of the first multiplication circuit and the second multiplication circuit, and the adder circuit, is used to dynamically adjust the adjustable gain value based on the equalizer output signal. The gain control circuit includes: An energy detection circuit is used to measure the peak energy of the equalizer's output signal; and An adjustable gain generator, coupled to the energy detection circuit, is used to dynamically adjust the adjustable gain value based on the peak energy of the equalizer output signal. The energy detection circuit includes: An absolute value circuit is used to generate the absolute value of the equalizer's output signal; and An alpha filter, coupled to the absolute value circuit and the adjustable gain generator, is used to generate the peak energy based on the output of the absolute value circuit. The alpha filter is a second-order alpha filter, and the coefficients of the second-order alpha filter are powers of 2.

2. The leveling equalizer according to claim 1, wherein the fixed gain value is equal to 1.

3. The equalizer according to claim 1, wherein the graphic equalizer circuit comprises: A first filter is used to generate a first filtered signal based on a second input signal obtained from the first input signal; A second filter is used to generate a second filtered signal based on the second input signal; An adder circuit is coupled to the first filter and the second filter and is used to combine the first filtered signal and the second filtered signal, wherein the first output signal is obtained from the output of the adder circuit; as well as A subtraction circuit is coupled to the first filter and the second filter and is used to subtract the second filter signal from the first filter signal, wherein the second output signal is obtained from the output of the subtraction circuit.

4. The equalizer according to claim 3, wherein the graphic equalizer circuit further comprises: An attenuator circuit is coupled to the first filter and the second filter, and is used to attenuate the first input signal to generate the second input signal.

5. The leveling equalizer according to claim 3, wherein the first output signal is a low-pass filtered signal and the second output signal is a high-pass filtered signal.

6. The equalizer of claim 1, wherein the adjustable gain generator is further configured to receive an attack rate setting and a release rate setting; when the peak energy of the equalizer output signal is less than a threshold, the adjustable gain generator controls the adjustable gain value according to a slope adjustment specified by the release rate setting; and when the peak energy of the equalizer output signal is not less than the threshold, the adjustable gain generator controls the adjustable gain value according to a slope adjustment specified by the attack rate setting.

7. The leveling equalizer of claim 6, wherein the adjustable gain generator is further configured to receive a reference threshold and obtain the threshold by multiplying the reference threshold by a predetermined coefficient.

8. The equalizer according to claim 1, wherein when the first input signal is an out-of-band signal of the equalizer, the output signal of the equalizer is the same as the first input signal.

9. A method for equalizing a first input signal to generate an equalizer output signal, comprising: The first input signal is subjected to graphic equalization to generate and output a first output signal and a second output signal; The first output signal is multiplied by one of the adjustable gain value and the fixed gain value to generate the first adjusted output signal; The second output signal is multiplied by the adjustable gain value and another of the fixed gain values ​​to generate a second adjusted output signal; The first adjustment output signal is combined with the second adjustment output signal to generate the equalizer output signal; and The adjustable gain value is dynamically adjusted based on the equalizer's output signal. The adjustable gain value is dynamically adjusted based on the equalizer output signal, including: Measure the peak energy of the equalizer's output signal; and The adjustable gain value is dynamically adjusted based on the peak energy of the equalizer output signal. The peak energy of the equalizer output signal includes: Perform absolute value calculation on the equalizer output signal to produce an absolute value calculation result; and The peak energy is generated by using an alpha filter, which is a second-order alpha filter, and the coefficients of the second-order alpha filter are powers of 2.

10. The method of claim 9, wherein the fixed gain value is equal to 1.

11. The method of claim 9, wherein performing graphic equalization on the first input signal to generate and output the first output signal and the second output signal comprises: A first filtered signal is generated based on a second input signal obtained from the first input signal; A second filtered signal is generated based on the second output signal; The first filtered signal is combined with the second filtered signal to obtain the first output signal; and The second output signal is obtained by subtracting the second filter signal from the first filter signal.

12. The method of claim 11, wherein performing graphic equalization on the first input signal to generate and output the first output signal and the second output signal further comprises: The first input signal is attenuated to generate the second input signal.

13. The method of claim 11, wherein the first output signal is a low-pass filtered signal and the second output signal is a high-pass filtered signal.

14. The method of claim 9, wherein dynamically adjusting the adjustable gain value based on the peak energy of the equalizer output signal comprises: Attack rate settings and release rate settings; When the peak energy of the equalizer output signal is less than a threshold, the adjustable gain value is controlled according to the slope adjustment specified by the release rate setting; and When the peak energy of the equalizer output signal is not less than the threshold, the adjustable gain value is controlled by adjusting the slope specified by the attack rate setting.

15. The method of claim 14, wherein dynamically adjusting the adjustable gain value based on the peak energy of the equalizer output signal further comprises: Receive reference threshold; and The threshold is obtained by multiplying the reference threshold by a predetermined coefficient.

16. The method of claim 9, wherein, since the first input signal is an out-of-band signal, the method generates the same equalizer output signal as the first input signal.

Images