Hard disk in-place detection device and method

Abstract

The embodiment of the present application provides a hard disk in-place detection device, comprising: a connector, which is electrically connected to the hard disk, and outputs a first signal, a second signal and a third signal at a low level when a first type of hard disk is connected to the connector, outputs the first signal at a low level, the second signal at a high level and the third signal at a low level when a second type of hard disk is connected to the connector, and outputs the first signal, the second signal and the third signal at a high level when no hard disk is connected to the connector; and a control circuit, which outputs a delay signal and a latch signal, and is used for determining the in-place state and the type of the hard disk according to the level states of the first signal, the second signal, the delay signal and the latch signal. The embodiment of the present application also provides a hard disk in-place detection method. Thus, the hard disk in-place detection device and method provided by the embodiment of the present application can accurately detect and determine the in-place state and the type of the hard disk.

Description

Technical Field

[0001] This application relates to the field of hard disk testing, and in particular to a hard disk in-situ testing device and method. Background Technology

[0002] With technological advancements and the booming development of the electronics industry, Hybrid Hard Disk Driver Backplane (Hybrid HDDBP) technology is widely used in servers. Hybrid HDDBP supports hard drives using Serial Attached Small Computer System Interface (SAS), Serial Advanced Technology Attachment (SATA) interfaces, and also supports hard drives using the Non-Volatile Memory Express (NVME) protocol. To meet the application needs of customers in different scenarios, SAS, SATA, and NVME hard drives all have hot-swapping capabilities. Currently, the Complex Programming Logic Device (CPLD) on the Hybrid Hard Disk Driver Backplane can determine whether a hard drive is inserted into the backplane and the type of hard drive inserted based on the IFDET and PRSNT signals. The specific method involves detecting the level states of the IFDET and PRSNT signals. If both are high, no hard drive is present; if both are low, a SAS / SATA hard drive is present; and if the IFDET signal is low and the PRSNT signal is high, an NVMe hard drive is present. However, because the level changes of the IFDET and PRSNT signals are asynchronous during hard drive hot-swapping, the CPLD may misjudge the hard drive's presence and type. Summary of the Invention

[0003] In view of the above, it is necessary to provide a hard disk presence detection device and method that can accurately detect and determine the presence status and type of the hard disk.

[0004] The first aspect of this application provides a hard disk presence detection device, comprising:

[0005] A connector electrically connected to the hard drive. When the first type of hard drive is connected to the connector, the connector outputs a low-level first signal, a second signal, and a third signal. When the second type of hard drive is connected to the connector, the connector outputs a low-level first signal, a high-level second signal, and a low-level third signal. When no hard drive is connected to the connector, the connector outputs a high-level first signal, a second signal, and a third signal. The first signal, the second signal, and the third signal are used to indicate the presence and type of the hard drive.

[0006] The control circuit includes a delay circuit and a latch circuit. The delay circuit delays the falling edge of the third signal and outputs it as a delayed signal. The latch circuit performs latching logic operations on the first signal and the second signal and outputs the operation result as a latch signal. The control circuit determines the presence status and type of the hard disk based on the level states of the first signal, the second signal, the delayed signal, and the latch signal. The delayed signal and the latch signal are used to correct errors in the control circuit's determination of the presence status and type of the hard disk caused by asynchronous changes in the first signal and the second signal.

[0007] The latch logic operation includes:

[0008] If the first signal and the second signal are both at the same level, the level of the latch signal is the same as the level of the first signal.

[0009] If the level states of the first signal and the second signal are different, the level state of the latch signal remains unchanged.

[0010] The control circuit determines that the hard disk of the first type is in place based on the low level signals of the first signal and the second signal, and determines that the hard disk of the second type is in place based on the low level signals of the first signal, the high level signals of the second signal, the low level signals of the delay signal and the high level signals of the latch signal.

[0011] If the control circuit determines that the first type of hard disk is in place, the control circuit outputs a high-level signal of the first presence signal;

[0012] If the control circuit determines that the second type of hard disk is in place, the control circuit outputs a high-level signal of the second presence signal.

[0013] The connector is also used to output a fourth signal. When a third type of hard drive is connected to the connector, the connector outputs a low-level fourth signal, and when a fourth type of hard drive is connected to the connector, the connector outputs a high-level fourth signal.

[0014] The control circuit is also used to determine the in-situ status and type of the third or fourth type of hard disk based on the level states of the first signal, the second signal, and the fourth signal.

[0015] A second aspect of this application provides a method for detecting the presence of a hard disk, including:

[0016] When the first type of hard drive is connected, a low-level first signal, a second signal, and a third signal are output. When the second type of hard drive is connected, a low-level first signal, a high-level second signal, and a low-level third signal are output. When no hard drive is connected, a high-level first signal, a second signal, and a third signal are output. The first signal, the second signal, and the third signal are used to indicate the presence and type of the hard drive.

[0017] The falling edge of the third signal is delayed and output as a delayed signal;

[0018] Perform latching logic operations on the first signal and the second signal, and output the operation result as a latching signal;

[0019] The presence status and type of the hard disk are determined based on the level states of the first signal, the second signal, the delay signal, and the latch signal. The delay signal and the latch signal are used to correct errors in determining the presence status and type of the hard disk due to asynchronous changes in the first signal and the second signal.

[0020] The latch logic operation includes:

[0021] If the first signal and the second signal are both at the same level, the level of the latch signal is the same as the level of the first signal.

[0022] If the level states of the first signal and the second signal are different, the level state of the latch signal remains unchanged.

[0023] The presence of the first type of hard disk is determined based on the low level signals of the first signal and the second signal, and the presence of the second type of hard disk is determined based on the low level signals of the first signal, the high level signals of the second signal, the low level signals of the delay signal and the high level signals of the latch signal.

[0024] If it is determined that the hard disk of the first type is in place, a high-level signal of the first presence signal is output;

[0025] If it is determined that the hard disk of the second type is in place, a high-level signal of the second presence signal is output.

[0026] The hard disk in-situ detection method further includes:

[0027] When a third type of hard drive is connected, a low-level fourth signal is output; when a fourth type of hard drive is connected, a high-level fourth signal is output.

[0028] The presence status and type of the third or fourth type of hard disk are determined based on the level states of the first, second, and fourth signals.

[0029] The hard disk presence detection device and method provided in this application can accurately detect and determine the hard disk presence status and hard disk type. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of a hard disk presence detection device provided in an embodiment of this application.

[0031] Figure 2 for Figure 1 The diagram shows a connector in the hard disk presence detection device.

[0032] Figures 3a to 3b This is a schematic diagram of the signal timing during hard drive hot insertion.

[0033] Figure 4 for Figure 1 The diagram shows a schematic of the control circuit in the hard disk presence detection device.

[0034] Figure 5 This is a flowchart of a hard disk presence detection method provided in an embodiment of this application.

[0035] Figures 6a to 6b This is a schematic diagram of the detection result of a hard disk presence detection method provided in an embodiment of this application.

[0036] Explanation of main component symbols

[0037]

[0038] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0039] In the embodiments of this application, terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or order. For example, "first application" and "second application" are used to distinguish different applications, not to describe a specific order of applications. Features specified as "first" or "second" may explicitly or implicitly include one or more of those features.

[0040] Please see Figure 1 , Figure 1The diagram shows a hard disk presence detection device 100 according to an embodiment of this application. The hard disk presence detection device 100 is used to detect the presence status and type of a hard disk within an electronic device. It can be understood that the electronic device in this embodiment can be a server. The hard disk presence detection device 100 includes a connector 10, a control circuit 20, and a power supply circuit 30. The connector 10 is electrically connected to the hard disk 40 and the control circuit 20. The control circuit 20 is electrically connected to a motherboard 50. In one embodiment, the motherboard 50 may include a processor 60 and a manager 70. The power supply circuit 30 is electrically connected to the connector 10 and the control circuit 20, and is used to supply power to the connector 10 and the control circuit 20.

[0041] Connector 10 is used to output a first signal, a second signal, and a third signal to control circuit 20 according to the presence and type of the hard disk 40, wherein the hard disk 40 may be a Serial Attached Small Computer System Interface (SAS) hard disk, a Serial Advanced Technology Attachment (SATA) hard disk, or a Non-Volatile Memory Express (NVME) hard disk.

[0042] In this embodiment, the "in-place status" indicates whether the hard disk 40 has been hot-plugged into the connector 10. The first signal, the second signal, and the third signal are used to instruct the control circuit 20 to determine the in-place status and type of the hard disk 40. Specifically, when the hard disk 40 is not hot-plugged into the connector, the first signal, the second signal, and the third signal are all high-level signals; when the SAS or SATA hard disk is hot-plugged, the first signal, the second signal, and the third signal are all low-level signals; when the NVME hard disk is hot-plugged, the first signal, the second signal, and the third signal are low-level, high-level, and low-level signals, respectively.

[0043] The control circuit 20 is electrically connected to the processor 60 and the manager 70 of the motherboard 50. In one embodiment, the processor 60 can be a central processing unit (CPU) for processing server information and running related computer programs; the manager 70 is a baseboard management controller (BMC) for monitoring the server's status and controlling its operation. The control circuit 20 determines the presence status and type of the hard disk 40 based on a first signal, a second signal, and a third signal, and outputs a first presence signal to the processor 60 of the motherboard 50 and a second presence signal to the manager 70 of the motherboard 50. The first presence signal indicates the presence status of the NVME hard disk, and the second presence signal indicates the presence status of the SAS / SATA hard disk.

[0044] In one embodiment, the control circuit 20 can establish a communication connection with the processor 60 and the manager 70 via an Inter-Integrated Circuit (I2C) bus. Specifically, the I2C bus includes a serial clock (SCL) bus for providing a clock signal during signal transmission and a serial data (SDA) bus for transmitting data.

[0045] In this embodiment, the processor 60 can output a first control signal containing the Virtual Pin Port (VPP) address to the control circuit 20 based on a first presence signal. The VPP address is the address assigned to the NVMe hard drive interface by the Hybrid Hard Disk Driver Backplane (Hybrid HDDBP), used to indicate the position of the NVMe hard drive on the Hybrid HDDBP. When the control circuit 20 receives the first control signal, it can perform related operations accordingly. For example, the control circuit 20 can illuminate the corresponding NVMe hard drive indicator light based on the VPP address. This indicator light is located on the Hybrid HDDBP backplane and indicates the hard drive's presence status.

[0046] In this embodiment, the manager 70 can display the presence status and type of SAS / SATA hard drives and NVME hard drives via a manager web page based on the second presence signal. The manager web page is a visual page that can display the data content in the manager 70 via an external monitor, allowing users to query and control the server's status.

[0047] Please see Figure 2 , Figure 2 for Figure 1 The diagram shows a schematic of connector 10 in the hard disk presence detection device 100. In one embodiment, the interface type of connector 10 can be a U.2 interface, including at least one integrated circuit chip, and pins P4, P10, S7, and S14 on the chip. Pins P4, P10, S7, and S14 are all electrically connected to the control circuit 20 and the hard disk 40. In this embodiment, when no hard disk 40 is inserted into connector 10, pins P4, P10, S7, and S14 are electrically connected to a DC power supply (not shown in the figure) through pull-up resistors (not shown in the figure). Therefore, the first signal, second signal, third signal, and fourth signal output by the high-level signals of pins P4, P10, S7, and S14 are all high-level signals.

[0048] When a SAS / SATA hard drive is inserted, because there are short grounding lines on the SAS / SATA hard drive corresponding to pins P4, P10 and S7, the voltage levels at pins P4, P10 and S7 are no longer determined by the DC power supply, but are low levels when grounded, that is, the first signal, the second signal and the third signal are all low level signals.

[0049] Furthermore, the SAS hard drive has a grounded short circuit corresponding to pin S14, in which case the fourth signal is a low-level signal. The SATA hard drive, however, does not have a grounded short circuit corresponding to pin S14, in which case the fourth signal is a high-level signal. When an NVMe hard drive is inserted, because the NVMe hard drive has grounded short circuits corresponding to pins P4, S7, and S14, the voltage levels at pins P4, S7, and S14 are no longer determined by the DC power supply, but are the low level of the grounded state. That is, the first, third, and fourth signals are all low-level signals, while the second signal remains a high-level signal.

[0050] Please see Figures 3a to 3b , Figure 3a The diagram shows the signal timing during hard drive hot-insertion. At time t1, the first signal changes from a high level to a low level, indicating a SAS / SATA hard drive hot-insertion. However, because the level changes of the first and second signals are asynchronous, the first signal changes earlier than the second signal, which remains high. If the control circuit 20 determines the hard drive's presence and type solely based on the levels of the first and second signals, the first presence signal should be high, indicating the NVME hard drive is present. This leads to a misjudgment of the NVME hard drive's presence by the control circuit 20 between t1 and t2.

[0051] Figure 3bThe diagram shows the signal timing during hard drive hot-swapping. At time t3, the second signal changes from a low level to a high level, indicating that the SAS / SATA hard drive is hot-swapping. However, because the level changes of the first and second signals are asynchronous, the second signal changes earlier than the first signal, which remains low. If the control circuit 20 determines the hard drive's presence and type solely based on the levels of the first and second signals, the first presence signal should be high, indicating that the NVME hard drive is present. This leads to a misjudgment of the NVME hard drive's presence by the control circuit 20 between t3 and t4.

[0052] Please see Figure 4 , Figure 4 for Figure 1 The diagram shows a schematic of the control circuit 20 in the hard disk presence detection device 100.

[0053] In this embodiment, the control circuit 20 is a complex programmable logic device (CPLD), which includes NOT gate 21, NOT gate 22, NOT gate 29, AND gate 23, AND gate 24, signal processing module 25, decoding module 26, delay circuit 27, and latch circuit 28.

[0054] The input terminal of NOT logic gate 21 is electrically connected to pin P4 of connector 10 to receive the first signal, and the output terminal of NOT logic gate 21 is electrically connected to the first input terminal of AND logic gate 23 and the first input terminal of AND logic gate 24.

[0055] The input terminal of NOT logic gate 22 is electrically connected to pin P10 of connector 10 to receive the second signal, and the output terminal of NOT logic gate 22 is electrically connected to the second input terminal of logic gate 24.

[0056] The input terminal of NOT logic gate 29 is electrically connected to the output terminal of delay circuit 27, and the output terminal of NOT logic gate 29 is electrically connected to the second input terminal of logic gate 23.

[0057] The first input terminal of logic gate 23 is electrically connected to the output terminal of NOT logic gate 21, the second input terminal of logic gate 23 is electrically connected to the output terminal of NOT logic gate 29, the third input terminal of logic gate 23 receives the second signal, the fourth input terminal of logic gate 23 is electrically connected to the output terminal of latch circuit 28, and the output terminal of logic gate 23 is electrically connected to signal processing module 25.

[0058] The first input terminal of logic gate 24 is electrically connected to the output terminal of NOT logic gate 21, the second input terminal of logic gate 24 is electrically connected to the output terminal of NOT logic gate 22, and the output terminal of logic gate 24 is electrically connected to the decoding module 26.

[0059] The signal processing module 25 is electrically connected to the output of the logic gate 23 and the processor 60. It receives the first presence signal output by the logic gate 23 and the first control signal output by the processor 60. Upon receiving the first presence signal, it transmits it to the processor 60 and performs related operations based on the received first control signal. For example, the signal processing module 25 can illuminate the indicator light of the corresponding NVMe hard drive based on the VPP address.

[0060] The decoding module 26 is electrically connected to the output of the AND gate 24 and the manager 70, and is used to receive the second in-situ signal output by the AND gate 24, and to transmit the second in-situ signal to the manager 70 after receiving it.

[0061] The delay circuit 27 is electrically connected to the input of the NOT logic gate 29 and the pin S7 of the connector 10. It is used to receive the third signal output from the pin S7 and to output the delayed signal to the input of the NOT logic gate 29 after delaying the falling edge of the third signal by 100ms.

[0062] The latch circuit 28 is electrically connected to the fourth input terminal of the AND gate 23 and pins P4 and P10 of the connector 10. It is used to receive the first signal output from pin P4 and the second signal output from pin P10, and to perform logical operations on the first and second signals, outputting a latch signal as the result of the operation to the fourth input terminal of the AND gate 23. Specifically, the level states of the latch signal are shown in Table 1.

[0063] Table 1

[0064]

[0065] As shown in Table 1, when both the first and second signals are low, the latch signal is low; when both are high, the latch signal is high; and when the first and second signals have different levels, the latch signal maintains its previous level. Thus, the latch circuit 28 can perform latching logic operations on the first and second signals to output the latch signal. When the SAS / SATA hard drive is hot-plugged, the second signal is high, while the first signal may still be low. In this case, the latch signal maintains its level from before the SAS / SATA hard drive was hot-plugged, i.e., a low level signal.

[0066] In this embodiment, to avoid the impact caused by the asynchronous changes in the levels of the first and second signals, the control circuit 20 also needs to determine the presence status of the NVMe hard drive based on the level states of other signals. The third signal output from pin S7 of connector 10 can also indicate the presence status of the hard drive. After multiple experiments, it has been verified that when a SAS / SATA hard drive is hot-inserted, the levels of the third and second signals change almost simultaneously, or the change in the third signal level occurs 50ms earlier than the change in the second signal level. Therefore, the falling edge of the third signal can be delayed by 100ms using the delay circuit 27 as a delay signal. When a SAS / SATA hard drive is hot-inserted, the first signal is low, the second signal may still be high, and the third signal is also high. The control circuit 20 can then correctly determine that the NVMe hard drive is not present based on the high level of the delayed signal.

[0067] In this embodiment, the control circuit 20 also correctly determines that the NVME hard disk is not in place based on the low-level signal of the latch signal.

[0068] In some embodiments, the control circuit 20 further determines the presence status and type of the SAS hard drive or the SATA hard drive based on the level states of the first signal, the second signal, and the fourth signal.

[0069] The working process of control circuit 20 is described in detail below.

[0070] When a SAS / SATA hard drive is hot-plugged, it can be divided into two stages. In the first stage: Pin P4 of connector 10 first outputs a low-level signal to latch circuit 28. This first signal passes through NOT gate 21, which outputs a high-level signal to the first inputs of AND gate 23 and AND gate 24. Because the levels of the first and second signals are not synchronized, pin P10 of connector 10 still outputs a high-level signal to latch circuit 28, the third input of AND gate 23, and the second input of AND gate 24. Latch circuit 28 outputs a high-level signal to the fourth input of AND gate 23. Pin S7 of connector 10 outputs a high-level signal, which passes through delay circuit 27 and outputs a delayed signal to NOT gate 29. NOT gate 29 outputs a low-level signal to the second input of AND gate 23. At this time, since the second input of AND gate 23 is low, AND gate 23 outputs a low-level first presence signal, indicating that the NVME hard drive is not present.

[0071] Second stage: The second signal goes low. Since the third input of AND gate 23 is low, AND gate 23 outputs a low-level first presence signal, indicating that the NVME hard drive is not present. On the other hand, both the first and second inputs of AND gate 24 are high, and AND gate 24 outputs a high-level signal, indicating that the SAS / SATA hard drive is present.

[0072] When a SAS / SATA hard drive is hot-swapped, it can be divided into two stages. In the first stage: Pin P10 of connector 10 first outputs a high-level signal to latch circuit 28, the third input of AND gate 23, and the second input of AND gate 24. Because the levels of the first and second signals are not synchronized, pin P4 of connector 10 still outputs a low-level signal to latch circuit 28. Latch circuit 28 outputs a low-level signal to the fourth input of AND gate 23. The first signal passes through NOT gate 21, which outputs a high-level signal to the first inputs of AND gate 23 and AND gate 24. Pin S7 of connector 10 outputs a low-level signal, which passes through delay circuit 27 and outputs a delayed signal to NOT gate 29. NOT gate 29 outputs a high-level signal to the second input of AND gate 23. At this time, because the fourth input of AND gate 23 is low, AND gate 23 outputs a low-level first presence signal, indicating that the NVME hard drive is not present. On the other hand, when the second input of AND gate 24 is a low-level signal, AND gate 24 outputs a low-level signal, indicating that the SAS / SATA hard drive is not in place.

[0073] Second stage: The first signal becomes a high-level signal. Since the third input of the AND logic gate 23 is a low-level signal, the first presence signal of the AND logic gate 23 outputs a low-level signal, indicating that the NVME hard drive is not present.

[0074] Please see Figure 5 , Figure 5 The diagram shown is a flowchart of a hard disk presence detection method according to an embodiment of this application. The hard disk presence detection method may specifically include the following steps:

[0075] Step S1: Output the first signal, the second signal, and the third signal according to the hard disk's presence status and type.

[0076] In this embodiment, the presence status indicates whether the hard disk 40 has been inserted into the connector 10. The first signal, the second signal, and the third signal are used to instruct the control circuit 20 to determine the presence status and type of the hard disk 40.

[0077] In some embodiments, the hard disk 40 can be a SAS hard disk, a SATA hard disk, or an NVMe hard disk.

[0078] In this embodiment, when no hard disk 40 is inserted into the connector 10, pins P4, P10, S7 and S14 are electrically connected to the DC power supply through a pull-up resistor (not shown in the figure). Therefore, the voltage levels at pins P4, P10, S7 and S14 are all high-level signals, that is, the first signal, the second signal, the third signal and the fourth signal are all high-level signals.

[0079] When a SAS / SATA hard drive is inserted, because there are short grounded lines on the SAS / SATA hard drive corresponding to pins P4, P10 and S7, the voltage levels at pins P4, P10 and S7 are no longer determined by the DC power supply, but are low levels as when grounded, that is, the first signal, the second signal and the third signal are all low level signals.

[0080] Furthermore, the SAS hard drive has a grounded short circuit corresponding to pin S14, in which case the fourth signal is a low-level signal, while the SATA hard drive does not have a grounded short circuit corresponding to pin S14, in which case the fourth signal is a high-level signal.

[0081] When an NVMe hard drive is inserted, because there are short grounded lines on the NVMe hard drive corresponding to pins P4, S7, and S14, the voltage levels at pins P4, S7, and S14 are no longer determined by the DC power supply, but are at the low level when grounded. That is, the first, third, and fourth signals are all low-level signals, while the second signal remains a high-level signal.

[0082] Step S2: Delay the falling edge of the third signal and output it as a delayed signal.

[0083] Step S3: Perform latching logic operations on the first signal and the second signal and output the operation result as a latching signal.

[0084] Specifically, the level states of the latch signal are shown in Table 1. When both the first and second signals are low, the latch signal is low; when both the first and second signals are high, the latch signal is high; and when the levels of the first and second signals are different, the latch signal maintains its previous level state. Thus, the latch circuit 28 can perform latching logic operations on the first and second signals to output the latch signal. When the SAS / SATA hard drive is hot-plugged, the second signal is high, while the first signal may still be low. In this case, the latch signal maintains its level state from before the SAS / SATA hard drive was hot-plugged, i.e., a low level signal.

[0085] Step S4: Determine the in-situ status and type of the hard disk based on the level states of the first signal, the second signal, the delay signal, and the latch signal.

[0086] In this embodiment, the method for detecting the presence status of NVME hard drives is shown in Table 2.

[0087] Table 2

[0088]

[0089] As shown in Table 2, "0" represents a low-level signal, "1" represents a high-level signal, and "x" represents a low-level or high-level signal. Only when the level states of the first signal, the second signal, the delay signal, and the latch signal are low, high, low, and high, respectively, does the control circuit 20 determine that the NVNE hard disk is in place and output the high-level NVNE signal.

[0090] For SAS / SATA hard drives, their presence is detected based on the first and second signals. If both signals are high, no hard drive is present; if both signals are low, the SAS / SATA hard drive is present.

[0091] In some embodiments, if the SAS / SATA hard drive is in place and the fourth signal is a low-level signal, then the SAS hard drive is in place; if the SAS / SATA hard drive is in place and the fourth signal is a high-level signal, then the SATA hard drive is in place.

[0092] Please see Figures 6a to 6b , Figure 6a The diagram shown is a schematic diagram of the detection results during hot insertion of a hard disk in-situ detection method provided in an embodiment of this application.

[0093] At time t1, the first signal changes from a high level signal to a low level signal. This can be understood as the SAS / SATA hard drive being hot-inserted. However, since the level changes of the first and second signals are not synchronized, the level change of the first signal is earlier than the level change of the second signal. The second signal is still a high level signal, and the delay signal is also a high level signal. At this time, the control circuit 20 determines that the NVME hard drive is not in place, and the first in-place signal is a low level signal.

[0094] Figure 6bThe diagram shows the detection result during hot-swapping of the hard drive presence detection method provided in an embodiment of this application. At time t4, the second signal changes from a low level signal to a high level signal. It can be understood that the SAS / SATA hard drive is hot-swapping at this time. However, since the level changes of the first and second signals are not synchronized, the level change of the second signal is earlier than the level change of the first signal. The first signal is still a low level signal, the delay signal is also a low level signal, and the latch signal remains the low level signal from the previous moment. At this time, the control circuit 20 determines that the NVME hard drive is not present, and the first presence signal is a low level signal.

[0095] Therefore, when hot-swapping SAS / SATA hard drives, the presence status of the NVMe hard drive can be determined based on the level states of the first, second, delay, and latch signals, which can eliminate interference caused by asynchronous level changes of the first and second signals.

[0096] Those skilled in the art should recognize that the above embodiments are merely illustrative of this application and not intended to limit it. Any appropriate changes and variations made to the above embodiments within the essential spirit and scope of this application fall within the scope of protection claimed by this application.

Claims

1. A hard disk presence detection device, characterized in that, include: A connector electrically connected to the hard drive. When the first type of hard drive is connected to the connector, the connector outputs a low-level first signal, a second signal, and a third signal. When the second type of hard drive is connected to the connector, the connector outputs a low-level first signal, a high-level second signal, and a low-level third signal. When no hard drive is connected to the connector, the connector outputs a high-level first signal, a second signal, and a third signal. The first signal, the second signal, and the third signal are used to indicate the presence and type of the hard drive. The control circuit includes a delay circuit and a latch circuit. The delay circuit delays the falling edge of the third signal and outputs it as a delayed signal. The latch circuit performs latch logic operations on the first signal and the second signal and outputs the operation result as a latch signal. The control circuit determines the presence status and type of the hard disk based on the level states of the first signal, the second signal, the delayed signal, and the latch signal. The delayed signal and the latch signal are used to correct errors in the control circuit's determination of the presence status and type of the hard disk caused by asynchronous changes in the first signal and the second signal. The control circuit determines that the hard disk of the first type is in place based on the low level signals of the first signal and the second signal, and determines that the hard disk of the second type is in place based on the low level signal of the first signal, the high level signal of the second signal, the low level signal of the delay signal and the high level signal of the latch signal; The connector is also used to output a fourth signal. When a third type of hard drive is connected to the connector, the connector outputs a low-level fourth signal, and when a fourth type of hard drive is connected to the connector, the connector outputs a high-level fourth signal. The control circuit is also used to determine the in-situ status and type of the third or fourth type of hard disk based on the level states of the first signal, the second signal, and the fourth signal.

2. The hard disk presence detection device as described in claim 1, characterized in that, The latch logic operations include: If both the first signal and the second signal are at the same level, the level of the latch signal is the same as that of the first signal. If the level states of the first signal and the second signal are different, the level state of the latch signal remains unchanged.

3. The hard disk presence detection device as described in claim 1, characterized in that: If the control circuit determines that the first type of hard disk is in place, the control circuit outputs a high-level signal of the first presence signal; If the control circuit determines that the second type of hard disk is in place, the control circuit outputs a high-level signal of the second presence signal.

4. A method for detecting the presence of a hard disk, characterized in that, include: When the first type of hard drive is connected, a low-level first signal, a second signal, and a third signal are output. When the second type of hard drive is connected, a low-level first signal, a high-level second signal, and a low-level third signal are output. When no hard drive is connected, a high-level first signal, a second signal, and a third signal are output. The first signal, the second signal, and the third signal are used to indicate the presence and type of the hard drive. The falling edge of the third signal is delayed and output as a delayed signal; Perform latching logic operations on the first signal and the second signal, and output the operation result as a latching signal; The presence status and type of the hard disk are determined based on the level states of the first signal, the second signal, the delay signal, and the latch signal. The delay signal and the latch signal are used to correct errors in determining the presence status and type of the hard disk due to asynchronous changes in the first signal and the second signal. The presence of the first type of hard disk is determined based on the low level signals of the first signal and the second signal, and the presence of the second type of hard disk is determined based on the low level signals of the first signal, the high level signals of the second signal, the low level signals of the delay signal and the high level signals of the latch signal; When a third type of hard drive is connected, a low-level fourth signal is output; when a fourth type of hard drive is connected, a high-level fourth signal is output. The presence status and type of the third or fourth type of hard disk are determined based on the level states of the first, second, and fourth signals.

5. The hard disk presence detection method as described in claim 4, characterized in that, The latch logic operations include: If both the first signal and the second signal are at the same level, the level of the latch signal is the same as that of the first signal. If the level states of the first signal and the second signal are different, the level state of the latch signal remains unchanged.

6. The hard disk presence detection method as described in claim 4, characterized in that: If it is determined that the hard disk of the first type is in place, a high-level signal of the first presence signal is output; If it is determined that the hard disk of the second type is in place, a high-level signal of the second presence signal is output.

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