A single-phase three-level asymmetric four-port energy storage inverter

By designing a single-phase three-level asymmetric four-port energy storage inverter, which employs a four-port network structure and six operating modes, the problem of low efficiency in traditional two-level inverters at high switching frequencies is solved, achieving low-loss and high-efficiency power conversion.

CN115800787BActive Publication Date: 2026-04-10CHINA THREE GORGES UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
CHINA THREE GORGES UNIV
Filing Date
2022-11-09
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Traditional two-level inverters have low efficiency, high switching losses, and poor output voltage waveforms at high switching frequencies, making it difficult to meet the requirements of high efficiency and high reliability.

Method used

The single-phase three-level asymmetrical four-port energy storage inverter adopts a four-port network structure, including inductors, capacitors and switching transistors. It realizes three-level function through six operating modes and uses the asymmetrical four-port structure to achieve voltage clamping and multi-directional power flow, reducing switching losses and harmonic content.

Benefits of technology

It achieves low switching voltage stress, low switching loss, and low harmonic content, improving power conversion efficiency and output power quality, while reducing inverter cost and size.

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Abstract

A single-phase three-level asymmetric four-port energy storage inverter comprises switch tubes S1, S2, S3, S4, S5, S6, S7 and S8, diodes D1, D2, D3 and D4, inductors L1 and L2, and capacitors C1 and C2. The energy storage inverter adopts an asymmetric four-port structure which is composed of switch tubes S2, S4, S5 and diodes D1, D3 and D4, and can be used as a multi-level modular unit for facilitating integration. Compared with a conventional two-level inverter, the single-phase three-level asymmetric four-port energy storage inverter reduces voltage stress of semiconductor switch devices, reduces switching loss and output harmonic content, and improves output power quality and power conversion efficiency.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of multi-level electric energy conversion technology, and particularly relates to a single-phase three-level asymmetric four-port energy storage inverter. BACKGROUND

[0002] The energy storage inverter is an essential technology for the development of distributed energy, energy internet and smart grid, and therefore it is of great significance to research energy storage inverters with high efficiency and high reliability. With the increase of switching frequency, the switching loss of the traditional two-level inverter increases rapidly, which determines that the two-level inverter is difficult to achieve high conversion efficiency at a high switching frequency. Compared with the two-level inverter, the three-level inverter increases the number of output levels, the output voltage waveform is better sinusoidal, the output THD content is smaller, and the switching voltage stress and EMI noise are also significantly reduced. Therefore, under the condition of the same switching frequency, the three-level inverter can use smaller filter inductance, which is beneficial to reduce the inductance loss and reduce the cost and volume of the inverter; and under the condition of the same output THD content, the three-level inverter can use a lower switching frequency, which is beneficial to reduce the switching loss and improve the electric energy conversion efficiency. SUMMARY

[0003] The present application provides a single-phase three-level asymmetric four-port energy storage inverter, which adopts a four-port network structure, facilitating modular and integrated design; meanwhile, the energy storage inverter has the advantages of low switching voltage stress, small switching loss, small output THD content and high reliability.

[0004] The technical scheme adopted by the present application is as follows:

[0005] A single-phase three-level asymmetric four-port energy storage inverter, comprising inductors L1 and L2, capacitors C1 and C2, switching tubes S1-S8 and diodes D1-D4.

[0006] The drain electrode of the switching tube S1 is connected to the positive electrode of the capacitor C1, and a connection node constitutes an end point p.

[0007] The negative electrode of the capacitor C1 is connected to the anode of the capacitor C2, the anode of the diode D3 and the cathode of the diode D4, respectively, and a connection node constitutes an end point n.

[0008] The source electrode of the switching tube S8 is connected to the negative electrode of the capacitor C2, and a connection node constitutes an end point m.

[0009] One end of the inductor L1 is connected to the source electrode of the switching tube S4 and the drain electrode of the switching tube S5, respectively, and a connection node constitutes an end point a.

[0010] The other end of the inductor L1 is connected to the drain electrode of the switching tube S6 and the load R L One end is connected.

[0011] One end of the inductor L2 is connected with the drain of the switch tube S7 and the load R respectively L The other end is connected with the source of the switch tube S3 and the cathode of the diode D2 respectively, and the connection node constitutes the end point b.

[0012] The other end of the inductor L2 is connected with the source of the switch tube S3 and the cathode of the diode D2 respectively, and the connection node constitutes the end point b.

[0013] The source of the switch tube S1 is connected with the drain of the switch tube S2 and the drain of the switch tube S3 respectively, and the connection node constitutes the end point c.

[0014] The drain of the switch tube S8 is connected with the source of the switch tube S6 and the source of the switch tube S7, the anode of the diode D1 and the anode of the diode D2 respectively, and the connection node constitutes the end point d.

[0015] The source of the switch tube S2 is connected with the drain of the switch tube S4 and the cathode of the diode D3 respectively; the source of the switch tube S5 is connected with the anode of the diode D1 and the anode of the diode D4 respectively.

[0016] In the energy storage inverter, the switch tubes S2, S4 and S5, and the diodes D1, D3 and D4 are connected to constitute an asymmetric four-port structure, and the four ports of the asymmetric four-port structure are the end point a, the end point c, the end point d and the end point n respectively.

[0017] The end point p and the end point m are connected with the output side of the bidirectional DC-DC converter, and the input side of the bidirectional DC-DC converter is connected with the energy storage battery.

[0018] The capacitors C1 and C2 are electrolytic capacitors with equal capacitance values, and the voltage borne by each capacitor is half of the direct current voltage U S at the output side of the bidirectional DC-DC converter, that is, ±1 / 2U S , which provides conditions for the realization of the ±1 / 2U o level.

[0019] The switch tubes S1-S8 are power field effect transistors MOSFETs with body diodes or insulated gate bipolar transistors IGBTs.

[0020] The energy storage inverter includes the following six working modes:

[0021] Working mode one: at this time, the circuit works in the positive half cycle of the output alternating voltage u o , the switch tubes S1, S2, S4, S7 and S8 are turned on, and the remaining switch tubes are turned off. The energy storage battery supplies power to the inductor L1 and the load R L , the inductor current i L1 increases linearly, the output alternating current i o = i L1 , and the voltage u ab between the end point a and the end point b is +U s .

[0022] Mode two: the circuit works in the positive half cycle of output AC voltage u o , switch S4, S7, S8 are on, the rest of the switch is off. Energy storage battery charges capacitor C1, the voltage of capacitor C1 rises; capacitor C2 supplies power to inductor L1 and load R L , the voltage of capacitor C2 drops, the current of inductor L1 i L1 linearly rises, the output AC current i o = i L1 , the voltage between the end a and end b u ab = +1 / 2U s .

[0023] Mode three: the circuit works in the positive half cycle of output AC voltage u o , switch S5, S7 are on, the rest of the switch is off. Energy storage battery charges capacitor C1 and C2, the voltage of capacitor C1 and C2 rises; the current of inductor L1 i L1 flows through diode D1 and supplies power to load R L , the current i L1 linearly drops, the output AC current i o = i L1 , the voltage between the end a and end b u ab = 0.

[0024] Mode four: the circuit works in the negative half cycle of output AC voltage u o , switch S6 is on, the rest of the switch is off. Energy storage battery charges capacitor C1 and C2, the voltage of capacitor C1 and C2 rises; the current of inductor L2 i L2 flows through diode D2 and supplies power to load R L , the current i L2 linearly drops, the output AC current i o = -i L2 , the voltage between the end a and end b u ab = 0.

[0025] Mode five: the circuit works in the negative half cycle of output AC voltage u o , switch S1, S3, S6 are on, the rest of the switch is off. Energy storage battery charges capacitor C2, the voltage of capacitor C2 rises; capacitor C1 supplies power to inductor L2 and load R L , the voltage of capacitor C1 drops, the current of inductor L2 i L2 linearly rises, the output AC current i o = -i L2 , the voltage between the end a and end b u ab = -1 / 2U s .

[0026] Working mode six: at this time, the circuit works in the negative half cycle of the output alternating voltage u o , the switch tubes S1, S3, S6 and S8 are turned on, and the remaining switch tubes are turned off. The energy storage battery supplies power to the inductor L2 and the load R L , the inductor L2 current i L2 linearly rises, and the output alternating current i o =-i L2 , the voltage u ab =-U s between the end point a and the end point b.

[0027] The single-phase three-level asymmetric four-port energy storage inverter has the following technical effects:

[0028] 1. The circuit topology of the energy storage inverter adopts an asymmetric four-port structure composed of end points a, c, d and n. The asymmetric four-port structure not only can play a voltage clamping role, but also can realize multi-directional power flow, thereby providing conditions for realizing the three-level function of the inverter. Meanwhile, the asymmetric four-port structure can also be used as a multi-level modular unit, thereby facilitating integration.

[0029] 2. The circuit topology of the energy storage inverter can realize three-level power output. Compared with a traditional two-level inverter, the circuit topology can reduce the output harmonic content and the voltage and current stress of the switch tube, reduce the switching loss, improve the output power quality and improve the power conversion efficiency.

[0030] 3. When the circuit topology of the energy storage inverter works, the freewheeling current does not pass through the body diode of the switch tube, but passes through an independent freewheeling diode, thereby eliminating the problem of reverse recovery of the body diode of the switch tube and reducing the conduction loss.

[0031] 4. The circuit topology of the energy storage inverter adopts the switch tubes S1 and S8 to perform voltage clamping, thereby improving the reliability of the topology circuit. DETAILED DESCRIPTION

[0032] The present application will be further described below in combination with the drawings and examples.

[0033] Figure 1 It is a topology circuit diagram of the single-phase three-level asymmetric four-port energy storage inverter.

[0034] Figure 2 It is a circuit diagram of the present application in the working mode one of the output alternating voltage u o positive half cycle;

[0035] Figure 3 It is a circuit diagram of the present application in the working mode two of the output alternating voltage u o positive half cycle;

[0036] Figure 4 The circuit of this invention outputs AC voltage u o Circuit diagram of positive half-cycle operating mode 3;

[0037] Figure 5 The circuit of this invention outputs AC voltage u o Circuit diagram of negative half-cycle operating mode 4;

[0038] Figure 6 The circuit of this invention outputs AC voltage u o Circuit diagram of negative half-cycle operating mode 5;

[0039] Figure 7 The circuit of this invention outputs AC voltage u o Circuit diagram for negative half-cycle operating mode 6.

[0040] Figure 8 This diagram shows the six operating modes of the switching transistors S1 to S8 in the circuit of this invention.

[0041] Figure 9 This is a diagram showing the pulse signal distribution for the switching transistors S1 to S8 in the circuit of this invention.

[0042] Figure 10 The output voltage u of the circuit of this invention in steady state o and output current i o Waveform diagram.

[0043] Figure 11 The circuit of this invention provides the current i flowing through inductor L1 in steady state. L1 Waveform diagram.

[0044] Figure 12 The circuit of this invention provides the current i flowing through inductor L2 in steady state. L2 Waveform diagram.

[0045] Figure 13 The voltage u between terminals a and b in the circuit of this invention under steady state. ab Waveform diagram.

[0046] Figure 14 The voltage u across capacitors C1 and C2 in the circuit of this invention under steady state. c1 u c2 Waveform diagram. Detailed Implementation

[0047] The specific experimental parameters of the circuit of this invention are as follows: output AC voltage u o The effective value is 220V, the frequency is 50Hz, and the DC voltage U on the output side of the bidirectional DC-DC converter is... s The voltage is 400V, the capacitors C1 and C2 are 4700μF, the inductors L1 and L2 are 3mH, the switching frequency is 20kHz, and the load R is...L The resistance value of the resistor is 80Ω.

[0048] Figure 1 It is a single-phase three-level asymmetric four-port energy storage inverter topology circuit diagram, and the topology circuit comprises an energy storage battery, a bidirectional DC-DC converter, inductors L1 and L2, capacitors C1 and C2, switch tubes S1-S8, and diodes D1-D4.

[0049] The drain electrode of the switch tube S1 is connected to the positive electrode of the capacitor C1, and a connection node constitutes an end point p.

[0050] The negative electrode of the capacitor C1 is connected to the anode of the capacitor C2, the anode of the diode D3, and the cathode of the diode D4, respectively, and a connection node constitutes an end point n.

[0051] The source electrode of the switch tube S8 is connected to the negative electrode of the capacitor C2, and a connection node constitutes an end point m.

[0052] One end of the inductor L1 is connected to the source electrode of the switch tube S4 and the drain electrode of the switch tube S5, respectively, and a connection node constitutes an end point a.

[0053] The other end of the inductor L1 is connected to the drain electrode of the switch tube S6 and the one end of the load R L , respectively.

[0054] One end of the inductor L2 is connected to the drain electrode of the switch tube S7 and the other end of the load R L , respectively.

[0055] The other end of the inductor L2 is connected to the source electrode of the switch tube S3 and the cathode of the diode D2, respectively, and a connection node constitutes an end point b.

[0056] The source electrode of the switch tube S1 is connected to the drain electrode of the switch tube S2 and the drain electrode of the switch tube S3, respectively, and a connection node constitutes an end point c.

[0057] The drain electrode of the switch tube S8 is connected to the source electrode of the switch tube S6, the source electrode of the switch tube S7, the anode of the diode D1, and the anode of the diode D2, respectively, and a connection node constitutes an end point d.

[0058] The source electrode of the switch tube S2 is connected to the drain electrode of the switch tube S4 and the cathode of the diode D3, respectively; and the source electrode of the switch tube S5 is connected to the cathode of the diode D1 and the anode of the diode D4, respectively.

[0059] In the circuit, the end point a, the end point c, the end point d, and the end point n constitute an asymmetric four-port structure.

[0060] In the circuit, the switch tubes S1-S8 are power field effect transistors MOSFETs or insulated gate bipolar transistors IGBTs.

[0061] In the circuit, the capacitors C1 and C2 are electrolytic capacitors with equal capacitance values.

[0062] The single-phase three-level asymmetric four-port energy storage inverter of the present application has the following six working modes when it is in normal operation:

[0063] Figure 2 For working mode one: at this time, the circuit works in the positive half cycle of the output alternating voltage u o , the switch tubes S1, S2, S4, S7, S8 are turned on, and the rest of the switch tubes are turned off. The energy storage battery supplies power to the inductor L1 and the load R L , the current i L1 linearly rises, the output alternating current i o = i L1 , and the voltage u ab = +U s between the end point a and the end point b.

[0064] Figure 3 For working mode two: at this time, the circuit works in the positive half cycle of the output alternating voltage u o , the switch tubes S4, S7, S8 are turned on, and the rest of the switch tubes are turned off. The energy storage battery charges the capacitor C1, and the voltage of the capacitor C1 rises; the capacitor C2 supplies power to the inductor L1 and the load R L , the voltage of the capacitor C2 drops, the inductor current i L1 linearly rises, the output alternating current i o = i L1 , and the voltage u ab = +1 / 2U s between the end point a and the end point b.

[0065] Figure 4 For working mode three: at this time, the circuit works in the positive half cycle of the output alternating voltage u o , the switch tubes S5, S7 are turned on, and the rest of the switch tubes are turned off. The energy storage battery charges the capacitors C1 and C2, and the voltages of the capacitors C1 and C2 rise; the inductor current i L1 continues to flow through the diode D1 and supplies power to the load R L , the current i L1 linearly drops, the output alternating current i o = i L1 , and the voltage u ab = 0 between the end point a and the end point b.

[0066] Figure 5 For working mode four: at this time, the circuit works in the negative half cycle of the output alternating voltage u o , the switch tube S6 is turned on, and the rest of the switch tubes are turned off. The energy storage battery charges the capacitors C1 and C2, and the voltages of the capacitors C1 and C2 rise; the inductor current i L2 continues to flow through the diode D2 and supplies power to the load R L , the current i L2Linear decrease, output AC current i o =-i L2 The voltage u between endpoints a and b ab =0.

[0067] Figure 6 Operating mode five: In this mode, the circuit operates at an output AC voltage u o During the negative half-cycle, switches S1, S3, and S6 are turned on, while the remaining switches are turned off. The energy storage battery charges capacitor C2, causing its voltage to rise; capacitor C1 charges inductor L2 and load R. L With power supply, the voltage across capacitor C1 drops, and the current i in inductor L2 increases. L2 Linear rise, output AC current i o =-i L2 The voltage u between endpoints a and b ab =-1 / 2U s .

[0068] Figure 7 Operating mode six: In this mode, the circuit operates at an output AC voltage u. o During the negative half-cycle, switches S1, S3, S6, and S8 are turned on, while the remaining switches are turned off. The energy storage battery supplies power to inductor L2 and load R. L Power supply, inductor L2 current i L2 Linear rise, output AC current i o =-i L2 The voltage u between endpoints a and b ab =-U s .

[0069] Figure 8 This diagram illustrates the six operating modes of the switching transistors S1 to S8 in the circuit of this invention. Figure 8 It can be seen that the circuit has three operating modes in both the positive and negative half-cycles. In the positive half-cycle, the output voltage u... o Greater than 0, voltage u ab There are 0 and +1 / 2U. s +U s Three voltage levels; during the negative half-cycle, the output voltage u o Less than 0, voltage u ab Available in 0 and -1 / 2U s -U s Three voltage levels. "1" indicates that the switch is on, and "0" indicates that the switch is off.

[0070] Figure 9 This is a pulse signal distribution diagram corresponding to the switching transistors S1 to S8 in the circuit of this invention. By continuously switching the switching states of the transistors, the level conversion is realized, thereby achieving three levels.

[0071] Figure 10 The output voltage u of the circuit in the steady state o and the output current i o Waveform diagram, wherein: current i o is multiplied by 10 times the gain on the original basis. As can be seen from the figure, the output voltage u o and the output current i o Waveforms have good sinusoidal nature.

[0072] Figure 11 and Figure 12 The current i L1 and the current i L2 Waveform diagram of the circuit in the steady state through inductance L1 and inductance L2 respectively. From Figure 11 It can be seen that inductance L1 only works in the positive half cycle, which is consistent with the theoretical analysis; from Figure 12 It can be seen that inductance L2 only works in the negative half cycle, which is consistent with the theoretical analysis.

[0073] Figure 13 The voltage u ab Waveform diagram between the end point a and the end point b of the circuit in the steady state, from Figure 13 It can be seen that the voltage u ab Waveform is three-level, which proves that the invented circuit has the function of realizing three-level.

[0074] Figure 14 The voltage u c1 , u c2 Waveform diagram of capacitor C1, C2 of the circuit in the steady state, from Figure 14 It can be seen that the capacitor voltage can realize self-balance when the circuit is in the steady state.

[0075] Compared with the traditional two-level inverter, the single-phase three-level asymmetric four-port energy storage inverter of the application reduces the voltage stress of the semiconductor switching device, reduces the switching loss and output harmonic content, and improves the output power quality and power conversion efficiency.

Claims

1. A single-phase three-level asymmetric four-port energy storage inverter, comprising inductors L1, L2, capacitors C1, C2, switching tubes S1-S8, and diodes D1-D4, characterized in that: the drain of the switching tube S1 is connected to the positive pole of the capacitor C1, and a connection node constitutes a terminal point p; the negative pole of the capacitor C1 is connected to the positive pole of the capacitor C2, the anode of the diode D3, and the cathode of the diode D4, respectively, and a connection node constitutes a terminal point n; the source of the switching tube S8 is connected to the negative pole of the capacitor C2, and a connection node constitutes a terminal point m; one end of the inductor L1 is connected to the source of the switching tube S4 and the drain of the switching tube S5, respectively, and a connection node constitutes a terminal point a; The other end of the inductor L1 is connected with the drain of the switch S6 and the load R respectively L one end is connected One end of inductor L2 is connected with drain of switch S7 and load R L The other end is connected. the other end of the inductor L2 is connected to the source of the switching tube S3 and the cathode of the diode D2, respectively, and a connection node constitutes a terminal point b; the source of the switching tube S1 is connected to the drain of the switching tube S2 and the drain of the switching tube S3, respectively, and a connection node constitutes a terminal point c; the drain of the switching tube S8 is connected to the source of the switching tube S6, the source of the switching tube S7, the anode of the diode D1, and the anode of the diode D2, respectively, and a connection node constitutes a terminal point d; the source of the switching tube S2 is connected to the drain of the switching tube S4 and the cathode of the diode D3, respectively; and the source of the switching tube S5 is connected to the cathode of the diode D1 and the anode of the diode D4, respectively. In the energy storage inverter, the switching tubes S2, S4, and S5, and the diodes D1, D3, and D4 form an asymmetric four-port structure, and the four ports of the asymmetric four-port structure are the terminal points a, c, d, and n, respectively.

2. The single-phase three-level asymmetric four-port energy storage inverter according to claim 1, characterized in that: The terminal points p and m are connected to the output side of a bidirectional DC-DC converter, and the input side of the bidirectional DC-DC converter is connected to an energy storage battery.

3. The single-phase three-level asymmetric four-port energy storage inverter according to claim 2, characterized in that: The capacitors C1, C2 are electrolytic capacitors with equal capacitance values, each of which withstands a voltage of half the DC voltage U on the output side of the bidirectional DC-DC converter. S .

4. The single-phase three-level asymmetric four-port energy storage inverter of claim 1, wherein: The switching tubes S1-S8 are power field effect transistors MOSFETs with body diodes or insulated gate bipolar transistors IGBTs.

5. The single-phase three-level asymmetric four-port energy storage inverter according to any one of claims 1 to 4, characterized in that: The energy storage inverter includes the following six working modes: Working mode one: at this time, the circuit works in output AC voltage u o The switch tubes S1, S2, S4, S7 and S8 are turned on, and the rest switch tubes are turned off. Energy storage battery to inductor LI and load R L Supply, inductor LI current i L1 Linear rise, output AC current i o = U i L1 Voltage between end point a and end point b u ab = + U s ; Working mode two: the circuit works in output AC voltage u o , switch tube S4, S7, S8 are on, the rest switch tubes are off; energy storage battery charges capacitor C1, capacitor C1 voltage rises; capacitor C2 supplies power to inductor L1 and load R L , capacitor C2 voltage drops, inductor L1 current i L1 linearly rises, output AC current i o = i L1 , the voltage between end point a and end point b u ab =+1 / 2U s ; Mode three: the circuit works in output AC voltage u o , switch S5, S7 on, the rest of the switch off; energy storage battery charging capacitor C1 and C2, the voltage of capacitor C1 and C2 rise; inductance L1 current i L1 through diode D1 freewheeling and load R L power supply, the current i L1 linearly decreases, output AC current i o i L1 , the voltage between the end point a and end point b u ab =0;​ Mode four: the circuit works in output AC voltage u o The switch S6 is on, and the rest of the switches are off; the energy storage battery charges the capacitors C1 and C2, and the voltage of the capacitors C1 and C2 rises; the current of the inductor L2 i L2 flows through the diode D2 and supplies power to the load R L , and the current i L2 linearly decreases, and the output AC current i o = i L2 , the voltage between the end point a and the end point b u ab = 0; Working mode five: the circuit works in output AC voltage u o The switch tubes S1, S3, S6 are on, and the rest of switch tubes are off; the energy storage battery charges the capacitor C2, and the voltage of the capacitor C2 rises; the capacitor C1 supplies power to the inductor L2 and the load R L , and the voltage of the capacitor C1 falls, and the current of the inductor L2 i L2 rises linearly, and the output AC current i o i L2 The voltage between the end point a and the end point b u ab = -1 / 2U s ;​ Working mode six: at this time, the circuit works in output AC voltage u o The negative half cycle, switch S1, S3, S6, S8 is turned on, the rest of the switch is turned off; Energy storage battery to inductor L2 and load R L Supply, inductor L2 current i L2 Linear rise, output ac current i o i L2 Voltage between end point a and end point b u ab = -U s .​

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