Chip and mainboard connection method and device, electronic equipment and storage medium

By connecting the chip and motherboard through a virtual network, and selecting the target virtual network for data transmission based on network quality, the stability problem of traditional physical connection methods is solved, and more stable signal transmission is achieved.

CN116049066BActive Publication Date: 2026-06-30GUANGZHOU ZHUNJIE ELECTRONIC TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
GUANGZHOU ZHUNJIE ELECTRONIC TECH CO LTD
Filing Date
2023-01-10
Publication Date
2026-06-30

Smart Images

  • Figure CN116049066B_ABST
    Figure CN116049066B_ABST
Patent Text Reader

Abstract

The application provides a chip and mainboard connection method and device, electronic equipment and a storage medium. The method comprises the following steps: acquiring connection records of a preset virtual network of the chip within a preset time period; acquiring running state information of the chip connected to the preset virtual network; determining an estimated network quality of the preset virtual network for to-be-communicated data according to the connection records, the to-be-communicated data and the running state information; determining a target virtual network for which the estimated network quality meets a preset condition; and establishing a data communication connection between the chip and the mainboard based on the target virtual network, for transmitting the to-be-communicated data. The stable connection between the chip and the mainboard is realized through the virtual network, which effectively avoids the problems of loose connection, poor contact and aging of the golden finger between the interfaces caused by direct connection of the hardware interfaces, and further causes signal transmission failure.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of computer technology, and more specifically, to a method, apparatus, electronic device, and storage medium for connecting a chip and a motherboard. Background Technology

[0002] In traditional board and chip connection modules, the connection method usually involves setting up multiple card slots with physical connection interfaces on the motherboard, fixing the chip in the card slot, and connecting the chip's output interface to the connection interface in the card slot to achieve the connection between the chip and the motherboard. However, using this connection method is prone to problems such as loose connections, poor contact, and aging of gold fingers between interfaces due to environmental factors such as process, assembly, and collision.

[0003] Therefore, finding a better way to connect chips and motherboards is a problem that urgently needs to be solved. Summary of the Invention

[0004] To address the aforementioned problems, the present invention provides a method, apparatus, electronic device, and storage medium for connecting a chip and a motherboard.

[0005] A first aspect of this invention provides a chip and motherboard connection method applied to a motherboard module. The motherboard module includes a motherboard and multiple chips. The motherboard has multiple slots for placing the chips. The chips and the motherboard are connected via a virtual network interface. The virtual network includes multiple types. The method includes:

[0006] Obtain the connection records of the chip's preset virtual network within a preset time period; the connection records include historical communication data of the preset virtual network within the preset time period and the transmission information corresponding to the historical communication data;

[0007] Obtain the operating status information of the chip connected to the preset virtual network;

[0008] The estimated network quality of the preset virtual network for the data to be communicated is determined based on the connection record, the data to be communicated, and the running status information.

[0009] Determine the target virtual network whose estimated network quality meets preset conditions;

[0010] A data communication connection is established between the chip and the motherboard based on the target virtual network for transmitting the data to be communicated.

[0011] Optionally, the step of determining the estimated network quality of the preset virtual network for the data to be communicated based on the connection record, the data to be communicated, and the operating status information specifically includes:

[0012] The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information.

[0013] A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network.

[0014] The final estimated network quality is determined based on the first network quality index and the second network quality index.

[0015] Optionally, the step of determining the first network quality index of the preset virtual network based on the connection record, the data to be communicated, and the operating status information specifically includes:

[0016] The actual transmission efficiency of the preset virtual network for the historical communication data is determined based on the data volume of the historical communication data and the transmission information.

[0017] The theoretical transmission efficiency of the preset virtual network for the historical communication data is determined based on the network type of the preset virtual network.

[0018] The required transmission efficiency corresponding to the data to be communicated is determined based on the data volume of the data to be communicated and the operating status information of the chip.

[0019] The first estimated transmission efficiency of the preset virtual network for the chip is determined based on the actual transmission efficiency, the theoretical transmission efficiency, and the required transmission efficiency.

[0020] Based on the operating status information and the first estimated transmission efficiency, the second estimated transmission efficiency of the preset virtual network for the chip is determined.

[0021] The first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and network quality.

[0022] Optionally, the step of determining the second network quality index of the preset virtual network based on the network status of the preset virtual network specifically includes:

[0023] The network packet loss rate and bit error rate of the preset virtual network are determined based on the network anomaly characteristics.

[0024] The theoretical network quality of the preset virtual network is determined based on the network packet loss rate and the bit error rate.

[0025] The data output format of the data to be communicated by the chip and the data processing logic of the motherboard are obtained;

[0026] The network quality adjustment value of the preset virtual network is determined based on the data output format and the data processing logic.

[0027] The second network quality index is determined based on the theoretical network quality and the network quality adjustment value.

[0028] Optionally, the step of determining the target virtual network whose estimated network quality meets preset conditions specifically includes:

[0029] Determine the preferred target virtual network whose estimated network quality is higher than the preferred network quality index;

[0030] Identify available target virtual networks whose estimated network quality is higher than the available network quality index but lower than the preferred network quality index; the preferred network quality index is higher than the available network quality index.

[0031] Optionally, the step of establishing a data communication connection between the chip and the motherboard based on the target virtual network further includes:

[0032] Based on the preferred target virtual network, a preferred data communication connection is established between the chip and the motherboard;

[0033] An alternative data communication connection is established between the available target virtual network and the motherboard to replace the preferred data communication connection in the event of a failure of the preferred data communication connection.

[0034] Optionally, the method further includes:

[0035] Once a data communication connection between a chip and the motherboard is established through the target virtual network, other chips with the same operating status information as that chip are searched for.

[0036] Using the same target virtual network, establish data communication connections between other chips and the motherboard that have the same operating status information.

[0037] A second aspect of the present invention provides a chip and motherboard connection device applied to a motherboard module, the motherboard module including a motherboard and multiple chips, the motherboard having multiple slots for placing the chips, the chips and the motherboard being connected via a virtual network interface, the virtual network including multiple types, the method including:

[0038] An information acquisition unit is used to acquire connection records of a preset virtual network of the chip within a preset time period; the connection records include historical communication data of the preset virtual network within the preset time period and transmission information corresponding to the historical communication data; and to acquire operating status information of the chip connected to the preset virtual network.

[0039] A network determination unit is configured to determine, based on the connection record, the data to be communicated, and the operating status information, the estimated network quality of the preset virtual network for the data to be communicated; and to determine the target virtual network whose estimated network quality meets preset conditions.

[0040] A connection establishment unit is used to establish a data communication connection between the chip and the motherboard based on the target virtual network, and to transmit the data to be communicated.

[0041] Optionally, the network determination unit is specifically used for:

[0042] The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information.

[0043] A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network.

[0044] The final estimated network quality is determined based on the first network quality index and the second network quality index.

[0045] Optionally, the network determining unit is further specifically used for:

[0046] The actual transmission efficiency of the preset virtual network for the historical communication data is determined based on the data volume of the historical communication data and the transmission information.

[0047] The theoretical transmission efficiency of the preset virtual network for the historical communication data is determined based on the network type of the preset virtual network.

[0048] The required transmission efficiency corresponding to the data to be communicated is determined based on the data volume of the data to be communicated and the operating status information of the chip.

[0049] The first estimated transmission efficiency of the preset virtual network for the chip is determined based on the actual transmission efficiency, the theoretical transmission efficiency, and the required transmission efficiency.

[0050] Based on the operating status information and the first estimated transmission efficiency, the second estimated transmission efficiency of the preset virtual network for the chip is determined.

[0051] The first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and network quality.

[0052] Optionally, the network determining unit is further specifically used for:

[0053] The network packet loss rate and bit error rate of the preset virtual network are determined based on the network anomaly characteristics.

[0054] The theoretical network quality of the preset virtual network is determined based on the network packet loss rate and the bit error rate.

[0055] The data output format of the data to be communicated by the chip and the data processing logic of the motherboard are obtained;

[0056] The network quality adjustment value of the preset virtual network is determined based on the data output format and the data processing logic.

[0057] The second network quality index is determined based on the theoretical network quality and the network quality adjustment value.

[0058] Optionally, the network determining unit is further specifically used for:

[0059] Determine the preferred target virtual network whose estimated network quality is higher than the preferred network quality index;

[0060] Identify available target virtual networks whose estimated network quality is higher than the available network quality index but lower than the preferred network quality index; the preferred network quality index is higher than the available network quality index.

[0061] Optionally, the connection establishment unit is specifically used for:

[0062] Based on the preferred target virtual network, a preferred data communication connection is established between the chip and the motherboard;

[0063] An alternative data communication connection is established between the available target virtual network and the motherboard to replace the preferred data communication connection in the event of a failure of the preferred data communication connection.

[0064] Optionally, the connection establishment unit is further specifically used for:

[0065] Once a data communication connection between a chip and the motherboard is established through the target virtual network, other chips with the same operating status information as that chip are searched for.

[0066] Using the same target virtual network, establish data communication connections between other chips and the motherboard that have the same operating status information.

[0067] A third aspect of the present invention provides an electronic device, characterized in that it comprises:

[0068] One or more processors; memory; one or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, and the one or more applications are configured to perform the method as described in the first aspect.

[0069] A fourth aspect of the present invention provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores program code that can be invoked by a processor to execute the method described in the first aspect.

[0070] In summary, this invention provides a method, apparatus, electronic device, and storage medium for connecting a chip and a motherboard. It enables the connection between the chip and the motherboard through a virtual network and can select an available virtual network for the chip to establish a connection with the motherboard based on the current network quality. This effectively ensures the stability of the connection and avoids problems such as loose connections, poor contact, and aging of gold fingers between interfaces caused by direct hardware interface connections, which can lead to signal transmission failures. Attached Figure Description

[0071] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0072] Figure 1 This is a flowchart illustrating the chip and motherboard connection method according to an embodiment of the present invention.

[0073] Figure 2 This is a functional block diagram of the chip and motherboard connection device according to an embodiment of the present invention;

[0074] Figure 3 This is a structural block diagram of an electronic device for performing a chip and motherboard connection method according to an embodiment of the present invention.

[0075] Figure 4 This is a structural block diagram of a computer-readable storage medium for storing or carrying program code implementing a chip and motherboard connection method according to an embodiment of the present invention.

[0076] icon:

[0077] Information acquisition unit 110; network determination unit 120; connection establishment unit 130; electronic device 300; processor 310; memory 320; computer-readable storage medium 400; program code 410. Detailed Implementation

[0078] In traditional board and chip connection modules, the connection method usually involves setting up multiple card slots with physical connection interfaces on the motherboard, fixing the chip in the card slot, and connecting the chip's output interface to the connection interface in the card slot to achieve the connection between the chip and the motherboard. However, using this connection method is prone to problems such as loose connections, poor contact, and aging of gold fingers between interfaces due to environmental factors such as process, assembly, and collision.

[0079] Therefore, finding a better way to connect chips and motherboards is a problem that urgently needs to be solved.

[0080] In view of this, the inventors of this invention have designed a chip and motherboard connection method, device, electronic device and storage medium, which realizes the connection between the chip and the motherboard through a virtual network, and can select an available virtual network for the chip to establish a connection with the motherboard based on the current network quality of the virtual network, effectively ensuring the stability of the connection and avoiding the problems of loose connection, poor contact and gold finger aging between interfaces caused by direct connection of hardware interfaces, which in turn leads to signal transmission failure.

[0081] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0082] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0083] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0084] In the description of this invention, it should be noted that the terms "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. In addition, the terms "first," "second," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0085] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0086] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0087] Example

[0088] Please see Figure 1 This invention provides a chip and motherboard connection method, which is applied to a motherboard module. The motherboard module includes a motherboard and multiple chips. The motherboard is provided with multiple slots for placing the chips. The chips and the motherboard are connected through a virtual network interface, and the virtual network includes multiple types.

[0089] It should be noted that the motherboard module used in the chip and motherboard connection method provided in this embodiment of the invention can be a traditional motherboard module with physical connection interfaces in the slot, or a motherboard module specifically designed for this method where the slot is only used to fix the chip and does not have physical connection interfaces. For traditional motherboard modules, this method can be used as an alternative to traditional physical connection schemes. When a fault is detected in the physical connection interface, this scheme can be executed, provided that both the chip and the motherboard support connection via a virtual network. For motherboard modules specifically designed for this method, both the chip and the motherboard are equipped with corresponding network communication modules to support virtual network interface connection between the two parties. In actual execution, the provided virtual networks include multiple different types. When establishing a connection between the chip and the motherboard, this method determines that one or more stable virtual networks are selected from multiple stable virtual networks for use.

[0090] The chip and motherboard connection methods include:

[0091] Step S101: Obtain the connection records of the preset virtual network of the chip within a preset time period; the connection records include the historical communication data of the preset virtual network within the preset time period and the transmission information corresponding to the historical communication data.

[0092] Step S102: Obtain the operating status information of the chip connected to the preset virtual network.

[0093] Step S103: Determine the estimated network quality of the preset virtual network for the data to be communicated based on the connection record, the data to be communicated, and the running status information.

[0094] Step S104: Determine the target virtual network whose estimated network quality meets the preset conditions.

[0095] Step S105: Establish a data communication connection between the chip and the motherboard based on the target virtual network for transmitting the data to be communicated.

[0096] In this embodiment, compared with the prior art, when the chip establishes a connection with the motherboard, it first determines the estimated network quality of a preset virtual network, then determines the target virtual network based on the estimated network quality, and finally establishes a data communication connection with the motherboard based on the target virtual network to transmit the data to be communicated. The estimated network quality can characterize the data transmission capability and stability of the virtual network. For example, a lower estimated network quality indicates poorer data transmission capability and relatively weaker stability. By filtering the preset virtual networks through the estimated network quality, a target virtual network that meets the preset conditions is identified, and a more stable connection is achieved based on this target virtual network. When determining the estimated network quality, the connection records and data to be communicated of the preset virtual network within a preset time period, as well as the chip's operating status information, are used to determine the estimated network quality effectively and accurately, ensuring the effective and accurate determination of the target virtual network, thereby ensuring a stable connection between the chip and the motherboard.

[0097] As a preferred embodiment of the present invention, the specific implementation of the above steps will be described in detail below.

[0098] In step S101, the preset time period can be set according to the amount of data interaction between the chip and the motherboard. The higher the amount of data interaction, the shorter the preset time period can be; the lower the amount of data interaction, the longer the preset time period can be. For example, the preset time period can be 1 hour or half a day.

[0099] The connection records of the preset virtual network within a preset time period can be stored in the corresponding storage module on the motherboard or in the chip. Regardless of the storage method used, for the storage provider, after each use of the virtual network, the communication data transmitted through the virtual network and the corresponding transmission information are recorded to generate a connection record for easy retrieval at any time.

[0100] Historical communication data refers to data that has been transmitted within the aforementioned preset time period. The transmission information corresponding to historical communication data may include, but is not limited to, various information such as transmission time, data volume, transmission efficiency, data throughput, and abnormal situations during transmission.

[0101] In step S102, the operating status information of the chip to be connected is obtained. The operating status information includes, but is not limited to: whether it is operating normally; the current interaction status; and the current data processing capacity. The current interaction status includes, for example, interacting with multiple interaction objects. Data processing capacity includes, for example, data processing saturation and data processing margin.

[0102] In step S103, different types of data to be communicated have different characteristics and error resistance. The network quality of the same virtual network is also different for different data to be communicated. Therefore, the estimated network quality to be determined in step S103 is the network quality for the data to be communicated.

[0103] In the embodiments of the present invention, the number of preset virtual networks can be one or more. If there is one preset virtual network, the corresponding data processing is performed on the one preset virtual network. If there are multiple preset virtual networks, the data processing process of each preset virtual network is the same. For example, for each preset virtual network, the corresponding estimated network quality is determined according to the same implementation method.

[0104] In a preferred embodiment, step S103 specifically includes:

[0105] The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information.

[0106] A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network.

[0107] The final estimated network quality is determined based on the first network quality index and the second network quality index.

[0108] A first network quality indicator is determined by relevant information, which can represent the impact caused by external factors; a second network quality indicator is determined by network status, which can represent the impact generated by the virtual network itself; and the final network quality determined by the first and second network quality indicators is more accurate.

[0109] Based on this, as a preferred implementation method, the method for determining the first network quality index includes:

[0110] The actual transmission efficiency of the preset virtual network for the historical communication data is determined based on the data volume of the historical communication data and the transmission information.

[0111] The theoretical transmission efficiency of the preset virtual network for the historical communication data is determined based on the network type of the preset virtual network.

[0112] The required transmission efficiency corresponding to the data to be communicated is determined based on the data volume of the data to be communicated and the operating status information of the chip.

[0113] The first estimated transmission efficiency of the preset virtual network for the chip is determined based on the actual transmission efficiency, the theoretical transmission efficiency, and the required transmission efficiency.

[0114] Based on the operating status information and the first estimated transmission efficiency, the second estimated transmission efficiency of the preset virtual network for the chip is determined.

[0115] The first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and network quality.

[0116] In this embodiment, by utilizing the correspondence between network quality and transmission efficiency, as well as various information related to external factors, the network quality determined by external factors can be effectively and accurately determined. Furthermore, the correspondence between network quality and transmission efficiency includes both theoretical and practical correspondences, making the final determined network quality more consistent with reality.

[0117] When determining the first estimated transmission efficiency, the first estimated transmission efficiency can be determined based on a preset relationship between transmission efficiencies. This preset relationship can be: Actual transmission efficiency / Theoretical transmission efficiency = Preset parameter. Required transmission efficiency / first estimated transmission efficiency, therefore, first estimated transmission efficiency = preset parameters. Theoretical transmission efficiency Demand transmission efficiency / Actual transmission efficiency. In this embodiment, the preset parameters can be reasonably set according to the actual application scenario, and the preset relationships can also be reasonably set according to the actual application scenario. No limitations are imposed in this embodiment.

[0118] When determining the second estimated transmission efficiency, it can be determined through factors influencing transmission efficiency in the operational status information. These factors can be data processing margins or data processing efficiency, etc. Based on these factors, the relationship between the second estimated transmission efficiency and the first estimated transmission efficiency can be: Second estimated transmission efficiency = First estimated transmission efficiency / Influence factor The specific values ​​of the influencing factors can be reasonably set according to the actual application scenario, and the relationship between the three can also be reasonably set according to the actual application scenario. This application embodiment does not impose any limitations.

[0119] After determining the second estimated transmission efficiency, a first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and channel loss. The preset relationship between transmission efficiency and channel loss can be: Network Quality = Preset Conversion Factor Transmission efficiency. The preset conversion factor can be reasonably set based on the actual application scenario, and the relationship between transmission efficiency and channel loss can also be reasonably set based on the actual application scenario; this application embodiment does not impose any limitations on this.

[0120] As a preferred embodiment, the method for determining the second network quality index includes:

[0121] The network packet loss rate and bit error rate of the preset virtual network are determined based on the network anomaly characteristics.

[0122] The theoretical network quality of the preset virtual network is determined based on the network packet loss rate and the bit error rate.

[0123] The data output format of the data to be communicated by the chip and the data processing logic of the motherboard are obtained;

[0124] The network quality adjustment value of the preset virtual network is determined based on the data output format and the data processing logic.

[0125] The second network quality index is determined based on the theoretical network quality and the network quality adjustment value.

[0126] In this embodiment, the theoretical network quality of the virtual network is determined by the network packet loss rate and bit error rate of the virtual network. In practical applications, corresponding network anomaly resistance strategies are set, namely data output format and data processing strategy, and the network quality adjustment value is determined by the network anomaly resistance strategy. Finally, the second network quality index is effectively and accurately determined based on the theoretical network quality and the network quality adjustment value.

[0127] When determining the second network quality index, one can either add a weighted network quality adjustment value to the theoretical network quality to obtain the second network quality index, or set appropriate weight coefficients based on the network quality adjustment value, and then subtract the product of the weight coefficients and the network quality adjustment value from the theoretical network quality to obtain the second network quality index.

[0128] As another embodiment of the present invention, other implementation methods can also be adopted. For example, in addition to the first network quality index and the second network quality index, the final estimated network quality can be determined by combining the network quality index set by the user. Furthermore, by having the user label the network quality of different virtual networks, then performing machine training to obtain the corresponding machine learning model, and then determining the estimated network quality based on the machine learning model and the corresponding information of the virtual networks.

[0129] In a preferred embodiment, step S104 includes:

[0130] Determine the preferred target virtual network whose estimated network quality is higher than the preferred network quality index;

[0131] Identify available target virtual networks whose estimated network quality is higher than the available network quality index but lower than the preferred network quality index; the preferred network quality index is higher than the available network quality index.

[0132] In this embodiment, two types of target virtual networks are determined, and the preset conditions corresponding to the two target channels are different. It can be seen from the two conditions that the preferred target virtual network has a higher network quality than the available target virtual network. Therefore, in application, the preferred target virtual network and the available target virtual network can have different functions.

[0133] The preferred network quality indicators and available network quality indicators can be reasonably set according to the actual application scenario, and are limited in the embodiments of this application.

[0134] Based on the above determination method, step S105 specifically includes:

[0135] Based on the preferred target virtual network, a preferred data communication connection is established between the chip and the motherboard;

[0136] An alternative data communication connection is established between the available target virtual network and the motherboard to replace the preferred data communication connection in the event of a failure of the preferred data communication connection.

[0137] In this embodiment, when determining the target virtual network, two target virtual networks can be identified. Then, when establishing a data communication connection, one target virtual network serves as the primary virtual network, and the other target virtual network serves as the alternative virtual network. If the preferred data communication connection corresponding to the preferred virtual network encounters a problem, the alternative data communication connection corresponding to the alternative virtual network can be used as a substitute to continue transmitting the corresponding data. In this way, the stable connection between the chip and the motherboard is further improved, thereby enhancing the stability of data transmission.

[0138] In a preferred embodiment of this invention, after a data communication connection between the chip and the motherboard is established through the target virtual network, the chip-motherboard connection method provided in this embodiment further includes:

[0139] Find other chips with the same operating status information as this chip;

[0140] Using the same target virtual network, establish data communication connections between other chips and the motherboard that have the same operating status information.

[0141] Multiple chips are typically housed in motherboard slots, and these chips may be in the same or different operating states. To improve data connection efficiency for multiple chips with identical operating state information, once one chip has established a data communication connection with the motherboard through a target virtual network, the same target virtual network can be used to establish data communication connections between other chips and the motherboard.

[0142] In summary, the chip and motherboard connection method provided in this embodiment achieves the connection between the chip and the motherboard through a virtual network. Furthermore, it can select an available virtual network for the chip to establish a connection with the motherboard based on the current network quality, effectively ensuring the stability of the connection and avoiding problems such as loose connections, poor contact, and aging of gold fingers between interfaces caused by direct hardware interface connection, which could lead to signal transmission failures.

[0143] like Figure 2 As shown, the chip and motherboard connection device provided by this invention is applied to a motherboard module. The motherboard module includes a motherboard and multiple chips. The motherboard has multiple slots for placing the chips. The chips and the motherboard are connected via a virtual network interface. The virtual network includes multiple types. The device includes:

[0144] The information acquisition unit 110 is used to acquire the connection records of the preset virtual network of the chip within a preset time period; the connection records include historical communication data of the preset virtual network within the preset time period and transmission information corresponding to the historical communication data; and to acquire the operating status information of the chip connected to the preset virtual network.

[0145] The network determination unit 120 is configured to determine the estimated network quality of the preset virtual network for the data to be communicated based on the connection record, the data to be communicated, and the running status information; and to determine the target virtual network whose estimated network quality meets preset conditions.

[0146] The connection establishment unit 130 is used to establish a data communication connection between the chip and the motherboard based on the target virtual network, and to transmit the data to be communicated.

[0147] In a preferred embodiment of this invention, the network determination unit 120 is specifically used for:

[0148] The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information.

[0149] A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network.

[0150] The final estimated network quality is determined based on the first network quality index and the second network quality index.

[0151] In a preferred embodiment of this invention, the network determination unit 120 is further specifically used for:

[0152] The actual transmission efficiency of the preset virtual network for the historical communication data is determined based on the data volume of the historical communication data and the transmission information.

[0153] The theoretical transmission efficiency of the preset virtual network for the historical communication data is determined based on the network type of the preset virtual network.

[0154] The required transmission efficiency corresponding to the data to be communicated is determined based on the data volume of the data to be communicated and the operating status information of the chip.

[0155] The first estimated transmission efficiency of the preset virtual network for the chip is determined based on the actual transmission efficiency, the theoretical transmission efficiency, and the required transmission efficiency.

[0156] Based on the operating status information and the first estimated transmission efficiency, the second estimated transmission efficiency of the preset virtual network for the chip is determined.

[0157] The first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and network quality.

[0158] In a preferred embodiment of this invention, the network determination unit 120 is further specifically used for:

[0159] The network packet loss rate and bit error rate of the preset virtual network are determined based on the network anomaly characteristics.

[0160] The theoretical network quality of the preset virtual network is determined based on the network packet loss rate and the bit error rate.

[0161] The data output format of the data to be communicated by the chip and the data processing logic of the motherboard are obtained;

[0162] The network quality adjustment value of the preset virtual network is determined based on the data output format and the data processing logic.

[0163] The second network quality index is determined based on the theoretical network quality and the network quality adjustment value.

[0164] In a preferred embodiment of this invention, the network determination unit 120 is further specifically used for:

[0165] Determine the preferred target virtual network whose estimated network quality is higher than the preferred network quality index;

[0166] Identify available target virtual networks whose estimated network quality is higher than the available network quality index but lower than the preferred network quality index; the preferred network quality index is higher than the available network quality index.

[0167] In a preferred embodiment of this invention, the connection establishment unit 130 is specifically used for:

[0168] Based on the preferred target virtual network, a preferred data communication connection is established between the chip and the motherboard;

[0169] An alternative data communication connection is established between the available target virtual network and the motherboard to replace the preferred data communication connection in the event of a failure of the preferred data communication connection.

[0170] In a preferred embodiment of this invention, the connection establishment unit 130 is further specifically used for:

[0171] Once a data communication connection between a chip and the motherboard is established through the target virtual network, other chips with the same operating status information as that chip are searched for.

[0172] Using the same target virtual network, establish data communication connections between other chips and the motherboard that have the same operating status information.

[0173] The chip and motherboard connection device provided in this embodiment of the invention is used to implement the above-described chip and motherboard connection method. Therefore, the specific implementation method is the same as the above method and will not be repeated here.

[0174] like Figure 3 The diagram shows a structural block diagram of an electronic device 300 provided in an embodiment of the present invention. The electronic device 300 can be a smartphone, tablet computer, e-reader, or other electronic device capable of running applications. The electronic device 300 in this application may include one or more of the following components: a processor 310, a memory 320, and one or more applications, wherein the one or more applications can be stored in the memory 320 and configured to be executed by one or more processors 310, and the one or more applications are configured to perform the methods described in the foregoing method embodiments.

[0175] Processor 310 may include one or more processing cores. Processor 310 connects to various parts within the electronic device 300 using various interfaces and lines, and performs various functions and processes data of the electronic device 300 by running or executing instructions, programs, code sets, or instruction sets stored in memory 320, and by calling data stored in memory 320. Optionally, processor 310 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). Processor 310 may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the displayed content; and the modem handles wireless communication. It is understood that the modem may also not be integrated into processor 310 and may be implemented separately using a communication chip.

[0176] The memory 320 may include random access memory (RAM) or read-only memory (ROM). The memory 320 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 320 may include a program storage area and a data storage area. The program storage area may store instructions for implementing an operating system, instructions for implementing at least one function (such as touch functionality, sound playback functionality, image playback functionality, etc.), and instructions for implementing the various method embodiments described below. The data storage area may also store data created by the terminal during use (such as phonebook data, audio and video data, chat log data, etc.).

[0177] like Figure 4 The diagram shows a structural block diagram of a computer-readable storage medium 400 provided in an embodiment of the present invention. The computer-readable medium stores program code 410, which can be called by a processor to execute the methods described in the above method embodiments.

[0178] The computer-readable storage medium 400 may be an electronic memory such as flash memory, EEPROM (Electrically Erasable Programmable Read-Only Memory), EPROM, hard disk, or ROM. Optionally, the computer-readable storage medium 400 includes a non-transitory computer-readable storage medium. The computer-readable storage medium 400 has storage space for program code 410 that performs any of the method steps described above. This program code 410 can be read from or written to one or more computer program products. The program code 410 may be compressed, for example, in a suitable form.

[0179] In summary, the present invention provides a method, apparatus, electronic device, and storage medium for connecting a chip and a motherboard, which can dynamically adjust the network connection mode of the device according to the current network usage status and available network resources, and provide a user experience that meets the user's needs while ensuring stable network connection.

[0180] In the embodiments disclosed in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0181] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0182] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A chip and main board connection method, characterized by, The method is applied to a motherboard module, which includes a motherboard and multiple chips. The motherboard has multiple slots for placing the chips. The chips and the motherboard are connected via a virtual network interface, which includes multiple types. Obtain the connection records of the chip's preset virtual network within a preset time period; the connection records include historical communication data of the preset virtual network within the preset time period and the transmission information corresponding to the historical communication data; Obtain the operating status information of the chip connected to the preset virtual network; The estimated network quality of the preset virtual network for the data to be communicated is determined based on the connection record, the data to be communicated, and the running status information. Determine the target virtual network whose estimated network quality meets preset conditions; A data communication connection is established between the chip and the motherboard based on the target virtual network for transmitting the data to be communicated; The step of determining the estimated network quality of the preset virtual network for the data to be communicated based on the connection record, the data to be communicated, and the operating status information specifically includes: The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information. A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network. The final estimated network quality is determined based on the first network quality index and the second network quality index.

2. The chip and main board connection method according to claim 1, wherein The step of determining the first network quality index of the preset virtual network based on the connection record, the data to be communicated, and the operating status information specifically includes: The actual transmission efficiency of the preset virtual network for the historical communication data is determined based on the data volume of the historical communication data and the transmission information. The theoretical transmission efficiency of the preset virtual network for the historical communication data is determined based on the network type of the preset virtual network. The required transmission efficiency corresponding to the data to be communicated is determined based on the data volume of the data to be communicated and the operating status information of the chip. The first estimated transmission efficiency of the preset virtual network for the chip is determined based on the actual transmission efficiency, the theoretical transmission efficiency, and the required transmission efficiency. Based on the operating status information and the first estimated transmission efficiency, the second estimated transmission efficiency of the preset virtual network for the chip is determined. The first network quality index is determined based on the second estimated transmission efficiency and the preset relationship between transmission efficiency and network quality.

3. The chip and main board connection method according to claim 2, wherein The step of determining the second network quality index of the preset virtual network based on the network status of the preset virtual network specifically includes: The network packet loss rate and bit error rate of the preset virtual network are determined based on the network anomaly characteristics. The theoretical network quality of the preset virtual network is determined based on the network packet loss rate and the bit error rate. The data output format of the data to be communicated by the chip and the data processing logic of the motherboard are obtained; The network quality adjustment value of the preset virtual network is determined based on the data output format and the data processing logic. The second network quality index is determined based on the theoretical network quality and the network quality adjustment value.

4. The chip and main board connecting method according to claim 3, wherein The step of determining the target virtual network whose estimated network quality meets the preset conditions specifically includes: Determine the preferred target virtual network whose estimated network quality is higher than the preferred network quality index; Identify available target virtual networks whose estimated network quality is higher than the available network quality index but lower than the preferred network quality index; the preferred network quality index is higher than the available network quality index.

5. The chip and main board connecting method according to claim 4, wherein The step of establishing a data communication connection between the chip and the motherboard based on the target virtual network further includes: Based on the preferred target virtual network, a preferred data communication connection is established between the chip and the motherboard; An alternative data communication connection is established between the available target virtual network and the motherboard to replace the preferred data communication connection in the event of a failure of the preferred data communication connection.

6. The chip and main board connecting method as claimed in claim 5, wherein The method further includes: Once a data communication connection between a chip and the motherboard is established through the target virtual network, other chips with the same operating status information as that chip are searched for. Using the same target virtual network, establish data communication connections between other chips and the motherboard that have the same operating status information.

7. A chip and main board connecting device, characterized by comprising: Applied to a motherboard module, the motherboard module includes a motherboard and multiple chips. The motherboard has multiple slots for placing the chips. The chips and the motherboard are connected via a virtual network interface. The virtual network includes multiple types. The device includes: An information acquisition unit is used to acquire connection records of a preset virtual network of the chip within a preset time period; the connection records include historical communication data of the preset virtual network within the preset time period and transmission information corresponding to the historical communication data; and to acquire operating status information of the chip connected to the preset virtual network. A network determination unit is configured to determine, based on the connection record, the data to be communicated, and the operating status information, the estimated network quality of the preset virtual network for the data to be communicated; and to determine the target virtual network whose estimated network quality meets preset conditions. A connection establishment unit is used to establish a data communication connection between the chip and the motherboard based on the target virtual network, and to transmit the data to be communicated; The network determination unit is specifically used for: The first network quality index of the preset virtual network is determined based on the connection record, the data to be communicated, and the running status information. A second network quality index of the preset virtual network is determined based on the network status of the preset virtual network; the network status includes network anomaly characteristics of the preset virtual network. The final estimated network quality is determined based on the first network quality index and the second network quality index.

8. An electronic device, comprising: include: One or more processors; Memory; one or more applications, wherein the one or more applications are stored in the memory and are configured to be executed by the one or more processors, the one or more programs configured to perform the method of any of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores program codes, and the program codes can be invoked by the processor to execute the method of any of claims 1-6.