FIFO-based PCI bus multi-acquisition board data synchronous acquisition method

Abstract

The application relates to a synchronous parallel data collection method of collection board cards, in particular to a PCI bus multi-collection board card data synchronous collection method based on FIFO, which is used for solving the problem that it is difficult to make the data quantity collected by multiple collection board cards of the same type equal when the PCI bus multi-collection board card data is collected by using the flag bit of FIFO, and the PCI bus multi-collection board card data synchronous collection method based on FIFO is characterized in that the number of data in the FIFO of each PCI collection board card is divided by the collection channel number when the first half-full flag arrives, only the remainder part of data is recorded, and the phenomenon of internal data misplacement of multiple PCI collection board cards is avoided, and the error is only one sampling point.

Description

Technical Field

[0001] This invention relates to a method for synchronous parallel data acquisition using acquisition boards, specifically a method for synchronous data acquisition using multiple acquisition boards based on a FIFO PCI bus. Background Technology

[0002] Most data acquisition cards currently support FIFO (First In First Out) storage. If a computer has multiple acquisition cards of the same model, even if they are triggered simultaneously, it cannot be guaranteed that their FIFOs will always be in the same state. This makes it difficult to ensure that the number of data records started by multiple acquisition cards of the same model is equal when the first half-full flag arrives when storing data using the flag bits of the FIFO. The reason for this problem may be that one acquisition card has just reached the half-full flag while another has reached the full flag, resulting in a difference of half a FIFO's worth of data in the number of records recorded by the two acquisition cards, which in turn leads to unequal data lengths collected by multiple acquisition cards.

[0003] Figure 1 Data was collected from two identical PCI acquisition cards. Data C represents data from PCI acquisition card 1, and data B represents data from PCI acquisition card 2. Both PCI acquisition cards 1 and 2 were triggered simultaneously by the industrial computer, but the acquired data was out of sync. This is because when triggered, the FIFO of PCI acquisition card 1 was either half-full or not yet half-full, while the FIFO of PCI acquisition card 2 was already more than half-full. This resulted in PCI acquisition card 1 having an extra half-FO of data, causing inconsistencies in the data collected by the two PCI acquisition cards and affecting the accuracy of multi-channel data acquisition. Summary of the Invention

[0004] The purpose of this invention is to address the shortcoming that it is difficult to ensure that the number of data collected by multiple acquisition boards of the same model is equal when synchronously acquiring data using the flag bits of a FIFO on a PCI bus multi-acquisition board. Therefore, this invention provides a FIFO-based method for synchronous acquisition of data from multiple acquisition boards on a PCI bus.

[0005] To address the shortcomings of the existing technology, the present invention provides the following technical solution:

[0006] The FIFO-based PCI bus multi-acquisition board data synchronous acquisition method is characterized by the following steps:

[0007] Step 1: The industrial control computer uses each PCI acquisition board as a acquisition channel and simultaneously triggers multiple PCI acquisition boards of the same model to acquire data at the same time; each PCI acquisition board has at least one FIFO memory.

[0008] Step 2: The industrial control computer controls each PCI acquisition board to perform a modulo operation. Specifically, when the first half-full flag of a certain FIFO memory in the PCI acquisition board arrives, the number of data in all FIFO memories is moduloed by the number of acquisition channels, and then the data of the remainder part in each FIFO memory is recorded.

[0009] Step 3: Each PCI acquisition board acquires data simultaneously until data acquisition is complete.

[0010] Furthermore, in step 1, the PCI acquisition board has a FIFO memory.

[0011] Furthermore, in step 1, the number of acquisition channels is 2.

[0012] Compared with the prior art, the beneficial effects of the present invention are:

[0013] This invention presents a FIFO-based method for synchronous data acquisition across multiple PCI bus acquisition boards. By taking the remainder between the number of data entries in the FIFO of each PCI acquisition board and the number of acquisition channels when the first half-full flag arrives, only the remainder is recorded. This avoids data misalignment within multiple PCI acquisition boards, and the error is limited to a single sampling point. This invention ensures consistency and simultaneity in data acquisition from multiple identical PCI acquisition boards triggered simultaneously by an industrial control computer. The algorithm successfully solves the problem of simultaneous acquisition across multiple channels on a PCI bus and has broad reference value. Attached Figure Description

[0014] Figure 1 This is a graph showing the data collected by two identical PCI acquisition boards that were simultaneously triggered by an industrial control computer.

[0015] Figure 2 This is a graph showing the data collected by two identical PCI acquisition boards simultaneously triggered by an industrial control computer in an embodiment of the FIFO-based PCI bus multi-acquisition board data synchronization acquisition method of the present invention. Detailed Implementation

[0016] The present invention will be further described below with reference to the accompanying drawings and exemplary embodiments.

[0017] The method for synchronous data acquisition from multiple acquisition boards on a FIFO-based PCI bus includes the following steps:

[0018] Step 1: The industrial control computer uses each PCI acquisition board as a acquisition channel and simultaneously triggers two PCI acquisition boards of the same model to acquire data at the same time; each PCI acquisition board has a FIFO memory.

[0019] Step 2: The industrial control computer controls each PCI acquisition board to perform a modulo operation. Specifically, when the first half-full flag of a certain FIFO memory in the PCI acquisition board arrives, the number of data in all FIFO memories is moduloed by the number of acquisition channels, and then the data of the remainder part in each FIFO memory is recorded.

[0020] The two PCI acquisition cards are PCI acquisition card 1 and PCI acquisition card 2, respectively. PCI acquisition card 1 acquires data C, and PCI acquisition card 2 acquires data B.

[0021] Assume that each PCI acquisition board's FIFO can record 110 data points;

[0022] First scenario:

[0023] At startup, the FIFO of PCI acquisition board 1 is only half full, for example, 55 data points;

[0024] The FIFO of PCI acquisition board #2 is already more than half full, for example, 76 data points;

[0025] At this time, the half-full indicator of the FIFO on PCI acquisition board 1 arrives.

[0026] The remainder of the data in the FIFO of PCI acquisition board 1 (55) is calculated by dividing it by the number of acquisition channels (2). The remainder is 1, so only the last data in FIFO 1 is retained.

[0027] The remainder of the data count 76 in FIFO 2 is 0, so all data in FIFO 2 is cleared.

[0028] At this point, the data of FIFO 1 and FIFO 2 differ by only one sampling point, and it can be considered that the data synchronization results of channel 1 and channel 2 differ by only one sampling data point.

[0029] The second scenario:

[0030] At startup, the FIFO of PCI acquisition board 1 is not half full, for example, 30 data points;

[0031] The FIFO of PCI acquisition board #2 is already more than half full, for example, 76 data points;

[0032] The industrial computer continues to collect data until the FIFO of PCI acquisition board 1 reaches the half-full mark.

[0033] The remainder of the number of data in the FIFO of PCI acquisition board 1 (30+25=55) is calculated by taking the remainder of the number of acquisition channels 2. The remainder is 1, so only the last data in FIFO 1 is retained.

[0034] The remainder of the number of data points in FIFO 2 (76+25=101) is calculated by dividing the number of acquisition channels by 2. The remainder is 1, so only the last data point in FIFO 1 is retained.

[0035] At this point, there is no error in the data of FIFO 1 and FIFO 2, so it can be assumed that the data synchronization results of channel 1 and channel 2 are consistent;

[0036] Step 3: After the above modulo operation, PCI acquisition board 1 and PCI acquisition board 2 start acquiring data simultaneously until the data acquisition is complete.

[0037] Using this invention, after multiple acquisition and testing, the acquired waveforms are as follows: Figure 2 As shown, it can reflect the true situation of the measured parameters well.

[0038] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. For those skilled in the art, modifications can be made to the specific technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. However, these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions protected by the present invention.

Claims

1. A method for synchronous data acquisition from multiple acquisition boards on a PCI bus based on FIFO, characterized in that, Includes the following steps: Step 1: The industrial control computer uses each PCI acquisition board as a acquisition channel and simultaneously triggers multiple PCI acquisition boards of the same model to acquire data at the same time; each PCI acquisition board has at least one FIFO memory. Step 2: The industrial control computer controls each PCI acquisition board to perform a remainder operation. Specifically, when the first half-full flag of a certain FIFO memory in the PCI acquisition board arrives, the number of data in all FIFO memories of each PCI acquisition board is calculated as a remainder by the number of acquisition channels, and then the data of the remainder in each FIFO memory is recorded. Step 3: Each PCI acquisition board acquires data simultaneously until data acquisition is complete.

2. The method for synchronous data acquisition from multiple acquisition boards based on FIFO using a PCI bus according to claim 1, characterized in that: In step 1, the PCI acquisition board has a FIFO memory.

3. The FIFO-based PCI bus multi-acquisition board data synchronous acquisition method according to claim 1 or 2, characterized in that: In step 1, there are 2 acquisition channels.

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