Method and system for automatic generation of analog circuits

Abstract

This invention provides an automatic method and system for generating analog circuits. The circuit partitioning step divides the radio frequency (RF) circuit into multiple circuit units. The circuit segmentation step converts each circuit unit into multiple circuit segments. Each circuit segment includes at least one main component data and at least one peripheral component data. The main component model establishment step establishes a main component model, which corresponds to the main component data of each circuit segment. The circuit segment model establishment step establishes a circuit segment model, which corresponds to each circuit segment. The model combination step combines the main component model corresponding to each circuit segment with the circuit segment model to generate the analog circuit. This automatically converts the RF circuit into an analog circuit suitable for analog software.

Description

Technical Field

[0001] This invention relates to an automatic generation method and system for analog circuits, and more particularly to an automatic generation method and system for radio frequency analog circuits. Background Technology

[0002] RF engineers can simulate RF circuits using simulation tools during the circuit development phase to initially confirm circuit performance and make corrections. Since circuit layout and simulation are performed using different software tools, after the RF engineer completes the circuit layout, the electrical simulation engineer must manually input the circuit into the simulation tool and set the relevant parameters. However, with the increasing demand for wireless transmission functions in mobile devices, the number of wireless channels in the RF circuit has increased significantly, as has its complexity. Electrical simulation engineers now spend considerable time inputting the circuit into the simulation tool, and errors may occur during this process.

[0003] Therefore, it can be seen that there is currently a lack of an automatic method and system for generating analog circuits that can reduce the conversion time of analog circuits in this field, and researchers are seeking solutions. Summary of the Invention

[0004] Therefore, the purpose of this invention is to provide an automatic generation method and system for analog circuits, which divides the circuit unit in the radio frequency circuit into multiple circuit segments, and generates a main component model and a circuit segment model based on the main component data and peripheral component data in the circuit segment, and connects the two models to convert the radio frequency circuit into an analog circuit.

[0005] According to one embodiment of the present invention, an automatic analog circuit generation method is provided for automatically generating an analog circuit based on a radio frequency (RF) circuit. The automatic analog circuit generation method includes a circuit partitioning step, a circuit segmentation step, a main component model establishment step, a circuit segment model establishment step, and a model combining step. The circuit partitioning step involves driving a processor to retrieve the RF circuit from a memory unit and dividing the RF circuit into multiple circuit units. The circuit segmentation step involves driving the processor to convert each circuit unit into multiple circuit segments based on a circuit connection relationship between each circuit unit. Each circuit segment includes at least one main component data and at least one peripheral component data. The main component model establishment step involves driving the processor to establish at least one main component model based on at least one main component data of each circuit segment and at least one first parameter corresponding to the at least one main component data. The at least one main component model corresponds to at least one main component data of each circuit segment. The circuit segment model establishment step involves driving the processor to establish a circuit segment model based on at least one peripheral component data of each circuit segment and at least one second parameter corresponding to the at least one peripheral component data. The circuit segment model corresponds to each circuit segment. The model integration step involves the driver processor combining the model of at least one main component corresponding to each circuit segment with the circuit segment model to generate an analog circuit. The circuit partitioning step includes a first partitioning step and a second partitioning step. The first partitioning step involves the driver processor dividing the radio frequency circuit into multiple frequency band circuits. The second partitioning step involves the driver processor dividing each frequency band circuit into the multiple circuit units. At least one first parameter is an S-parameter of at least one main component of each circuit unit, and at least one second parameter is an S-parameter of at least one peripheral component of each circuit unit.

[0006] Therefore, the automatic generation method of analog circuits of the present invention can automatically convert radio frequency circuits into analog circuits suitable for analog software, thereby reducing conversion time.

[0007] According to one embodiment of the present invention, an automatic analog circuit generation system is provided for automatically generating an analog circuit based on a radio frequency (RF) circuit. The automatic analog circuit generation system includes a storage unit and a processor. The storage unit stores the RF circuit, multiple circuit units, multiple circuit segments corresponding to each circuit unit, at least one first parameter and at least one second parameter corresponding to each circuit segment. Each circuit segment includes at least one main component data and at least one peripheral component data. The processor is signal-connected to the storage unit and configured to implement a circuit partitioning step, a circuit segmentation step, a main component model building step, a circuit segment model building step, and a model combining step. The circuit partitioning step obtains the RF circuit from the storage unit and divides the RF circuit into the multiple circuit units. The circuit segmentation step converts each circuit unit into the multiple circuit segments based on a circuit connection relationship of each circuit unit. The main component model building step builds at least one main component model based on at least one main component data of each circuit segment and at least one first parameter corresponding to the at least one main component data. The at least one main component model corresponds to at least one main component data of each circuit segment. The circuit segment model establishment step involves creating a circuit segment model based on at least one peripheral component data and at least one second parameter corresponding to that peripheral component data for each circuit segment. Each circuit segment model corresponds to a specific circuit segment. The model integration step combines the model of at least one main component corresponding to each circuit segment with the circuit segment model to generate an analog circuit. The circuit partitioning step includes a first partitioning step and a second partitioning step. The first partitioning step divides the radio frequency circuit into multiple frequency band circuits. The second partitioning step divides each frequency band circuit into the multiple circuit units. The at least one first parameter is an S-parameter of at least one main component of each circuit unit, and the at least one second parameter is an S-parameter of at least one peripheral component of each circuit unit.

[0008] Therefore, the automatic analog circuit generation system of the present invention can automatically convert radio frequency circuits into analog circuits suitable for analog software, reducing conversion time. Attached Figure Description

[0009] Figure 1 This is a block diagram illustrating an automatic generation system for analog circuits according to a first embodiment of the present invention;

[0010] Figure 2 It is a drawing according to Figure 1 A schematic diagram of the radio frequency circuit of the automatic generation system of analog circuits;

[0011] Figure 3 It is a drawing according to Figure 1 A schematic diagram of the circuit unit of the automatic generation system of analog circuits;

[0012] Figure 4 It is a drawing according to Figure 1A schematic diagram of the main component models of an automatic analog circuit generation system;

[0013] Figure 5 It is a drawing according to Figure 1 A schematic diagram of the circuit segment model of the automatic generation system for analog circuits;

[0014] Figure 6 It is a drawing according to Figure 1 A schematic diagram of the analog circuit of the automatic generation system for analog circuits; and

[0015] Figure 7 This is a flowchart illustrating an automatic generation method for analog circuits according to a second embodiment of the present invention.

[0016] The reference numerals in the attached figures are explained as follows:

[0017] 11: System Database

[0018] 12: Cloud Database

[0019] 100: Automatic Generation System

[0020] 110: Storage unit

[0021] 120: Processor

[0022] C_B1, C_B2: Bandwidth circuit

[0023] C_RF: Radio Frequency Circuit

[0024] C_sim: Analog Circuits

[0025] F1, F2, F3: Circuit sections

[0026] L_pin, L_port: Labels

[0027] M_PR1, M_PR2: Main component models

[0028] M_F1, M_F2, M_F3: Circuit segment models

[0029] P1: First parameter

[0030] P2: Second parameter

[0031] S100, S200: Automatic generation method

[0032] S11, S21: Circuit partitioning steps

[0033] S211: First Partition Steps

[0034] S212: Second Partitioning Steps

[0035] S13, S23: Circuit segmentation steps

[0036] S15, S25: Steps for establishing the main component model

[0037] S17, S26: Steps for establishing the circuit segment model

[0038] S19, S29: Model Combination Steps

[0039] S27, S28, S30, S31, S32: Steps

[0040] U1: Circuit Unit Detailed Implementation

[0041] Please see Figure 1 , Figure 1 This is a block diagram illustrating an automatic analog circuit C_sim generation system 100 according to a first embodiment of the present invention. The automatic analog circuit C_sim generation system 100 is used to automatically generate an analog circuit C_sim based on a radio frequency circuit C_RF. The automatic analog circuit C_sim generation system 100 includes a storage unit 110 and a processor 120. The storage unit 110 stores the radio frequency circuit C_RF, a plurality of circuit units U1, and a plurality of circuit segments F1, F2, F3 (e.g., ...) corresponding to each circuit unit U1. Figure 3 As shown), each circuit segment (F1, F2, F3) has at least one first parameter P1 and at least one second parameter P2. Each circuit segment (e.g., circuit segment F1) includes at least one main component data and at least one peripheral component data. The processor 120 is signal-connected to the storage unit 110 and configured to implement the automatic generation method S100 for analog circuit C_sim. The automatic generation method S100 for analog circuit C_sim includes a circuit partitioning step S11, a circuit segmentation step S13, a main component model establishment step S15, a circuit segment model establishment step S17, and a model combination step S19.

[0042] Specifically, the storage unit 110 may be a memory bank or other data storage element, and the processor 120 may be a microprocessor, a central processing unit (CPU), or other electronic processing unit, but the present invention is not limited thereto. In the first embodiment, the radio frequency circuit C_RF is read from the circuit layout tool, the first parameter P1 is read from the product specification manual in the cloud database 12 corresponding to the main components, and the second parameter P2 is read from the system database 11 built into the simulation tool. In this embodiment, the simulation tool may be an Advanced Design System (ADS), but the present invention is not limited thereto. Thus, the automatic generation system 100 for the analog circuit C_sim of the present invention can automatically convert the radio frequency circuit C_RF into an analog circuit C_sim suitable for the simulation software, reducing conversion time.

[0043] Please refer to the following: Figures 1 to 2 , Figure 2 It is a drawing according to Figure 1 A schematic diagram of the radio frequency (RF) circuit C_RF of the automatic generation system 100 for the analog circuit C_sim is shown. The circuit partitioning step S11 involves driving a processor 120 to retrieve the RF circuit C_RF from a storage unit 110 and dividing the RF circuit C_RF into multiple circuit units U1. Specifically, the RF circuit C_RF can be a circuit diagram drawn using a circuit layout tool. In this embodiment, the circuit partitioning step S11 can divide the RF circuit C_RF into multiple circuit units U1 based on functionality, but this invention is not limited thereto. The RF circuit C_RF includes multiple frequency band circuits C_B1 and C_B2, and each frequency band circuit C_B1 and C_B2 includes multiple circuit units U1.

[0044] Please refer to the following: Figures 1 to 3 , Figure 3 It is a drawing according to Figure 1This is a schematic diagram of the circuit unit U1 of the automatic generation system 100 for the analog circuit C_sim. The circuit segmentation step S13 involves the drive processor 120 converting each circuit unit U1 into multiple circuit segments F1, F2, and F3 based on a circuit connection relationship. Specifically, the circuit segmentation step S13 converts all components in each circuit unit U1 into a string according to their connection order, and segments the string according to the main components to form the multiple circuit segments F1, F2, and F3. At least one main component data of each circuit segment (i.e., one of circuit segments F1, F2, and F3) corresponds to at least one main component of each circuit unit U1, and at least one peripheral component data corresponds to at least one peripheral component of the circuit unit U1. The main component can be either a communication module or an RF module, and the at least one peripheral component can be either a resistor, a capacitor, or an inductor. Furthermore, the peripheral component can be any electronic component other than the main component. At least one primary component data and at least one peripheral component data may include at least one of a component type label, a component name label, and a connection pin label. Each circuit segment (i.e., one of circuit segments F1, F2, and F3) may further include at least one connection line data, and at least one of the plurality of circuit segments F1, F2, and F3 may further include a connection component data.

[0045] For example, circuit unit U1 is converted into circuit segments F1, F2, and F3, as shown in Table 1. Circuit segment F1 contains main component data (U)3_FL2100_6, peripheral component data (C)C2100, (TD)C2103, connection line data (S)TX_B13_PA0, (S)TX_B13_PA1, and connecting component data (U)U1900_16 connected to the previous circuit unit (not shown in the figure). In the main component data (U)3_FL2100_6, "(U)", "3", "FL2100", and "6" are the component type label, connection pin label, component name label, and connection pin label of the main component FL2100, respectively. The component type label is used to indicate the corresponding circuit component type, as shown in Table 2. The component name label indicates the model of the aforementioned component. (U) corresponds to peripheral components and components other than connecting lines, such as main components and connecting components connected to the adjacent previous circuit unit. (C), (TL), (TC), and (TD) correspond to peripheral components, while (S) and (T) correspond to connecting lines. The connection pin label indicates the pins through which the aforementioned component connects to adjacent components. In the peripheral component data (C)C2100, "(C)" and "C2100" can respectively represent the component type label and component name label of the peripheral component. In other words, the main component data (U)3_FL2100_6 indicates a main component with model number FL2100, and the 3rd pin of the main component FL2100 is connected to circuit segment F1, and its 6th pin is connected to the next circuit segment F2. The peripheral component data (C)C2100 indicates a capacitor with the code C2100.

[0046] Table 1

[0047]

[0048] Table 2

[0049]

[0050] Furthermore, a circuit segment (i.e., one of circuit segments F1, F2, and F3) includes at least one main component data and at least one peripheral component data, corresponding to at least one main component and a peripheral component connected to the at least one main component. Therefore, a circuit segment (i.e., one of circuit segments F1, F2, and F3) is used to represent peripheral components and connecting lines connected to the main component. Figure 3 The figure only shows the circuit segments F1, F2, and F3 corresponding to one of the circuit units U1. The number of circuit segments (not shown) corresponding to the other circuit units U1 may vary depending on their circuit complexity and the number of main components.

[0051] Please refer to the following: Figures 1 to 4 , Figure 4 It is a drawing according to Figure 1 The diagram shows the main component models M_PR1 and M_PR2 of the automatic generation system 100 for the analog circuit C_sim. Step S15, which establishes the main component models, involves the driver processor 120 creating the main component models M_PR1 and M_PR2 based on the main component data of each circuit segment F1, F2, and F3 and the first parameter P1 corresponding to the main component data. The main component models M_PR1 and M_PR2 correspond to the main component data of each circuit segment F1, F2, and F3. For example, step S15 involves identifying all main components (i.e., components FL2100 and FL2101) from the circuit segments F1, F2, and F3 corresponding to one of the aforementioned circuit units U1, listing the corresponding main component models M_PR1 and M_PR2, and simultaneously listing the pins of the main components according to the connection pin labels. As shown in Table 1, the main component data (U)3_FL2100_6 in circuit segment F1 indicates that pin 3 of component FL2100 is connected to circuit segment F1, and pin 6 of component FL2100 is connected to circuit segment F2. Furthermore, the main component model creation step S15 reads the first parameter P1 and pin configuration of the main components (i.e., components FL2100 and FL2101) from the storage unit 110, thereby generating main component models M_PR1 and M_PR2. The first parameter P1 can be an S-parameter of the main component, but this invention is not limited thereto. Additionally, the main component model M_PR1 includes the tag L_pin corresponding to each pin.

[0052] The main component models M_PR1 and M_PR2 correspond to components FL2100 and FL2101, respectively. ANT(6), TX(3), IN(1), and OUT(3) in the main component models M_PR1 and M_PR2 represent their configurations and corresponding pins in each component. Taking TX(3) as an example, it represents the third pin of component FL2100 as the transmitter (TX), and so on.

[0053] Please refer to the following: Figures 1 to 5 , Figure 5 It is a drawing according to Figure 1The diagram shows the circuit segment models M_F1, M_F2, and M_F3 of the automatic generation system 100 for the analog circuit C_sim. Step S17, the circuit segment model establishment step, involves the driver processor 120 establishing a circuit segment model (i.e., one of circuit segment models M_F1, M_F2, and M_F3) based on at least one peripheral component data and at least one second parameter P2 corresponding to that peripheral component data for each circuit segment (i.e., one of circuit segment models F1, F2, and F3). Circuit segment models M_F1, M_F2, and M_F3 correspond to circuit segments F1, F2, and F3, respectively. The number of ports in the circuit segment model (i.e., one of circuit segment models M_F1, M_F2, and M_F3) is the sum of the number of at least one main component data, the number of at least one peripheral component data, and the number of connecting component data. Taking circuit segment F1 as an example, step S17 of establishing the circuit segment model involves including the connecting element data, main element data, and peripheral element data in circuit segment F1 into the circuit segment model M_F1 according to the component type label, calculating the sum of the number of connecting element data, main element data, and peripheral element data in circuit segment F1, and establishing the port labels L_pin and L_port. Further, the connecting element data in circuit segment F1 is (U)U1900_16, with a quantity of 1; the main element data is (U)3_FL2100_6, with a quantity of 1; the peripheral element data are (C)C2100 and (TD)C2103, with a quantity of 2. The sum of the aforementioned quantities is 4. Therefore, the circuit segment model M_F1 contains 4 ports. Furthermore, the second parameter P2 can be an S-parameter of the peripheral element, but this invention is not limited to this.

[0054] In circuit segment models M_F1, M_F2, and M_F3, FL2100_3, FL2100_6, FL2101_1, and FL2101_3 represent the connection pins corresponding to the main components. For example, FL2100_3 indicates that circuit segment F1 is connected to pin 3 of component FL2100, and so on. The C2100_Series, C2103_Shunt, C2105_Series, C2107_Shunt, C2106_Series, L2102_Shunt, and C2108_Shunt in circuit segment models M_F1, M_F2, and M_F3 represent the connection methods corresponding to peripheral components. U1900_16 and U2504_2 in circuit segment models M_F1 and M_F3 connect to the L_port label. For example, C2103_Shunt means that capacitor C2103 is grounded (Shunt), and so on, without further explanation.

[0055] Please refer to the following: Figures 1 to 6 , Figure 6 It is a drawing according to Figure 1 This is a schematic diagram of the analog circuit C_sim generated by the automatic generation system 100 for the analog circuit C_sim. The model combination step S19 involves the driver processor 120 combining the main component models M_PR1 and M_PR2 corresponding to each circuit segment_F1, F2, and F3 with the circuit segment models M_F1, M_F2, and M_F3 to generate the analog circuit C_sim. Specifically, in model combination step S19, the connection pin data from circuit segments F1, F2, and F3 is filled into the pin labels L_pin of the main component models M_PR1 and M_PR2. Simultaneously, the peripheral component data corresponding to the peripheral components is filled into the circuit segment models M_F1, M_F2, and M_F3, and the connection pin data of the corresponding main components is filled into the port labels L_pin of the circuit segment models M_F1, M_F2, and M_F3.

[0056] The automatic generation method S100 for analog circuit C_sim of the present invention converts the radio frequency circuit C_RF into circuit segments F1, F2, F3 represented by text based on the attributes of all components in the radio frequency circuit C_RF and the connection relationships between the components. After generating the main component models M_PR1, M_PR2 and the circuit segment models M_F1, M_F2, M_F3, the analog circuit C_sim is automatically generated. This shortens the time spent converting the radio frequency circuit C_RF into the analog circuit C_sim and avoids conversion errors that occur during manual conversion.

[0057] Please refer to the following: Figures 1 to 7 , Figure 7 This is a flowchart illustrating the automatic generation method S200 for an analog circuit C_sim according to the second embodiment of the present invention. The automatic generation method S200 for an analog circuit C_sim includes a circuit partitioning step S21, a circuit segmentation step S23, a main component model establishment step S25, a circuit segment model establishment step S26, and a model combining step S29. In the second embodiment, the circuit segmentation step S23, the main component model establishment step S25, the circuit segment model establishment step S26, and the model combining step S29 of the automatic generation method S200 for an analog circuit C_sim are performed identically to the circuit segmentation step S13, the main component model establishment step S15, the circuit segment model establishment step S17, and the model combining step S19 of the automatic generation method S100 for an analog circuit C_sim in the first embodiment, and will not be described again. In particular, the automatic generation method S200 for analog circuit C_sim may further include steps S27, S28, S30, S31, and S32, and the circuit partitioning step S21 may include a first partitioning step S211 and a second partitioning step S212.

[0058] The first partitioning step S211 involves driving the processor 120 to divide the radio frequency circuit C_RF into multiple frequency band circuits C_B1 and C_B2. The second partitioning step S212 involves driving the processor 120 to further divide each frequency band circuit C_B1 and C_B2 into multiple circuit units U1. In other words, the first partitioning step S211 can initially divide the radio frequency circuit C_RF into frequency band circuits C_B1 and C_B2 based on different wireless network channels in the radio frequency circuit C_RF. The second partitioning step S212 then further divides the frequency band circuits C_B1 and C_B2 into multiple circuit units U1 respectively.

[0059] Step S27 determines whether the current circuit segment (i.e., one of circuit segments F1, F2, and F3) is the last circuit segment F3 in the current circuit unit U1. If yes, the driver processor 120 executes step S28; if no, the driver processor 120 executes the main component model establishment step S25 and the circuit segment model establishment step S26. In other words, step S27 determines whether the main component models M_PR1 and M_PR2 and the circuit segment models M_F1, M_F2, and M_F3 of all circuit segments F1, F2, and F3 corresponding to the current circuit unit U1 have been established.

[0060] Step S28 determines whether the current circuit unit U1 is the last circuit unit U1 in the current frequency band circuit C_B1. If yes, the driver processor 120 executes the model combination step S29; if no, the driver processor 120 executes the main component model establishment step S25 and the circuit segment model establishment step S26. In other words, step S28 determines whether the main component models M_PR1, M_PR2 and the circuit segment models M_F1, M_F2, M_F3 of all circuit segments F1, F2, and F3 of the current frequency band circuit C_B1 have been established.

[0061] Step S30 involves connecting the main component models M_PR1, M_PR2 and circuit segment models M_F1, M_F2, and M_F3 corresponding to the current frequency band circuit C_B1.

[0062] Step S31 is to set the scanning frequency band of the current frequency band circuit C_B1.

[0063] Step S32 determines whether all frequency band circuits C_B1 and C_B2 have been set up. If yes, the automatic generation method S200 of the analog circuit C_sim ends; if no, the processor 120 is driven to execute the circuit partitioning step S21. In other words, step S32 determines whether the main component models M_PR1, M_PR2 and circuit segment models M_F1, M_F2, and M_F3 of all frequency band circuits C_B1 and C_B2 of the radio frequency circuit C_RF have been established.

[0064] In other embodiments of the present invention, the main component model establishment step may be performed before or after the circuit segment model establishment step, but the present invention is not limited thereto.

[0065] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for automatically generating an analog circuit, used to automatically generate an analog circuit based on a radio frequency circuit, characterized in that, The automatic generation method for this analog circuit includes: One circuit partitioning step is to drive a processor to obtain the radio frequency circuit from a storage unit and divide the radio frequency circuit into multiple circuit units; A circuit segmentation step is to drive the processor to convert each circuit unit into multiple circuit segments according to a circuit connection relationship of each circuit unit, wherein each circuit segment contains at least one main component data and at least one peripheral component data. A key component model establishment step is to drive the processor to establish at least one key component model based on the key component data of each circuit segment and at least one first parameter corresponding to the key component data, wherein the key component model corresponds to the key component data of each circuit segment; A circuit segment model establishment step involves driving the processor to establish a circuit segment model based on the data of at least one peripheral component of each circuit segment and at least one second parameter corresponding to the data of the at least one peripheral component, wherein the circuit segment model corresponds to each circuit segment; and A model combining step is to drive the processor to combine the model of at least one main component corresponding to each circuit segment with the circuit segment model to generate the analog circuit; The circuit partitioning step includes: The first partitioning step is to drive the processor to divide the radio frequency circuit into multiple frequency band circuits; and The second partitioning step is to drive the processor to divide each frequency band circuit into the multiple circuit units; Wherein, the at least one first parameter is an S-parameter of at least one main component of each circuit unit, and the at least one second parameter is an S-parameter of at least one peripheral component of each circuit unit.

2. The automatic generation method for analog circuits as described in claim 1, characterized in that, The data of at least one primary component and the data of at least one peripheral component in each circuit segment include at least one of a component type label, a component name label and a connection pin label.

3. The automatic generation method for analog circuits as described in claim 2, characterized in that, At least one of the plurality of circuit segments further includes a connecting element data, wherein the number of ports of the circuit segment model is the sum of the number of the at least one main element data, the number of the at least one peripheral element data, and the number of the connecting element data.

4. The automatic generation method for analog circuits as described in claim 1, characterized in that, The data of the at least one major component in each circuit segment corresponds to the at least one major component in each circuit unit, wherein the at least one major component is one of a communication module and a radio frequency module; and The data of the at least one peripheral component corresponds to the at least one peripheral component of each circuit unit, and the at least one peripheral component is one of a resistor, a capacitor and an inductor.

5. An automatic analog circuit generation system for automatically generating an analog circuit based on a radio frequency circuit, characterized in that, The automatic generation system for this analog circuit includes: A storage unit stores the radio frequency circuit, multiple circuit units, multiple circuit segments corresponding to each circuit unit, at least one first parameter and at least one second parameter corresponding to each circuit segment, wherein each circuit segment includes at least one main component data and at least one peripheral component data; and A processor, signal-connected to the memory unit, and configured to implement the following steps: One circuit partitioning step is to obtain the radio frequency circuit from the storage unit and divide the radio frequency circuit into the multiple circuit units; One circuit segmentation step is to convert each circuit unit into the multiple circuit segments based on the circuit connection relationship of each circuit unit; A key component model establishment step is to establish at least one key component model based on the key component data of each circuit segment and the key first parameter corresponding to the key component data, wherein the key component model corresponds to the key component data of each circuit segment; A circuit segment model establishment step involves establishing a circuit segment model based on the data of at least one peripheral component of each circuit segment and at least one second parameter corresponding to the data of the at least one peripheral component, wherein the circuit segment model corresponds to each circuit segment; and A model-combining step is to combine the model of at least one main component corresponding to each circuit segment with the circuit segment model to generate the analog circuit. The circuit partitioning step includes: The first partitioning step is to divide the radio frequency circuit into multiple frequency band circuits; and The second partitioning step is to divide each frequency band circuit into the multiple circuit units; Wherein, the at least one first parameter is an S-parameter of at least one main component of each circuit unit, and the at least one second parameter is an S-parameter of at least one peripheral component of each circuit unit.

6. The automatic generation system for analog circuits as described in claim 5, characterized in that, The data of at least one primary component and the data of at least one peripheral component in each circuit segment include at least one of a component type label, a component name label and a connection pin label.

7. The automatic generation system for analog circuits as described in claim 6, characterized in that, At least one of the plurality of circuit segments further includes a connecting element data, wherein the number of ports of the circuit segment model is the sum of the number of the at least one main element data, the number of the at least one peripheral element data, and the number of the connecting element data.

8. The automatic generation system for analog circuits as described in claim 5, characterized in that, The data of the at least one major component in each circuit segment corresponds to the at least one major component in each circuit unit, wherein the at least one major component is one of a communication module and a radio frequency module; and The data of the at least one peripheral component corresponds to the at least one peripheral component of each circuit unit, and the at least one peripheral component is one of a resistor, a capacitor and an inductor.

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