A remote verification method and system based on a multi-FPGA verification public cloud platform

Abstract

This invention discloses a remote verification method and system based on a multi-FPGA verification public cloud platform. The method includes: a user selecting a corresponding resource configuration module from multiple candidate resource configuration templates provided by the cloud platform; receiving the design source file uploaded by the user through an encrypted channel; performing logic synthesis, probe insertion, partitioning, mapping, and top module generation operations to complete the simulation configuration; acquiring and calling computing resources from the computing cluster; generating a bitstream file according to the simulation configuration; allocating corresponding resources from the resource pool according to the simulation configuration; configuring the switching architecture routing table; connecting the resources corresponding to the simulation configuration to build a hardware simulation execution environment; loading the generated bitstream file onto the FPGA chip allocated to the user; configuring the peripheral interface board; connecting the debugger to the peripheral and making it ready; and the user remotely logging into the debugger via a virtual network computing protocol to perform simulation and debugging operations to obtain waveform data, thus completing the remote verification.

Description

Technical Field

[0001] This invention belongs to the field of electronic design automation technology, and in particular relates to a remote verification method and system based on a multi-FPGA verification public cloud platform. Background Technology

[0002] Currently, global verification of large-scale hardware designs often employs multiple high-performance FPGAs (Field-Programmable Gate Arrays) working together to complete the verification. Chip design organizations with general technical capabilities typically choose to build their own FPGA verification platforms according to their needs. However, this approach is often expensive, has a long construction period, and most importantly, places extremely high technical demands on the design and verification teams.

[0003] Therefore, a solution is urgently needed to address the above problems. Summary of the Invention

[0004] To address the above technical problems, this invention provides a remote verification method and system based on a multi-FPGA verification public cloud platform.

[0005] The technical solution adopted by this invention to solve its technical problem is:

[0006] A remote verification method based on a multi-FPGA verification public cloud platform, the method comprising the following steps:

[0007] S100: Users select the corresponding resource configuration module from a variety of candidate resource configuration templates provided by the cloud platform, receive the design source files uploaded by users through an encrypted channel, and perform logic synthesis, probe insertion, partitioning, mapping, and top module generation operations on the design source files to complete the simulation configuration; the simulation configuration includes FPGA chip, peripheral interface board, peripherals, and debug machine;

[0008] S200: The cloud platform obtains and calls computing resources from the computing cluster and generates a bitstream file according to the simulation configuration;

[0009] S300: The cloud platform allocates corresponding resources from the resource pool according to the simulation configuration, configures the switching architecture routing table, connects the resources corresponding to the simulation configuration, and builds a hardware simulation execution environment.

[0010] S400: The cloud platform will burn the generated bitstream files to the FPGA chip allocated to the user, configure the peripheral interface board, connect the debugger to the peripheral and make it ready;

[0011] S500: Users enter the hardware simulation execution environment, remotely log in to the debugging machine through the virtual network computing protocol, call the application and underlying driver to perform simulation and debugging operations to obtain waveform data, and complete remote verification.

[0012] Preferably, S100 includes:

[0013] S110: The user selects the corresponding resource configuration template from a variety of candidate resource configuration templates provided by the cloud platform; receives the design source file uploaded by the user through the encrypted channel; the user specifies the top module of the original design through the cloud platform and adds the preset design source file to the file list; receives the user's comprehensive start command to start the logical comprehensive process of the file list and obtain the comprehensive result;

[0014] S120: Users obtain instances and signal trees from the synthesis results and select debug signals through the multi-FPGA prototyping cloud platform;

[0015] S130: Users can partition and port-map the circuit design according to the logical relationships between circuit design modules and the expected available FPGA resources through the cloud platform to obtain the partitioning and mapping results;

[0016] S140: The cloud platform generates a new top module based on the debugging signals, partitioning and mapping results, inserts the debugging module and clock module into the new top module, and completes the simulation configuration; the simulation configuration includes the FPGA chip, peripheral interface board, peripherals and debugging machine.

[0017] Preferably, after S110, the following is also included:

[0018] When a user cannot find the corresponding resource configuration template, the user notifies the cloud platform service provider through the cloud platform to expand resources and add a new resource configuration template.

[0019] Preferably, the cloud platform configures corresponding resources for the resource requirements involved in the newly added resource configuration template; wherein, configuring corresponding resources includes adding the operating system type and version of the debug machine and adding peripherals and adapting the peripheral interface board.

[0020] Preferably, S200 further includes: uploading the bitstream file to the storage cluster, and / or deleting the user design source file to reclaim computing resources.

[0021] Preferably, S100 further includes:

[0022] The cloud platform pre-sets a set of configurations for multiple pre-defined hardware simulation verification scenarios and allocates a set of resource pools for each configuration, including computing resources, FPGA chips, peripheral interface boards, peripherals, and debugging machines. Among these, the multiple hardware simulation verification scenarios include a first pre-defined size single chip, a second pre-defined size single board four-chip, and a third pre-defined size multi-board multi-chip. The first pre-defined size is smaller than the second pre-defined size, and the second pre-defined size is smaller than the third pre-defined size.

[0023] Preferably, S500 further includes:

[0024] S600: Saves waveform data to the storage cluster, exits the hardware simulation execution environment, and ends the simulation.

[0025] Preferably, after S600, it further includes:

[0026] The cloud platform reclaims FPGA resources, resets the switching architecture routing configuration, and resets the debug machine system.

[0027] A remote verification system based on a multi-FPGA verification public cloud platform includes a multi-FPGA verification public cloud platform for performing the above-described methods.

[0028] Preferably, the multi-FPGA verification public cloud platform includes an API gateway, a computing cluster connected to the API gateway, an FPGA cluster connected to the computing cluster, and a storage cluster.

[0029] The aforementioned remote verification method and system based on a multi-FPGA verification public cloud platform realizes FPGA resource virtualization and pooling management based on a switching architecture, meeting the requirements for FPGA topology flexibility in multi-FPGA prototype verification scenarios. At the same time, it realizes free connection between peripherals and FPGA chips and debugging machines through peripheral interface boards that support the switching architecture, ultimately enabling the provision of multi-FPGA-based prototype verification services for users' large-scale designs remotely. Attached Figure Description

[0030] Figure 1 This is a flowchart of a remote verification method based on a multi-FPGA verification public cloud platform provided in one embodiment of the present invention;

[0031] Figure 2 This is a schematic diagram of the structure of a multi-FPGA verification public cloud platform in one embodiment of the present invention. Detailed Implementation

[0032] To enable those skilled in the art to better understand the technical solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings.

[0033] In one embodiment, such as Figure 1 As shown, a remote verification method based on a multi-FPGA verification public cloud platform includes the following steps:

[0034] S100: Users select the corresponding resource configuration module from a variety of candidate resource configuration templates provided by the cloud platform, receive the design source files uploaded by users through an encrypted channel, and perform logic synthesis, probe insertion, partitioning, mapping, and top module generation operations on the design source files to complete the simulation configuration; the simulation configuration includes FPGA chip, peripheral interface board, peripherals, and debug machine;

[0035] S200: The cloud platform obtains and calls computing resources from the computing cluster and generates a bitstream file according to the simulation configuration;

[0036] S300: The cloud platform allocates corresponding resources from the resource pool according to the simulation configuration, configures the switching architecture routing table, connects the resources corresponding to the simulation configuration, and builds a hardware simulation execution environment.

[0037] S400: The cloud platform will burn the generated bitstream files to the FPGA chip allocated to the user, configure the peripheral interface board, connect the debugger to the peripheral and make it ready;

[0038] S500: Users enter the hardware simulation execution environment, remotely log in to the debugging machine through the virtual network computing protocol, call the application and underlying driver to perform simulation and debugging operations to obtain waveform data, and complete remote verification.

[0039] Specifically, the multi-FPGA verification public cloud provides out-of-the-box remote prototyping services, which greatly reduces the technical threshold for FPGA prototyping. The convenience brought by the switching architecture supports dynamic connection establishment between any two FPGAs and between FPGA chips and peripherals, so that users and cloud service providers do not need to manually connect the cables.

[0040] In one embodiment, S100 includes:

[0041] S110: The user selects the corresponding resource configuration template from a variety of candidate resource configuration templates provided by the cloud platform; receives the design source file uploaded by the user through the encrypted channel; the user specifies the top module of the original design through the cloud platform and adds the preset design source file to the file list; receives the user's comprehensive start command to start the logical comprehensive process of the file list and obtain the comprehensive result;

[0042] S120: Users obtain instances and signal trees from the synthesis results and select debug signals through the multi-FPGA prototyping cloud platform;

[0043] S130: Users can partition and port-map the circuit design according to the logical relationships between circuit design modules and the expected available FPGA resources through the cloud platform to obtain the partitioning and mapping results;

[0044] S140: The cloud platform generates a new top module based on the debugging signals, partitioning and mapping results, inserts the debugging module and clock module into the new top module, and completes the simulation configuration; the simulation configuration includes the FPGA chip, peripheral interface board, peripherals and debugging machine.

[0045] In one embodiment, S110 is followed by:

[0046] When a user cannot find the corresponding resource configuration template, the user notifies the cloud platform service provider through the cloud platform to expand resources and add a new resource configuration template.

[0047] In one embodiment, the cloud platform configures corresponding resources for the resource requirements involved in the new resource configuration template; wherein, configuring corresponding resources includes adding a new debug machine operating system type and version and adding new peripherals and adapting peripheral interface boards.

[0048] Specifically, if a user cannot find a suitable resource configuration template, the most likely reason is the lack of relevant peripherals or the debug machine environment not meeting expectations. In this case, the user can contact the cloud platform service provider to expand the relevant resources and add a new resource configuration template. The cloud platform will then configure the relevant resources based on the resource requirements outlined in the new resource configuration template. One typical scenario is adding the debug machine's operating system type and version; another typical scenario is adding peripherals and adapting the peripheral interface boards.

[0049] In one embodiment, S200 further includes: uploading the bitstream file to the storage cluster, and / or deleting the user design source file to reclaim computing resources.

[0050] In one embodiment, S100 further includes:

[0051] The cloud platform pre-sets a set of configurations for multiple pre-defined hardware simulation verification scenarios and allocates a set of resource pools for each configuration, including computing resources, FPGA chips, peripheral interface boards, peripherals, and debugging machines. Among these, the multiple hardware simulation verification scenarios include a first pre-defined size single chip, a second pre-defined size single board four-chip, and a third pre-defined size multi-board multi-chip. The first pre-defined size is smaller than the second pre-defined size, and the second pre-defined size is smaller than the third pre-defined size.

[0052] Specifically, the cloud platform presets a set of configurations for common hardware simulation verification scenarios (such as small single-chip, medium single-board four-chip, large multi-board multi-chip, etc.) and allocates a set of resource pools for each configuration, including computing resources, FPGA chips, peripheral interface boards, peripherals, debugging machines, etc.

[0053] In one embodiment, S500 is followed by:

[0054] S600: Saves waveform data to the storage cluster, exits the hardware simulation execution environment, and ends the simulation.

[0055] In one embodiment, S600 is followed by:

[0056] The cloud platform reclaims FPGA resources, resets the switching architecture routing configuration, and resets the debug machine system.

[0057] In a detailed embodiment, the detailed workflow is as follows:

[0058] Step 1. The cloud platform presets a set of configurations for common hardware simulation verification scenarios (such as small single-chip, medium single-board four-chip, large multi-board multi-chip, etc.) and allocates a set of resource pools for each configuration, including computing resources, FPGA chips, peripheral interface boards, peripherals, debugging machines, etc.

[0059] Step 2. The user selects a suitable resource configuration template from the various candidate resource configuration templates provided by the cloud platform, and then uploads the design source file to the cloud platform storage cluster for encrypted storage through an encrypted channel. Operations such as logic synthesis, probe insertion, partitioning, mapping, and Top module generation are performed to complete the simulation configuration.

[0060] Step 2.1: Once the user selects a suitable template from the various candidate resource configuration templates provided by the cloud platform, the simulation configuration is complete. If the user fails to find a suitable resource configuration template, the most likely reason is the lack of relevant peripherals or the debug machine environment not meeting the expected requirements. In this case, the user can contact the cloud platform service provider to expand relevant resources and add new resource configuration templates. Correspondingly, the cloud platform configures relevant resources based on the resource requirements involved in the new resource configuration template. One typical scenario is adding a debug machine operating system type and version; another typical scenario is adding peripherals and adapting peripheral interface boards.

[0061] Step 2.2: The user specifies the top of the original design, adds all relevant design source files to the file list, and then clicks the "Synthesize" button to start the logic synthesis process;

[0062] Step 2.3: The user obtains instances and signal trees from the synthesis results and selects debug signals (probes) from them;

[0063] Step 2.4: The user divides the design and maps ports according to the logical relationships between the circuit design modules and the expected available FPGA resources;

[0064] Step 2.5: The cloud platform generates a new Top module based on the user-selected debug signal (probe), partitioning, and mapping results, and inserts the debug module and clock module;

[0065] Step 3. The cloud platform obtains and calls computing resources from the computing cluster, generates a bitstream file according to the user's simulation configuration, (optionally) uploads the bitstream file to the storage cluster, (optionally) deletes the user's design source file, and reclaims computing resources.

[0066] Step 4. The cloud platform allocates relevant resources from the resource pool according to the user's simulation configuration (FPGA chip, peripheral interface board, peripherals, debugging machine), configures the switching architecture routing table, and connects the FPGA chip, peripheral interface board, peripherals, debugging machine and other resources to form a hardware simulation execution environment.

[0067] Step 5. The cloud platform will burn the generated bitstream files to the FPGA chip assigned to the user, configure the peripheral interface board, connect the debugger to the peripheral and make it ready.

[0068] Step 6. The user enters the hardware simulation execution environment, remotely logs into the debugging machine via VNC (Virtual Network Computing Protocol), calls the application and underlying driver, and begins simulation, debugging and other operations.

[0069] Step 7. The user saves the waveform data and other debugging results to the storage cluster (and can export them), exits the hardware simulation execution environment, and ends the simulation.

[0070] Step 8. The cloud platform reclaims FPGA resources and resets the switching architecture routing configuration for the trial system.

[0071] The aforementioned remote verification method based on a multi-FPGA verification public cloud platform realizes FPGA resource virtualization and pooling management based on a switching architecture, meeting the requirements for FPGA topology flexibility in multi-FPGA prototype verification scenarios. At the same time, it realizes free connection between peripherals and FPGA chips and debugging machines through peripheral interface boards that support the switching architecture, ultimately enabling the provision of multi-FPGA-based prototype verification services for users' large-scale designs remotely.

[0072] A remote verification system based on a multi-FPGA verification public cloud platform includes a multi-FPGA verification public cloud platform for performing the above-described methods.

[0073] In one embodiment, the multi-FPGA verification public cloud platform includes an API gateway, a computing cluster connected to the API gateway, an FPGA cluster connected to the computing cluster, and a storage cluster.

[0074] For a detailed description of a remote verification system based on a multi-FPGA verification public cloud platform, please refer to the above description of a remote verification method based on a multi-FPGA verification public cloud platform, which will not be repeated here.

[0075] The foregoing has provided a detailed description of a remote verification method and system based on a multi-FPGA verification public cloud platform provided by this invention. Specific examples have been used to illustrate the principles and implementation methods of this invention, and the descriptions of the embodiments above are merely for the purpose of helping to understand the core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from the principles of this invention, and these improvements and modifications also fall within the protection scope of the claims of this invention.

Claims

1. A remote verification method based on a multi-FPGA verification public cloud platform, characterized in that, The method includes the following steps: S100: The user selects the corresponding resource configuration module from a variety of candidate resource configuration templates provided by the cloud platform, receives the design source file uploaded by the user through an encrypted channel, and performs logic synthesis, probe insertion, partitioning, mapping and top module generation operations on the design source file to complete the simulation configuration; wherein, the simulation configuration includes FPGA chip, peripheral interface board, peripherals and debugging machine; S200: The cloud platform obtains and calls computing resources from the computing cluster, and generates a bitstream file according to the simulation configuration; S300: The cloud platform allocates corresponding resources from the resource pool according to the simulation configuration, configures the switching architecture routing table, connects the resources corresponding to the simulation configuration, and builds a hardware simulation execution environment; S400: The cloud platform will burn the generated bitstream files to the FPGA chip allocated to the user, configure the peripheral interface board, connect the debugger to the peripheral and make it ready; S500: The user enters the hardware simulation execution environment, remotely logs into the debugging machine through the virtual network computing protocol, calls the application program and the underlying driver to perform simulation and debugging operations to obtain waveform data, and completes remote verification.

2. The method according to claim 1, characterized in that, S100 includes: S110: The user selects the corresponding resource configuration template from a variety of candidate resource configuration templates provided by the cloud platform; the system receives the design source file uploaded by the user through an encrypted channel, the user specifies the top module of the original design through the cloud platform, and adds the preset design source file to the file list; the system receives the user's comprehensive start command to start the logical comprehensive process of the file list to obtain the comprehensive result; S120: The user obtains instances and signal trees from the synthesis results and selects debug signals through the multi-FPGA prototype verification cloud platform; S130: The user divides and maps the circuit design to ports through the cloud platform according to the logical relationship between the circuit design modules and the expected available FPGA resources, and obtains the division and mapping results; S140: The cloud platform generates a new top module based on the debugging signal and the division and mapping results, and inserts a debugging module and a clock module into the new top module to complete the simulation configuration; wherein, the simulation configuration includes an FPGA chip, a peripheral interface board, peripherals and a debugging machine.

3. The method according to claim 1, characterized in that, Following S110 are: When a user fails to find a corresponding resource configuration template, the user notifies the cloud platform service provider through the cloud platform to expand resources and add a new resource configuration template.

4. The method according to claim 3, characterized in that, The cloud platform configures corresponding resources for the resource requirements involved in the newly added resource configuration template; wherein, the configured corresponding resources include adding the operating system type and version of the debug machine and adding peripherals and adapting the peripheral interface board.

5. The method according to claim 1, characterized in that, S200 also includes: uploading the bitstream file to the storage cluster, and / or deleting the user design source file to reclaim computing resources.

6. The method according to claim 1, characterized in that, The S100 also includes: The cloud platform pre-sets a set of configurations for multiple pre-defined hardware simulation verification scenarios and allocates a set of resource pools for each configuration, including computing resources, FPGA chips, peripheral interface boards, peripherals, and debugging machines; among them, the multiple hardware simulation verification scenarios include a first pre-defined size single chip, a second pre-defined size single board four-chip, and a third pre-defined size multi-board multi-chip; wherein, the first pre-defined size is smaller than the second pre-defined size, and the second pre-defined size is smaller than the third pre-defined size.

7. The method according to claim 1, characterized in that, Following the S500 are: S600: Save the waveform data to the storage cluster, exit the hardware simulation execution environment, and end the simulation.

8. The method according to claim 1, characterized in that, Following the S600 are: The cloud platform reclaims FPGA resources, resets the switching architecture routing configuration, and resets the debug machine system.

9. A remote verification system based on a multi-FPGA verification public cloud platform, characterized in that, This includes a multi-FPGA verification public cloud platform for performing the methods described in any one of claims 1 to 8.

10. The system according to claim 9, characterized in that, The multi-FPGA verification public cloud platform includes an API gateway, a computing cluster connected to the API gateway, an FPGA cluster connected to the computing cluster, and a storage cluster.

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