Data storage method and device for embedded system built-in flash simulating eeprom

Abstract

The application discloses a data storage method and device for simulating EEPROM in a built-in Flash of an embedded system, and the method comprises the following steps: setting a first storage space for simulating EEPROM in the Flash, wherein the size of the first storage space is a multiple of the minimum erasing unit of the Flash; initializing the first storage space after the embedded system is powered on; when it is needed to write data into the first storage space, starting from the first free address of the first storage space, writing user data and a virtual address of the user data in sequence, wherein the virtual address is a tag for marking the user data. By using the method, the embedded system which only supports the Flash can have the characteristics of the EEPROM, and the data in the Flash does not need to be erased by blocks before being rewritten each time, so that the service life of the Flash is effectively prolonged.

Description

Technical Field

[0001] This invention relates to the field of memory technology, and specifically to a data storage method and apparatus for embedded systems that uses Flash to simulate EEPROM. Background Technology

[0002] Flash memory (or simply Flash) is a common type of ROM (Read-Only Memory) used to store microcontroller code or non-volatile data. Existing Flash memory requires erasing the data at the corresponding location before rewriting data, and erasure can only be done by block or page. This operation is cumbersome and time-consuming, making it unsuitable for rewriting scattered data. Furthermore, Flash memory has a limited number of write cycles, typically around 10,000. If a block or page of data needs to be erased before each rewrite, it will inevitably accelerate the Flash memory's failure process.

[0003] EEPROM (Electrically Erasable Programmable Read-Only Memory) is a user-modifiable read-only memory that can be erased and rewritten through the Fowler-Nordheim tunneling effect. EEPROM is written and read byte-by-byte, and users do not need to erase it before writing data, making it more flexible than Flash. Therefore, when an embedded system needs to store frequently used variables (such as flags and configuration parameters) even when power is off, EEPROM is clearly more suitable than Flash. However, EEPROM has a smaller storage capacity and is more expensive than Flash, and many microcontrollers only support Flash.

[0004] In order to enjoy the characteristics of EEPROM without increasing hardware costs, some solutions that simulate EEPROM using Flash have emerged. However, most existing solutions that simulate EEPROM have the following problems:

[0005] (1) Complex data management: Existing simulated EEPROM solutions require dividing the Flash into multiple regions for data marking, storage, transfer and other operations, which is complex.

[0006] (4) Low space utilization: Existing analog EEPROM schemes require at least two pages of Flash area to alternate data in order to ensure that data is not lost when the page is full and erased. However, the page after erasing data is invalid for a period of time, so the space utilization is not high. Summary of the Invention

[0007] This invention provides a data storage method and apparatus for embedded systems that use Flash to simulate EEPROM, enabling embedded systems that only support Flash to have the characteristics of EEPROM. This eliminates the need to erase data in blocks before each rewrite of the data in Flash, effectively extending the lifespan of Flash.

[0008] On one hand, embodiments of the present invention provide a data storage method for an embedded system with built-in Flash emulating EEPROM, the method comprising:

[0009] In Flash, a first storage space is set up to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of Flash.

[0010] After the embedded system is powered on, the first storage space is initialized;

[0011] When it is necessary to write data to the first storage space, starting from the first free address of the first storage space, user data and its virtual address are written sequentially, and the virtual address is a label that marks the user data.

[0012] Optionally, the method further includes:

[0013] Before writing user data and its virtual address, check if there is a free address in the first storage space;

[0014] If there is no free address in the first storage space, then the valid data and its virtual address in the first storage space are cached in RAM;

[0015] Erase the data in the first storage space;

[0016] The valid data cached in RAM and its virtual address are sequentially written into the first storage space, starting from the first free address.

[0017] Optionally, the method further includes determining valid data in the first storage space in the following manner: traversing the first storage space from back to front according to the storage address, if there is data with the same virtual address, then the data at the last virtual address is taken as valid data, and the data at other virtual addresses are taken as invalid data.

[0018] Optionally, the method further includes: determining the length of the user data and its virtual address based on the smallest unit of Flash programming of the embedded system.

[0019] Optionally, the method further includes: when it is necessary to read data from the first storage space, querying from the back to the front of the storage address of the first storage space according to the virtual address of the data to be read, and reading out the user data corresponding to the virtual address queried for the first time.

[0020] Optionally, the method further includes: monitoring the power supply voltage of the embedded system in real time, and stopping operations on the data in the first storage space of the Flash when the power supply voltage is lower than a voltage threshold.

[0021] Optionally, the method further includes:

[0022] When the power supply voltage is lower than the voltage threshold, if the valid data and its virtual address of the first storage space of the Flash have been cached in the RAM, the embedded system is controlled to enter a low-power mode.

[0023] The valid data and its virtual address in the RAM are transferred to the first storage space of the Flash, and the Flash erase / write operation mode is exited.

[0024] On the other hand, embodiments of the present invention also provide a data storage device for embedded system built-in Flash to simulate EEPROM, the device comprising: a setting unit, Flash, and a control unit;

[0025] The setting unit is used to set a first storage space in Flash to simulate EEPROM, the size of which is a multiple of the minimum erase unit of Flash.

[0026] The control unit is used to initialize the first storage space after the embedded system is powered on; when it is necessary to write data to the first storage space, it sequentially writes user data and its virtual address, starting from the first free address of the first storage space, where the virtual address is a tag that marks the user data.

[0027] Optionally, the device further includes: RAM;

[0028] The control unit is further configured to check whether there is a free address in the first storage space before writing user data and its virtual address; if there is no free address in the first storage space, cache the valid data and its virtual address in the first storage space into RAM; erase the first storage space; and write the valid data and its virtual address cached in RAM into the first storage space sequentially starting from the first free address of the first storage space.

[0029] Optionally, the device further includes:

[0030] A voltage monitoring unit is used to monitor the power supply voltage of the embedded system in real time, and send a trigger signal to the control unit when the power supply voltage is lower than a voltage threshold.

[0031] The control unit is also configured to stop operating on the data in the first storage space of the Flash after receiving the trigger signal.

[0032] Optionally, the control unit is further configured to, upon receiving the trigger signal, control the embedded system to enter a low-power mode when the valid data and its virtual address in the first storage space of the Flash have been cached in the RAM; transfer the valid data and its virtual address in the RAM to the first storage space of the Flash; and exit the Flash erase / write operation mode.

[0033] On the other hand, embodiments of the present invention also provide a computer-readable storage medium storing a computer program thereon, characterized in that the computer program, when run by a processor, executes the steps of the data storage method for the embedded system's built-in Flash emulated EEPROM described above.

[0034] On the other hand, embodiments of the present invention also provide a terminal device, including a memory and a processor, wherein the memory stores a computer program that can run on the processor, characterized in that, when the processor runs the computer program, it executes the steps of the data storage method for the embedded system's built-in Flash emulated EEPROM described above.

[0035] The data storage method and apparatus for simulating EEPROM in embedded system built-in Flash provided by this invention sets up a first storage space in Flash to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of Flash. After the embedded system is powered on, the first storage space is initialized. When data needs to be written to the first storage space, user data and its virtual address are written sequentially starting from the first free address of the first storage space. This eliminates the need to erase data in blocks before each rewrite of the data in Flash, effectively extending the lifespan of Flash.

[0036] Using the solution of this invention, an EEPROM can be simulated using only one minimum erase unit of Flash memory, making the management of commonly used variables (such as flag bits, configuration parameters, etc.) more convenient, and avoiding the impact of Flash space utilization caused by the Flash data erasure and write methods. Of course, depending on actual needs, multiple minimum erase units of Flash memory can also be used to simulate an EEPROM.

[0037] Furthermore, by incorporating a power-loss detection mechanism, data loss caused by unexpected power outages in the embedded system is effectively prevented. Attached Figure Description

[0038] Figure 1 This is a flowchart of a data storage method for an embedded system with built-in Flash emulating EEPROM, provided in an embodiment of the present invention.

[0039] Figure 2 This is another flowchart of the data storage method for embedded system built-in Flash to simulate EEPROM provided in the embodiments of the present invention;

[0040] Figure 3 This is a schematic diagram illustrating the process of updating data in Flash using the data storage method for simulating EEPROM in embedded system Flash provided in this embodiment of the invention.

[0041] Figure 4 This is a schematic diagram illustrating the process of reading data from Flash using the data storage method for simulating EEPROM within an embedded system provided in this embodiment of the invention.

[0042] Figure 5 This is a flowchart of real-time monitoring and corresponding operations of the power supply voltage of the embedded system in an embodiment of the present invention;

[0043] Figure 6 This is a schematic diagram of a data storage device for an embedded system with built-in Flash emulation of EEPROM provided in an embodiment of the present invention;

[0044] Figure 7 This is another structural schematic diagram of the data storage device for embedded system built-in Flash emulating EEPROM provided in the embodiments of the present invention;

[0045] Figure 8 This is another structural schematic diagram of the data storage device for embedded system built-in Flash emulating EEPROM provided in the embodiments of the present invention. Detailed Implementation

[0046] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0047] To address the problems of existing EEPROM simulation schemes, this invention provides a data storage method and apparatus for simulating EEPROM using embedded system built-in Flash. By utilizing the embedded system's built-in Flash, only one or more minimum erase units of the Flash are needed to simulate the EEPROM data storage method, and it is not necessary to erase data by block before each rewriting of the data in the Flash.

[0048] like Figure 1 The diagram shown is a flowchart of a data storage method for an embedded system with built-in Flash emulating EEPROM, provided by an embodiment of the present invention, including the following steps:

[0049] Step 101: Set up a first storage space in Flash to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of Flash. The minimum erase unit can be, for example, a "page" or a "sector".

[0050] It should be noted that in practical applications, the size of the first storage space can be set to one erase unit of the Flash. Of course, if there is a lot of user data to be stored, multiple erase units of the Flash can be set as the first storage space. The specific allocation can be freely determined by the user according to the actual situation. This embodiment of the invention does not limit this.

[0051] Step 102: After the embedded system is powered on, the first storage space is initialized.

[0052] Initializing the first storage space means setting all data in the first storage space to empty data (i.e., 0xFFFF).

[0053] Step 103: When it is necessary to write data to the first storage space, starting from the first free address of the first storage space, write user data and its virtual address in sequence, where the virtual address is a tag that marks the user data.

[0054] Compared to EEPROM, the most significant disadvantage of Flash is that data needs to be erased in blocks before it can be rewritten. To address this, by avoiding repeatedly writing data to the same Flash address, the erasure operation can be eliminated before each data write.

[0055] Therefore, in this embodiment of the invention, when rewriting certain data, a virtual address is assigned to each piece of user data that needs to be written. This virtual address is bound to the user data; the user data changes, but its virtual address remains unchanged. Accordingly, when writing this type of user data into the first storage space of Flash, not only the user data itself is written, but its virtual address is also written.

[0056] A virtual address is actually a tag used to mark user data. It is essentially data written in the Flash space and bound to the corresponding user data to simulate an address.

[0057] It should be noted that the length of the user data and its virtual address can be determined based on the smallest unit of Flash programming in the embedded system. Assuming the smallest unit of Flash programming is 32 bits, meaning a complete set of valid data is 32 bits, the user data and its virtual address can be set to 16 bits each, for example, the high 16 bits as the virtual address and the low 16 bits as the user data.

[0058] It should be noted that the number of bits for the virtual address and user data mentioned above is merely an example, and this embodiment of the invention does not limit the scope of the invention. Furthermore, the number of bits for the virtual address and user data can be the same or different. Theoretically, the fewer bits in the virtual address, the higher the space utilization, but the number of usable virtual addresses decreases accordingly. In practical applications, a balance can be struck between space utilization and the number of available virtual addresses, taking into account the impact of the smallest unit of Flash programming on the ease of data management, to set an appropriate number of bits for the user data and virtual address.

[0059] It should be noted that 0xFFFF should be avoided as a virtual address to distinguish it from empty data (0xFFFF). A 16-bit virtual address can be set to any value between 0x0000 and 0xFFFE. That is, if the virtual address is 16 bits, the user can set 65535 addresses for the simulated EEPROM, i.e., the virtual addresses. For example, to write the data 0x1234 at virtual address 0x0001, one can write 0x00011234 to a free address in the first memory space of the Flash.

[0060] When it is necessary to rewrite user data, it is not necessary to erase the user data and its virtual address previously written to Flash in blocks. Instead, starting from the first free address of the first storage space, the user data and its virtual address are written sequentially to simulate the EEPROM data address.

[0061] As can be seen, the embedded system built-in Flash to simulate EEPROM data storage method provided by the embodiments of the present invention uses one or more smallest erase units of Flash to simulate EEPROM data storage, without erasing data by block before each rewrite of data in Flash, thereby effectively reducing the number of erase and write operations on Flash and thus extending the life of Flash.

[0062] Furthermore, considering that the first storage space has limited space, even if it only stores some commonly used variables and other data, the first storage space will be filled up as the corresponding user data changes. Therefore, in another embodiment of the method of the present invention, a method is provided to effectively save the valid data in the first storage space when erasing the data in the first storage space after it is filled up.

[0063] Reference Figure 2 , Figure 2 This invention illustrates another flowchart of a data storage method for an embedded system with built-in Flash emulating EEPROM, as provided in an embodiment of the present invention, including the following steps:

[0064] Step 201: Set up a first storage space in Flash to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of Flash, such as a "page" or "sector".

[0065] Step 202: After the embedded system is powered on, the first storage space is initialized.

[0066] Step 203: When it is necessary to write data to the first storage space, check if there is a free address in the first storage space; if so, proceed to step 204; otherwise, proceed to step 205.

[0067] Step 204: Starting from the first free address in the first storage space, write user data and its virtual address sequentially.

[0068] Step 205: Cache the valid data and its virtual address in the first storage space into RAM.

[0069] Because user data written to the first storage space may be written repeatedly, that is, when the user data changes and needs to be written to Flash, if there is still free address in the first storage space, the previously written user data does not need to be erased, but will still be retained in the first storage space. Therefore, for a certain user data, it is possible to write it to the first storage space multiple times, but the virtual address it is bound to will not change each time it is written. The latest written user data is valid data, while the previously written user data is invalid data because it has expired.

[0070] Accordingly, in practical applications, the first storage space can be traversed from back to front according to the storage address. If there is data with the same virtual address, the data at the last virtual address is taken as valid data, and the data at other virtual addresses are taken as invalid data, thereby determining each valid data in the first storage space.

[0071] Step 206: Erase the data in the first storage space.

[0072] Step 207: Write the valid data cached in RAM and its virtual address sequentially into the first storage space, starting from the first free address. Then execute step 204.

[0073] The following reference Figure 3 The following example further illustrates the data storage method for embedded system built-in Flash emulated EEPROM provided by the embodiments of the present invention.

[0074] Taking a single Flash page as an example, the first storage space is configured with two virtual addresses: 0x5555 and 0x6666. User data 0x1234 and 0x4321 are written to these addresses respectively. Figure 3 The process of writing and modifying these two user data is as follows:

[0075] First, after the embedded system powers on, the page is initialized, meaning all data on the page is empty (i.e., 0xFFFF). See [link / details]. Figure 3 (a);

[0076] Then, starting from the beginning of the page, write 0x55551234 and 0x66664321 sequentially, see... Figure 3 (b);

[0077] When it is necessary to update the user data corresponding to the two virtual addresses mentioned above, the data at the original location of the virtual address will not be overwritten. Since there is still free space on the page, the new user data and the original virtual address data are written together in the next location. Thus, the user data corresponding to that virtual address is updated. See [link to page]. Figure 3 (c);

[0078] Continue writing data to the remaining page space. It's important to note that you can write new virtual addresses and user data, or update existing user data at virtual addresses, until the page is full. See [link / details]. Figure 3 (d);

[0079] When a page is detected to be full, the following steps are required before writing data further: Traverse from the end of the page to the beginning. When a virtual address is found for the first time, its lower 16 bits contain the latest user data; previous user data corresponding to the same virtual address are discarded. For example... Figure 3The latest user data at virtual address 0x5555 is 0x55AA, and the latest user data at virtual address 0x6666 is 0xBB66. All virtual addresses and their latest user data (i.e., valid data) are cached in RAM, then the page is erased. After erasing, the page is restored to an empty state with all F's. See [link to documentation]. Figure 3 (e);

[0080] The virtual address and user data cached in RAM are moved to the page header and stored sequentially, while continuing to wait for new data write or data read operations. See Figure 3 (f).

[0081] The data storage method for embedded systems with built-in Flash emulating EEPROM provided in this invention allows for the temporary storage of valid data in the first storage space when the first storage space is full. This is achieved by erasing the first storage space and then moving the valid data from the RAM to the Flash memory. This effectively ensures that valid data written to the Flash memory is not lost due to the erasure of the first storage space while reducing the number of Flash erase operations. Furthermore, the Flash data erasure and writing method avoids the need to allocate new Flash page storage space, thus preventing a reduction in Flash space utilization.

[0082] Furthermore, in another non-limiting embodiment of the method of the present invention, when it is necessary to read data from the first storage space, it is first necessary to determine the virtual address corresponding to the data to be read, and then, according to the virtual address of the data to be read, the storage address of the first storage space is traversed from back to front to read out the user data corresponding to the virtual address found for the first time.

[0083] Taking the first storage space as a Flash single page as an example, the query is traversed from the end of the page to the beginning. When the first query finds that the high 16 bits of data match the virtual address, the query stops. The low 16 bits of data corresponding to the high 16 bits of the virtual address are the user data to be read. The low 16 bits of data can be read out and saved.

[0084] For example, analog EEPROM has evolved to Figure 3 When the middle arrow indicates the state between steps ② and ③, the data storage state in the EEPROM is as follows: Figure 4 As shown, if we want to read the user data at virtual address 0x5555, we traverse upwards. The first time we find 0x5555, the lower 16 bits corresponding to it are 0x5A5A. Therefore, the user data read is 0x5A5A.

[0085] Furthermore, considering that unexpected power outages may occur in practical applications, in another non-limiting embodiment of the method of the present invention, to avoid the impact of unexpected power outages on the data in the Flash memory, the power supply voltage of the embedded system can be monitored in real time, and corresponding operations can be performed based on the monitoring results. Specifically, when the power supply voltage is lower than a voltage threshold, operations on the data in the first storage space of the Flash memory are stopped. Further, if the valid data and its virtual address in the first storage space of the Flash memory have been cached in RAM at this time, the embedded system is controlled to enter a low-power mode, and then the valid data and its virtual address in RAM are transferred to the first storage space of the Flash memory, thereby ensuring the data integrity in the Flash memory before the power outage and preventing data loss due to the inability to transfer data in time during a power outage.

[0086] Reference Figure 5 This is a flowchart illustrating real-time monitoring and corresponding operations of the power supply voltage of an embedded system in an embodiment of the present invention, including the following steps:

[0087] Step 501: Monitor the power supply voltage of the embedded system in real time.

[0088] Step 502: Determine whether the power supply voltage is lower than the voltage threshold; if so, proceed to step 503; otherwise, return to step 501.

[0089] Step 503: Determine whether the first storage space is full; if so, proceed to step 504; otherwise, proceed to step 507.

[0090] Step 504: Determine whether the valid data in the first storage space has been temporarily stored in RAM; if yes, proceed to step 505; otherwise, proceed to step 507.

[0091] Step 505: Control the embedded system to enter a low-power mode;

[0092] Step 506: Transfer the valid data and its virtual address in the RAM to the first storage space of the Flash; then execute step 507;

[0093] Step 507: Exit Flash erase / write operation mode;

[0094] In other words, operations on the data in the first storage space of the Flash are stopped, and Flash erase / write operations are allowed / enabled after the voltage is restored;

[0095] Step 508: Wait for the embedded system to restore its operating voltage.

[0096] In practical applications, after the system is powered on, the LVD module of the microcontroller can be used to monitor the power supply voltage in real time. When the power supply voltage is not lower than the voltage threshold, the system operates normally. If the power supply voltage is lower than the voltage threshold, and at the same time the first storage space is full and valid data has been transferred to RAM, the embedded system is controlled to immediately enter a low-power mode. Using the energy stored in the capacitors in the circuit, the valid data in RAM is transferred to the first storage space of Flash before a complete power failure and reset. At other times, if the power supply voltage is lower than the voltage threshold, data operation is stopped.

[0097] As can be seen, the data storage method for embedded system built-in Flash emulating EEPROM provided in this embodiment of the invention effectively avoids data loss caused by unexpected power failure of the embedded system by adding an LVD power failure detection mechanism.

[0098] Accordingly, embodiments of the present invention also provide a data storage device for an embedded system with built-in Flash emulation of EEPROM, such as... Figure 6 The diagram shown is a structural schematic of the device.

[0099] In this embodiment, the data storage device 600 includes: a setting unit 601, a Flash unit 602, and a control unit 603. Wherein:

[0100] The setting unit 601 is used to set a first storage space in Flash 602 for simulating EEPROM, the size of the first storage space being a multiple of the minimum erase unit of Flash;

[0101] The control unit 603 is used to initialize the first storage space after the embedded system is powered on; when it is necessary to write data to the first storage space, it sequentially writes user data and its virtual address, starting from the first free address of the first storage space, where the virtual address is a tag that marks the user data.

[0102] Furthermore, such as Figure 7 As shown, in another non-limiting embodiment of the device of the present invention, the device may further include: RAM 604. Accordingly, the control unit 603 is further configured to check whether there is a free address in the first storage space before writing user data and its virtual address; if there is no free address in the first storage space, cache the valid data and its virtual address in the first storage space into RAM; erase the first storage space; and write the cached valid data and its virtual address into the first storage space sequentially starting from the first free address of the first storage space.

[0103] The specific process by which the control unit 603 performs data read and write operations on the first storage space can be found in the description in the previous embodiments of the present invention, and will not be repeated here.

[0104] like Figure 8 As shown, in another non-limiting embodiment of the device of the present invention, the device may further include: a voltage monitoring unit 801, used to monitor the power supply voltage of the embedded system in real time, and send a trigger signal to the control unit 603 when the power supply voltage is lower than a voltage threshold.

[0105] Accordingly, in this embodiment, the control unit 603 is also configured to stop operating on the data in the first storage space of the Flash after receiving the trigger signal.

[0106] Furthermore, the control unit 603 is also configured to, upon receiving the trigger signal, control the embedded system to enter a low-power mode when the valid data and its virtual address in the first storage space of the Flash have been cached in the RAM; transfer the valid data and its virtual address in the RAM to the first storage space of the Flash, and exit the Flash erase / write operation mode.

[0107] The embedded system data storage device with built-in Flash emulation of EEPROM provided in this embodiment of the invention sets up a first storage space in the Flash to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of the Flash. After the embedded system is powered on, the first storage space is initialized. When data needs to be written to the first storage space, user data and its virtual address are written sequentially starting from the first free address of the first storage space. This eliminates the need to erase data in blocks before each rewrite of the data in the Flash, effectively extending the Flash lifespan. Moreover, by adding an LVD power-down detection mechanism, data loss caused by unexpected power failures of the embedded system can be effectively avoided.

[0108] The data storage method for simulating EEPROM with built-in Flash in embedded systems provided by this invention can be implemented in software without the need for additional external circuit support. Microcontrollers that integrate Flash and LVD (Low Voltage Detector) can use this solution to simulate EEPROM, making it highly portable.

[0109] Accordingly, embodiments of the present invention also disclose a storage medium, which is a computer-readable storage medium storing a computer program thereon, the computer program being executable during runtime. Figure 1 or Figure 2 or Figure 5The method shown may include some or all of the steps. The storage medium may include read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk, etc. The storage medium may also include non-volatile memory or non-transitory memory, etc.

[0110] Accordingly, embodiments of the present invention also provide a terminal device, including a memory and a processor, wherein the memory stores a computer program executable on the processor, characterized in that the processor executes the computer program by performing... Figure 1 or Figure 2 or Figure 5 Some or all of the steps of the method shown.

[0111] Regarding the modules / units included in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or a combination of both. For example, for devices and products applied to or integrated into a chip, all modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs running on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits. For devices and products applied to or integrated into a chip module, all modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The implementation is achieved through a software program that runs on a processor integrated within the chip module. The remaining modules / units (if any) can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into terminal equipment, each of their modules / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components within the terminal equipment. Alternatively, at least some modules / units can be implemented using a software program that runs on a processor integrated within the terminal equipment, while the remaining modules / units (if any) can be implemented using hardware methods such as circuits.

[0112] It should be noted that "multiple" in the embodiments of this application refers to two or more.

[0113] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of devices in the embodiments of this application, nor do they constitute any limitation on the embodiments of this application.

[0114] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means.

[0115] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0116] In the several embodiments provided in this application, it should be understood that the disclosed methods, apparatuses, and systems can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is merely a logical functional division, and other division methods may exist in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0117] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0118] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can be physically included separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0119] The integrated unit implemented as a software functional unit described above can be stored in a computer-readable storage medium. This software functional unit, stored in a storage medium, includes several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) to execute some steps of the methods described in the various embodiments of this application.

[0120] While this application discloses the above information, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application shall be determined by the scope defined in the claims.

Claims

1. A data storage method for an embedded system with built-in Flash emulating EEPROM, characterized in that, The method includes: In Flash, a first storage space is set up to simulate EEPROM. The size of the first storage space is a multiple of the minimum erase unit of Flash. After the embedded system is powered on, the first storage space is initialized; When it is necessary to write data to the first storage space, check whether there is a free address in the first storage space; If available, then starting from the first free address in the first storage space, write user data and its virtual address sequentially, where the virtual address is a tag that marks the user data; If there is no free address in the first storage space, then the valid data and its virtual address in the first storage space are cached in RAM; Erase the data in the first storage space; The valid data cached in RAM and its virtual address are sequentially written into the first storage space, starting from the first free address.

2. The method according to claim 1, characterized in that, The method further includes determining valid data in the first storage space in the following manner: The first storage space is traversed from back to front according to the storage address. If there is data with the same virtual address, the data with the last virtual address is regarded as valid data, and the data with the virtual address of other storage addresses is regarded as invalid data.

3. The method according to claim 1, characterized in that, The method further includes: The length of the user data and its virtual address is determined based on the smallest unit of Flash programming in the embedded system.

4. The method according to claim 1, characterized in that, The method further includes: When data needs to be read from the first storage space, the storage addresses of the first storage space are traversed from back to front according to the virtual address of the data to be read, and the user data corresponding to the virtual address found for the first time is read out.

5. The method according to any one of claims 1 to 4, characterized in that, The method further includes: The power supply voltage of the embedded system is monitored in real time, and operations on the data in the first storage space of the Flash are stopped when the power supply voltage is lower than the voltage threshold.

6. The method according to claim 5, characterized in that, The method further includes: When the power supply voltage is lower than the voltage threshold, if the valid data and its virtual address of the first storage space of the Flash have been cached in the RAM, the embedded system is controlled to enter a low-power mode. The valid data and its virtual address in the RAM are transferred to the first storage space of the Flash, and the Flash erase / write operation mode is exited.

7. A data storage device for embedded systems with built-in Flash emulation of EEPROM, characterized in that, The device includes: a setting unit, a Flash unit, and a control unit; The setting unit is used to set a first storage space in Flash to simulate EEPROM, the size of which is a multiple of the minimum erase unit of Flash. The control unit is configured to initialize the first storage space after the embedded system is powered on; when data needs to be written to the first storage space, check if there is a free address in the first storage space; if there is, start from the first free address in the first storage space and write user data and its virtual address sequentially, where the virtual address is a tag marking the user data; if there is no free address in the first storage space, cache the valid data and its virtual address in the first storage space into RAM; erase the first storage space; and write the valid data and its virtual address cached in RAM into the first storage space sequentially, starting from the first free address in the first storage space.

8. The apparatus according to claim 7, characterized in that, The device further includes: A voltage monitoring unit is used to monitor the power supply voltage of the embedded system in real time, and send a trigger signal to the control unit when the power supply voltage is lower than a voltage threshold. The control unit is also configured to stop operating on the data in the first storage space of the Flash after receiving the trigger signal.

9. The apparatus according to claim 8, characterized in that, The control unit is further configured to, upon receiving the trigger signal, control the embedded system to enter a low-power mode when the valid data and its virtual address in the first storage space of the Flash have been cached in the RAM; transfer the valid data and its virtual address in the RAM to the first storage space of the Flash; and exit the Flash erase / write operation mode.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program, when executed by the processor, performs the steps of the data storage method for the embedded system's built-in Flash emulated EEPROM as described in any one of claims 1 to 6.

11. A terminal device, comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, characterized in that, When the processor runs the computer program, it performs the steps of the data storage method for the embedded system built-in Flash emulated EEPROM as described in any one of claims 1 to 6.

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