Pixel driving circuit, array substrate and display device

Abstract

This disclosure provides a pixel driving circuit, an array substrate, and a display device. The pixel driving circuit includes a reset module, a device driving module, a current adjustment module, a data writing module, and a light emission control module. The reset module is used to write a reset voltage to the current adjustment module during the initialization phase. The data writing module is used to write pixel data to the device driving module during the data writing phase. The current adjustment module is used to maintain a control voltage related to the pixel data. The light emission control module is used to turn on the circuit loop to the light-emitting device during the light emission phase. The device driving module is used to output a current driving signal matching the control voltage to the light-emitting device during the light emission phase, so that the light-emitting device emits light. In this embodiment, the reset voltage can be adjusted by adjusting the voltage of the reset voltage line, which can improve the effect of reducing flickering.

Description

Technical Field

[0001] This disclosure relates to the field of displays, and more particularly to a pixel driving circuit, an array substrate, and a display device. Background Technology

[0002] OLED (Organic Light-Emitting Diode) devices are a type of current-driven organic light-emitting device. They emit light through the injection and recombination of charge carriers, and the luminous intensity is directly proportional to the injected current. Under the influence of an electric field, holes generated at the anode and electrons generated at the cathode move and are injected into the hole transport layer and electron transport layer, respectively, migrating to the emissive layer. When these two electrons meet in the emissive layer, they generate excitons, which excite the light-emitting molecules to ultimately produce visible light.

[0003] In practical applications, the capacitor in the pixel driving circuit is connected to the power supply VDD and the reset voltage line Vini, respectively, to reset the capacitor during the initialization phase. However, in related technologies, when flickering issues are addressed using the reset voltage Vini, the potential across the capacitor is limited by the voltage of the power supply VDD, thus affecting the improvement effect. Summary of the Invention

[0004] This disclosure provides a pixel driving circuit, an array substrate, and a display device to solve the above-mentioned technical problems.

[0005] According to a first aspect of this disclosure, a pixel driving circuit is provided, configured to provide a current driving signal to a light-emitting device. The pixel driving circuit includes: a reset module, a device driving module, a current adjustment module, a data writing module, and a light-emitting control module; the device driving module is electrically connected to the reset module, the current adjustment module, the light-emitting control module, and the data writing module, respectively.

[0006] The reset module is used to write a reset voltage to the current adjustment module during the initialization phase;

[0007] The data writing module is used to write pixel data to the device driving module during the data writing phase;

[0008] The current adjustment module is used to maintain a control voltage related to pixel data;

[0009] The light-emitting control module is used to turn on the circuit loop to the light-emitting device during the light-emitting stage;

[0010] The device driving module is used to output a current driving signal that matches the control voltage to the light-emitting device during the light-emitting stage, so that the light-emitting device emits light.

[0011] Optionally, the reset module includes a first reset submodule; the first reset submodule is electrically connected to the first scan line of the current stage, the scan line of the previous stage, the reset voltage line and the fourth node respectively; the fourth node is electrically connected to the light-emitting device, the light-emitting control module and the current adjustment module respectively;

[0012] The first reset submodule is used to write the reset voltage of the reset voltage line into the fourth node in response to receiving the scan signal of the previous scan line during the initialization phase;

[0013] The first reset submodule is used to write the reset voltage of the reset voltage line into the fourth node in response to receiving the scan signal of the first scan line during the data writing phase.

[0014] Optionally, the first reset submodule includes a first switching device; the first switching device is a dual-gate field-effect transistor.

[0015] The first control terminal of the first switching device is electrically connected to the first scan line of the current stage; the second control terminal of the first switching device is electrically connected to the scan line of the previous stage; the first terminal of the first switching device is electrically connected to the reset voltage line; and the second terminal of the first switching device is electrically connected to the fourth node.

[0016] The first switching device is used to receive the scan signal of the first scan line through the first control terminal during the data writing stage and turn on the reset voltage line and the fourth node so as to write the reset voltage of the reset voltage line into the fourth node;

[0017] The first switching device is used to receive the scan signal of the previous scan line through the second control terminal during the initialization phase and turn on the reset voltage line and the fourth node so as to write the reset voltage of the reset voltage line into the fourth node.

[0018] Optionally, the reset module further includes a second reset submodule; the second reset submodule is electrically connected to the previous scan line, the reset voltage line, and the second node, respectively.

[0019] The second reset submodule is used to write the reset voltage of the reset voltage line into the second node in response to receiving the scan signal of the previous scan line during the initialization phase.

[0020] Optionally, the second reset submodule includes a second switching device;

[0021] The control terminal of the second switching device is electrically connected to the previous scan line; the first terminal of the second switching device is electrically connected to the reset voltage line; and the second terminal of the second switching device is electrically connected to the second node.

[0022] The second switching device is used to receive the scan signal of the previous scan line through the control terminal during the initialization phase and turn on the reset voltage line and the second node to write the reset voltage of the reset voltage line into the second node.

[0023] Optionally, the current adjustment module includes a first capacitor; a first terminal of the first capacitor is electrically connected to a second node, and a second terminal of the first capacitor is electrically connected to a fourth node;

[0024] The second node is electrically connected to the reset module, the data writing module, and the device driving module, respectively.

[0025] The fourth node is electrically connected to both the light-emitting device and the light-emitting control module.

[0026] Optionally, the device driving module includes a third switching device; the first end of the third switching device is electrically connected to the first node, the second end of the third switching device is electrically connected to the third node, and the control end of the third switching device is electrically connected to the second node.

[0027] The first node and the second node are respectively electrically connected to the data writing module;

[0028] The third node is electrically connected to both the data writing module and the light emission control module.

[0029] Optionally, the data writing module includes a fourth switching device; a first terminal of the fourth switching device is electrically connected to the data line; a second terminal of the fourth switching device is electrically connected to the third node; and a control terminal of the fourth switching device is electrically connected to the second scan line of the current stage.

[0030] The fourth switching device is used to receive the scanning signal of the second scan line through the control terminal during the data writing stage and turn on the data line and the third node so as to write the pixel data of the data line into the third node.

[0031] Optionally, the data writing module further includes a fifth switching device; the first terminal of the fifth switching device is electrically connected to the first node; the second terminal of the fifth switching device is electrically connected to the second node; and the control terminal of the fifth switching device is electrically connected to the first scan line of the current stage.

[0032] The fifth switching device is used to receive the scanning signal of the first scan line through the control terminal during the data writing stage and turn on the first node and the second node so as to write the pixel data and bias voltage of the third node to the second node; the bias voltage refers to the voltage required for the third switching device in the device driving module to turn on.

[0033] Optionally, the light-emitting control module includes a sixth switching device; the first end of the sixth switching device is electrically connected to the third node, the second end of the sixth switching device is electrically connected to the fourth node, and the control end of the sixth switching device is electrically connected to the first light-emitting control line.

[0034] The sixth switching device is used to receive the light emission control signal of the first light emission control line through the control terminal during the light emission stage and to turn on the third node and the fourth node so as to transmit the current driving signal output by the device driving module to the light emission device.

[0035] Optionally, the light-emitting control module includes a seventh switching device; the first end of the seventh switching device is electrically connected to the power supply, the second end of the seventh switching device is electrically connected to the first node, and the control end of the seventh switching device is electrically connected to the second light-emitting control line.

[0036] The seventh switching device is used to receive the light emission control signal of the second light emission control line through the control terminal during the light emission stage and turn on the power supply and the first node so as to write the voltage of the power supply into the first node.

[0037] According to a second aspect of this disclosure, an array substrate is provided, including a silicon substrate, a pixel driving circuit as described in any of the first aspects, and a corresponding light-emitting device thereof.

[0038] According to a third aspect of this disclosure, a display device is provided, comprising an array substrate, a scan driving module, and a data driving module as described in the second aspect;

[0039] Each pixel of the array substrate is electrically connected to the data driving module via a data line; each pixel of the array substrate is electrically connected to the scan driving module via a scan line.

[0040] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0041] In this embodiment, the pixel driving circuit includes a reset module, a device driving module, a current adjustment module, a data writing module, and a light emission control module. The device driving module is electrically connected to the reset module, the current adjustment module, the light emission control module, and the data writing module. The reset module writes a reset voltage to the current adjustment module during the initialization phase. The data writing module writes pixel data to the device driving module during the data writing phase. The current adjustment module maintains a control voltage related to the pixel data. The light emission control module conducts the circuit loop to the light-emitting device during the light emission phase. The device driving module outputs a current driving signal matching the control voltage to the light-emitting device during the light emission phase, causing the light-emitting device to emit light. This embodiment provides a reset voltage through a reset voltage line, and the reset voltage can be adjusted by adjusting the voltage of the reset voltage line. Compared with related technologies where the power supply provides a limited reset voltage, this improves the flicker problem.

[0042] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of a pixel matrix according to an embodiment of the present disclosure.

[0044] Figure 2 This is a schematic diagram of a pixel driving circuit according to an embodiment of the present disclosure.

[0045] Figure 3 This is a circuit diagram of a pixel driving circuit according to an embodiment of the present disclosure.

[0046] Figure 4 This is a schematic diagram of the working timing of an embodiment of the present disclosure.

[0047] Figure 5 This is a schematic diagram of the equivalent circuit of a pixel driving circuit in the initialization phase according to an embodiment of the present disclosure.

[0048] Figure 6 This is a schematic diagram of the equivalent circuit of a pixel driving circuit in the data writing stage according to an embodiment of the present disclosure.

[0049] Figure 7 This is a schematic diagram of the equivalent circuit of a pixel driving circuit in the holding phase according to an embodiment of the present disclosure.

[0050] Figure 8 This is an equivalent circuit diagram of another pixel driving circuit in the holding phase according to an embodiment of the present disclosure. Detailed Implementation

[0051] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses consistent with some aspects of this disclosure as detailed in the appended claims.

[0052] This disclosure provides a display device, which may include, but is not limited to, mobile phones, computers, tablets, e-readers, watches, 3D displays, all-in-one conference machines, electronic whiteboards, and other devices with display functions.

[0053] See Figure 1 The display device 2 includes a plurality of pixels 1, and the plurality of pixels 1 are evenly arranged in a row and column direction. It is understandable that... Figure 1 The diagram only shows 9 pixels in 3 rows and 3 columns, without showing other pixels, in order to keep the diagram simple and clear, but without affecting the understanding of the technical solution of this disclosure.

[0054] See Figure 1 and Figure 2 The display device 2 drives the light-emitting element of each pixel 1, i.e. Figure 2 The light-emitting device 20 shown emits light to display an image. The light-emitting device 20 is a current-driven light-emitting diode, such as a miniature LED or an organic light-emitting diode (OLED). Pixel 1 also includes a pixel driving circuit 10 connected to the light-emitting device 20. The pixel driving circuit 10 is configured to provide a current driving signal to the light-emitting device 20 to control the current flowing through the light-emitting device 20 and the operating time of the light-emitting device 20 when displaying each frame of the image, thereby controlling its light emission.

[0055] See Figure 2 The pixel driving circuit 10 includes a reset module 100, a current adjustment module 200, a device driving module 300, a data writing module 400, and a light emission control module 500. The device driving module 300 is electrically connected to the reset module 100, the current adjustment module 200, the data writing module 400, and the light emission control module 500, respectively.

[0056] The reset module 100 is used to write a reset voltage to the current adjustment module 200 during the initialization phase; the reset voltage is provided by the reset voltage line (Vini);

[0057] The data writing module 400 is used to write pixel data to the device driving module 300 during the data writing phase;

[0058] The current adjustment module 200 is used to maintain a control voltage related to pixel data;

[0059] The light-emitting control module 500 is used to turn on the circuit loop to the light-emitting device 20 during the light-emitting stage;

[0060] The device driving module 300 is used to output a current driving signal that matches the control voltage to the light-emitting device 20 during the light-emitting stage, so that the light-emitting device 20 emits light.

[0061] This embodiment provides a reset voltage through a reset voltage line. The reset voltage can be adjusted by adjusting the voltage of the reset voltage line. Compared with related technologies where the power supply provides a limited reset voltage, this can improve the effect of improving the flicker problem.

[0062] In this embodiment, see Figure 2 and Figure 3 The reset module 100 includes a first reset submodule 101. This first reset submodule 101 is electrically connected to the first scan line Scan1 of the current stage, the previous stage scan line Scan1(n-1), the reset voltage line ini, and the fourth node N4. The fourth node N4 is electrically connected to the light-emitting device 20, the light-emitting control module 500, and the current adjustment module 200.

[0063] The first reset submodule 101 is used to write the reset voltage of the reset voltage line into the fourth node in response to receiving the scan signal of the previous scan line Scan1(n-1) during the initialization phase;

[0064] The first reset submodule 101 is used to write the reset voltage Vini of the reset voltage line ini into the fourth node N4 in response to receiving the scan signal of the first scan line Scan1 during the data writing phase.

[0065] It is understandable that since the fourth node N4 is electrically connected to the current adjustment module 200, writing the reset voltage Vint to the fourth node N4 can be understood as writing to the current adjustment module 200.

[0066] See also Figure 3 The first reset submodule 101 includes a first switching device T1; the first switching device T1 is a dual-gate field-effect transistor. The first control terminal of the first switching device T1 (connected to the top gate (TG) of the first switching device T1) is electrically connected to the first scan line Scan1 of the current stage; the second control terminal of the first switching device T1 (connected to the bottom gate (BG) of the first switching device T1) is electrically connected to the scan line Scan1(n-1) of the previous stage; the first terminal of the first switching device is electrically connected to the reset voltage line ini, and the second terminal of the first switching device is electrically connected to the fourth node N4.

[0067] The first switching device T1 is used to receive the scan signal of the first scan line Scan1 through the first control terminal during the data writing stage and turn on the reset voltage line ini and the fourth node N4 so as to write the reset voltage Vini of the reset voltage line ini into the fourth node N4.

[0068] The first switching device T1 is also used to receive the scan signal of the previous scan line Scan1(n-1) through the second control terminal during the initialization phase and turn on the reset voltage line ini and the fourth node N4 so as to write the reset voltage Vini of the reset voltage line ini into the fourth node N4.

[0069] Thus, in this example, the first reset submodule 101 is implemented using a dual-gate field-effect transistor. The two control terminals of the dual-gate field-effect transistor can be used interchangeably, and control can be achieved using existing scan lines (the first scan line Scan1 and the previous scan line Scan1(n-1)). This allows the first reset submodule 101 to have three control states (i.e., the first control terminal controls conduction, the second control terminal controls conduction, and the second control terminal controls deactivation), which can reduce the complexity of the circuit.

[0070] See also Figure 2 and Figure 3 The reset module 100 also includes a second reset submodule 102; the second reset submodule 102 is electrically connected to the previous scan line Scan1(n-1), the reset voltage line ini, and the second node N2. The second node N2 is also electrically connected to the data writing module 400, the device driving module 300, and the current adjustment module 200.

[0071] The second reset submodule 102 is used to write the reset voltage Vini of the reset voltage line ini into the second node N2 in response to receiving the scan signal of the previous scan line Scan1(n-1) during the initialization phase. It can be understood that since the second node N2 is electrically connected to the current adjustment module 200, writing the reset voltage Vint into the second node N2 can be understood as writing the reset voltage Vini into the current adjustment module 200.

[0072] See also Figure 3 The second reset submodule 102 includes a second switching device T2. The control terminal of the second switching device T2 is electrically connected to the previous scan line Scan1(n-1); the first terminal of the second switching device T2 is electrically connected to the reset voltage line ini, and the second terminal of the second switching device T2 is electrically connected to the second node N2.

[0073] The second switching device T2 is used to receive the scan signal of the previous scan line Scan1(n-1) through the control terminal during the initialization phase and turn on the reset voltage line ini and the second node N2 to write the reset voltage Vini of the reset voltage line ini into the second node N2.

[0074] In this embodiment, the reset voltage provided by the reset module 100 is provided by the reset voltage line ini. In this way, the voltage across the current adjustment module 200 can be adjusted by adjusting the reset voltage provided by the reset signal line ini, so that the reset voltage of the current adjustment module 200 is no longer limited by the power supply VDD, or in other words, the reset voltage range of the current adjustment module 200 can be increased, ensuring the reset effect and helping to improve the flickering problem.

[0075] See also Figure 2 and Figure 3 The current adjustment module 200 includes a first capacitor C1. The first terminal of the first capacitor C1 is electrically connected to a second node N2, and the second terminal of the first capacitor C1 is electrically connected to a fourth node N4. The second node N2 is also electrically connected to the reset module 100, the data writing module 400, and the device driving module 300, respectively. The fourth node N4 is also electrically connected to the light-emitting device 20 and the light-emitting control module 500, respectively. It is understood that the first capacitor C1 can maintain the voltage at the second node N2, thereby enabling the device driving module 300 to output a stable current driving signal. Thus, a reset voltage Vini can be written across the first capacitor C1 during the initialization phase, stabilizing the reset voltage across the first capacitor C1. Without being limited by the power supply VDD, the adjustment range of the reset voltage in this example is larger, which can better improve the VRR flicker problem.

[0076] See also Figure 2 and Figure 3 The device driving module 300 includes a third switching device T3. The first terminal of the third switching device T3 is electrically connected to the first node N1, the second terminal of the third switching device T3 is electrically connected to the third node N3, and the control terminal of the third switching device T3 is electrically connected to the second node N2. The first node N1 and the second node N2 are respectively electrically connected to the data writing module 400; the third node N3 is electrically connected to both the data writing module 400 and the light-emitting control module 500. Thus, the third switching device T3 can output a matching current driving signal based on the control voltage at the second node N2.

[0077] See also Figure 2 and Figure 3The data writing module 400 includes a fourth switching device T4. The first terminal of the fourth switching device T4 is electrically connected to the data line Data; the second terminal of the fourth switching device T4 is electrically connected to the third node N3; and the control terminal of the fourth switching device T4 is electrically connected to the second scan line Scan2 of the current stage. The fourth switching device T4 is used to receive the scan signal of the second scan line Scan2 through its control terminal during the data writing stage and to turn on the data line Data and the third node N3, so as to write the pixel data of the data line Data to the third node N3. It is understood that the aforementioned pixel data is the data of the corresponding pixel in the current frame image. In this way, the data writing module 400 can write different pixel data to make the light-emitting device display different brightness levels, ultimately displaying the current frame image.

[0078] See also Figure 2 and Figure 3 The data writing module 400 also includes a fifth switching device T5. The first terminal of the fifth switching device T5 is electrically connected to the first node N1; the second terminal of the fifth switching device T5 is electrically connected to the second node N2; and the control terminal of the fifth switching device T5 is electrically connected to the first scan line Scan1 of the current stage. The fifth switching device T5 is used during the data writing phase to receive the scan signal from the first scan line Scan1 via its control terminal and to turn on the first node N1 and the second node N2, so as to write the pixel data and bias voltage of the third node N3 to the second node N2; the bias voltage refers to the voltage Vth required for the third switching device in the device driving module 300 to turn on. In this way, the fifth switching device T5 can write to the second node N2 after the voltage of the third node N3 has stabilized, thus ensuring that the voltage at the second node N2 includes the bias voltage, achieving the effect of compensating for the pixel data.

[0079] See also Figure 2 and Figure 3 The light-emitting control module 500 includes a sixth switching device T6. The first terminal of the sixth switching device T6 is electrically connected to the third node N3, the second terminal of the sixth switching device T6 is electrically connected to the fourth node N4, and the control terminal of the sixth switching device T6 is electrically connected to the first light-emitting control line EM1. The sixth switching device T6 is used to receive the light-emitting control signal from the first light-emitting control line EM1 during the light-emitting stage and to turn on the third node N3 and the fourth node N4, so as to transmit the current-driving signal output by the device driving module 300 to the light-emitting device 20. In this example, the first node N1 can be electrically connected to the power supply VDD. Thus, the sixth switching device T6 can control the transmission of the current-driving signal output by the device driving module 300, thereby causing the light-emitting device 20 to emit light.

[0080] See also Figure 2 and Figure 3The light-emitting control module 500 also includes a seventh switching device T7; the first terminal of the seventh switching device T7 is electrically connected to the power supply VDD, the second terminal of the seventh switching device T7 is electrically connected to the first node N1, and the control terminal of the seventh switching device T7 is electrically connected to the second light-emitting control line EM2. The seventh switching device T7 is used to receive the light-emitting control signal from the second light-emitting control line EM2 through its control terminal during the light-emitting stage and to turn on the power supply VDD and the first node N1, so as to write the voltage of the power supply VDD into the first node N1. Thus, in this embodiment, the joint control of the current loop by the sixth switching device T6 and the seventh switching device T7 can ensure reliable light emission of the light-emitting device 20 and avoid flickering.

[0081] It should be noted that the first light-emitting control line EM1 and the second light-emitting control line EM2 can be connected to the same signal source. That is, the sixth switching device T6 and the seventh switching device T7 can be controlled by the light-emitting control signal of the second light-emitting control line EM2, thereby reducing the number of control lines.

[0082] Figure 3 In the pixel driving circuit shown, each switching device can be implemented using different types of field-effect transistors. In one example, the first switching device T1 through the seventh switching device T7 are all implemented using NMOS transistors, and Figure 4 Example Figure 3 One operating timing sequence of the circuit shown is provided in the image. Figure 3 and Figure 4 The operation of a pixel driving circuit includes an initialization stage T1, a data writing stage T2, a holding stage T3, and a light emission stage T4.

[0083] First, the initialization phase T1

[0084] The scan signal on the previous scan line Scan1(n-1) is a high-level signal, at which time the first switching device T1 and the second switching device T2 are turned on; the first scan line Scan1, the second scan line Scan2, the first light emission control line EM1, and the second light emission control line EM2 all provide low-level signals, at which time the third switching device T3, the fourth switching device T4, the fifth switching device T5, the sixth switching device T6, and the seventh switching device T7 are all turned off. The equivalent circuit diagram of T1 in the initialization stage is as follows. Figure 5 As shown. At this time, the voltages at the second node N2 and the fourth node N4 are the reset voltage Vini.

[0085] Second, the data writing stage T2 includes sub-stages T21 and T22.

[0086] For sub-stage T21

[0087] The scan signal on the second scan line Scan2 is a high-level signal, at which time the third switch T3 and the fourth switch T4 are turned on. The previous scan line Scan1(n-1), the first scan line Scan1, the first light emission control line EM1 and the second light emission control line EM2 all provide low-level signals, at which time the first switch T1, the second switch T2, the fifth switch T5, the sixth switch T6 and the seventh switch T7 are all turned off. The equivalent circuit diagram of the sub-stage T21 of the data writing stage T2 is as follows. Figure 6 As shown. At this time, the voltages at the second node N2 and the fourth node N4 are the reset voltage Vini; the voltage at the third node N3 is Vdata.

[0088] For sub-stage T22

[0089] The scan signals on the first scan line Scan1 and the second scan line Scan2 are both high-level signals, at which time the first switching device T1, the third switching device T3, the fourth switching device T4, and the fifth switching device T5 are turned on. The previous scan line Scan1(n-1), the first light emission control line EM1, and the second light emission control line EM2 all provide low-level signals, at which time the second switching device T2, the sixth switching device T6, and the seventh switching device T7 are all turned off. The equivalent circuit diagram of the sub-stage T22 of the data writing stage T2 is as follows. Figure 7 As shown in the figure. At this time, the voltages at the second node N2, the third node N3, and the fourth node N4 are Vini, Vdata, and Vdata+Vth, respectively.

[0090] Third, maintain phase T3, which includes sub-phases T31 and T32.

[0091] For sub-stage T31

[0092] The first scan line Scan1, the second scan line Scan2, the previous scan line Scan1(n-1), the first light emission control line EM1, and the second light emission control line EM2 all provide low-level signals. The first switching device T1, the second switching device T2, the third switching device T3, the fourth switching device T4, the fifth switching device T5, the sixth switching device T6, and the seventh switching device T7 are all disconnected. At this time, the voltages at the second node N2, the third node N3, and the fourth node N4 are Vdata+Vth, Vdata, and Vini, respectively.

[0093] For sub-stage T32

[0094] The first light-emitting control line EM1 provides a high-level signal, at which time the third switching device T3 and the sixth switching device T6 are turned on. The first scan line Scan1, the second scan line Scan2, the previous scan line Scan1(n-1), and the second light-emitting control line EM2 all provide low-level signals, and the first switching device T1, the second switching device T2, the fourth switching device T4, the fifth switching device T5, and the seventh switching device T7 are all turned off. The equivalent circuit diagram of the sub-stage T32 of the data holding stage T3 is as follows. Figure 8 As shown. At this time, the voltages at the second node N2, the third node N3, and the fourth node N4 are Vdata+Vth+Voled+Vss-Vini, Voled+Vss, and Voled+Vss, respectively. The voltage across the first capacitor is Vdata+Vth-Vini. Where Voled represents the voltage division of the light-emitting device 20, and Vss represents the ground voltage.

[0095] Fourth, the luminescent stage T4.

[0096] The first and second light-emitting control lines EM1 provide high-level signals, at which time the seventh switch T7, the third switch T3, and the sixth switch T6 are turned on. The first scan line Scan1, the second scan line Scan2, and the previous scan line Scan1(n-1) all provide low-level signals, and the first switch T1, the second switch T2, the fourth switch T4, and the fifth switch T5 are all turned off. At this time, the voltages at the second node N2, the third node N3, and the fourth node N4 are Vdata+Vth+Voled+Vss-Vini, Voled+Vss, and Voled+Vss, respectively. The voltage across the first capacitor is Vdata+Vth-Vini.

[0097] At this time, the current driving signal Ids from the power supply VDD to the light-emitting device is as shown in equation (1).

[0098] (1)

[0099] This disclosure also provides an array substrate, including a silicon substrate, such as... Figures 2-8 The pixel driving circuit and its corresponding light-emitting device are described above. In this embodiment, the array substrate is implemented using a silicon substrate, which not only improves the stability of the switching devices but also reduces the area of ​​each switching device in the pixel driving circuit, thereby significantly increasing the pixel density per inch (PPI) of the array substrate.

[0100] This disclosure also provides a display device, including the above-described array substrate, scan driving module, and data driving module; each pixel of the array substrate is electrically connected to the data driving module via a data line; each pixel of the array substrate is electrically connected to the scan driving module via a scan line.

[0101] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. Unless otherwise defined, the technical or scientific terms used in this disclosure should be understood in their ordinary sense by one of ordinary skill in the art to which this disclosure pertains. The words “a” or “one” and similar terms used in this disclosure and the claims do not indicate a limitation of quantity, but rather indicate the presence of at least one. “A plurality” means at least two. The words “comprising” or “including” and similar terms mean that the element or object preceding “comprising” or “including” covers the element or object listed following “comprising” or “including” and its equivalents, and does not exclude other elements or objects. The words “connected” or “linked” and similar terms are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect. The singular forms “a,” “the,” and “the” used in this disclosure and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0102] For the method embodiments, since they basically correspond to the apparatus embodiments, the relevant parts can be referred to in the description of the apparatus embodiments. The method embodiments and apparatus embodiments complement each other.

[0103] The above description is merely a preferred embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A pixel driving circuit configured to provide a current driving signal to a light-emitting device, characterized in that, The pixel driving circuit includes: a reset module, a device driving module, a current adjustment module, a data writing module, and a light emission control module; the device driving module is electrically connected to the reset module, the current adjustment module, the light emission control module, and the data writing module, respectively. The reset module is used to write a reset voltage to the current adjustment module during the initialization phase; the reset voltage is provided by the reset voltage line. The data writing module is used to write pixel data to the device driving module during the data writing phase; The current adjustment module is used to maintain a control voltage related to pixel data; The light-emitting control module is used to turn on the circuit loop to the light-emitting device during the light-emitting stage; The device driving module is used to output a current driving signal that matches the control voltage to the light-emitting device during the light-emitting stage, so as to make the light-emitting device emit light; The reset module includes a first reset submodule; the first reset submodule is electrically connected to the first scan line of the current stage, the scan line of the previous stage, the reset voltage line and the fourth node respectively; the fourth node is electrically connected to the light-emitting device, the light-emitting control module and the current adjustment module respectively; The first reset submodule is used to write the reset voltage of the reset voltage line into the fourth node in response to receiving the scan signal of the previous scan line during the initialization phase; The first reset submodule is configured to write the reset voltage of the reset voltage line into the fourth node in response to receiving the scan signal of the first scan line during the data writing phase; The first reset submodule includes a first switching device; the first switching device is a dual-gate field-effect transistor; the first control terminal of the first switching device is electrically connected to the first scan line of the current stage; the second control terminal of the first switching device is electrically connected to the scan line of the previous stage.

2. The circuit according to claim 1, characterized in that, The first terminal of the first switching device is electrically connected to the reset voltage line, and the second terminal of the first switching device is electrically connected to the fourth node. The first switching device is used to receive the scan signal of the first scan line through the first control terminal during the data writing stage and turn on the reset voltage line and the fourth node so as to write the reset voltage of the reset voltage line into the fourth node; The first switching device is used to receive the scan signal of the previous scan line through the second control terminal during the initialization phase and turn on the reset voltage line and the fourth node so as to write the reset voltage of the reset voltage line into the fourth node.

3. The circuit according to claim 1, characterized in that, The reset module further includes a second reset submodule; the second reset submodule is electrically connected to the previous scan line, the reset voltage line, and the second node respectively; The second reset submodule is used to write the reset voltage of the reset voltage line into the second node in response to receiving the scan signal of the previous scan line during the initialization phase.

4. The circuit according to claim 3, characterized in that, The second reset submodule includes a second switching device; The control terminal of the second switching device is electrically connected to the previous scan line; the first terminal of the second switching device is electrically connected to the reset voltage line; and the second terminal of the second switching device is electrically connected to the second node. The second switching device is used to receive the scan signal of the previous scan line through the control terminal during the initialization phase and turn on the reset voltage line and the second node to write the reset voltage of the reset voltage line into the second node.

5. The circuit according to claim 1, characterized in that, The current adjustment module includes a first capacitor; a first terminal of the first capacitor is electrically connected to a second node, and a second terminal of the first capacitor is electrically connected to a fourth node; The second node is electrically connected to the reset module, the data writing module, and the device driving module, respectively. The fourth node is electrically connected to both the light-emitting device and the light-emitting control module.

6. The circuit according to claim 1, characterized in that, The device driving module includes a third switching device; the first end of the third switching device is electrically connected to the first node, the second end of the third switching device is electrically connected to the third node, and the control end of the third switching device is electrically connected to the second node. The first node and the second node are respectively electrically connected to the data writing module; The third node is electrically connected to both the data writing module and the light emission control module.

7. The circuit according to claim 1, characterized in that, The data writing module includes a fourth switching device; the first end of the fourth switching device is electrically connected to the data line; the second end of the fourth switching device is electrically connected to the third node; and the control end of the fourth switching device is electrically connected to the second scan line of the current stage. The fourth switching device is used to receive the scanning signal of the second scan line through the control terminal during the data writing stage and turn on the data line and the third node so as to write the pixel data of the data line into the third node.

8. The circuit according to claim 7, characterized in that, The data writing module further includes a fifth switching device; the first terminal of the fifth switching device is electrically connected to the first node; the second terminal of the fifth switching device is electrically connected to the second node; and the control terminal of the fifth switching device is electrically connected to the first scan line of the current stage. The fifth switching device is used to receive the scanning signal of the first scan line through the control terminal during the data writing stage and turn on the first node and the second node so as to write the pixel data and bias voltage of the third node to the second node. The bias voltage refers to the voltage required for the third switching device in the device driving module to turn on.

9. The circuit according to claim 1, characterized in that, The light-emitting control module includes a sixth switching device; the first end of the sixth switching device is electrically connected to the third node, the second end of the sixth switching device is electrically connected to the fourth node, and the control end of the sixth switching device is electrically connected to the first light-emitting control line. The sixth switching device is used to receive the light emission control signal of the first light emission control line through the control terminal during the light emission stage and to turn on the third node and the fourth node so as to transmit the current driving signal output by the device driving module to the light emission device.

10. The circuit according to claim 1, characterized in that, The light-emitting control module includes a seventh switching device; the first end of the seventh switching device is electrically connected to the power supply, the second end of the seventh switching device is electrically connected to the first node, and the control end of the seventh switching device is electrically connected to the second light-emitting control line. The seventh switching device is used to receive the light emission control signal of the second light emission control line through the control terminal during the light emission stage and turn on the power supply and the first node so as to write the voltage of the power supply into the first node.

11. An array substrate, characterized in that, It includes a silicon substrate, a pixel driving circuit as described in any one of claims 1 to 10, and a corresponding light-emitting device.

12. A display device, characterized in that, Includes the array substrate, scanning drive module, and data drive module as described in claim 11; Each pixel of the array substrate is electrically connected to the data driving module via a data line; each pixel of the array substrate is electrically connected to the scan driving module via a scan line.

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