Pixel circuit, driving method thereof and array substrate

Abstract

The application relates to a pixel circuit, a driving method thereof and an array substrate. The pixel circuit comprises a driving transistor for providing a driving current to a light emitting element; a storage module, a first end of the storage module being used for receiving a first power voltage, and a second end of the storage module being connected with a gate of the driving transistor; and a writing module comprising a plurality of writing transistors, a first pole of each writing transistor being used for receiving a data signal of different frequency, a second pole of each writing transistor being connected with a first pole of the driving transistor, a gate of each writing transistor being used for receiving a first scanning signal of different frequency, and the opening speed of each writing transistor being different, the frequency of the first scanning signal received by a target writing transistor at the same time being positively correlated with the frequency of the data signal received by the target writing transistor, and the target writing transistor being one of the plurality of writing transistors. The pixel circuit can allocate refresh frequencies according to different use scenarios.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and an array substrate. BACKGROUND

[0002] With the development of display technology, the display effect of display products is constantly improved, so that the application of display products is more and more widely.

[0003] At present, the screen refresh frequency is a fixed frequency, and the refresh frequency of the display panel refers to the frequency of updating the display panel to display a picture. In the application, there may be a case that some areas of the display panel display static pictures and the remaining areas normally display dynamic pictures, and these areas with different display requirements can only be refreshed at a fixed frequency, and the refresh frequency cannot be allocated according to different use scenarios, so that the display panel has the problem of power waste. SUMMARY

[0004] Therefore, it is necessary to provide a pixel circuit, a driving method thereof and an array substrate which can support allocation of refresh frequency.

[0005] In a first aspect, the present application provides a pixel circuit, comprising:

[0006] a driving transistor configured to provide a driving current to a light emitting element;

[0007] a storage module, a first end of the storage module configured to receive a first power voltage, and a second end of the storage module connected to a gate of the driving transistor;

[0008] a writing module comprising a plurality of writing transistors, a first electrode of each of the writing transistors configured to receive a data signal with different frequencies, a second electrode of each of the writing transistors connected to a first electrode of the driving transistor, a gate of each of the writing transistors configured to receive a first scanning signal with different frequencies, and an opening speed of each of the writing transistors being different, wherein a frequency of the first scanning signal received by a target writing transistor at the same time is positively correlated with a frequency of the data signal received by the target writing transistor, and the target writing transistor is one of the plurality of writing transistors.

[0009] The pixel circuit has the advantages that, since the frequency of the first scanning signal received by the target write transistor is positively correlated with the frequency of the data signal, when the frequency of the data signal is low, the first scanning signal is also a low-frequency signal, and when the frequency of the data signal is high, the first scanning signal is also a high-frequency signal, so that the frequency of the pixel circuit driving the light-emitting element can be changed, and then the refresh frequency can be allocated according to different use scenarios, thereby saving the power consumption of the display panel. In addition, since the opening speeds of the write transistors are different, the opening speed of the write transistor can be made to correspond to the frequency of the received signal, the write transistor with a higher opening speed receives a higher-frequency signal, so that the write transistor can meet the high-frequency use requirement, and the write transistor with a lower opening speed receives a lower-frequency signal, since the write transistor with a lower opening speed is relatively small in size and low in leakage degree, the low-frequency leakage can be improved, and then the low-frequency flicker problem can be improved.

[0010] In one of the embodiments, the pixel circuit further includes:

[0011] a threshold compensation module, a first end of the threshold compensation module is connected with the second electrode of the driving transistor, a second end of the threshold compensation module is connected with the gate electrode of the driving transistor, and a control end of the threshold compensation module is configured to receive a first scanning signal; and the threshold compensation module is configured to compensate the threshold voltage of the driving transistor in a data writing stage in response to the first scanning signal.

[0012] In one of the embodiments, the threshold compensation module includes a plurality of compensation transistors, the first electrode of each of the compensation transistors is connected with the second electrode of the driving transistor, the second electrode of each of the compensation transistors is connected with the gate electrode of the driving transistor, the gate electrode of each of the compensation transistors is configured to receive a first scanning signal with a different frequency, and the opening speeds of the compensation transistors are different; wherein the target compensation transistor is one of the compensation transistors, and the target compensation transistor receives the first scanning signal with the same frequency as the target write transistor at the same time.

[0013] In the embodiment, the threshold compensation module compensates the threshold voltage of the driving transistor in the data writing stage, thereby improving the display uniformity, and the target compensation transistor receives the first scanning signal with the same frequency as the target write transistor at the same time, so that the first scanning signal received by the compensation transistor is positively correlated with the frequency of the data signal, and then the working state of the target compensation transistor corresponds to the working state of the target write transistor.

[0014] In one of the embodiments, the pixel circuit further includes:

[0015] a first light emitting control module, a first end of the first light emitting control module is configured to receive a first power voltage, a second end of the first light emitting control module is connected with the first electrode of the driving transistor, a control end of the first light emitting control module is configured to receive a light emitting control signal, and the first light emitting control module is configured to be turned on in a light emitting stage in response to the light emitting control signal;

[0016] a second light emitting control module, a first end of the second light emitting control module is connected with the second electrode of the driving transistor, a second end of the second light emitting control module is connected with the anode of the light emitting element, a control end of the second light emitting control module is configured to receive a light emitting control signal, and the second light emitting control module is configured to be turned on in a light emitting stage in response to the light emitting control signal.

[0017] In one of the embodiments, the first light emitting control module includes a plurality of first light emitting control transistors, a first electrode of each of the first light emitting control transistors is configured to receive the first power voltage, a second electrode of each of the first light emitting control transistors is connected with the first electrode of the driving transistor, a gate of each of the first light emitting control transistors is configured to receive a light emitting control signal with different frequencies, and the opening speed of each of the first light emitting control transistors is different, wherein the frequency of the light emitting control signal received by a target first light emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, and the target first light emitting control transistor is one of the first light emitting control transistors.

[0018] The second light emitting control module includes a plurality of second light emitting control transistors, a first electrode of each of the second light emitting control transistors is connected with the second electrode of the driving transistor, a second electrode of each of the second light emitting control transistors is connected with the anode of the light emitting element, a gate of each of the second light emitting control transistors is configured to receive a light emitting control signal with different frequencies, and the opening speed of each of the second light emitting control transistors is different, wherein the frequency of the light emitting control signal received by the target first light emitting control transistor and the target second light emitting control transistor at the same time is the same, and the target second light emitting control transistor is one of the second light emitting control transistors.

[0019] In the embodiment, the first light emitting control module and the second light emitting control module are provided, so that whether the driving transistor supplies power to the light emitting element can be controlled by controlling the switching state of the first light emitting control module and the second light emitting control module, and the frequency of the light emitting control signal received by the target first light emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, so that the pixel circuit can be applied to different refresh frequencies.

[0020] In one of the embodiments, the pixel circuit further comprises:

[0021] a first initialization module, a first end of the first initialization module is configured to receive an initialization signal, a second end of the first initialization module is connected with the gate of the driving transistor and the second end of the storage module, a control end of the first initialization module is configured to receive a second scan signal, and the first initialization module is configured to initialize the gate of the driving transistor and the second end of the storage module in response to the second scan signal;

[0022] a second initialization module, a first end of the second initialization module is configured to receive an initialization signal, a second end of the second initialization module is connected with the anode of the light emitting element, a control end of the second initialization module is configured to receive a third scan signal, and the second initialization module is configured to initialize the anode of the light emitting element in response to the third scan signal.

[0023] In one of the embodiments, the first initialization module comprises a plurality of first initialization transistors, a first end of each of the first initialization transistors is configured to receive an initialization signal, a second end of each of the first initialization transistors is connected with the gate of the driving transistor and the second end of the storage module, a gate of each of the first initialization transistors is configured to receive a second scan signal of different frequency, the opening speed of each of the first initialization transistors is different, the frequency of the second scan signal received by a target first initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, and the target first initialization transistor is one of the first initialization transistors.

[0024] The second initialization module comprises a plurality of second initialization transistors, a first end of each of the second initialization transistors is configured to receive an initialization signal, a second end of each of the second initialization transistors is connected with the anode of the light emitting element, a gate of each of the second initialization transistors is configured to receive a third scan signal of different frequency, the opening speed of each of the second initialization transistors is different, the frequency of the third scan signal received by a target second initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, and the target second initialization transistor is one of the second initialization transistors.

[0025] In the embodiment, the pixel circuit comprises a first initialization module and a second initialization module, so that the second end of the storage module, the gate of the driving transistor and the anode of the light emitting element can be initialized, thereby reducing pixel light stealing and improving display unevenness and the like. The frequency of the second scan signal received by the target first initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, and the frequency of the third scan signal received by the target second initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, so that the initialization frequency of the second end of the storage module, the gate of the driving transistor and the anode of the light emitting element supports the driving frequency of the pixel circuit.

[0026] In one of the embodiments, the third scan signal is the same signal as the second scan signal, so that the same signal line can be used to output the second scan signal and the third scan signal, thereby reducing the occupied space of the signal line.

[0027] In one of the embodiments, the pixel circuit further comprises: the first poles of the first initialization transistors are respectively used to receive initialization signals with different frequencies, and the initialization signals received by the same first initialization transistor are positively correlated with the frequency of the second scan signal.

[0028] In the embodiment, the first poles of the first initialization transistors are respectively used to receive initialization signals with different frequencies, so that when the target first initialization transistor is turned on, the initialization speed of the second end of the storage module and the gate of the driving transistor can be adapted to the driving frequency of the pixel circuit, thereby making the charging speed of the storage module adapt to the current driving frequency of the pixel circuit.

[0029] In one of the embodiments, the first poles of the second initialization transistors are respectively used to receive initialization signals with different frequencies, and the initialization signals received by the same second initialization transistor are positively correlated with the frequency of the third scan signal.

[0030] In the embodiment, the first poles of the second initialization transistors are respectively used to receive initialization signals with different frequencies, so that when the target second initialization transistor is turned on, the initialization speed of the light emitting element can be adapted to the driving frequency of the pixel circuit.

[0031] In a second aspect, the application further provides an array substrate, which comprises a plurality of first scan signal lines, a plurality of data signal lines and the pixel circuit as described above.

[0032] The first scan signal lines are used to output first scan signals with different frequencies, and the data signal lines are used to output data signals with different frequencies.

[0033] The array substrate, each first scan signal line is used for outputting a first scan signal with different frequencies, and each data signal line is used for outputting a data signal with different frequencies. The pixel circuit can receive first scan signals and data signals with different frequencies, so that the frequency of the first scan signal received by the target write transistor is positively correlated with the frequency of the data signal. When the frequency of the data signal is low, the first scan signal is also a low-frequency signal. When the frequency of the data signal is high, the first scan signal is also a high-frequency signal. Therefore, the frequency of the pixel circuit driving the light emitting element can be changed, and the refresh frequency can be allocated for different use scenarios to save the power consumption of the display panel. In addition, since the array substrate includes the pixel circuit as described above, the frequency of the signal received by the write transistor with high opening speed is high, and the frequency of the signal received by the write transistor with low opening speed is low. Therefore, the array substrate can meet the high-frequency use requirement and improve the low-frequency leakage problem.

[0034] In one of the embodiments, the array substrate further includes:

[0035] The processing circuit is connected with the pixel circuit, and is used for controlling the output state of each first scan signal line and each data signal line, so that the target first scan signal line and the target data signal line output signals to the pixel circuit. The target first scan signal line is one of the plurality of first scan signal lines, the target data signal line is one of the plurality of data signal lines, and the frequency of the signal output by the target first scan signal line is positively correlated with the frequency of the signal output by the target data signal line.

[0036] In the embodiment, the processing circuit controls the output state of each first scan signal line and each data signal line, so that the target first scan signal line and the target data signal line output signals to the pixel circuit. Therefore, the frequency of the first scan signal and the data signal input to each row or each column of pixel circuits can be controlled, so that the refresh frequency of each display area can be controlled to allocate the refresh frequency.

[0037] In one of the embodiments, the array substrate further includes a plurality of second scan signal lines, and the second scan signal lines are used for outputting second scan signals with different frequencies.

[0038] The processing circuit is further used for controlling the output state of each second scan signal line, so that the target second scan signal line outputs signals to the pixel circuit. The target second scan signal line is one of the plurality of second scan signal lines, and the frequency of the signal output by the target second scan signal line is positively correlated with the frequency of the signal output by the target data signal line.

[0039] In the embodiment, the processing circuit controls the output state of each second scanning signal line to make a target second scanning signal line output a signal to the pixel circuit, so that the initialization frequency of the second end of the storage module and the gate of the driving transistor supports the driving frequency of the pixel circuit.

[0040] In one of the embodiments, the array substrate further comprises a plurality of initialization signal lines, each of which is used to output an initialization signal with different frequency.

[0041] The processing circuit is further configured to control the output state of each initialization signal line to make a target initialization signal line output a signal to the pixel circuit, wherein the target initialization signal line is one of the plurality of initialization signal lines, and the frequency of the signal output by the target initialization signal line is positively correlated with the frequency of the target data signal line output signal.

[0042] In the embodiment, the processing circuit controls the output state of each initialization signal line to make a target initialization signal line output a signal to the pixel circuit, so that the initialization speed of the second end of the storage module and the gate of the driving transistor supports the driving frequency of the pixel circuit.

[0043] In one of the embodiments, the array substrate further comprises a plurality of light-emitting control signal lines, each of which is used to output a light-emitting control signal with different frequency.

[0044] The processing circuit is further configured to control the output state of each light-emitting control signal line to make a target light-emitting control signal line output a signal to the pixel circuit, wherein the target light-emitting control signal line is one of the plurality of light-emitting control signal lines, and the frequency of the signal output by the target light-emitting control signal line is positively correlated with the frequency of the target data signal line output signal.

[0045] In the embodiment, the frequency of the light-emitting control signal received by the target first light-emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, so that the pixel circuit can be applied to different refresh frequencies.

[0046] In a third aspect, the application further provides an array substrate, comprising a plurality of first scanning signal lines, a plurality of data signal lines and a plurality of pixel circuits.

[0047] Each of the first scan signal lines is configured to output a first scan signal with a different frequency, and each of the data signal lines is configured to output a data signal with a different frequency. Each of the pixel circuits is connected to at least two of the first scan signal lines and at least two of the data signal lines. In the process of driving the light emitting element to emit light, the frequency of a target first scan signal received by the same pixel circuit and the frequency of a target data signal received by the same pixel circuit are positively correlated, the target first scan signal is one of the first scan signals, and the target data signal is one of the data signals.

[0048] In the array substrate, each of the first scan signal lines is configured to output a first scan signal with a different frequency, and each of the data signal lines is configured to output a data signal with a different frequency. Each of the pixel circuits is connected to at least two of the first scan signal lines and at least two of the data signal lines. In the process of driving the light emitting element to emit light, the frequency of a target first scan signal received by the same pixel circuit and the frequency of a target data signal received by the same pixel circuit are positively correlated, the target first scan signal is one of the first scan signals, and the target data signal is one of the data signals.

[0049] In one of the embodiments, the array substrate further includes a plurality of second scan signal lines, each of the second scan signal lines is configured to output a second scan signal with a different frequency, and each of the pixel circuits is connected to at least two of the second scan signal lines.

[0050] The processing circuit is connected to the pixel circuit, and is configured to control the output states of the first scan signal lines and the data signal lines, so that a target first scan signal line and a target data signal line output signals to the pixel circuit, the target first scan signal line is configured to output the target first scan signal, and the target data signal line is configured to output the target data signal.

[0051] In the embodiment, the processing circuit is configured to control the output states of the first scan signal lines and the data signal lines, so that a target first scan signal line and a target data signal line output signals to the pixel circuit. Therefore, the frequencies of the first scan signals and the data signals input to the pixel circuits in each row or each column can be controlled, so that the refresh frequencies of each display area can be controlled, and the allocation of the refresh frequencies can be realized.

[0052] In one of the embodiments, the array substrate further includes a plurality of second scan signal lines, each of the second scan signal lines is configured to output a second scan signal with a different frequency, and each of the pixel circuits is connected to at least two of the second scan signal lines.

[0053] The processing circuit is further configured to control output states of the second scan signal lines, so that a target second scan signal line outputs a signal to the pixel circuit, the target second scan signal line being one of the second scan signal lines, and a frequency of the target second scan signal line output signal being positively correlated with a frequency of the target data signal.

[0054] In this embodiment, the processing circuit controls output states of the second scan signal lines, so that a target second scan signal line outputs a signal to the pixel circuit, thereby supporting the driving frequency of the pixel circuit in terms of the initialization frequency of the second end of the storage module and the gate of the driving transistor.

[0055] In one of the embodiments, the array substrate further comprises a plurality of initialization signal lines, each of the initialization signal lines being configured to output an initialization signal with a different frequency, and each of the pixel circuits being connected to at least two of the initialization signal lines.

[0056] The processing circuit is further configured to control output states of the initialization signal lines, so that a target initialization signal line is connected in conduction with the pixel circuit, the target initialization signal line being one of the initialization signal lines, and a frequency of the target initialization signal line output signal being positively correlated with a frequency of the target data signal.

[0057] In this embodiment, the processing circuit controls output states of the initialization signal lines, so that a target initialization signal line outputs a signal to the pixel circuit, thereby supporting the driving frequency of the pixel circuit in terms of the initialization speed of the second end of the storage module and the gate of the driving transistor.

[0058] In one of the embodiments, the array substrate further comprises a plurality of light-emitting control signal lines, each of the light-emitting control signal lines being configured to output a light-emitting control signal with a different frequency, and each of the pixel circuits being connected to at least two of the light-emitting control signal lines.

[0059] The processing circuit is further configured to control output states of the light-emitting control signal lines, so that a target light-emitting control signal line outputs a signal to the pixel circuit, the target light-emitting control signal line being one of the light-emitting control signal lines, and a frequency of the target light-emitting control signal line output signal being positively correlated with a frequency of the target data signal.

[0060] In this embodiment, the frequency of the light-emitting control signal received by the target first light-emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, thereby making the pixel circuit applicable to different refresh frequencies.

[0061] In one of the embodiments, the application further provides a driving method of the pixel circuit, the driving method of the pixel circuit comprises:

[0062] acquiring a target frequency of each of the pixel circuits for driving the light-emitting element;

[0063] controlling output states of each of the first scan signal lines and each of the data signal lines according to the target frequency of the pixel circuit, so that a target first scan signal is output by a target first scan signal line, and a target data signal is output by a target data signal line to each of the pixel circuits, wherein the pixel circuits are connected to each of the first scan signal lines and each of the data signal lines respectively, each of the first scan signal lines is used for outputting a first scan signal with different frequencies, each of the data signal lines is used for outputting a data signal with different frequencies, the target first scan signal line is one of the first scan signal lines, the target data signal line is one of the data signal lines, and the target first scan signal is positively correlated with the target data signal in frequency.

[0064] In the driving method of the pixel circuit, the output states of each of the first scan signal lines and each of the data signal lines are controlled according to the target frequency of the pixel circuit, so that the target first scan signal is output by the target first scan signal line, and the target data signal is output by the target data signal line to each of the pixel circuits. Since the target first scan signal is positively correlated with the target data signal in frequency, when the frequency of the target data signal is low, the target first scan signal is also a signal with low frequency, and when the frequency of the target data signal is high, the target first scan signal is also a signal with high frequency. Therefore, the frequency of the pixel circuit driving the pixel can be changed, and the refresh frequency can be allocated according to different use scenarios, thereby saving the power consumption of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0065] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without any creative effort.

[0066] Figures 1 to 6 The structure of the pixel circuit in different embodiments of the application is shown in the structure diagram.

[0067] Figure 7 The structure of the array substrate in an embodiment of the application is shown in the structure diagram.

[0068] Figure 8 The structure of the pixel circuit included in the array substrate in an embodiment of the application is shown in the structure diagram.

[0069] Figure 9 FIG. 1 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present application.

[0070] Reference Signs List:

[0071] 100 - writing module, 200 - storage module, 300 - threshold compensation module, 400 - first light emitting control module, 500 - second light emitting control module, 600 - first initialization module, 700 - second initialization module, 11 - pixel circuit, 12 - initialization signal line, 13 - light emitting control signal line, 14 - first scan signal line, 15 - second scan signal line, 16 - data signal line, 17 - processing circuit. DETAILED DESCRIPTION

[0072] For the purpose of the present application, the following description will be made with reference to the accompanying drawings. In the drawings, preferred embodiments of the present application are shown. However, the present application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure of the present application will be thorough and complete, and will fully convey the scope of the application to those skilled in the art.

[0073] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.

[0074] It is to be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements can also be present. As used herein the terms "vertical", "horizontal", "left", "right" and the like are merely used for the purpose of explanation.

[0075] In the drawings, the size of layers and regions can be exaggerated for clarity. It will be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present. In addition, it will be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers can also be present. In addition, like reference numerals are used to denote like elements throughout the figures.

[0076] In the following, although terms such as "first", "second", etc. can be used to describe various components, the components must not be limited to the above terms. The above terms are only used to distinguish one component from another component. It will also be understood that an expression used in the singular includes the plural, unless the context in which the expression is used clearly dictates otherwise.

[0077] Electronic or electric devices and / or any other related devices or components (e.g., display devices including display panels and display panel drivers, where the display panel drivers further include drive controllers, gate drivers, gamma reference voltage generators, data drivers, and emission drivers) according to embodiments of the present application concepts described herein can be implemented with any appropriate hardware, firmware (e.g., application specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, various components of these devices can be formed on one integrated circuit (IC) chip or on separate IC chips. In addition, various components of these devices can be implemented on flexible printed circuit films, tape carrier packages (TCPs), printed circuit boards (PCBs), or formed on one substrate. In addition, various components of these devices can be processes or threads running on one or more processors in one or more computing devices to execute computer program instructions and interact with other system components to perform the various functions described herein. The computer program instructions can be stored in memory that can be implemented using standard memory devices such as random access memory (RAM) in computing devices. The computer program instructions can also be stored in other non-transitory computer readable media such as, for example, CD-ROMs, flash drives, etc. Moreover, those skilled in the art will appreciate that the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed across one or more other computing devices without departing from the spirit and scope of the exemplary embodiments of the present application concepts.

[0078] While example embodiments of display modules and display devices including display modules have been particularly described herein, many modifications and variations will be apparent to those skilled in the art. Accordingly, it will be understood that display modules and display devices including display modules constructed in accordance with the principles of the present application can be practiced otherwise than as specifically described herein. The present application is therefore defined in the scope of the claims and their equivalents.

[0079] As described in the background section, the screen refresh frequency of the OLED display panel in the prior art is a fixed frequency, and the refresh frequency of the display panel refers to the frequency at which the display panel updates the display picture.

[0080] In an application, there can be a case that some areas of the display panel display static pictures and the rest of the areas display dynamic pictures normally, and the areas with different display requirements can only be refreshed at a fixed frequency, and the refresh frequency cannot be allocated according to different use scenarios, thus, the display panel has a problem of power waste.

[0081] Based on the above problems, in one embodiment, as shown in Figure 1 The present application provides a pixel circuit, which comprises a driving transistor M0, a storage module 200 and a writing module 100.

[0082] The driving transistor M0 is used to provide a driving current for a light emitting element.

[0083] A first end of the storage module 200 is used to receive a first power voltage, and a second end of the storage module 200 is connected with a gate of the driving transistor M0. The storage module 200 can comprise a storage capacitor Cst, a first plate of the storage capacitor Cst is used to receive the first power voltage, and a second plate of the storage capacitor Cst is connected with the gate of the driving transistor M0.

[0084] The writing module 100 comprises a plurality of writing transistors M1, a first pole of each of the writing transistors M1 is used to receive a data signal with different frequencies (such as data high and data low in the example in Figure 1 , data high represents a high-frequency data signal, and data low represents a low-frequency data signal), a second pole of each of the writing transistors M1 is connected with a first pole of the driving transistor M0, a gate of each of the writing transistors M1 is used to receive a first scanning signal with different frequencies (such as S1 high and S1 low in the example in Figure 1 , S1 high represents a high-frequency first scanning signal, and S1 low represents a low-frequency first scanning signal), and the opening speeds of the writing transistors M1 are different, wherein a target writing transistor M1 receives a first scanning signal with a frequency that is positively correlated with a frequency of a data signal received by the target writing transistor M1 at the same time, and the target writing transistor M1 is one of the writing transistors M1.

[0085] The turn-on speed of a transistor is related to its size; a larger width-to-length ratio results in a faster turn-on speed, but also more severe leakage. Therefore, the turn-on speed of the write transistor M1 is related to its size; a faster turn-on speed generally indicates higher leakage. Consequently, the turn-on speed of the write transistor M1 is positively correlated with the frequency of the signal it receives. A faster turn-on speed write transistor M1 is used to receive high-frequency first scan signals and data signals, ensuring its turn-on speed meets high-frequency operating requirements, allowing the pixel circuit to support high-frequency drive. Conversely, a slower turn-on speed write transistor M1 is used to receive low-frequency first scan signals and data signals, thereby reducing leakage and improving low-frequency flicker.

[0086] In the aforementioned pixel circuit, since the frequency of the first scan signal received by the target write transistor M1 is positively correlated with the frequency of the data signal, when the data signal frequency is low, the first scan signal is also a low-frequency signal, and when the data signal frequency is high, the first scan signal is also a high-frequency signal. This allows the frequency at which the pixel circuit drives the light-emitting element to be changed, and thus the refresh frequency can be allocated for different usage scenarios, saving power consumption of the display panel. Furthermore, since the turn-on speeds of each write transistor M1 are different, the turn-on speed of the write transistor M1 can correspond to the frequency of the received signal. Write transistors M1 with higher turn-on speeds receive signals at higher frequencies, allowing them to meet high-frequency usage requirements. Write transistors M1 with lower turn-on speeds receive signals at lower frequencies. Because write transistors M1 with lower turn-on speeds are relatively smaller and have lower leakage current, low-frequency leakage current can be improved, thereby reducing low-frequency flicker problems.

[0087] In one embodiment, such as Figure 2 As shown, the pixel circuit also includes a threshold compensation module 300. The threshold compensation module 300 includes multiple compensation transistors M2. The first terminal of each compensation transistor M2 is connected to the second terminal of a driving transistor M0, and the second terminal of each compensation transistor M2 is connected to the gate of the driving transistor M0. The gate of each compensation transistor M2 is used to receive first scan signals of different frequencies (e.g., ...). Figure 2 In the example, S1 high and S1 low (S1 high represents the high-frequency first scan signal, and S1 low represents the low-frequency first scan signal), the turn-on speed of each compensation transistor M2 is different. Among them, the target compensation transistor M2 and the target write transistor M1 receive the same frequency of the first scan signal at the same time. The target compensation transistor M2 is one of multiple compensation transistors M2.

[0088] The compensation transistor M2 can be a double-gate transistor to reduce the leakage of the compensation transistor M2. The opening speed of the compensation transistor M2 is positively related to the frequency of the first scanning signal received by the compensation transistor M2. The compensation transistor M2 with a fast opening speed is used to receive a high-frequency first scanning signal, and the compensation transistor M2 with a slow opening speed is used to receive a low-frequency first scanning signal.

[0089] It can be understood that, in order to make the devices of the pixel circuit in the same working mode, the frequencies of the signals received by the devices should correspond to each other. Therefore, the target compensation transistor M2 and the target write transistor M1 receive the same frequency of the first scanning signal at the same time. On this basis, the target compensation transistor M2 and the target write transistor M1 can receive the same signal output by the first scanning signal line.

[0090] In the embodiment, the threshold compensation module 300 compensates the threshold voltage of the driving transistor M0 in the data writing stage, thereby improving the display uniformity. The target compensation transistor M2 and the target write transistor M1 receive the same frequency of the first scanning signal at the same time, so that the frequency of the first scanning signal received by the compensation transistor M2 is positively related to the frequency of the data signal, and the working state of the target compensation transistor M2 corresponds to the working state of the target write transistor M1.

[0091] In one embodiment, as shown in Figure 3 the pixel circuit further includes a first light-emitting control module 400 and a second light-emitting control module 500.

[0092] The first end of the first light-emitting control module 400 is configured to receive a first power voltage. The second end of the first light-emitting control module 400 is connected to the first electrode of the driving transistor. The control end of the first light-emitting control module 400 is configured to receive a light-emitting control signal. The first light-emitting control module 400 is configured to be turned on in the light-emitting stage in response to the light-emitting control signal.

[0093] The first end of the second light-emitting control module 500 is connected to the second electrode of the driving transistor. The second end of the second light-emitting control module 500 is connected to the anode of the light-emitting element. The control end of the second light-emitting control module 500 is configured to receive a light-emitting control signal. The second light-emitting control module 500 is configured to be turned on in the light-emitting stage in response to the light-emitting control signal.

[0094] The first light-emitting control module 400 can include a plurality of first light-emitting control transistors M3. The first electrodes of the first light-emitting control transistors M3 are configured to receive the first power voltage, respectively. The second electrodes of the first light-emitting control transistors M3 are connected to the first electrodes of the driving transistors M0, respectively. The gate electrodes of the first light-emitting control transistors M3 are configured to receive light-emitting control signals with different frequencies, respectively. Figure 3The first light emitting control transistors M3 have different turn-on speeds, and the frequency of the light emitting control signal received by the target first light emitting control transistor M3 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, and the target first light emitting control transistor M3 is one of the plurality of first light emitting control transistors M3.

[0095] The second light emitting control module 500 can include a plurality of second light emitting control transistors M4, the first electrode of each second light emitting control transistor M4 is connected with the second electrode of the driving transistor M0, the second electrode of each second light emitting control transistor M4 is connected with the anode of the light emitting element, the gate of each second light emitting control transistor M4 is used to receive a light emitting control signal with different frequencies, and the turn-on speed of each second light emitting control transistor M4 is different, wherein the frequencies of the light emitting control signals received by the target first light emitting control transistor M3 and the target second light emitting control transistor M4 at the same time are the same, and the target second light emitting control transistor M4 is one of the plurality of second light emitting control transistors M4.

[0096] It can be understood that each first light emitting control transistor M3 and each second light emitting control transistor M4 has a switching function, the first light emitting control transistor M3 is used to control the on-off of the first electrode and the second electrode of the first light emitting control transistor M3 in response to the light emitting control signal, and similarly, the second light emitting control transistor M4 is used to control the on-off of the first electrode and the second electrode of the first light emitting control transistor M3 in response to the light emitting control signal, when the first light emitting control transistor M3 and the second light emitting control transistor M4 are both turned on, the driving transistor M0 can provide a driving current to the light emitting element to drive the light emitting element to emit light.

[0097] The frequency of the light emitting control signal is related to the first light emitting control transistor M3 and the second light emitting control transistor M4, and further affects the light emitting frequency of the light emitting element. Therefore, the frequency of the light emitting control signal received by the target first light emitting control transistor M3 should be positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, so that each device of the pixel circuit is in the same working mode. In the case that the signals received by each device of the pixel circuit are all high frequency, the pixel circuit is suitable for higher refresh frequency; in the case that the signals received by each device of the pixel circuit are all low frequency, the pixel circuit is suitable for lower refresh frequency, so that the pixel circuit can be suitable for different refresh frequencies.

[0098] In the embodiment, the first light emitting control module 400 and the second light emitting control module 500 are arranged, so that whether the driving transistor M0 supplies power to the light emitting element can be controlled by controlling the switch state of the first light emitting control module 400 and the second light emitting control module 500, and the frequency of the light emitting control signal received by the target first light emitting control transistor M3 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, so that the pixel circuit can be applied to different refresh frequencies.

[0099] In one embodiment, as shown in Figure 4 The pixel circuit further includes a first initialization module 600 and a second initialization module 700.

[0100] The first end of the first initialization module 600 is configured to receive an initialization signal, the second end of the first initialization module 600 is connected to the gate of the driving transistor and the second end of the storage module, the control end of the first initialization module 600 is configured to receive a second scan signal, and the first initialization module 600 is configured to initialize the gate of the driving transistor and the second end of the storage module in response to the second scan signal.

[0101] The first end of the second initialization module 700 is configured to receive an initialization signal, the second end of the second initialization module 700 is connected to the anode of the light emitting element, the control end of the second initialization module 700 is configured to receive a third scan signal, and the second initialization module 700 is configured to initialize the anode of the light emitting element in response to the third scan signal.

[0102] The first initialization module 600 can include a plurality of first initialization transistors M5, the first electrode of each first initialization transistor M5 is configured to receive an initialization signal, the second electrode of each first initialization transistor M5 is connected to the gate of the driving transistor M0 and the second end of the storage module 200, and the gate of each first initialization transistor M5 is configured to receive a second scan signal of different frequencies (such as S2high and S2low as shown in the example of Figure 4 The opening speed of each first initialization transistor M5 is different, the frequency of the second scan signal received by the target first initialization transistor M5 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, and the target first initialization transistor M5 is one of the plurality of first initialization transistors M5.

[0103] It can be understood that the first initialization transistor M5 is configured to provide an initialization signal to the gate of the driving transistor M0 and the second end of the storage module 200 in response to the second scan signal, so as to initialize the gate of the driving transistor M0 and the second end of the storage module 200. Different frequencies of the second scan signal affect the switching frequency of the first initialization transistor M5, and further affect the frequency of the initialization signal provided to the gate of the driving transistor M0 and the second end of the storage module 200, i.e. the initialization frequency of the gate of the driving transistor M0 and the second end of the storage module 200.

[0104] The second initialization module 700 can include a plurality of second initialization transistors M6, the first poles of the second initialization transistors M6 are configured to receive the initialization signal respectively, the second poles of the second initialization transistors M6 are connected with the anodes of the light emitting elements respectively, and the gates of the second initialization transistors M6 are configured to receive third scan signals with different frequencies (such as S3high and S3low in the above example, S3high represents a high-frequency third scan signal, and S3low represents a low-frequency third scan signal) respectively. The second initialization transistors M6 have different turn-on speeds, the frequency of the third scan signal received by the target second initialization transistor M6 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, and the target second initialization transistor M6 is one of the plurality of second initialization transistors M6. Figure 4

[0105] The first initialization transistor M5 can be a double-gate transistor to reduce the leakage of the first initialization transistor M5.

[0106] Similarly, the second initialization transistor M6 is configured to provide an initialization signal to the anode of the light emitting element in response to the third scan signal, so as to initialize the anode of the light emitting element. Different frequencies of the third scan signal affect the switching frequency of the second initialization transistor M6, and further affect the frequency of the initialization signal provided to the anode of the light emitting element, i.e. the initialization frequency of the anode of the light emitting element.

[0107] The third scan signal and the second scan signal can be the same signal, so that the same signal line can be used to output the second scan signal and the third scan signal, and the occupied space of the signal line is reduced.

[0108] ​In the embodiment, the pixel circuit comprises the first initialization module 600 and the second initialization module 700, so that the second end of the storage module 200, the gate of the driving transistor M0 and the anode of the light emitting element can be initialized, and thus the problems such as pixel light stealing and display unevenness are reduced. The frequency of the second scan signal received by the target first initialization transistor M5 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, and the frequency of the third scan signal received by the target second initialization transistor M6 is positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, so that the initialization frequency of the second end of the storage module 200, the gate of the driving transistor M0 and the anode of the light emitting element supports the driving frequency of the pixel circuit.

[0109] In one embodiment, as shown in Figure 5 , the first poles of the first initialization transistors M5 are respectively used to receive initialization signals of different frequencies (such as Vref high and Vref low as exemplified in Figure 5 , Vref high represents a high-frequency initialization signal, and Vref low represents a low-frequency initialization signal), and the initialization signal received by the same first initialization transistor M5 is positively correlated with the frequency of the second scan signal. At this time, the frequencies of the initialization signals received by the second initialization transistors M6 can be the same.

[0110] In the embodiment, the first poles of the first initialization transistors M5 are respectively used to receive initialization signals of different frequencies, so that when the target first initialization transistor M5 is turned on, the initialization speed of the second end of the storage module 200 and the gate of the driving transistor M0 can adapt to the driving frequency of the pixel circuit, and thus the charging speed of the storage module 200 can adapt to the current driving frequency of the pixel circuit.

[0111] In one embodiment, as shown in Figure 6 , the first poles of the second initialization transistors M6 are respectively used to receive initialization signals of different frequencies, and the initialization signal received by the same second initialization transistor M6 is positively correlated with the frequency of the third scan signal.

[0112] In the embodiment, the first poles of the second initialization transistors M6 are respectively used to receive initialization signals of different frequencies, so that when the target second initialization transistor M6 is turned on, the initialization speed of the light emitting element can adapt to the driving frequency of the pixel circuit.

[0113] Based on the same inventive concept, as shown in Figure 7As shown, the present application also provides an array substrate, the array substrate comprising a plurality of first scan signal lines 14, a plurality of data signal lines 16 and the pixel circuit 11 as above. Each first scan signal line 14 is configured to output a first scan signal with different frequency, and each data signal line 16 is configured to output a data signal with different frequency.

[0114] In the pixel circuit 11, each first scan signal line 14 and each data signal line 16 are connected, and the output state of each first scan signal line 14 and each data signal line 16 can be controlled, so that the pixel circuit 11 only receives a target first scan signal output by a first scan signal line 14 and a target data signal output by a data signal line 16, and the frequency of the target first scan signal and the target data signal are positively correlated, so that the pixel circuit 11 is applicable to the corresponding refresh frequency.

[0115] For example, the plurality of first scan signal lines 14 can include a high-frequency first scan signal line 14 and a low-frequency first scan signal line 14, the high-frequency first scan signal line 14 can output a high-frequency first scan signal, and the low-frequency first scan signal line 14 can output a low-frequency first scan signal. The plurality of data signal lines 16 include a high-frequency data signal line 16 and a low-frequency data signal line 16, the high-frequency data signal line 16 can output a high-frequency data signal, and the low-frequency data signal line 16 can output a low-frequency data signal.

[0116] In the array substrate, each first scan signal line 14 is configured to output a first scan signal with different frequency, and each data signal line 16 is configured to output a data signal with different frequency, so that the pixel circuit 11 can receive first scan signals and data signals with different frequencies, so that the frequency of the first scan signal received by the target write transistor M1 can be positively correlated with the frequency of the data signal. When the frequency of the data signal is low, the first scan signal is also a low-frequency signal, and when the frequency of the data signal is high, the first scan signal is also a high-frequency signal, so that the frequency of the pixel circuit 11 driving the light emitting element can be changed, and the refresh frequency can be allocated according to different use scenarios, thereby saving the power consumption of the display panel. In addition, since the array substrate comprises the pixel circuit 11 as above, the frequency of the signal received by the write transistor M1 with high opening speed can be high, and the frequency of the signal received by the write transistor M1 with low opening speed can be low, so that the array substrate can meet the high-frequency use requirement and improve the low-frequency leakage problem.

[0117] In one embodiment, as Figure 7As shown, the array substrate further comprises a processing circuit 17. The processing circuit 17 is connected with the pixel circuit 11, and the processing circuit 17 is configured to control the output state of each first scan signal line 14 and each data signal line 16, so that a target first scan signal line 14 and a target data signal line 16 output signals to the pixel circuit 11, the target first scan signal line 14 is one of the plurality of first scan signal lines 14, and the target data signal line 16 is one of the plurality of data signal lines 16. The frequency of the signal output by the target first scan signal line 14 is positively correlated with the frequency of the signal output by the target data signal line 16.

[0118] In the embodiment, the processing circuit 17 can include a display driving chip, and the display driving chip controls the output state of each first scan signal line 14 and each data signal line 16.

[0119] In the embodiment, the processing circuit 17 controls the output state of each first scan signal line 14 and each data signal line 16, so that the target first scan signal line 14 and the target data signal line 16 output signals to the pixel circuit 11. Therefore, the frequency of the first scan signal and the data signal input to each row or each column of pixel circuits 11 can be controlled, so that the refresh frequency of each display area can be controlled, and the allocation of the refresh frequency can be realized.

[0120] In one embodiment, as shown in the figure, the array substrate further comprises a plurality of second scan signal lines 15, and the second scan signal lines 15 are configured to output second scan signals with different frequencies. Figure 7

[0121] It can be understood that, in the above embodiment, the pixel circuit 11 further comprises a first initialization module 600 and a second initialization module 700. The first initialization module 600 comprises a plurality of first initialization transistors M5, the second initialization module 700 comprises a plurality of second initialization transistors M6, and the plurality of second scan signal lines 15 are configured to output second scan signals with different frequencies to each first initialization transistor M5. The third scan signal and the second scan signal can be the same signal, and the plurality of second scan signal lines 15 can also be configured to output second scan signals with different frequencies to each second initialization transistor M6.

[0122] The processing circuit 17 is further configured to control the output state of each second scan signal line 15, so that a target second scan signal line 15 outputs signals to the pixel circuit 11, the target second scan signal line 15 is one of the plurality of second scan signal lines 15, and the frequency of the signal output by the target second scan signal line 15 is positively correlated with the frequency of the signal output by the target data signal line 16.

[0123] ​It can be understood that the processing circuit 17 controls the output state of each second scan signal line 15 to make the target second scan signal line 15 output a signal to the pixel circuit 11 at a corresponding frequency. The first initialization transistor M5 is configured to provide an initialization signal to the gate of the driving transistor M0 and the second end of the storage module 200 in response to the second scan signal. Since the second scan signal at different frequencies will affect the switching frequency of the first initialization transistor M5, i.e., affect the initialization frequency of the gate of the driving transistor M0 and the second end of the storage module 200, the processing circuit 17 can control the initialization frequency of the gate of the driving transistor M0 and the second end of the storage module 200 by controlling the output state of each second scan signal line 15. In the case where the third scan signal and the second scan signal can be the same signal, the processing circuit 17 can also control the initialization frequency of the light emitting element by controlling the output state of each second scan signal line 15.

[0124] In the embodiment, the processing circuit 17 controls the output state of each second scan signal line 15 to make the target second scan signal line 15 output a signal to the pixel circuit 11, so that the initialization frequency of the second end of the storage module 200 and the gate of the driving transistor M0 supports the driving frequency of the pixel circuit 11.

[0125] In one embodiment, as shown in FIG. 1, the array substrate further includes a plurality of initialization signal lines 12, and each initialization signal line 12 is configured to output an initialization signal having a different frequency. Figure 7

[0126] The processing circuit 17 is further configured to control the output state of each initialization signal line 12 to make the target initialization signal line 12 output a signal to the pixel circuit 11, where the target initialization signal line 12 is one of the plurality of initialization signal lines 12, and the frequency of the signal output by the target initialization signal line 12 is positively correlated with the frequency of the signal output by the target data signal line 16.

[0127] In the embodiment, in the case where the first electrodes of the first initialization transistors M5 are respectively configured to receive initialization signals having different frequencies, the processing circuit 17 controls the output state of each initialization signal line 12 to make the target initialization signal line 12 output a signal to the pixel circuit 11, so that the initialization speed of the second end of the storage module 200 and the gate of the driving transistor M0 supports the driving frequency of the pixel circuit 11. In the case where the first electrodes of the second initialization transistors M6 are respectively configured to receive initialization signals having different frequencies, the processing circuit 17 controls the output state of each initialization signal line 12 to make the target initialization signal line 12 output a signal to the pixel circuit 11, so that the initialization speed of the anode of the light emitting element supports the driving frequency of the pixel circuit 11.

[0128] In one embodiment, as shown in FIG. 1, the array substrate further includes a plurality of initialization signal lines 12, and each initialization signal line 12 is configured to output an initialization signal having a different frequency. Figure 7 ​As shown, the array substrate further comprises a plurality of light-emitting control signal lines 13, each of which is used to output a light-emitting control signal with different frequency.

[0129] The pixel circuit 11 further comprises a first light-emitting control module 400 and a second light-emitting control module 500. The first light-emitting control module 400 comprises a plurality of first light-emitting control transistors M3, and the second light-emitting control module 500 comprises a plurality of second light-emitting control transistors M4. Each of the light-emitting control signal lines 13 is used to output a light-emitting control signal with different frequency to each of the first light-emitting control transistors M3 and each of the second light-emitting control transistors M4.

[0130] The processing circuit 17 is further configured to control the output state of each of the light-emitting control signal lines 13, so that a target light-emitting control signal line 13 outputs a signal to the pixel circuit 11, wherein the target light-emitting control signal line 13 is one of the plurality of light-emitting control signal lines 13, and the frequency of the signal output by the target light-emitting control signal line 13 is positively correlated with the frequency of the signal output by the target data signal line 16.

[0131] In this embodiment, by making the frequency of the light-emitting control signal received by the target first light-emitting control transistor M3 positively correlated with the frequency of the data signal received by the target write transistor M1 at the same time, the pixel circuit 11 can be applied to different refresh frequencies.

[0132] In one embodiment, the same can also be as Figure 7 As shown, the present application further provides an array substrate, which comprises a plurality of first scanning signal lines 14, a plurality of data signal lines 16 and a plurality of pixel circuits 11. The pixel circuit 11 of the present embodiment can refer to Figure 8 The pixel circuit 11 can comprise a driving transistor M0, a storage module 200 and a write transistor M1. The first electrode of the write transistor M1 is used to receive data signals (such as data high and data low as shown in Figure 8 , wherein data high represents a high-frequency data signal, and data low represents a low-frequency data signal) and first scanning signals (such as S1 high and S1 low as shown in Figure 8 , wherein S1 high represents a high-frequency first scanning signal, and S1 low represents a low-frequency first scanning signal) with different frequencies.

[0133] Each first scan signal line 14 is configured to output a first scan signal with a different frequency, and each data signal line 16 is configured to output a data signal with a different frequency. Each pixel circuit 11 is connected to at least two first scan signal lines 14 and at least two data signal lines 16. In the process of driving the light emitting element to emit light, the frequency of the target first scan signal received by the same pixel circuit 11 and the frequency of the target data signal received by the same pixel circuit 11 are positively correlated, the target first scan signal is one of the first scan signals, and the target data signal is one of the data signals.

[0134] In the array substrate, each first scan signal line 14 is configured to output a first scan signal with a different frequency, and each data signal line 16 is configured to output a data signal with a different frequency. The pixel circuit 11 can receive first scan signals and data signals with different frequencies. By controlling the output states of the first scan signal lines 14 and the data signal lines 16, the frequency of the target first scan signal received by the same pixel circuit 11 and the frequency of the target data signal received by the same pixel circuit 11 are positively correlated. When the frequency of the data signal received by the pixel circuit 11 is low, the frequency of the first scan signal received by the pixel circuit 11 is also low. When the frequency of the data signal received by the pixel circuit 11 is high, the frequency of the first scan signal received by the pixel circuit 11 is also high. Thus, the frequency of the pixel circuit 11 driving the light emitting element can be changed, and the refresh frequency can be allocated according to different use scenarios, thereby saving the power consumption of the display panel.

[0135] In one embodiment, the array substrate further includes a processing circuit 17 connected to the pixel circuit 11. The processing circuit 17 is configured to control the output states of the first scan signal lines 14 and the data signal lines 16, so that the target first scan signal line 14 and the target data signal line 16 output signals to the pixel circuit 11. The target first scan signal line 14 is configured to output a target first scan signal, and the target data signal line 16 is configured to output a target data signal.

[0136] In this embodiment, the processing circuit 17 is configured to control the output states of the first scan signal lines 14 and the data signal lines 16, so that the target first scan signal line 14 and the target data signal line 16 output signals to the pixel circuit 11. Thus, the frequencies of the first scan signals and the data signals input to the pixel circuits 11 in each row or each column can be controlled, and the refresh frequency of each display area can be controlled, thereby achieving allocation of the refresh frequency.

[0137] In one embodiment, the array substrate further includes a plurality of second scan signal lines 15. Each second scan signal line 15 is configured to output a second scan signal with a different frequency. Each pixel circuit 11 is connected to at least two second scan signal lines 15.

[0138] The pixel circuit 11 can further include a first initialization module and a second initialization module. The first initialization module can include a first initialization transistor for receiving a second scan signal with different frequencies. The first initialization module can also include a plurality of first initialization transistors, each for receiving a second scan signal with different frequencies.

[0139] In the case that the third scan signal is the same as the second scan signal, the second initialization module can include a second initialization transistor for receiving a second scan signal with different frequencies. The second initialization module can also include a plurality of second initialization transistors, each for receiving a second scan signal with different frequencies.

[0140] The processing circuit 17 is further configured to control the output state of each second scan signal line 15 to enable a target second scan signal line 15 to output a signal to the pixel circuit 11, the target second scan signal line 15 being one of the second scan signal lines 15, and the frequency of the signal output by the target second scan signal line 15 being positively correlated with the frequency of the target data signal.

[0141] In this embodiment, the processing circuit 17 controls the output state of each second scan signal line 15 to enable a target second scan signal line 15 to output a signal to the pixel circuit 11, thereby enabling the initialization frequency of the second end of the storage module and the gate of the drive transistor to support the driving frequency of the pixel circuit 11.

[0142] In one embodiment, the array substrate further includes a plurality of initialization signal lines 12, each initialization signal line 12 being configured to output an initialization signal with different frequencies, and the pixel circuit 11 is connected to at least two initialization signal lines 12.

[0143] The processing circuit 17 is further configured to control the output state of each initialization signal line 12 to enable a target initialization signal line 12 to be conductively connected to the pixel circuit 11, the target initialization signal line 12 being one of the initialization signal lines 12, and the frequency of the signal output by the target initialization signal line 12 being positively correlated with the frequency of the target data signal.

[0144] In this embodiment, the processing circuit 17 controls the output state of each initialization signal line 12 to enable a target initialization signal line 12 to output a signal to the pixel circuit 11, thereby enabling the initialization speed of the second end of the storage module and the gate of the drive transistor to support the driving frequency of the pixel circuit 11. In the case that the second initialization module is configured to receive initialization signals with different frequencies, the processing circuit 17 controls the output state of each initialization signal line 12 to enable the initialization speed of the anode of the light emitting element to support the driving frequency of the pixel circuit 11.

[0145] In one embodiment, the array substrate further comprises a plurality of light-emitting control signal lines 13, each light-emitting control signal line 13 being configured to output a light-emitting control signal with a different frequency, and each pixel circuit 11 is connected to at least two light-emitting control signal lines 13.

[0146] The processing circuit 17 is further configured to control the output state of each light-emitting control signal line 13, so that a target light-emitting control signal line 13 outputs a signal to the pixel circuit 11, where the target light-emitting control signal line 13 is one of the light-emitting control signal lines 13, and the frequency of the signal output by the target light-emitting control signal line 13 is positively correlated with the frequency of the target data signal.

[0147] In this embodiment, by making the frequency of the light-emitting control signal received by the target first light-emitting control transistor positively correlated with the frequency of the data signal received by the target write transistor at the same time, the pixel circuit 11 can be applied to different refresh frequencies.

[0148] Based on the same inventive concept, the embodiments of the present application further provide a display panel (not shown in the figure), which comprises the array substrate in the above embodiments.

[0149] Based on the same inventive concept, the embodiments of the present application further provide a display device (not shown in the figure), which comprises the display panel in the above embodiments.

[0150] It can be understood that the display device in the embodiments of the present application can be an OLED display device, a QLED display device, electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, a wearable device, an Internet of Things device, or any product or component with a display function, and the embodiments disclosed in the present application do not limit this.

[0151] In one embodiment, as shown in Figure 9 The present application further provides a driving method of a pixel circuit, which comprises:

[0152] S1001: obtaining a target frequency at which each pixel circuit drives a light-emitting element;

[0153] S1002: According to the target frequency of the pixel circuit, the output state of each first scan signal line and each data signal line is controlled, so that the target first scan signal line outputs the target first scan signal, and the target data signal line outputs the target data signal to each pixel circuit, wherein the pixel circuit is connected with each first scan signal line and each data signal line, each first scan signal line is used for outputting a first scan signal with different frequencies, each data signal line is used for outputting a data signal with different frequencies, the target first scan signal line is one of the plurality of first scan signal lines, the target data signal line is one of the plurality of data signal lines, and the frequency of the target first scan signal is positively correlated with the frequency of the target data signal.

[0154] The driving method of the pixel circuit controls the output state of each first scan signal line and each data signal line according to the target frequency of the pixel circuit, so that the target first scan signal line outputs the target first scan signal, and the target data signal line outputs the target data signal to each pixel circuit. Since the frequency of the target first scan signal is positively correlated with the frequency of the target data signal, when the frequency of the target data signal is low, the target first scan signal is also a low-frequency signal, and when the frequency of the target data signal is high, the target first scan signal is also a high-frequency signal. Therefore, the frequency of the pixel circuit driving the pixel can be changed, and the refresh frequency can be allocated according to different use scenarios, thereby saving the power consumption of the display panel.

[0155] In one embodiment, the driving method of the pixel circuit includes the step of controlling the output state of each second scan signal line so that the target second scan signal line outputs a signal to the pixel circuit, and the frequency of the signal output by the target second scan signal line is positively correlated with the frequency of the signal output by the target data signal line.

[0156] In this embodiment, the output state of each second scan signal line is controlled by the processing circuit so that the target second scan signal line outputs a signal to the pixel circuit, thereby supporting the driving frequency of the pixel circuit for the initialization frequency of the second end of the storage module and the gate of the driving transistor.

[0157] In one embodiment, the driving method of the pixel circuit includes the step of controlling the output state of each initialization signal line so that the target initialization signal line outputs a signal to the pixel circuit, wherein the target initialization signal line is one of the plurality of initialization signal lines, and the frequency of the signal output by the target initialization signal line is positively correlated with the frequency of the signal output by the target data signal line.

[0158] In the embodiment, in the case that the first electrodes of the first initialization transistors are configured to receive initialization signals of different frequencies respectively, the initialization speed of the anode of the light emitting element can be made to support the driving frequency of the pixel circuit by controlling the output state of each initialization signal line to make the target initialization signal line output a signal to the pixel circuit. In the case that the first electrodes of the second initialization transistors are configured to receive initialization signals of different frequencies respectively, the initialization speed of the second end of the storage module and the gate of the driving transistor can be made to support the driving frequency of the pixel circuit by controlling the output state of each initialization signal line to make the target initialization signal line output a signal to the pixel circuit.

[0159] In one embodiment, the driving method of the pixel circuit comprises: controlling the output state of each light emitting control signal line to make the target light emitting control signal line output a signal to the pixel circuit, wherein the target light emitting control signal line is one of the plurality of light emitting control signal lines, and the frequency of the target light emitting control signal line output signal is positively correlated with the frequency of the target data signal line output signal.

[0160] In the embodiment, the frequency of the light emitting control signal received by the target first light emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time, so that the pixel circuit can be applied to different refresh frequencies.

[0161] It should be understood that, although each step in the flowchart of the accompanying drawings is shown in sequence according to the direction of the arrow, these steps are not necessarily executed in sequence according to the direction of the arrow. Unless otherwise specified herein, the execution of these steps is not strictly limited in sequence, and these steps can be executed in other sequences. Moreover, at least part of the steps in the accompanying drawings can include multiple steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution sequence of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least part of other steps or steps or stages in other steps.

[0162] In the description of the present specification, the description of the terms "some embodiments", "other embodiments", "ideal embodiments", and the like means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example.

[0163] Each technical feature of the above-described embodiments can be combined arbitrarily, and in order to make the description concise, not all possible combinations of each technical feature in the above-described embodiments are described, however, as long as the combination of these technical features does not exist contradictory, it should be considered as the scope of the present specification.

[0164] The above-described embodiments are merely illustrative of several embodiments of the present application, which are described in more detail and in a more specific and detailed manner, but should not be construed as limiting the scope of the patent. It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A pixel circuit, characterized in that, include: A driving transistor is used to provide driving current to a light-emitting element. A storage module, wherein a first terminal of the storage module is used to receive a first power supply voltage, and a second terminal of the storage module is connected to the gate of the driving transistor; The writing module includes multiple writing transistors. The first terminal of each writing transistor is used to receive data signals of different frequencies. The second terminal of each writing transistor is connected to the first terminal of the driving transistor. The gate of each writing transistor is used to receive a first scan signal of different frequencies. The turn-on speed of each writing transistor is different and is positively correlated with the frequency of the received signal. The target writing transistor receives the first scan signal at the same time at a frequency that is positively correlated with the frequency of the received data signal. The target writing transistor is one of the multiple writing transistors. A threshold compensation module is provided, which is used to compensate the threshold voltage of the driving transistor during the data writing stage in response to the first scan signal. The threshold compensation module includes multiple compensation transistors, the first terminal of each compensation transistor is connected to the second terminal of the driving transistor, the second terminal of each compensation transistor is connected to the gate of the driving transistor, the gate of each compensation transistor is used to receive the first scan signal of different frequencies, and the turn-on speed of each compensation transistor is different. The target compensation transistor and the target writing transistor receive the first scan signal of the same frequency at the same time, and the target compensation transistor is one of the multiple compensation transistors.

2. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes: A first light-emitting control module, wherein a first terminal of the first light-emitting control module is used to receive a first power supply voltage, a second terminal of the first light-emitting control module is connected to the first electrode of the driving transistor, a control terminal of the first light-emitting control module is used to receive a light-emitting control signal, and the first light-emitting control module is used to respond to the light-emitting control signal and turn on during the light-emitting phase. The second light-emitting control module has a first terminal connected to the second terminal of the driving transistor and a second terminal connected to the anode of the light-emitting element. The control terminal of the second light-emitting control module is used to receive a light-emitting control signal, and the second light-emitting control module is used to respond to the light-emitting control signal and turn on during the light-emitting phase.

3. The pixel circuit according to claim 2, characterized in that, The first light-emitting control module includes a plurality of first light-emitting control transistors. The first terminal of each first light-emitting control transistor is used to receive a first power supply voltage. The second terminal of each first light-emitting control transistor is connected to the first terminal of the driving transistor. The gate of each first light-emitting control transistor is used to receive light-emitting control signals of different frequencies. The turn-on speed of each first light-emitting control transistor is different. The frequency of the light-emitting control signal received by the target first light-emitting control transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time. The target first light-emitting control transistor is one of the plurality of first light-emitting control transistors. The second light-emitting control module includes a plurality of second light-emitting control transistors. The first electrode of each second light-emitting control transistor is connected to the second electrode of the driving transistor, and the second electrode of each second light-emitting control transistor is connected to the anode of the light-emitting element. The gate of each second light-emitting control transistor is used to receive light-emitting control signals of different frequencies. The turn-on speed of each second light-emitting control transistor is different. The target first light-emitting control transistor and the target second light-emitting control transistor receive the same frequency of the light-emitting control signal at the same time. The target second light-emitting control transistor is one of the plurality of second light-emitting control transistors.

4. The pixel circuit according to claim 1, characterized in that, The pixel circuit also includes: A first initialization module has a first terminal for receiving an initialization signal, a second terminal for connecting to the gate of the driving transistor and the second terminal of the storage module, a control terminal for receiving a second scan signal, and a first initialization module for initializing the gate of the driving transistor and the second terminal of the storage module in response to the second scan signal. The second initialization module has a first terminal for receiving an initialization signal, a second terminal for being connected to the anode of the light-emitting element, a control terminal for receiving a third scan signal, and a response to the third scan signal for initializing the anode of the light-emitting element.

5. The pixel circuit according to claim 4, characterized in that, The first initialization module includes a plurality of first initialization transistors. The first terminal of each first initialization transistor is used to receive an initialization signal. The second terminal of each first initialization transistor is connected to the gate of the driving transistor and the second terminal of the storage module. The gate of each first initialization transistor is used to receive a second scan signal of different frequencies. The turn-on speed of each first initialization transistor is different. The frequency of the second scan signal received by the target first initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time. The target first initialization transistor is one of the plurality of first initialization transistors. The second initialization module includes multiple second initialization transistors. The first electrode of each second initialization transistor is used to receive an initialization signal. The second electrode of each second initialization transistor is connected to the anode of the light-emitting element. The gate of each second initialization transistor is used to receive a third scan signal of different frequencies. The turn-on speed of each second initialization transistor is different. The frequency of the third scan signal received by the target second initialization transistor is positively correlated with the frequency of the data signal received by the target write transistor at the same time. The target second initialization transistor is one of the multiple second initialization transistors.

6. The pixel circuit according to claim 4, characterized in that, The third scan signal is the same as the second scan signal.

7. The pixel circuit according to claim 5, characterized in that, The first electrode of each of the first initialization transistors is used to receive initialization signals of different frequencies, and the initialization signal received by the same first initialization transistor is positively correlated with the frequency of the second scan signal.

8. The pixel circuit according to claim 5, characterized in that, The first terminal of each of the second initialization transistors is used to receive initialization signals of different frequencies, and the initialization signal received by the same second initialization transistor is positively correlated with the frequency of the third scan signal.

9. An array substrate, characterized in that, The array substrate includes multiple first scan signal lines, multiple data signal lines, and pixel circuitry as described in any one of claims 1 to 8; Each of the first scan signal lines is used to output a first scan signal with a different frequency, and each of the data signal lines is used to output a data signal with a different frequency.

10. The array substrate according to claim 9, characterized in that, The array substrate further includes: A processing circuit, connected to the pixel circuit, is used to control the output state of each first scan signal line and each data signal line, so that the target first scan signal line and the target data signal line output signals to the pixel circuit. The target first scan signal line is one of a plurality of first scan signal lines, and the target data signal line is one of a plurality of data signal lines. The frequency of the output signal of the target first scan signal line is positively correlated with the frequency of the output signal of the target data signal line.

11. The array substrate according to claim 10, characterized in that, The array substrate also includes multiple second scan signal lines, which are used to output second scan signals with different frequencies; The processing circuit is also used to control the output state of each of the second scan signal lines so that the target second scan signal line outputs a signal to the pixel circuit. The target second scan signal line is one of a plurality of second scan signal lines, and the frequency of the output signal of the target second scan signal line is positively correlated with the frequency of the output signal of the target data signal line.

12. The array substrate according to claim 10, characterized in that, The array substrate also includes multiple initialization signal lines, each of which is used to output an initialization signal with a different frequency. The processing circuit is also used to control the output state of each of the initialization signal lines so that the target initialization signal line outputs a signal to the pixel circuit, wherein the target initialization signal line is one of the multiple initialization signal lines, and the frequency of the output signal of the target initialization signal line is positively correlated with the frequency of the output signal of the target data signal line.

13. The array substrate according to claim 10, characterized in that, The array substrate also includes multiple light-emitting control signal lines, each of which is used to output light-emitting control signals with different frequencies; The processing circuit is also used to control the output state of each of the light emission control signal lines so that the target light emission control signal line outputs a signal to the pixel circuit, wherein the target light emission control signal line is one of the multiple light emission control signal lines, and the frequency of the output signal of the target light emission control signal line is positively correlated with the frequency of the output signal of the target data signal line.

14. An array substrate, characterized in that, The array substrate includes multiple first scan signal lines, multiple data signal lines, and multiple pixel circuits; the pixel circuits include the pixel circuits as described in any one of claims 1 to 8; Each of the first scanning signal lines is used to output a first scanning signal of a different frequency, and each of the data signal lines is used to output a data signal of a different frequency. Each pixel circuit is connected to at least two of the first scanning signal lines and at least two of the data signal lines. During the process of driving the light-emitting element to emit light, the frequency of the target first scanning signal received by the same pixel circuit and the frequency of the target data signal received are positively correlated. The target first scanning signal is one of the first scanning signals, and the target data signal is one of the data signals.

15. The array substrate according to claim 14, characterized in that, The array substrate further includes: A processing circuit, connected to the pixel circuit, is used to control the output state of each first scan signal line and each data signal line, so that the target first scan signal line and the target data signal line output signals to the pixel circuit. The target first scan signal line is used to output the target first scan signal, and the target data signal line is used to output the target data signal.

16. The array substrate according to claim 15, characterized in that, The array substrate further includes multiple second scan signal lines, each second scan signal line being used to output a second scan signal with a different frequency, and the pixel circuit is connected to at least two of the second scan signal lines respectively; The processing circuit is also used to control the output state of each of the second scan signal lines so that the target second scan signal line outputs a signal to the pixel circuit. The target second scan signal line is one of the second scan signal lines, and the frequency of the output signal of the target second scan signal line is positively correlated with the frequency of the target data signal.

17. The array substrate according to claim 15, characterized in that, The array substrate also includes multiple initialization signal lines, each of which is used to output an initialization signal with a different frequency, and the pixel circuit is connected to at least two of the initialization signal lines respectively. The processing circuit is also used to control the output state of each of the initialization signal lines so that the target initialization signal line is connected to the pixel circuit. The target initialization signal line is one of the initialization signal lines, and the frequency of the output signal of the target initialization signal line is positively correlated with the frequency of the target data signal.

18. The array substrate according to claim 15, characterized in that, The array substrate also includes multiple light-emitting control signal lines, each of which is used to output a light-emitting control signal with a different frequency, and the pixel circuit is connected to at least two of the light-emitting control signal lines respectively. The processing circuit is also used to control the output state of each of the light emission control signal lines so that the target light emission control signal line outputs a signal to the pixel circuit, wherein the target light emission control signal line is one of the light emission control signal lines, and the frequency of the output signal of the target light emission control signal line is positively correlated with the frequency of the target data signal.

19. A driving method for a pixel circuit, characterized in that, The driving method for the pixel circuit includes: The target frequency for driving the light-emitting element by each of the pixel circuits is obtained; the pixel circuit includes the pixel circuit as described in any one of claims 1 to 8; The output states of each first scan signal line and each data signal line are controlled according to the target frequency of the pixel circuit, so that the target first scan signal line outputs a target first scan signal, and the target data signal line outputs a target data signal to each of the pixel circuits. The pixel circuits are respectively connected to each of the first scan signal lines and each of the data signal lines. Each first scan signal line is used to output a first scan signal with a different frequency, and each data signal line is used to output a data signal with a different frequency. The target first scan signal line is one of a plurality of first scan signal lines, and the target data signal line is one of a plurality of data signal lines. The frequency of the target first scan signal is positively correlated with that of the target data signal.

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