Chip detection method, system, device and storage medium

Abstract

The present invention discloses a chip detection method, system, device and storage medium. The method includes: obtaining image information of several chips to be tested; obtaining first characteristic parameter information and second characteristic parameter information of the chip to be tested according to the image information of each chip to be tested; comparing the first characteristic parameter information with the first characteristic parameter threshold to obtain the first detection result of the chip to be tested; comparing the second characteristic parameter information with the second characteristic parameter threshold to obtain the second detection result of the chip to be tested; displaying the main interface of chip detection; displaying the first detection result at the corresponding position of the first characteristic display area according to the first detection result of each chip to be tested; displaying the second detection result at the corresponding position of the second characteristic display area according to the second detection result of each chip. The embodiments of the present invention are conducive to improving the efficiency of chip detection and alleviating the problem of standard differentiation; and can be widely used in the field of chip technology.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a chip detection method, system, device and storage medium. Background Art

[0002] During the chip manufacturing process, testing each chip is an indispensable step; especially for chips with appearance defects, they need to be eliminated. In related technologies, chip appearance inspection is usually performed by operators visually, which is inefficient; at the same time, the inspection standards between different operators may be different, resulting in the problem of standard differentiation, which is not conducive to large-scale intelligent production. Summary of the invention

[0003] The purpose of the present invention is to solve one of the technical problems existing in the prior art to at least a certain extent.

[0004] To this end, an object of the present invention is to provide an efficient chip detection method, system, device and storage medium.

[0005] In order to achieve the above technical objectives, the technical solutions adopted by the embodiments of the present invention include:

[0006] In one aspect, an embodiment of the present invention provides a chip detection method, comprising the following steps:

[0007] A chip detection method according to an embodiment of the present invention comprises: acquiring image information of a plurality of chips to be tested; obtaining first characteristic parameter information and second characteristic parameter information of the chip to be tested according to the image information of each chip to be tested; comparing the first characteristic parameter information with a first characteristic parameter threshold value to obtain a first detection result of the chip to be tested; the first detection result is used to characterize the detection result based on the first characteristic of the chip to be tested, and the first detection result includes detection pass and detection fail; comparing the second characteristic parameter information with a second characteristic parameter threshold value to obtain a second detection result of the chip to be tested; the second detection result is used to characterize the detection result based on the second characteristic of the chip to be tested, and the second detection result includes detection pass and detection fail; displaying a main interface of chip detection, wherein a chip detection position display area is provided on the main interface; the chip detection position display area includes a first characteristic display area and a second characteristic display area; according to the first detection result of each chip to be tested, the first detection result is displayed at a corresponding position of the first characteristic display area; the corresponding position of the first characteristic display area is used to characterize a position consistent with the placement position of the chip to be tested; according to the second detection result of each chip, the second detection result is displayed at a corresponding position of the second characteristic display area. The embodiment of the present invention obtains the first characteristic parameter information and the second characteristic parameter information by extracting and processing the image information of the chip to be tested; and compares the two characteristic parameter information with the corresponding characteristic parameter information threshold to obtain the chip detection result; the image information of the chip to be tested is used for automatic detection, which alleviates the problem of low efficiency of the operator's naked eye observation; at the same time, the detection result is obtained by comparing with the characteristic parameter threshold, which alleviates the problem of standard differentiation. The detection results are displayed through the main interface of the chip detection, so that the detection results are intuitive and visual, and the operator's subsequent processing efficiency is improved.

[0008] In addition, the chip detection method according to the above embodiment of the present invention may also have the following additional technical features:

[0009] Furthermore, in the chip detection method of the embodiment of the present invention, the main interface is provided with an overall result display area, and the method further includes:

[0010] Calculating a first yield rate according to a first detection result of each chip; the first yield rate is used to characterize a yield rate based on a first feature of the chip to be tested;

[0011] Displaying the first yield in the overall result display area;

[0012] Calculating a second yield rate according to a second detection result of each chip; the second yield rate is used to characterize a yield rate based on a second feature of the chip to be tested;

[0013] The second yield is displayed in the overall result display area.

[0014] Further, in an embodiment of the present invention, displaying the first yield in the overall result display area includes:

[0015] In the overall result display area, the first yield is displayed by a bar graph;

[0016] Alternatively, in the overall result display area, the first yield is displayed by a fan chart.

[0017] Furthermore, in an embodiment of the present invention, a menu bar setting area is provided on the main interface, and the method further comprises the following steps:

[0018] In response to a selection operation for feature settings received on the menu bar settings area, displaying a feature settings interface;

[0019] In response to a parameter selection instruction for a first feature received on the feature setting interface, selecting a parameter to be set for the first feature;

[0020] In response to a parameter editing instruction for a first feature received in the feature setting interface, an input target threshold is displayed in the parameter editing area to determine the first feature parameter threshold; the target threshold is used to characterize a threshold corresponding to the parameter to be set.

[0021] Furthermore, in one embodiment of the present invention, the method further comprises:

[0022] Acquire a number of sample chips to be tested and status labels corresponding to the sample chips to be tested; the status labels are used to indicate the real results of whether the sample to be tested passes the test;

[0023] Testing the plurality of sample chips to be tested to obtain a third test result; the third test result is used to characterize the test result based on the first feature of the sample chip to be tested;

[0024] The state label is compared with the third detection result, and the first characteristic parameter threshold is adjusted.

[0025] Furthermore, in one embodiment of the present invention, the method further comprises:

[0026] A first configuration file is generated according to the first characteristic parameter threshold; the first configuration file is used to represent a detection file for detecting a chip exhibiting the first characteristic.

[0027] Furthermore, in one embodiment of the present invention, the method further comprises:

[0028] Selecting a corresponding first configuration file according to the first characteristic parameter information of the chip to be tested;

[0029] A first characteristic parameter threshold is determined according to the first configuration file.

[0030] On the other hand, an embodiment of the present invention provides a chip detection system, including:

[0031] The first module is used to obtain image information of several chips to be tested;

[0032] The second module is used to obtain the first characteristic parameter information and the second characteristic parameter information of each chip to be tested according to the image information of the chip to be tested;

[0033] A third module is used to compare the first characteristic parameter information with a first characteristic parameter threshold to obtain a first detection result of the chip to be tested; the first detection result is used to characterize a detection result based on the first characteristic of the chip to be tested, and the first detection result includes a detection pass and a detection fail;

[0034] A fourth module is used to compare the second characteristic parameter information with a second characteristic parameter threshold to obtain a second detection result of the chip to be tested; the second detection result is used to characterize a detection result based on a second characteristic of the chip to be tested, and the second detection result includes a detection pass and a detection fail;

[0035] A fifth module is used to display a main interface of chip detection, wherein a chip detection position display area is provided on the main interface; the chip detection position display area includes a first feature display area and a second feature display area;

[0036] The sixth module is used to display the first detection result at the corresponding position of the first feature display area according to the first detection result of each chip to be tested; the corresponding position of the first feature display area is used to represent the position consistent with the placement position of the chip to be tested;

[0037] The seventh module is used to display the second detection result of each chip at a corresponding position in the second feature display area according to the second detection result of each chip.

[0038] On the other hand, an embodiment of the present invention provides a chip detection device, including:

[0039] at least one processor;

[0040] at least one memory for storing at least one program;

[0041] When the at least one program is executed by the at least one processor, the at least one processor implements the above-mentioned chip detection method.

[0042] On the other hand, an embodiment of the present invention provides a storage medium, in which a program executable by a processor is stored. When the program executable by the processor is executed by the processor, it is used to implement the above-mentioned chip detection method.

[0043] The embodiment of the present invention obtains the first characteristic parameter information and the second characteristic parameter information by extracting the image information of the chip to be tested; and compares the two characteristic parameter information with the corresponding characteristic parameter information threshold to obtain the chip detection result; the image information of the chip to be tested is used for automatic detection, which alleviates the problem of low efficiency of the operator's naked eye observation; at the same time, the detection result is obtained by comparing with the characteristic parameter threshold, which alleviates the problem of standard differentiation. The detection results are displayed through the main interface of the chip detection, so that the detection results are intuitive and visual, and the operator's subsequent processing efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the embodiments of the present invention or the drawings of related technical solutions in the prior art are introduced below. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0045] Figure 1 A schematic flow chart of an embodiment of a chip detection method provided by the present invention;

[0046] Figure 2 A schematic structural diagram of an embodiment of the image acquisition process of the chip to be tested provided by the present invention;

[0047] Figure 3 A schematic diagram of an interface display of an embodiment of a display interface of a first detection result provided by the present invention;

[0048] Figure 4 A schematic diagram showing an interface of an embodiment of the main interface of chip detection provided by the present invention;

[0049] Figure 5 A schematic diagram showing an interface of an embodiment of a feature setting interface provided by the present invention;

[0050] Figure 6 A schematic structural diagram of an embodiment of a chip detection system provided by the present invention;

[0051] Figure 7 A schematic structural diagram of an embodiment of a chip detection device provided by the present invention. DETAILED DESCRIPTION

[0052] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limitations of the present invention. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0053] During the chip manufacturing process, testing each chip is an indispensable step; especially for chips with appearance defects, they need to be eliminated. In related technologies, chip appearance inspection is usually performed by operators visually, which is inefficient; at the same time, the inspection standards between different operators may be different, resulting in the problem of standard differentiation, which is not conducive to large-scale intelligent production.

[0054] The chip detection method and system according to the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. First, the chip detection method according to the embodiments of the present invention will be described with reference to the accompanying drawings.

[0055] Reference Figure 1 , a chip detection method is provided in an embodiment of the present invention. The chip detection method in the embodiment of the present invention can be applied to a terminal, can be applied to a server, can also be software running in a terminal or a server, etc. The terminal can be a tablet computer, a laptop computer, a desktop computer, etc., but is not limited to this. The server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, CDN, and big data and artificial intelligence platforms. The chip detection method in the embodiment of the present invention mainly includes the following steps:

[0056] S100: Obtain image information of several chips to be tested;

[0057] S200: Obtaining first characteristic parameter information and second characteristic parameter information of the chip to be tested according to the image information of each chip to be tested;

[0058] S300: Compare the first characteristic parameter information with the first characteristic parameter threshold to obtain a first detection result of the chip to be tested; the first detection result is used to characterize the detection result based on the first characteristic of the chip to be tested, and the first detection result includes a detection pass and a detection fail;

[0059] S400: Compare the second characteristic parameter information with the second characteristic parameter threshold to obtain a second detection result of the chip to be tested; the second detection result is used to characterize the detection result based on the second characteristic of the chip to be tested, and the second detection result includes a detection pass and a detection fail;

[0060] S500: Displaying a main interface of chip detection, wherein a chip detection position display area is provided on the main interface; the chip detection position display area includes a first feature display area and a second feature display area;

[0061] S600: Displaying the first detection result at a corresponding position of the first feature display area according to the first detection result of each chip to be tested; the corresponding position of the first feature display area is used to represent a position consistent with the placement position of the chip to be tested;

[0062] S700: Displaying the second detection result at a corresponding position in the second feature display area according to the second detection result of each chip.

[0063] In some possible implementations, the image information of the chip to be tested can be obtained by a CCD sampling device. Exemplarily, the front image information of the chip includes the silk screen information of the chip, so the silk screen information can be used as the first feature, and the silk screen information can include information such as setting area, Pin1, mark, scratch, ink, dirt, pore, circle, etc., and the above information is used as the first characteristic parameter information. Similarly, some chips have solder balls on the surface, and the parameters related to the solder balls include setting diameter, Pin1 point, deformation, dirt, foreign matter, ball loss, scratch and other information; the relevant parameters of the above solder balls can be regarded as the second characteristic parameter information. It can be seen that in the embodiment of the present invention, the first characteristic parameter information is used to characterize the information of several parameters related to the first feature of the chip to be tested; the second characteristic parameter information is used to characterize the information of several parameters related to the second feature of the chip to be tested. It can be understood that the first characteristic parameter information and the second characteristic parameter information represent the appearance information of the chip, and the appearance detection result of the chip can be obtained by analyzing the first characteristic parameter information and the second characteristic parameter information.

[0064] Specifically, the first characteristic parameter information is compared with the first characteristic parameter threshold to obtain a first detection result of the chip to be tested. In an embodiment of the present invention, the first characteristic parameter threshold may be a design requirement proposed by the user (customer) of the chip, or may be an expected value of a related parameter set according to market demand, and the present invention does not impose any specific limitation. Exemplarily, the first characteristic parameter threshold may be a set numerical value, and the first detection result of the chip to be tested is obtained by comparing the first characteristic parameter information with the first characteristic parameter threshold. At the same time, the first characteristic parameter threshold may also be a set numerical interval, and the first detection result of the chip to be tested is obtained by judging whether the first characteristic parameter information is within the set interval.

[0065] Specifically, see Figure 2 In the image acquisition process of the chip to be tested, the chip is placed on a tray 201 for image acquisition. A tray can be placed on several chips to be tested. Therefore, there is at least one test result for each chip to be tested. For example, the first test result for the silk screen and the second test result for the solder ball. Figure 3 As shown, in the embodiment of the present invention, the test result of each chip to be tested is displayed in the first feature display area, wherein the placement position of the chip corresponds to the position of the chip on the tray, so that the subsequent operator can easily find the specific problematic chip, and facilitate the subsequent re-inspection or screening work.

[0066] Optionally, in one embodiment of the present invention, the main interface is provided with an overall result display area, and the method further comprises:

[0067] Calculating a first yield rate according to a first detection result of each chip; the first yield rate is used to characterize a yield rate based on a first feature of the chip to be tested;

[0068] The first yield is displayed in the overall result display area;

[0069] Calculating a second yield rate according to a second detection result of each chip; the second yield rate is used to characterize a yield rate based on a second feature of the chip to be tested;

[0070] The second yield is displayed in the overall result display area.

[0071] In some possible implementations, reference Figure 4 The main interface of the chip detection shown in the figure displays a first feature display area 410 and a second feature display area 420, and also provides an overall result display area 430. Specifically, according to the detection results of all chips, the yield of the chip based on the first feature and the yield of the chip based on the second feature can be obtained. Figure 4 As shown, the test results of the chip are displayed, so that the operator can quickly learn the yield information of the chip for easy traceability.

[0072] In some possible implementations, the first feature includes several parameters, which are recorded as first parameters. According to the detection result of the chip, the yield based on the first parameter can be calculated, and the yield based on the first parameter is displayed in area 450 in the chip detection position display area. Similarly, the yield under each parameter based on the second feature can also be displayed.

[0073] Optionally, in one embodiment of the present invention, displaying the first yield in the overall result display area includes:

[0074] In the overall result display area, the first yield is displayed by a bar graph;

[0075] Alternatively, in the overall result display area, the first yield is displayed by a fan chart.

[0076] In some possible implementations, reference Figure 4 As shown, the chip yield can be displayed in the form of a bar chart to improve the display effect. Similarly, it can also be displayed in the form of a fan chart.

[0077] Optionally, in one embodiment of the present invention, a menu bar setting area is provided on the main interface, and the method further includes:

[0078] In response to a selection operation for feature settings received on the menu bar settings area, displaying a feature settings interface;

[0079] In response to a parameter selection instruction for a first feature received on a feature setting interface, selecting a parameter to be set for the first feature;

[0080] In response to a parameter editing instruction for a first feature received in a feature setting interface, an input target threshold is displayed in a parameter editing area, and a first feature parameter threshold is determined; the target threshold is used to characterize a threshold corresponding to the parameter to be set.

[0081] In some possible implementations, by setting the first characteristic parameter threshold, the subsequent chip detection process is facilitated. Figure 4 As shown, feature settings are selected in the menu bar setting area. Specifically, the selection can be made by clicking. In response to the feature setting selection operation received in the menu bar setting area 440, a feature setting interface is displayed. On the feature setting interface, relevant parameter thresholds are set. For example, referring to Figure 5 As shown, according to the judgment method of the first characteristic parameter threshold, the parameters to be set of the first characteristic are selected. If it is solder ball information, it can be the measurement of the horizontal plane of the solder ball, the ball thickness, and the angles in the three directions of XYZ; the diameter detection of the solder ball, the Pin point detection, the solder ball shape variable detection, the solder ball surface cleanliness detection, the solder ball foreign matter detection, and the solder ball scratch detection. If it is silk screen information, it can be the Pin1 direction point, the Mark silk screen detection, the ink detection, the collapse edge detection, the scratch detection, the stain detection, the foreign matter detection, the pore detection, etc. Specifically, through the parameter selection instruction, the parameters to be set are selected and displayed through area 510. At the same time, the target threshold is input into the corresponding parameter editing area 520 and displayed through the interface. The setting of the first characteristic parameter threshold is completed. Similarly, the second characteristic parameter threshold needs to be set. It can be understood that through the above operations, the characteristic parameter threshold can also be modified and adjusted to meet customer needs.

[0082] Optionally, in one embodiment of the present invention, the method further comprises:

[0083] Obtaining a number of sample chips to be tested and status labels corresponding to the sample chips to be tested; the status labels are used to indicate the real results of whether the sample to be tested has passed the test;

[0084] Testing a number of sample chips to be tested to obtain a third test result; the third test result is used to characterize the test result based on the first feature of the sample chip to be tested;

[0085] The state label is compared with the third detection result, and the threshold of the first characteristic parameter is adjusted.

[0086] In some possible implementations, take a tray of materials, first perform manual visual inspection, distinguish normal materials from abnormal materials, and determine the status label of each sample chip. Place in a standardized device, record the silk screen and solder ball information of good products by CCD scanning, compare with the first characteristic parameter threshold and the second characteristic parameter threshold, and correct the first characteristic parameter threshold and the second characteristic parameter threshold. Similarly, correct the first characteristic parameter threshold and the second characteristic parameter threshold through abnormal materials. Specifically, take abnormal materials, read the silk screen and solder ball information, and use this parameter as a reference to update the first characteristic parameter threshold and the second characteristic parameter threshold.

[0087] Optionally, in one embodiment of the present invention, the method further comprises:

[0088] A first configuration file is generated according to the first characteristic parameter threshold; the first configuration file is used to represent a detection file for detecting a chip exhibiting the first characteristic.

[0089] In some possible implementations, there are chip products with different configurations for different customer needs. Different configuration files are set for multiple chip products on the same production line, and the configuration files are stored and named with chip parameter information to facilitate subsequent calls to the configuration files.

[0090] Optionally, in one embodiment of the present invention, the method further comprises:

[0091] According to the first characteristic parameter information of the chip to be tested, selecting a corresponding first configuration file;

[0092] A first characteristic parameter threshold is determined according to the first configuration file.

[0093] In some possible implementations, when testing a chip, firstly, the specific model of the chip to be tested is obtained, the corresponding configuration file is called, and the first characteristic parameter information and the second characteristic parameter information are obtained. Specifically, according to the first characteristic parameter information of the chip to be tested, the corresponding first configuration file is selected by the name of the configuration file.

[0094] In summary, the embodiment of the present invention obtains the first characteristic parameter information and the second characteristic parameter information by extracting the image information of the chip to be tested; and compares the two characteristic parameter information with the corresponding characteristic parameter information threshold to obtain the chip detection result; the image information of the chip to be tested is used for automatic detection, which alleviates the problem of low efficiency of the operator's naked eye observation; at the same time, the detection result is obtained by comparing with the characteristic parameter threshold, which alleviates the problem of standard differentiation. The detection results are displayed through the main interface of the chip detection, so that the detection results are intuitive and visual, and the operator's subsequent processing efficiency is improved.

[0095] Secondly, refer to the attached Figure 6 A chip detection system proposed according to an embodiment of the present invention is described.

[0096] Figure 6 : is a schematic diagram of the structure of a chip detection system according to an embodiment of the present invention, the system specifically comprises:

[0097] The first module 610 is used to obtain image information of a plurality of chips to be tested;

[0098] The second module 620 is used to obtain first characteristic parameter information and second characteristic parameter information of the chip to be tested according to the image information of each chip to be tested;

[0099] The third module 630 is used to compare the first characteristic parameter information with the first characteristic parameter threshold to obtain a first detection result of the chip to be tested; the first detection result is used to characterize the detection result based on the first characteristic of the chip to be tested, and the first detection result includes a detection pass and a detection fail;

[0100] The fourth module 640 is used to compare the second characteristic parameter information with the second characteristic parameter threshold to obtain a second detection result of the chip to be tested; the second detection result is used to characterize the detection result based on the second characteristic of the chip to be tested, and the second detection result includes a detection pass and a detection fail;

[0101] The fifth module 650 is used to display the main interface of chip detection, and a chip detection position display area is set on the main interface; the chip detection position display area includes a first feature display area and a second feature display area;

[0102] The sixth module 660 is used to display the first detection result at the corresponding position of the first feature display area according to the first detection result of each chip to be tested; the corresponding position of the first feature display area is used to represent the position consistent with the placement position of the chip to be tested;

[0103] The seventh module 670 is used to display the second detection result at the corresponding position of the second feature display area according to the second detection result of each chip.

[0104] It can be seen that the contents of the above method embodiments are all applicable to the present system embodiments, the functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0105] Reference Figure 7 , an embodiment of the present invention provides a chip detection device, comprising:

[0106] at least one processor 710;

[0107] At least one memory 720, used to store at least one program;

[0108] When the at least one program is executed by the at least one processor 710 , the at least one processor 710 implements the chip detection method.

[0109] Similarly, the contents of the above method embodiments are all applicable to the present device embodiments. The functions specifically implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0110] An embodiment of the present invention further provides a computer-readable storage medium, in which a program executable by a processor is stored. The program executable by the processor is used to execute the above-mentioned chip detection method when executed by the processor.

[0111] Similarly, the contents of the above method embodiments are all applicable to the present storage medium embodiments. The functions specifically implemented by the present storage medium embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0112] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0113] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features can be integrated into a single physical device and / or software module, or one or more functions and / or features can be implemented in a separate physical device or software module. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0114] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several programs to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0115] The logic and / or steps represented in the flowchart or otherwise described herein, for example, may be considered as an ordered list of executable programs for implementing the logical functions, and may be embodied in any computer-readable medium for use by a program execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch and execute a program from a program execution system, device or apparatus), or in conjunction with such program execution systems, devices or apparatuses. For purposes of this specification, a "computer-readable medium" may be any device that can contain, store, communicate, propagate or transmit a program for use by a program execution system, device or apparatus, or in conjunction with such program execution systems, devices or apparatuses.

[0116] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0117] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable program execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0118] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0119] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0120] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of the present invention.

Claims

1. A chip detection method, characterized in that: The following steps are involved: Obtain image information of several chips to be tested; According to the image information of each chip to be tested, first characteristic parameter information and second characteristic parameter information of the chip to be tested are obtained; the first characteristic parameter information includes silk screen information, and the second characteristic parameter information includes solder ball information; Compare the first characteristic parameter information with the first characteristic parameter threshold to obtain a first detection result of the chip to be tested; the first detection result is used to characterize a detection result based on the first characteristic of the chip to be tested, and the first detection result includes a detection pass and a detection fail; Compare the second characteristic parameter information with the second characteristic parameter threshold to obtain a second detection result of the chip to be tested; the second detection result is used to characterize the detection result based on the second characteristic of the chip to be tested, and the second detection result includes a detection pass and a detection fail; A main interface for displaying chip detection, wherein a chip detection position display area is provided on the main interface; the chip detection position display area includes a first feature display area and a second feature display area; A menu bar setting area is provided on the main interface to set the first characteristic parameter threshold; According to the first detection result of each chip to be tested, the first detection result is displayed at a corresponding position of the first feature display area; the corresponding position of the first feature display area is used to represent a position consistent with the placement position of the chip to be tested on the tray; According to the second detection result of each chip, display the second detection result at a corresponding position of the second feature display area; The method further comprises the following steps: In response to a selection operation for feature settings received on the menu bar settings area, displaying a feature settings interface; In response to a parameter selection instruction for a first feature received on the feature setting interface, selecting a parameter to be set for the first feature; In response to a parameter editing instruction for a first feature received in the feature setting interface, an input target threshold is displayed in the parameter editing area to determine the first feature parameter threshold; the target threshold is used to characterize a threshold corresponding to the parameter to be set.

2. The chip detection method according to claim 1, characterized in that: The main interface is provided with an overall result display area, and the method further comprises: Calculating a first yield rate according to a first detection result of each chip; the first yield rate is used to characterize a yield rate based on a first feature of the chip to be tested; Displaying the first yield in the overall result display area; Calculating a second yield rate according to a second detection result of each chip; the second yield rate is used to characterize a yield rate based on a second feature of the chip to be tested; The second yield is displayed in the overall result display area.

3. The chip detection method according to claim 2, characterized in that: The displaying the first yield in the overall result display area includes: In the overall result display area, the first yield is displayed by a bar graph; Alternatively, in the overall result display area, the first yield is displayed by a fan chart.

4. The chip detection method according to claim 1, characterized in that: The method further comprises: Acquire a number of sample chips to be tested and status labels corresponding to the sample chips to be tested; the status labels are used to indicate the real results of whether the sample to be tested passes the test; Testing the plurality of sample chips to be tested to obtain a third test result; the third test result is used to characterize the test result based on the first feature of the sample chip to be tested; The state label is compared with the third detection result, and the first characteristic parameter threshold is adjusted.

5. The chip detection method according to claim 1, characterized in that: The method further comprises: A first configuration file is generated according to the first characteristic parameter threshold; the first configuration file is used to represent a detection file for detecting a chip exhibiting the first characteristic.

6. The chip detection method according to claim 5, characterized in that: The method further comprises: Selecting a corresponding first configuration file according to the first characteristic parameter information of the chip to be tested; A first characteristic parameter threshold is determined according to the first configuration file.

7. A chip detection system, characterized in that: include: The first module is used to obtain image information of several chips to be tested; The second module is used to obtain first characteristic parameter information and second characteristic parameter information of each chip to be tested according to the image information of the chip to be tested; the first characteristic parameter information includes silk screen information, and the second characteristic parameter information includes solder ball information; A third module is used to compare the first characteristic parameter information with a first characteristic parameter threshold to obtain a first detection result of the chip to be tested; the first detection result is used to characterize a detection result based on the first characteristic of the chip to be tested, and the first detection result includes a detection pass and a detection fail; A fourth module is used to compare the second characteristic parameter information with a second characteristic parameter threshold to obtain a second detection result of the chip to be tested; The second test result is used to characterize the test result based on the second feature of the chip to be tested, and the second test result includes a test pass and a test fail; A fifth module is used to display a main interface of chip detection, wherein a chip detection position display area is provided on the main interface; the chip detection position display area includes a first feature display area and a second feature display area; A menu bar setting area is provided on the main interface to set the first characteristic parameter threshold; The sixth module is used to display the first detection result at the corresponding position of the first feature display area according to the first detection result of each chip to be tested; the corresponding position of the first feature display area is used to represent the position consistent with the placement position of the chip to be tested on the tray; A seventh module is used to display the second detection result of each chip at a corresponding position of the second feature display area according to the second detection result of each chip; The seventh module is also used for: In response to a selection operation for feature settings received on the menu bar settings area, displaying a feature settings interface; In response to a parameter selection instruction for a first feature received on the feature setting interface, selecting a parameter to be set for the first feature; In response to a parameter editing instruction for a first feature received in the feature setting interface, displaying an input target threshold in a parameter editing area, and determining the first feature parameter threshold; The target threshold is used to characterize the threshold corresponding to the parameter to be set.

8. A chip detection device, characterized in that: include: at least one processor; at least one memory for storing at least one program; When the at least one program is executed by the at least one processor, the at least one processor implements the chip detection method according to any one of claims 1 to 6.

9. A computer-readable storage medium storing a program executable by a processor, characterized in that: The program executable by the processor is used to implement the chip detection method according to any one of claims 1 to 6 when executed by the processor.

Images