Method and device for fast acquisition and locking of communication frequency of high-mobility large-dynamic system

Abstract

The application provides a communication frequency fast capturing and locking method and device of a high-mobility large-dynamic system, and relates to the field of satellite communication. The method comprises the following steps: estimating the initial phase of a despread signal, respectively isolating a plurality of symbols to perform unwrapping and frequency offset calculation on the despread signal, and performing three-stage loop filtering and frequency offset correction according to the calculated frequency offset value. The method can improve the anti-interference and anti-noise capability of a phase-locked loop, shorten the locking time of the phase-locked loop, and thus quickly capture and track the despread signal, so as to meet the requirements of the high-mobility large-dynamic system for fast capturing and locking of the frequency offset.

Description

Technical Field

[0001] This application relates to the field of satellite communications, specifically to a method and apparatus for rapid acquisition and locking of communication frequencies in a highly mobile and dynamic system. Background Technology

[0002] Large dynamic range (VDL) satellite communication systems provide diverse and reliable services to various mobile terminals across a global coverage area, playing a crucial role in today's wireless communication world. With the development of digital circuit technology, especially the widespread application of FPGA technology, all-digital phase-locked loops (PLLs) using FPGAs are widely used in frequency acquisition and locking in VDL satellite communication systems.

[0003] Existing technologies applied to traditional all-digital phase-locked loops (PLLs) in high-dynamic satellite communication systems use adjacent symbols for phase identification during the phase detection phase and perform unified filtering on the measured frequency offset during the filtering phase. However, on the one hand, the long-distance transmission of satellite links in high-dynamic satellite communication systems results in a low signal-to-noise ratio and poor channel conditions. On the other hand, the high mobility of ground mobile devices generates a large Doppler frequency offset, causing the received signal frequency to change rapidly. Correlation calculations must be performed within the frequency offset range. As a result, traditional all-digital PLLs use adjacent signals for frequency offset measurement during frequency acquisition and locking, leading to slow PLL entry into the locking state. This makes it difficult to meet the requirements of high-mobility, high-dynamic systems for rapid acquisition and locking of frequency offsets. Summary of the Invention

[0004] This application provides a method and apparatus for rapid acquisition and locking of communication frequencies in highly mobile and dynamic systems. By using interval symbols for phase detection and frequency offset measurement, the anti-interference and anti-noise capabilities of the phase-locked loop in highly mobile and dynamic systems can be improved, thereby rapidly acquiring and tracking the despread signal to meet the requirements of highly mobile and dynamic systems for rapid acquisition and locking of frequency offset.

[0005] In a first aspect, this application provides a method for fast acquisition and locking of communication frequencies in a highly maneuverable and dynamic system, applied to a phase-locked loop, the method comprising:

[0006] The initial phase of the despread signal is obtained by performing phase determination on the despread signal;

[0007] Based on the maximum number of symbols in the despread signal, a first quantity for unwinding and a second quantity for calculating the frequency offset value are determined.

[0008] If the number of symbols in the received despread signal is greater than the first number, then the first number of symbols are isolated to unwind the initial phase of the despread signal to obtain the unwound phase.

[0009] If the number of symbols in the received despread signal is greater than the sum of the first number and the second number, then the frequency offset value of the despread signal is calculated by isolating the second number of symbols based on the despread phase.

[0010] Based on the frequency offset value, the despread signal is subjected to a three-stage loop filter to obtain a correction signal;

[0011] The frequency offset of the correction signal is corrected based on the frequency offset value until the phase-locked loop enters the locked state.

[0012] By adopting the above technical solution, several symbols are isolated to dewind the despread signal and calculate the frequency offset. Based on the obtained frequency offset value, three-stage loop filtering and frequency offset correction are performed, which can improve the anti-interference and anti-noise capabilities of the phase-locked loop, shorten the locking time of the phase-locked loop, and thus quickly capture and track the despread signal to meet the requirements of high-mobility and high-dynamic systems for rapid acquisition and locking of frequency offset.

[0013] Optionally, the step of performing phase determination on the despread signal to obtain the phase difference value of the despread signal includes:

[0014] Integrating the original despread signal at the chip level by the length of the spreading code at each sampling point yields the symbol-level despread signal.

[0015] The phase of the symbol-level despread signal is determined using the phase angle calculation formula to obtain the initial phase of the despread signal; the phase angle calculation formula is as follows:

[0016] Thetap(n)=angle(sum_p(n));

[0017] Where Thetap(n) is the initial phase of the nth symbol of the despread signal, angle is the phase angle operator, and sum_p(n) is the nth symbol of the despread signal.

[0018] By adopting the above technical solution, the initial phase of the despread signal can be obtained, which makes it easier to grasp the approximate range of the phase of the despread signal and lay the foundation for subsequent unwinding and frequency offset determination.

[0019] Optionally, determining the first quantity and the second quantity based on the unit phase offset value and the maximum phase offset of the despread signal includes:

[0020] The unit phase offset value of the despread signal is calculated using the unit phase offset formula;

[0021] Based on the maximum phase offset of the despread signal and the unit phase offset value, the maximum number of symbols in the despread signal is calculated using a rounding formula.

[0022] The positive integers less than half the maximum number of symbols are determined as the first quantity, and the positive integers less than the maximum number of symbols are determined as the second quantity.

[0023] By adopting the above technical solution, it is necessary to ensure that the phase offset of the number of isolated symbols is less than π, so as to avoid the error of phase misjudgment caused by the phase offset exceeding π.

[0024] Optionally, the unit phase deflection formula is:

[0025] Pha=(2π*Δf*Ln) / fs;

[0026] Where Pha is the unit phase offset value, Δf is the maximum frequency offset of the despread signal, Ln is the spreading code length of the despread signal, and fs is the chip sampling rate.

[0027] The rounding formula is:

[0028] Maxsymb = Floor(π / Pha);

[0029] Where Maxsymb is the maximum number of symbols, Floor is the floor operator, and Pha is the unit phase offset value.

[0030] By adopting the above technical solution, the unit phase offset value caused by a single symbol is calculated, and the maximum number of symbols less than π is calculated by rounding down. This allows the maximum number of symbols to be determined even when blind processing is performed with fewer symbols in the initial stage of the phase-locked loop.

[0031] Optionally, the step of isolating the first number of symbols to unwind the initial phase of the despread signal to obtain the unwound phase includes:

[0032] Obtain a first initial phase and a second initial phase of the despread signal that is isolated by a first number of symbols, wherein the first initial phase is the initial phase corresponding to the symbol for which phase calculation is performed later in the despread signal;

[0033] The initial phase difference is obtained by subtracting the second initial phase from the first initial phase.

[0034] The `round` function is called to calculate the ratio of the initial phase difference to π, and the returned value is obtained.

[0035] The unwinding phase corresponding to the first initial phase is obtained by subtracting the product of the returned value and π from the first initial phase.

[0036] By adopting the above technical solution, the first number of symbols are isolated for unwinding, which increases the accuracy and flexibility of unwinding compared to using adjacent signals for unwinding.

[0037] Optionally, the step of calculating the frequency offset value of the despread signal by isolating the second number of symbols based on the despread phase includes:

[0038] Based on the despreading phase, the frequency offset value of the despread signal is calculated using the frequency offset conversion formula after isolating the second number of symbols;

[0039] The frequency offset conversion formula is:

[0040] foe=(Thetap(n)-Thetap(n-dist2))*(fs / (2*π*Ln*dist2));

[0041] Where foe is the frequency offset value, Thetap(n)-Thetap(n-dist2) is the phase difference of the despreading phase with a interval of the second number of symbols, fs is the sampling rate, Ln is the length of the spreading code of the despread signal, and dist2 is the second number.

[0042] By adopting the above technical solution, the phase difference caused by frequency offset can be converted into a frequency offset value. In the first round of correction of the phase-locked loop, the influence of frequency offset on the phase is eliminated, so that the residual frequency offset caused by subsequent phase changes is all caused by noise, and the subsequent phase exhibits a flat form of slight variation.

[0043] Optionally, after correcting the frequency offset of the correction signal based on the frequency offset value, the method further includes:

[0044] The first quantity is replaced with a third quantity, and the second quantity is replaced with a fourth quantity, wherein the third quantity is greater than the first quantity and greater than half of the maximum number of symbols, and the fourth quantity is greater than the second quantity and greater than the maximum number of symbols.

[0045] By adopting the above technical solution, after stable tracking, the phase difference and frequency offset are smaller, which can isolate a greater distance for unwinding and frequency offset calculation, thereby resisting more noise and further accelerating the phase-locked loop tracking speed.

[0046] Secondly, this application provides a device for rapid acquisition and locking of communication frequencies for highly maneuverable and dynamic systems, the device comprising:

[0047] An initial phase determination module is used to determine the phase of the despread signal to obtain the initial phase of the despread signal.

[0048] An interval quantity determination module is used to determine a first quantity for unwinding and a second quantity for calculating the frequency offset value based on the maximum number of symbols in the despread signal.

[0049] The unwinding module is used to, if the number of symbols in the received despread signal is greater than the first number, isolate the first number of symbols to unwind the initial phase of the despread signal to obtain the unwound phase.

[0050] A frequency offset calculation model is used to calculate the frequency offset value of the despread signal based on the dewinding phase and by isolating the second number of symbols if the number of symbols in the received despread signal is greater than the sum of the first number and the second number.

[0051] The filtering module is used to perform three-stage loop filtering on the despread signal based on the frequency offset value to obtain a correction signal;

[0052] The frequency offset correction module is used to correct the frequency offset of the correction signal based on the frequency offset value until the phase-locked loop enters the locked state.

[0053] Thirdly, this application provides a computer storage medium storing a plurality of instructions adapted for loading by a processor and executing any of the methods described above.

[0054] Fourthly, this application provides an electronic device including a processor, a memory, and a transceiver. The memory is used to store instructions, the transceiver is used to communicate with other devices, and the processor is used to execute the instructions stored in the memory to cause the electronic device to perform any of the methods described above.

[0055] In summary, one or more technical solutions provided in the embodiments of this application have the following technical effects or advantages: by isolating several symbols to dewind the despread signal and calculate the frequency offset, and performing three-stage loop filtering and frequency offset correction based on the obtained frequency offset value, the anti-interference and anti-noise capabilities of the phase-locked loop can be improved, the locking time of the phase-locked loop can be shortened, and the despread signal can be quickly captured and tracked to meet the requirements of high-mobility and high-dynamic systems for rapid acquisition and locking of frequency offset. Attached Figure Description

[0056] Figure 1 This is a schematic diagram of a method for measuring frequency offset in the prior art;

[0057] Figure 2 This is a flowchart illustrating a method for rapidly acquiring and locking communication frequencies in a highly maneuverable and dynamic system, as provided in an embodiment of this application.

[0058] Figure 3 This is a schematic diagram of a phase-locked loop provided in an embodiment of this application;

[0059] Figure 4 This is a simulation diagram of a phase periodic variation provided in an embodiment of this application;

[0060] Figure 5 This is a schematic diagram of a startup phase provided in an embodiment of this application;

[0061] Figure 6 This is a simulation diagram of phase unwinding provided in an embodiment of this application;

[0062] Figure 7 This is a simulation diagram of frequency offset values ​​measured at different stages, provided in an embodiment of this application.

[0063] Figure 8 This is a schematic diagram of the structure of a communication frequency rapid acquisition and locking device for a highly maneuverable and dynamic system provided in an embodiment of this application;

[0064] Figure 9 This is a schematic diagram of the structure of an electronic device disclosed in an embodiment of this application.

[0065] Explanation of reference numerals in the attached diagram: 10, Initial phase calculation module; 20, Interval quantity determination module; 30, Phase unwinding module; 40, Frequency offset numerical calculation module; 50, Filtering module; 60, Frequency offset correction module; 900, Electronic equipment; 901, Processor; 902, Communication bus; 903, User interface; 904, Network interface; 905, Memory. Detailed Implementation

[0066] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0067] In the description of the embodiments of this application, the words "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design that is described as "for example" or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Rather, the use of the words "for example" or "for instance" is intended to present the relevant concepts in a specific manner.

[0068] In the description of the embodiments of this application, the term "multiple" means two or more. For example, multiple systems means two or more systems, and multiple screen terminals means two or more screen terminals. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0069] The technical solution provided in this application can be applied to high-mobility, high-dynamic system scenarios, specifically to the phase-locked loop of a high-mobility, high-dynamic satellite communication system.

[0070] First, a brief introduction to the specific scenario in which this application is implemented: Long-distance transmission in high dynamic range satellite communication systems results in a low signal-to-noise ratio and poor channel performance. Simultaneously, the high mobility of ground-based mobile devices generates significant Doppler frequency shifts, causing rapid changes in the received signal frequency. Here, ground-based mobile devices are not limited to those that move only on the ground; aircraft, drones, ships, and other equipment that establish connections with satellites are all within the scope of this application.

[0071] Please see Figure 1 The diagram illustrates a method for measuring frequency offset in the prior art. The existing phase-locked loop uses adjacent symbols for phase identification and frequency offset measurement. As can be seen from the diagram, the convergence of frequency offset measurement in the prior art is a slow process, requiring more than 800 symbols to control the measurement deviation within 200Hz. This cannot meet the requirements of high-mobility, high-dynamic systems for rapid acquisition of frequency offset.

[0072] Based on the above problems, this application embodiment improves the anti-interference and anti-noise capabilities of the phase-locked loop (PLL) by isolating several symbols to dewind the despread signal and calculate the frequency offset, and performs three-stage loop filtering and frequency offset correction based on the obtained frequency offset value. This shortens the PLL's locking time and allows the frequency offset measurement deviation to be controlled within 200Hz within 10 symbols after startup, thereby quickly capturing and tracking the despread signal to meet the requirements of high-mobility, high-dynamic systems for rapid acquisition and locking of frequency offset.

[0073] Please see Figure 2This is a flowchart illustrating a method for rapid acquisition and locking of communication frequencies in a highly maneuverable and dynamic system, as provided in an embodiment of this application. This method can be implemented using a computer program, a microcontroller, or run on a device for rapid acquisition and locking of communication frequencies in a highly maneuverable and dynamic system based on the von Neumann architecture. The computer program can be integrated into an application or run as a standalone utility application. This embodiment uses a phase-locked loop (PLL) for processing spread spectrum signals as an example to describe the specific steps of the method for rapid acquisition and locking of communication frequencies in a highly maneuverable and dynamic system.

[0074] Please see Figure 3 The diagram below is a schematic representation of a phase-locked loop provided in an embodiment of this application. Figure 3 To help understand the following examples.

[0075] S01, perform phase determination on the despread signal to obtain the initial phase of the despread signal.

[0076] When acquiring communication frequencies, it is necessary to know the general phase of the despread signal in order to facilitate the subsequent deployment of equipment and parameter settings. The despread signal is the signal after the received signal is despread using the spreading code.

[0077] The specific method in S01 includes:

[0078] S011, integrate the length of the spreading code of the original despread signal at the chip level by sampling points to obtain the symbol-level despread signal.

[0079] The spreading code is a binary code used by the transmitter to spread the signal. It is also used by the receiver for despreading. The length of the spreading code is integrated by sampling points to obtain a symbol-level spread signal. That is, the length of the spreading code is integrated by chips to form a symbol.

[0080] S012, use the phase angle calculation formula to obtain the phase of the symbol-level despread signal and obtain the initial phase of the despread signal.

[0081] The formula for calculating the phase angle is:

[0082] Thetap(n)=angle(sum_p(n));

[0083] Where Thetap(n) is the initial phase of the nth symbol of the despread signal, angle is the phase angle operator, and sum_p(n) is the nth symbol of the despread signal.

[0084] Thetap(n) is the initial phase of the nth symbol of the despread signal p. angle is used to calculate the phase angle in radians of the complex matrix. The result is from -π to π. The symbol-level despread signal obtained by the above integration is a complex number.

[0085] S02, based on the maximum number of symbols in the despread signal, determine the first quantity for unwinding and the second quantity for calculating the frequency offset value.

[0086] The maximum number of symbols is the maximum number of symbols with a phase deviation not exceeding π. Subsequent unwinding uses the method of isolating the first number of symbols, and the calculation of the frequency offset value uses the method of isolating the second number of symbols. If the number of isolated symbols is too large, it will introduce the error of phase misjudgment. Therefore, it is necessary to limit the first number and the second number.

[0087] The specific method in S02 includes:

[0088] S021, use the unit phase offset formula to calculate the unit phase offset value of the despread signal.

[0089] The formula for unit phase deflection is:

[0090] Pha=(2π*Δf*Ln) / fs;

[0091] Where Pha is the unit phase offset, Δf is the maximum frequency offset of the despread signal, Ln is the spreading code length of the despread signal, and fs is the chip sampling rate.

[0092] The unit phase offset is the amount of phase offset that occurs after each symbol. For example, if the ADC acquires a signal with a chip sampling rate of fs = 32MHz, a maximum frequency offset Δf = 10kHz, and a spreading code length Ln = 128, then the calculated unit phase offset Pha = 2π * 10 * 128 / 32000 = 0.08π.

[0093] S022, based on the maximum phase offset and unit phase offset of the despread signal, the maximum number of symbols in the despread signal is calculated using the rounding formula.

[0094] The rounding formula is:

[0095] Maxsymb = Floor(π / pha);

[0096] Where Maxsymb is the maximum number of symbols, Floor is the floor operator, and Pha is the unit offset value.

[0097] For example, the above calculation yields a unit phase offset of 0.08π, and the calculated maximum number of symbols, Maxsymb, is 12. Please see [link / reference]. Figure 4 The figure shows a simulation diagram of a periodic phase change provided by an embodiment of this application. The phase shift introduced by the frequency offset in the figure has gone through 24 symbols from -π to π. Therefore, the phase will go through 12 symbols to undergo a change of π, which further verifies the correctness of the derivation of the maximum number of symbols above.

[0098] S023, determine the first quantity of positive integers that are less than half the maximum number of symbols, and determine the second quantity of positive integers that are less than the maximum number of symbols.

[0099] The first quantity is determined based on the maximum number of symbols, and the first quantity is:

[0100] Dist1 <Maxsymb / 2;

[0101] The second quantity is determined based on the maximum number of symbols, and the second quantity is:

[0102] Dist2 <Maxsymb。

[0103] For example, if the maximum number of symbols calculated above is 12, then the first number is a positive integer in (0, 6), and the second number is a positive integer in (0, 12).

[0104] S03, if the number of symbols in the received despread signal is greater than the first number, then the first number of symbols are isolated to unwind the initial phase of the despread signal to obtain the unwound phase.

[0105] Please see Figure 5 This is a schematic diagram of a startup phase provided in an embodiment of this application. The startup phase includes obtaining the phase of the original signal and unwinding the phase, and storing the phase information to lay the foundation for subsequent frequency determination.

[0106] The purpose of determining whether the number of symbols in the incoming despread signal is greater than the first number is to ensure that the length of the incoming symbols is sufficient to support the isolation of the first number of points for calculation before starting the unwinding operation.

[0107] In one feasible implementation, a first initial phase and a second initial phase of the despread signal isolated from a first number of symbols are obtained. The first initial phase is the initial phase corresponding to the symbol in which the phase of the despread signal is subsequently calculated. The first initial phase is subtracted from the second initial phase to obtain the initial phase difference. The round function is called to calculate the ratio of the initial phase difference to π to obtain the returned value. The first initial phase is subtracted from the product of the returned value and π to obtain the unwound phase corresponding to the first initial phase.

[0108] The following procedure will be used to explain the specific unwinding process.

[0109] if n>dist1;

[0110] dipha(n)=Thetap(n)-Thetap(n-dist1);

[0111] dpcorr=round(dipha(n) / (pi));

[0112] Thetap(n)=Thetap(n)-pi*dpcorr;

[0113] Where n is the nth symbol of the despread signal, dist1 is the first quantity, Thetap(n) is the first initial phase of the nth symbol, Thetap(n-dist1) is the second initial phase of the (n-dist1)th symbol, dipha(n) is the initial phase difference, and dpcorr is the returned value of the initial phase difference and π. For example, if the obtained initial phase difference is less than π / 2, the returned value is 0; if the obtained initial phase difference is greater than or equal to π / 2, the returned value is 1. Finally, the updated despread phase is obtained based on the returned value.

[0114] Please see Figure 6 This is a simulation diagram of phase dewinding provided in an embodiment of this application. The position of symbol 69 in the diagram indicates the start of frequency correction processing on the despread signal. Because of the signal frequency correction at this point, the subsequent signal phase will essentially no longer exhibit sawtooth-like changes. This is because, after frequency offset correction, the phase variation is merely due to the residual frequency offset caused by noise. Therefore, the subsequent phase exhibits a flat, sliding, slight variation.

[0115] It is important to understand that, for the BPSK signal, the phase difference between two consecutive symbols results in three possibilities: -π, 0, and π. Therefore, the BPSK round operation is set to a base value of π. In another possible real-time mode, for the QPSK signal, the phase difference between two consecutive symbols results in five possibilities: -π, -π / 2, 0, π / 2, and π. Therefore, the QPSK round operation is set to a base value of π / 2. The above program or formula can be modified accordingly.

[0116] In one possible implementation, for BPSK / QPSK signals, the maximum likelihood signal phase difference can be used as the phase difference before and after the frequency offset. Using the maximum likelihood solution can improve the noise immunity.

[0117] S04. If the number of symbols in the received despread signal is greater than the sum of the first number and the second number, then the frequency offset value of the despread signal is calculated by isolating the second number of symbols based on the despread phase.

[0118] The purpose of determining whether the number of symbols in the incoming despread signal is greater than the first and second numbers is to ensure that the length of the incoming symbols is sufficient to support the isolation length for frequency offset calculation.

[0119] Based on the despreading phase, the frequency offset of the despread signal is calculated using the frequency offset conversion formula after isolating a second number of symbols; the frequency offset conversion formula is:

[0120] foe=(Thetap(n)-Thetap(n-dist2))*(fs / (2*π*Ln*dist2));

[0121] Where foe is the frequency offset value, Thetap(n)-Thetap(n-dist2) is the phase difference of the despreading phase with a second number of symbols, fs is the sampling rate, Ln is the length of the spreading code of the despread signal, and dist2 is the second number.

[0122] The phase variation can be converted into a frequency offset value through a numerically controlled oscillator. The calculated frequency offset value is the original frequency offset in the first start-up stage, and the frequency offset value calculated in subsequent stages is the residual frequency offset. The original frequency offset and the residual frequency offset share the initial phase calculation module, the phase unwinding module, and the frequency offset value calculation module.

[0123] S05, based on the frequency offset value, performs a three-stage loop filter on the despread signal to obtain the correction signal.

[0124] Please see Figure 7 This is a simulation diagram of frequency offset values ​​measured at different stages according to an embodiment of this application. The following will refer to... Figure 7 The three-stage loop filtering is explained in detail.

[0125] The first stage of filtering is IIR filtering of the initial frequency, and the original frequency is calculated directly before the 49th symbol.

[0126] The second stage of filtering is a transition stage, which maintains the frequency offset value. This stage lasts for 40 to 77 symbols, maintaining the current frequency offset value and waiting for subsequent signals to complete the frequency offset correction.

[0127] The third stage of filtering is IIR filtering of the residual frequency offset. This stage is after symbol 77. The subsequent frequency offset is within 100Hz. After correcting the two isolated phases, the residual frequency offset is calculated, so that the measured frequency offset is closer to the set frequency offset. In practice, it is closer to the frequency offset of the original signal, so that the frequency offset measurement is more stable.

[0128] S06, based on the frequency offset value, performs frequency offset correction on the correction signal until the phase-locked loop enters the locked state.

[0129] Replace the first quantity with the third quantity, replace the second quantity with the fourth quantity, the third quantity is greater than the first quantity and greater than half of the maximum number of symbols, and the fourth quantity is greater than the second quantity and greater than the maximum number of symbols.

[0130] After calculation and correction in the startup state, the system enters the stable tracking state. In order to meet the requirements of system noise and interference resistance, the number of isolated symbols can exceed the limit of the maximum number of symbols. Therefore, the first number and the second number can be replaced so that the phase deviation calculation can resist more noise.

[0131] The following are device embodiments of this application, which can be used to execute the method embodiments of this application. For details not disclosed in the device embodiments of this application, please refer to the method embodiments of this application.

[0132] Please see Figure 8 This illustration shows a schematic diagram of a communication frequency rapid acquisition and locking device for a highly maneuverable and dynamic system provided in an exemplary embodiment of this application. The device can be implemented as all or part of a whole through software, hardware, or a combination of both. The device includes an initial phase calculation module 10, an interval number determination module 20, a phase unwinding module 30, a frequency offset value calculation module 40, a filtering module 50, and a frequency offset correction module.

[0133] The initial phase calculation module 10 is used to calculate the phase of the despread signal to obtain the initial phase of the despread signal; the interval number determination module 20 is used to determine the first number for unwinding and the second number for calculating the frequency offset value based on the maximum number of symbols in the despread signal.

[0134] The phase dewinding module 30 is used to dewind the initial phase of the despread signal by isolating a first number of symbols if the number of symbols in the received despread signal is greater than a first number, thereby obtaining the dewinding phase.

[0135] The frequency offset calculation module 40 is used to calculate the frequency offset value of the despread signal based on the dewinding phase and by isolating a second number of symbols if the number of symbols received in the despread signal is greater than the sum of the first number and the second number.

[0136] The filtering module 50 is used to perform three-stage loop filtering on the despread signal based on the frequency offset value to obtain the correction signal;

[0137] The frequency offset correction module 60 is used to correct the frequency offset of the correction signal based on the frequency offset value until the phase-locked loop enters the locked state.

[0138] It should be noted that the above embodiments of the apparatus are only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0139] This application also provides a computer storage medium that can store multiple instructions, which are adapted to be loaded and executed by a processor as described above. Figures 1-8 The method for rapid acquisition and locking of communication frequencies in a highly maneuverable and dynamic system as illustrated in the embodiment can be referred to in detail for its execution process. Figures 1-8 The specific details of the illustrated embodiments will not be elaborated here.

[0140] This application also discloses an electronic device. (See reference...) Figure 9 , Figure 9 This is a schematic diagram of the structure of an electronic device disclosed in an embodiment of this application. The electronic device 900 may include: at least one processor 901, at least one network interface 904, a user interface 903, a memory 905, and at least one communication bus 902.

[0141] The communication bus 902 is used to enable communication between these components.

[0142] The user interface 903 may include a display screen and a camera. Optionally, the user interface 903 may also include a standard wired interface and a wireless interface.

[0143] The network interface 904 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0144] The processor 901 may include one or more processing cores. The processor 901 connects to various parts of the server using various interfaces and lines, and performs various server functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 905, and by calling data stored in the memory 905. Optionally, the processor 901 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 901 may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content to be displayed on the screen; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 901 and may be implemented as a separate chip.

[0145] The memory 905 may include random access memory (RAM) or read-only memory. Optionally, the memory 905 may include a non-transitory computer-readable storage medium. The memory 905 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 905 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the above-described method embodiments, etc.; the data storage area may store data involved in the above-described method embodiments, etc. Optionally, the memory 905 may also be at least one storage device located remotely from the aforementioned processor 901. (Refer to...) Figure 9 The memory 905, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program for a method of rapidly acquiring and locking communication frequencies for a highly mobile and dynamic system.

[0146] exist Figure 9In the illustrated electronic device 900, the user interface 903 is mainly used to provide an input interface for the user and acquire user input data; while the processor 901 can be used to call an application program stored in the memory 905 for a method of fast acquisition and locking of communication frequencies for a highly maneuverable and dynamic system. When executed by one or more processors 901, the electronic device 900 performs one or more methods as described in the above embodiments. It should be noted that, for the foregoing method embodiments, for the sake of simplicity, they are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0147] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0148] In the various embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between apparatuses or units may be electrical or other forms.

[0149] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0150] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0151] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, portable hard drives, magnetic disks, or optical disks.

[0152] The above are merely exemplary embodiments of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Other embodiments of this disclosure will readily conceive of those skilled in the art upon consideration of the specification and the disclosure of practical truths.

[0153] This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described in this disclosure. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

Claims

1. A method for fast acquisition and locking of communication frequency for high maneuvering large dynamic systems, characterized by, The method is applied to a phase-locked loop, and the method comprises: phase calculation on a despread signal to obtain an initial phase of the despread signal; determination of a first number for unwinding and a second number for calculating a frequency offset value based on a maximum symbol number of the despread signal; if a symbol number of a received despread signal is greater than the first number, unwinding of the initial phase of the despread signal by the first number of symbols to obtain an unwound phase; if the symbol number of the received despread signal is greater than a sum of the first number and the second number, calculation of the frequency offset value of the despread signal based on the unwound phase by the second number of symbols; three-stage loop filtering of the despread signal based on the frequency offset value to obtain a corrected signal; frequency offset correction of the corrected signal based on the frequency offset value until the phase-locked loop enters a locked state.

2. The method of claim 1, wherein, The phase calculation on the despread signal to obtain a phase difference value of the despread signal comprises: integration of chip-level original despread signal sampling points of a spread spectrum code length to obtain a symbol-level despread signal; phase calculation on the symbol-level despread signal by using a phase angle calculation formula to obtain an initial phase of the despread signal; the phase angle calculation formula is: Thetap(n) = angle(sum_p(n)); wherein Thetap(n) is the initial phase of the nth symbol of the despread signal, angle is a phase angle operator, and sum_p(n) is the nth symbol of the despread signal.

3. The method of claim 1, wherein, The method further comprises: calculation of a unit phase offset value of the despread signal by using a unit phase offset formula; calculation of a maximum symbol number of the despread signal by using an integer formula based on a maximum phase offset of the despread signal and the unit phase offset value; determination of a positive integer less than half of the maximum symbol number as the first number and determination of a positive integer less than the maximum symbol number as the second number.

4. The method according to claim 3, wherein the unit phase offset formula is: Pha = (2π*∆f*Ln) / fs; wherein Pha is the unit phase offset value, ∆f is a maximum frequency offset of the despread signal, Ln is a spread spectrum code length of the despread signal, and fs is a chip sampling rate; the integer formula is: Maxsymb = Floor(π / pha); wherein Maxsymb is the maximum symbol number, Floor is a down-rounding operator, and Pha is the unit phase offset value.

5. The method of claim 1, wherein, The unwinding of the initial phase of the despread signal by the first number of symbols to obtain the unwound phase comprises: obtaining a first initial phase and a second initial phase of the despread signal isolated by the first number of symbols, the first initial phase being an initial phase corresponding to a symbol of the despread signal subjected to subsequent phase calculation; obtaining an initial phase difference value by subtracting the second initial phase from the first initial phase; obtaining a return value by calling a round function to calculate a ratio of the initial phase difference value to π; and Subtracting a product of the return value and π from the first initial phase, a unwinding phase corresponding to the first initial phase is obtained.

6. The method of claim 1, wherein, The isolating the second number of symbols based on the unwinding phase comprises: The isolating the second number of symbols based on the unwinding phase comprises using a frequency offset conversion formula to calculate a frequency offset value of the despread signal. The frequency offset conversion formula is: foe=(Thetap(n)-Thetap(n-dist2))*(fs / (2*π*Ln*dist2)); Wherein, foe is a frequency offset value, Thetap(n)-Thetap(n-dist2) is a phase difference value of unwinding phases of the second number of symbols, fs is a sampling rate, Ln is a spread code length of the despread signal, and dist2 is the second number.

7. The method of claim 1, wherein, After the frequency offset correction on the correction signal based on the frequency offset value, the method further comprises: The first number is replaced by a third number, and the second number is replaced by a fourth number, the third number is greater than the first number and greater than half of the maximum symbol number, and the fourth number is greater than the second number and greater than the maximum symbol number.

8. A high-mobility large-dynamic system communication frequency fast acquisition and locking device, characterized in that, The device comprises a phase-locked loop, wherein: An initial phase calculation module (10) is configured to calculate a phase of a despread signal to obtain an initial phase of the despread signal. A number of intervals determination module (20) is configured to determine a first number of symbols for unwinding and a second number of symbols for calculating a frequency offset value based on a maximum symbol number of the despread signal. An unwinding phase calculation module (30) is configured to, if a symbol number of the received despread signal is greater than the first number, isolate the first number of symbols to perform unwinding on the initial phase of the despread signal to obtain an unwinding phase. A frequency offset value calculation module (40) is configured to, if the symbol number of the received despread signal is greater than a sum of the first number and the second number, isolate the second number of symbols to calculate a frequency offset value of the despread signal based on the unwinding phase. A filtering module (50) is configured to perform three-stage loop filtering on the despread signal based on the frequency offset value to obtain a correction signal. A frequency offset correction module (60) is configured to perform frequency offset correction on the correction signal based on the frequency offset value until the phase-locked loop enters a locked state.

9. A computer storage medium, characterized in that The computer storage medium stores a plurality of instructions, and the instructions are suitable for being loaded and executed by a processor to perform the method of any one of claims 1-7.

10. An electronic device, comprising: The electronic device comprises a processor, a memory, and a transceiver, the memory is configured to store instructions, the transceiver is configured to communicate with other devices, and the processor is configured to execute the instructions stored in the memory to enable the electronic device to perform the method of any one of claims 1-7.

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