Methods, apparatus, computer equipment and readable media for preventing micro-loops in message transmission
By using anti-micro-loop timers and link segment identifiers in SRv6 networks, the problem of high complexity in micro-loop detection in SRv6 networks is solved, achieving effective micro-loop avoidance and route convergence, and simplifying network deployment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SINO TELECOM TECHNOLOGY CO INC
- Filing Date
- 2023-06-06
- Publication Date
- 2026-06-30
AI Technical Summary
Existing SRv6 micro-loop prevention methods are highly complex in determining fault scenarios and calculating Segment List paths, increasing the difficulty of network deployment and failing to effectively prevent the occurrence of micro-loops.
When an intermediate node detects a link failure or recovery, it starts an anti-micro-loop timer, inserts a link segment identifier to indicate the forwarding path, and sends the target forwarding path after route convergence after the timer expires, thus avoiding the occurrence of micro-loops.
It effectively avoids the tangent and back-cut micro-loop problems of nodes, ensures that each forwarding node completes route convergence before the timer expires, and simplifies the network deployment process.
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Figure CN116647440B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer network technology, and in particular to a message transmission method, apparatus, computer equipment, and readable medium that prevents micro-loops. Background Technology
[0002] SRv6 (Segment Routing over IPv6), or SR (Segment Routing) + IPv6, is a next-generation IP bearer protocol. It utilizes existing IPv6 forwarding technology and achieves network programmability through flexible IPv6 extension headers. SRv6 directly uses IPv6 addresses as forwarding identifiers in the data plane, inheriting all the advantages of SR and possessing a near-infinite identifier space and compatibility with traditional IPv6 forwarding, enabling reachability from any node. Inconsistent synchronization timing of the link-state database in IGP protocols can lead to loops during out-of-order convergence. These loops disappear after all devices have converged; these transient loops are called micro-loops. Micro-loops can cause network packet loss, latency jitter, and out-of-order packet issues. SRv6 employs a minimally impactful method to eliminate potential loops in the network. Its main idea is that if a network topology change may cause a loop, the network node can create a loop-free SRv6 Segment List to guide traffic forwarding to the destination address, and then fall back to the normal forwarding state after all network nodes have completed convergence, thereby effectively eliminating loops in the network.
[0003] Current methods for preventing micro-loops typically require the use of Topology-Independent Loop-free Alternate (Ti-LFA) functionality. This involves generating different SRv6 segment list paths by differentiating between local tangent micro-loops, remote tangent micro-loops, local backtracking micro-loops, and remote backtracking micro-loops. Nodes need to choose different methods to generate segment list paths to guide forwarding under different micro-loop prevention scenarios. For a given fault, different nodes are in different scenarios. This increases the difficulty for nodes to determine the fault scenario and also increases the complexity of calculating segment list paths, which is detrimental to overall network deployment. Summary of the Invention
[0004] One objective of this application is to provide a message transmission method, apparatus, computer device, and readable medium for preventing microloops in SRv6 networks, aiming to provide an effective solution to path microloop defects that occur during main path failure and recovery.
[0005] To achieve the above objectives, some embodiments of this application provide a method for preventing micro-loops in message transmission. The method is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes forming multiple forwarding paths from the source node to the destination node. The method includes: when an intermediate node detects a link failure or restoration of a first forwarding path, performing the following operations: starting a micro-loop prevention timer on the intermediate node and beginning to set the timer; inserting a link segment identifier for identifying the micro-loop prevention path into the message destined for the destination node, the link segment identifier instructing each intermediate node to forward the message along a second forwarding path to the destination node; after the micro-loop prevention timer expires, issuing the target forwarding path after route convergence; and forwarding the message to the destination node according to the target forwarding path.
[0006] Furthermore, the method may also include: setting a configurable and timed anti-micro-loop timer for each intermediate node; the anti-micro-loop timer is set to start when the intermediate node detects a link failure or link recovery; each intermediate node completes route convergence within the time set by its respective anti-micro-loop timer; the anti-micro-loop timer includes: a tangent anti-micro-loop timer and a backswing anti-micro-loop timer.
[0007] Furthermore, the method may further include: when the intermediate node detects a link failure in the first forwarding path, it switches traffic from the failed link to a backup link based on the fast rerouting function; wherein, the second forwarding path is a backup path switched when the link failure in the first forwarding path occurs, and the backup link is included in the second forwarding path.
[0008] Further, the step of inserting a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node includes: when the intermediate node detects a link failure in the first forwarding path, it starts its own tangent anti-micro-loop timer; within the first duration of its respective anti-micro-loop timer, the intermediate node confirms whether route convergence to the destination node has been completed; if route convergence to the destination node has not been completed, the intermediate node inserts the link segment identifier; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the backup second forwarding path; if route convergence to the destination node has been completed, the intermediate node cancels the insertion of the link segment identifier, directly looks up the routing address of the destination node, forwards the packet to the next-hop intermediate node, and completes the packet forwarding based on the routing address of the destination node.
[0009] Further, the step of inserting a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node includes: when the intermediate node detects that the link of the first forwarding path has been restored, it starts its own back-off anti-micro-loop timer; within the second timing duration of its respective back-off anti-micro-loop timer, the intermediate node inserts a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the current second forwarding path; wherein, the second forwarding path is a backup path switched when the link of the first forwarding path fails.
[0010] Furthermore, after the anti-micro-loop timer expires, the target forwarding path after route convergence is sent out as follows: whenever the tangent anti-micro-loop timer of an intermediate node exceeds the first timing duration, the intermediate node cancels the insertion of the link segment identifier and sends out the second forwarding path after route convergence.
[0011] Furthermore, after the anti-micro-loop timer expires, the target forwarding path after route convergence is sent out as follows: whenever the anti-micro-loop timer of an intermediate node exceeds the second timing duration, the intermediate node cancels the insertion of the link segment identifier and sends out the first forwarding path after route convergence.
[0012] Some embodiments of this application also provide a message sending device to prevent micro-loops. The device is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node. The device includes:
[0013] The timing unit is used to start the anti-micro-loop timer on the intermediate node and begin setting the timing when the intermediate node detects a link failure or restoration of the first forwarding path.
[0014] The setting unit is used to insert a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node when the intermediate node detects a link failure or restoration of the first forwarding path. The link segment identifier is used to instruct each intermediate node to forward the packet to the destination node along the second forwarding path.
[0015] The sending unit is used to send the target forwarding path after route convergence after the anti-micro-loop timer expires;
[0016] The forwarding unit is used to forward packets to the destination node according to the target forwarding path.
[0017] Some embodiments of this application also provide a computer device applied to a communication network, the communication network including a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node, the computer device including: a communication interface, a processor, a memory, and a bus, the communication interface, the processor, and the memory being interconnected via the bus;
[0018] The memory is a memory that stores computer program instructions, which, when executed, cause the processor to perform the methods described above.
[0019] Some embodiments of this application also provide a computer-readable medium having computer program instructions stored thereon, which can be executed by a processor to implement the methods described above.
[0020] Compared to existing technologies, the solution provided in this application provides an effective solution to path micro-loop defects that occur during primary path failure and recovery. When an intermediate node detects a link failure or recovery of the first forwarding path, it starts an anti-micro-loop timer on the intermediate node and begins setting the timer. A link segment identifier is inserted into the packets destined for the destination node to identify the anti-micro-loop path. This link segment identifier instructs each intermediate node to forward the packets along the second forwarding path to the destination node. After the anti-micro-loop timer expires, the converged target forwarding path is then issued. The packets are forwarded to the destination node according to the target forwarding path. This provides an effective solution to primary path failures and path micro-loop defects during recovery. In this application, the first forwarding path is the primary path, and the second forwarding path is the backup path. For tangent scenarios (i.e., a link failure in the first forwarding path), packets are forwarded along the backup path (such as the second forwarding path). After the anti-micro-loop timer expires, the converged path (such as the second forwarding path) is switched. In the case of a back-off scenario (i.e., the first forwarding path link is restored), the packet is forwarded along the path before the fault recovery (the path before the fault recovery is the second forwarding path) through the anti-micro-loop path. After the anti-micro-loop timer expires, the converged path is switched (at this time, the main path is restored, and the packet can be switched to the main path, which is the first forwarding path).
[0021] The above-mentioned technical solution of this application can effectively avoid the tangent / backward micro-loop problem of nodes. At the same time, the solution can also effectively avoid the occurrence of micro-loops when the convergence time of each forwarding node is relatively independent. However, it is necessary to ensure that each forwarding node can complete route convergence before its anti-micro-loop timer expires. Attached Figure Description
[0022] Figure 1 A flowchart illustrating the message transmission method for preventing micro-rings provided in this application embodiment;
[0023] Figure 2This is a flowchart illustrating the message sending method for preventing micro-rings in a tangential micro-ring scenario provided in an embodiment of this application.
[0024] Figure 3 This is a flowchart illustrating the message sending method for preventing micro-loops in a micro-loop scenario provided in this application embodiment;
[0025] Figures 4 to 7 This is a flowchart illustrating the message sending method for preventing micro-loops under different routing convergence conditions at each intermediate node in the specific embodiments provided in this application.
[0026] Figure 8 A schematic diagram of the structure of the anti-micro-ring message sending device provided in the embodiments of this application;
[0027] Figure 9 A schematic diagram of the structure of a computer device provided in an embodiment of this application. Detailed Implementation
[0028] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0029] To facilitate understanding of the technical solutions provided in the embodiments of this application, some technical terms are explained as follows:
[0030] There are three types of node roles in an SRv6 network: SRv6 source node, relay node, and SRv6 segment endpoint node.
[0031] An SRv6 source node is the node that generates SRv6 packets. The source node directs packets into the SRv6 segment list. If the SRv6 segment list contains only a single SID and no additional information needs to be added to the SRv6 packet, the destination address field of the SRv6 packet is set to that SID, and an SRH (Segment Routing Extension) header may not be required. The source node can be a host that generates IPv6 packets and supports SRv6, or an edge device in an SRv6 domain.
[0032] A relay node (SRv6 Source Node) is an IPv6 node on the SRv6 packet forwarding path that does not participate in SRv6 processing; that is, it only performs ordinary IPv6 packet forwarding. When a node receives an SRv6 packet, it parses the IPv6 destination field of the packet. If the IPv6 destination address is neither the locally configured SRv6 SID nor the local interface address, the node treats the SRv6 packet as a normal IPv6 packet and processes and forwards it by searching the IPv6 forwarding table according to the longest match principle.
[0033] An SRv6 segment endpoint node is a node that receives packets with a locally configured SID as the IPv6 destination address during SRv6 packet forwarding. Therefore, the endpoint node needs to handle both the SRv6 SID and SRH.
[0034] The intermediate nodes mentioned in this application can be SRv6 segment endpoint nodes or relay nodes, and the destination nodes mentioned in this application can be Endpoint nodes, depending on the specific network structure. Generally, a packet is forwarded from host 1 to host 2. Host 1 sends the packet to the source node for processing. The packet is delivered to the Endpoint node through multiple links, each link including the Endpoint node, or the Endpoint node plus a relay node; and then it is delivered to host 2 through the Endpoint node.
[0035] like Figure 1 As shown, some embodiments of this application provide a message transmission method to prevent micro-loops. The method is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths from the source node to the destination node. The method includes: when an intermediate node detects a link failure in a first forwarding path or a link recovery in the first forwarding path, performing the following operations:
[0036] Step S101: Start the anti-micro-loop timer on the intermediate node and begin setting the timer;
[0037] Step S102: Insert the link segment identifier End.X SID (i.e., SRv6 repair-list) to the packet destined for the destination node to identify the anti-micro-loop path. The link segment identifier End.X SID is used to instruct each intermediate node to forward the packet to the destination node along the second forwarding path. At this time, the packet is encapsulated with an SRH header at the intermediate node, the packet destination address and SL are modified, a route forwarding path is found and forwarded to the subsequent intermediate node. The subsequent intermediate node matches the corresponding End.X, decapsulates, sets SL=0, removes the SRH header, and forwards the source packet to the destination node. If the intermediate node has completed the route convergence for the destination address at this time, it directly finds the route for the destination address and forwards the packet to the next hop node. In this case, the SRv6 RepairList is not inserted again, but forwarding is directly based on the destination address.
[0038] Step S103: After the anti-micro-loop timer expires, send the target forwarding path after route convergence;
[0039] Step S104: Forward the packet to the destination node according to the target forwarding path.
[0040] Furthermore, the method may also include: setting a configurable and timed anti-micro-loop timer for each intermediate node; the anti-micro-loop timer is set to start when the intermediate node detects a link failure or link recovery; each intermediate node completes route convergence within the time set by its respective anti-micro-loop timer; the anti-micro-loop timer includes: a tangent anti-micro-loop timer and a backswing anti-micro-loop timer.
[0041] Furthermore, the method may further include: when the intermediate node detects a link failure in the first forwarding path, it switches traffic from the failed link to a backup link based on the fast rerouting function; wherein, the second forwarding path is a backup path switched when the link failure in the first forwarding path occurs, and the backup link is included in the second forwarding path.
[0042] Further, the step of inserting a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node includes: when the intermediate node detects a link failure in the first forwarding path, it starts its own tangent anti-micro-loop timer; within the first duration of its respective anti-micro-loop timer, the intermediate node confirms whether route convergence to the destination node has been completed; if route convergence to the destination node has not been completed, the intermediate node inserts the link segment identifier; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the backup second forwarding path; if route convergence to the destination node has been completed, the intermediate node cancels the insertion of the link segment identifier, directly looks up the routing address of the destination node, forwards the packet to the next-hop intermediate node, and completes the packet forwarding based on the routing address of the destination node.
[0043] Further, the step of inserting a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node includes: when the intermediate node detects that the link of the first forwarding path has been restored, it starts its own back-off anti-micro-loop timer; within the second timing duration of its respective back-off anti-micro-loop timer, the intermediate node inserts a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the current second forwarding path; wherein, the second forwarding path is a backup path switched when the link of the first forwarding path fails.
[0044] Furthermore, after the anti-micro-loop timer expires, the target forwarding path after route convergence is sent out as follows: whenever all the tangent anti-micro-loop timers of an intermediate node exceed the first timing duration, the intermediate node cancels the insertion of the link segment identifier and sends out the second forwarding path after route convergence.
[0045] Furthermore, after the anti-micro-loop timer expires, the target forwarding path after route convergence is sent out as follows: whenever the anti-micro-loop timer of an intermediate node exceeds the second timing duration, the intermediate node cancels the insertion of the link segment identifier and sends out the first forwarding path after route convergence.
[0046] The solution presented in this application can prevent both tangential and eccentric micro-loops, eliminating the distinction between local and remote scenarios. To facilitate a better understanding of the technical solution, a specific scenario will be used as an example below. The detailed solution is as follows:
[0047] like Figure 2 As shown, in the tangential micro-ring scenario:
[0048] Under normal circumstances, source node R0 forwards packets destined for destination node R4 via the path R0→R1→R5→R3→R4 (the first forwarding path). When the link between R5 and R3 fails, node R5 detects the failure and enters the TI-LFA FRR (fast-reroute) process to quickly switch traffic to the backup link. At this time, R5 inserts the R2→R4 End.X SID (End.X SID: it represents an adjacency in the network, and it instructs the device to process SRH, update the IPv6 destination address field, and then forward the packet from the outgoing interface specified by End.X SID, which is the link segment identifier used in this application to identify the anti-micro-loop path) into the packet, i.e., the SRv6 repair list. The packet query route is forwarded to node R2 via R5→R1→R2. Node R2 matches the corresponding End.X and forwards the packet to R4 (the second forwarding path). If node R5 completes route convergence to destination address R4 first, it directly looks up the route to node R4 and forwards the packet to the next-hop node R1. At this time, it does not insert the SRv6Repair List, but forwards the packet directly along the path ⑥ based on the destination address. If R1 has not completed route convergence to destination address R4 at this time, it still forwards the packet along the path ② before the failure, thus creating a micro-loop between R1 and R5.
[0049] For node R5, this fault is a local fault; for nodes R1 and R2, it is a remote fault. When R1 detects a link failure between R5 and R3, it starts an anti-micro-loop timer. Simultaneously, R1 distributes an anti-micro-loop path for traffic destined for R4, inserting the R2→R4 End.X SID (SRv6 repair-list). This causes packets to have an SRH (extension header) inserted on R1 and be forwarded to R2 according to the route. R2 then matches the corresponding End.X and forwards the packet to R4. Similarly, when R2 detects a link failure between R5 and R3, it distributes an anti-micro-loop path in the same way, matching the End.X SID and forwarding the packet to R4.
[0050] The same action applies to R1, R5, and R2: when a fault is detected, the R2→R4 End.X SID of the anti-micro-loop path is inserted into packets destined for node R4, instructing the packets to be forwarded to destination R4. After the anti-micro-loop timer on the three nodes expires, the route convergence path is distributed, and the SRv6 Repair List is no longer inserted; packets are forwarded to node R4 based on their destination.
[0051] like Figure 3 As shown, in the scenario of back-cutting micro-loop:
[0052] Normally, when the link between R5 and R3 fails and breaks, node R0 forwards packets destined for R4 via the path R0→R1→R2→R4 (the second forwarding path). When the link recovers, the forwarding path becomes R0→R1→R5→R3→R4 (the first forwarding path). However, during the recovery process, due to the different convergence times of nodes such as R1, R2, and R5, a backtracking micro-loop may occur. When R2 converges faster than R1, R1 still forwards the packet to R2 according to the path before the link recovery. At this time, the next-hop node of the route from R2 to the destination R4 is R1, so R2 forwards this packet to R1 again, thus forming a loop.
[0053] For this type of micro-loop, a solution is proposed: forward packets according to the path before the fault recovery for a certain period of time, and then forward them according to the new path after the routes of each node converge. The specific process of this method is as follows:
[0054] For node R1, this link failure recovery scenario is a remote backhaul scenario. Before the link failure was recovered, the path to the destination R4 was R1→R2→R4. After R1 detects the link failure recovery, it starts the backhaul anti-micro-loop timer and temporarily does not send a new path to the destination R4. The packet is inserted with R2→R4 End.XSID (the link segment identifier of the anti-micro-loop path). The packet is forwarded to R2 according to the route. R2 matches the End.X and forwards the packet to R4. After the timer of node R1 expires, the new path after the failure recovery (the first forwarding path) is sent.
[0055] For node R5, this link failure recovery scenario is a local backhaul scenario. Before the link failure was recovered, the path to destination R4 was R5→R1→R2→R4. After R5 detects the link failure recovery, it starts the backhaul anti-micro-loop timer and temporarily does not send a new path to destination R4. At the same time, the packet is inserted with the SID R2→R4End.X. The packet is routed and forwarded to R2. R2 matches End.X and forwards the packet to R4. After the timer of node R5 expires, the new path after the failure recovery is sent.
[0056] For node R2, this link failure recovery scenario is a remote backhaul scenario. Before the link failure is recovered, the path to the destination R4 is R2→R4. After R1 detects the link failure recovery, it starts the backhaul anti-micro-loop timer and temporarily does not send a new path to the destination R4. The packet is inserted into the R2→R4 End.X SID. At this time, R2 matches the End.X and forwards the packet to R4. After the timer of node R2 expires, the new path after the failure recovery is sent. Specific Implementation Example 1:
[0058] like Figure 4As shown, node R0 forwards the packet with destination address 2000:0:0:4::1 via the path R0→R1→R5→R3→R4, and the packet header and content remain unchanged throughout the forwarding path.
[0059] like Figure 5 As shown, when the link between R5 and R3 fails, node R5 detects the fault, starts the anti-micro-loop timer, and enters the TI-LFA FRR process to quickly switch traffic to the backup link. At this time, R5 will insert R2→R4 End.XSID 2000:0:0:2::4 into the packet. The packet is then encapsulated with an SRH header on node R5, the Rv6 Segment List (Segment List is in IPv6 address form) is <2000:0:0:4::1,2000:0:0:2::4>, SL=1, the packet destination address is modified to 2000:0:0:2::4, the route is looked up and forwarded through the R5→R1→R2 path to node R2. Node R2 matches the corresponding End.X, decapsulates, SL=0, removes the SRH header, and forwards the source packet to R4.
[0060] When node R5 completes route convergence to destination address R4 first, it directly looks up the route to node R4 and forwards the packet to the next hop node R1. At this time, R5 no longer inserts R2→R4 End.X SID 2000:0:0:2::4.
[0061] like Figure 6 As shown, if R1 has not yet completed route convergence for destination address R4, R1 will insert R2→R4 End.X SID 2000:0:0:2::4 into the packet. The packet will then be encapsulated with an SRH header on node R1, with SRv6 SegmentList set to <2000:0:0:4::1,2000:0:0:2::4> and SL=1. The destination address will be modified to 2000:0:0:2::4. A route will be found and forwarded through the R1→R2 path to node R2. Node R2 will match the corresponding End.X, decapsulate the packet, set SL=0, remove the SRH header, and forward the source packet to R4. If R1 has completed route convergence for destination address R4, it will directly look up the route for node R4 and forward the packet to the next-hop node R2.
[0062] like Figure 7As shown, if R2 has not yet completed route convergence for destination address R4, R2 will insert R2→R4 End.X SID 2000:0:0:2::4 into the packet. At this point, the packet will be encapsulated with an SRH header on node R2, with SRv6 SegmentList set to <2000:0:0:4::1,2000:0:0:2::4>, SL=1. The destination address will be modified to 2000:0:0:2::4. A route will be searched to match its corresponding End.X, the packet will be decapsulated, SL=0, the SRH header will be removed, and the source packet will be forwarded to R4. If R2 has completed route convergence for destination address R4, it will directly search for the route to node R4 and forward the packet to the next-hop node R4.
[0063] The above steps effectively avoid the tangent micro-loop problem at nodes. This method also ensures that micro-loops are avoided even when the convergence times of R1, R5, and R2 are relatively independent. However, it is crucial to guarantee that all three nodes can complete route convergence before their respective anti-micro-loop timers expire. Specific Implementation Example 2:
[0065] When the faulty link between R5 and R3 is broken, node R0 will forward the packet with destination address 2000:0:0:4::1 through the path R0→R1→R2→R4. The packet header and content remain unchanged throughout the forwarding path.
[0066] When the faulty link is restored, the forwarding path becomes R0→R1→R5→R3→R4. However, during the restoration process, due to the different route convergence times of nodes such as R1, R2, and R5, a back-switch micro-loop may occur.
[0067] like Figure 6 As shown, for node R1, before the link failure is recovered, the path to destination R4 is R1→R2→R4. After R1 detects the link failure and recovers, it starts a back-off anti-micro-loop timer. During this period, no new path is sent to destination R4. At the same time, the packet is encapsulated with an SRH header on node R1, the SRv6Segment List is <2000:0:0:4::1,2000:0:0:2::4>, SL=1, the destination address of the packet is modified to 2000:0:0:2::4, the route is looked up and forwarded through the R1→R2 path to node R2. Node R2 matches the corresponding End.X, decapsulates, SL=0, removes the SRH header, and forwards the source packet to R4.
[0068] like Figure 5As shown, for node R5, before the link failure is recovered, the path to destination R4 is R5→R1→R2→R4. After R5 detects the link failure and recovers, it starts a back-off anti-micro-loop timer. During this period, it does not send a new path to destination R4. At the same time, R5 inserts R2→R4End.X SID 2000:0:0:2::4 into the packet. At this time, the packet is encapsulated with an SRH header on node R5, the SRv6 Segment List is <2000:0:0:2::4>, SL=1, the destination address of the packet is modified to 2000:0:0:2::4, the route is looked up and forwarded through the R5→R1→R2 path to node R2. Node R2 matches the corresponding End.X, decapsulates, SL=0, removes the SRH header, and forwards the source packet to R4.
[0069] like Figure 7 As shown, for node R2, before the link failure is recovered, the path to destination R4 is R2→R4. After R2 detects the link failure and recovers, it starts a back-off anti-micro-loop timer. During this period, no new path is sent to destination R4. At this time, R2 will insert R2→R4 End.X SID 2000:0:0:2::4 into the packet. At this time, the packet is encapsulated with an SRH header on node R2, the SRv6Segment List is <2000:0:0:2::4>, SL=1, the destination address of the packet is modified to 2000:0:0:2::4, the route is searched and forwarded to match the corresponding End.X of R2 itself, the encapsulation is decapsulated, SL=0, the SRH header is removed, and the source packet is forwarded to R4.
[0070] The above steps effectively avoid the node back-cutting micro-loop problem. This method also ensures that micro-loops are avoided even when the convergence times of R1, R5, and R2 are relatively independent. However, it is crucial to guarantee that all three nodes complete route convergence before their respective anti-micro-loop timers expire.
[0071] like Figure 8 As shown, this application embodiment also provides a message sending device to prevent micro-loops. The device is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node. The device includes:
[0072] The timing unit is used to start the anti-micro-loop timer on the intermediate node and begin setting the timing when the intermediate node detects a link failure or restoration of the first forwarding path.
[0073] The setting unit is used to insert a link segment identifier for identifying the anti-micro-loop path into the packet to the destination node when the intermediate node detects a link failure or restoration of the first forwarding path. The link segment identifier is used to instruct each intermediate node to forward the packet to the destination node along the second forwarding path.
[0074] The sending unit is used to send the target forwarding path after route convergence after the anti-micro-loop timer expires;
[0075] The forwarding unit is used to forward packets to the destination node according to the target forwarding path.
[0076] Specific limitations regarding the message transmission device for preventing micro-loops can be found in the limitations on the message transmission method for preventing micro-loops mentioned above, and will not be repeated here. Each module / unit in the aforementioned message transmission device for preventing micro-loops can be implemented entirely or partially through software, hardware, or a combination thereof. Each module / unit can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.
[0077] In one embodiment, this application provides a computer device applied to a communication network, the communication network including a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node, the computer device including: a communication interface, a processor, a memory, and a bus, the communication interface, the processor, and the memory being interconnected via the bus;
[0078] The memory stores computer program instructions, which, when executed, cause the processor to perform a message sending method to prevent micro-loops.
[0079] The computer equipment provided in this application embodiment can be a server, a client, or other computer network communication equipment; such as Figure 9 The diagram shown is a structural schematic of a computer device provided in an embodiment of this application.
[0080] The system includes a processor 901, a memory 902, a bus 905, and an interface 904. The processor 901 is connected to the memory 902 and the interface 904. The bus 905 connects the processor 901, the memory 902, and the interface 904. The interface 904 is used to receive or send data. The processor 901 is a single-core or multi-core central processing unit, a specific integrated circuit, or one or more integrated circuits configured to implement embodiments of the present invention. The memory 902 can be random access memory (RAM) or non-volatile memory, such as at least one hard disk drive. The memory 902 is used to store computer-executable instructions. Specifically, the computer-executable instructions may include a program 903.
[0081] In this embodiment, when the processor 901 calls program 903, it can enable... Figure 9 The management server in the system performs the operation of sending messages to prevent micro-rings, which will not be described in detail here.
[0082] It should be understood that the processor provided in the above embodiments of this application may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.
[0083] It should also be understood that the number of processors in the computer device in the above embodiments of this application can be one or more, and can be adjusted according to the actual application scenario. This is merely an illustrative example and is not intended to limit the scope. The number of memory in the embodiments of this application can be one or more, and can be adjusted according to the actual application scenario. This is merely an illustrative example and is not intended to limit the scope.
[0084] It should also be noted that when a computer device includes a processor (or processing unit) and a memory, the processor in this application may be integrated with the memory, or the processor and the memory may be connected through an interface. This can be adjusted according to the actual application scenario and is not limited.
[0085] This application provides a chip system including a processor for supporting a computer device (client or server) in implementing the functions of the controller involved in the above-described methods, such as processing data and / or information involved in the above-described methods. In one possible design, the chip system also includes a memory for storing necessary program instructions and data. This chip system can be composed of chips or may include chips and other discrete devices.
[0086] In another possible design, when the chip system is a chip within user equipment or an access network, the chip includes a processing unit and a communication unit. The processing unit may be, for example, a processor, and the communication unit may be, for example, an input / output interface, pins, or circuits. The processing unit can execute computer-executable instructions stored in the storage unit to cause the chip within the client or management server to perform the steps of a common-sense question-and-answer method. Optionally, the storage unit can be an on-chip storage unit, such as a register or cache, or it can be an external storage unit within the client or management server, such as read-only memory (ROM) or other types of static storage devices capable of storing static information and instructions, such as random access memory (RAM).
[0087] It should be understood that the methods and / or embodiments in this application can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowchart. When the computer program is executed by a processing unit, the functions defined in the methods of this application are performed.
[0088] It should be understood that the controller or processor mentioned in the above embodiments of this application may be a central processing unit (CPU), or one or more combinations of other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.
[0089] It should also be understood that the number of processors or controllers in the computer devices or chip systems in the above embodiments of this application may be one or more, and can be adjusted according to the actual application scenario. This is merely an illustrative example and is not intended to limit the scope. Similarly, the number of memories in the embodiments of this application may be one or more, and can be adjusted according to the actual application scenario. This is merely an illustrative example and is not intended to limit the scope.
[0090] It should be noted that the computer-readable medium described in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. Examples of computer-readable media can be electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this application, a computer-readable medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.
[0091] In this application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, capable of transmitting, propagating, or transmitting a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to: wireless, wireline, optical fiber, RF, etc., or any suitable combination thereof.
[0092] Computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, and C++, and conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0093] The flowcharts or block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of devices, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-specific system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.
[0094] In another aspect, embodiments of this application also provide a computer-readable medium, which may be included in the device described in the above embodiments; or it may exist independently and not assembled into the device. The computer-readable medium carries one or more computer-readable instructions, which may be executed by a processor to implement the steps of the methods and / or technical solutions of the various embodiments of this application. The computer may be the aforementioned computer device (client or server or other computer network communication device).
[0095] In a typical configuration of this application, the terminal and the service network devices each include one or more processors (CPUs), input / output interfaces, network interfaces, and memory.
[0096] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0097] Computer-readable media include both permanent and non-permanent, removable and non-removable media, which can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, read-only optical disc (CD-ROM), digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transfer medium that can be used to store information accessible by a computing device.
[0098] Furthermore, this application also provides a computer program stored in a computer device, which causes the computer device to execute the method for executing the control code.
[0099] It should be noted that this application can be implemented in software and / or a combination of software and hardware, for example, using an application-specific integrated circuit (ASIC), a general-purpose computer, or any other similar hardware device. In some embodiments, the software program of this application can be executed by a processor to implement the steps or functions described above. Similarly, the software program of this application (including related data structures) can be stored in a computer-readable recording medium, such as RAM memory, magnetic or optical drives, floppy disks, and similar devices. Furthermore, some steps or functions of this application can be implemented in hardware, for example, as circuitry that cooperates with a processor to perform the various steps or functions.
[0100] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be embraced within this application. No reference numerals in the claims should be construed as limiting the scope of the claims. Furthermore, the terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” used in the embodiments of this application are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the word “comprising” obviously does not exclude other units or steps, and the singular does not exclude the plural. Multiple units or devices recited in the apparatus claims may also be implemented by a single unit or device by software or hardware. The terms “first,” “second,” etc., are used to indicate names and do not indicate any particular order. In the description of this application, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can mean A or B. "And / or" in this application is merely a description of the relationship between the related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. Depending on the context, the words "if" or "if" as used herein can be interpreted as "when," "when," "in response to determination," or "in response to detection." Similarly, depending on the context, the phrase "if determination" or "if detection (of the stated condition or event)" can be interpreted as "when determination," "in response to determination," "when detection (of the stated condition or event)," or "in response to detection (of the stated condition or event)."
[0101] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A message transmission method to prevent micro-loops, characterized in that, The method is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node. The method includes: Each intermediate node is equipped with a settable and timed anti-micro-loop timer; the anti-micro-loop timer includes a tangent anti-micro-loop timer and a back-switch anti-micro-loop timer; the anti-micro-loop timer is set to start when the intermediate node detects a link failure or link recovery. When an intermediate node detects a link failure or restoration in the first forwarding path, it performs the following operations: Start the anti-micro-loop timer on the intermediate node and begin setting the timer; When the intermediate node detects a link failure in the first forwarding path, it switches traffic from the failed link to the backup link based on the fast rerouting function; wherein, the second forwarding path is the backup path switched when the link failure in the first forwarding path occurs, and the backup link is included in the second forwarding path; A link segment identifier, known as End.X SID, is inserted into the message destined for the destination node to identify the anti-micro-loop path. This link segment identifier instructs each intermediate node to forward the message to the destination node along the second forwarding path. Each intermediate node completes route convergence within the time limit set by its respective anti-micro-loop timer; After the anti-micro-loop timer expires, the intermediate node cancels the insertion of the link segment identifier and sends the target forwarding path after route convergence; The packet is forwarded to the destination node according to the target forwarding path.
2. The method according to claim 1, characterized in that, The insertion of a link segment identifier for identifying the anti-micro-loop path into the message to the destination node includes: When the intermediate node detects a link failure in the first forwarding path, it starts its own tangent anti-micro-loop timer. Within the first timing period of their respective tangent anti-micro-loop timers, intermediate nodes confirm whether route convergence to the destination node has been completed; If route convergence to the destination node is not completed, the intermediate node inserts the link segment identifier; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the backup second forwarding path; If route convergence to the destination node has been completed, the intermediate node cancels the insertion of the link segment identifier, directly looks up the routing address of the destination node, forwards the packet to the next hop intermediate node, and completes the packet forwarding based on the routing address of the destination node.
3. The method according to claim 1, characterized in that, The insertion of a link segment identifier for identifying the anti-micro-loop path into the message to the destination node includes: when the intermediate node senses the recovery of the link of the first forwarding path, it starts its own back-switch anti-micro-loop timer; Within the second timing period of their respective anti-micro-loop timers, intermediate nodes insert a link segment identifier to identify the anti-micro-loop path for packets destined for the destination node; the link segment identifier of the anti-micro-loop path instructs each intermediate node to forward the packet to the destination node along the current second forwarding path.
4. The method according to claim 2, characterized in that, After the timer for preventing micro-loops expires, the target forwarding path after route convergence includes: Whenever the tangent anti-micro-loop timer of an intermediate node exceeds the first timing duration, the intermediate node cancels the insertion of the link segment identifier and sends the second forwarding path after route convergence.
5. The method according to claim 3, characterized in that, After the timer for preventing micro-loops expires, the target forwarding path after route convergence includes: Whenever the back-cut anti-micro-loop timer of an intermediate node exceeds the second timing duration, the intermediate node cancels the insertion of the link segment identifier and sends the first forwarding path after route convergence.
6. A message sending device for preventing micro-loops, characterized in that, The device is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes constituting multiple forwarding paths of a message from the source node to the destination node. The device includes: The setting unit is used to set a configurable and timed anti-micro-loop timer for each intermediate node; the anti-micro-loop timer includes a tangent anti-micro-loop timer and a back-switch anti-micro-loop timer; the anti-micro-loop timer is set to start when the intermediate node where it is located senses a link failure or link recovery. The timing unit is used to start the anti-micro-loop timer on the intermediate node and begin setting the timing when the intermediate node detects a link failure or restoration of the first forwarding path. The configuration unit is used to switch traffic from the faulty link to the backup link based on the fast rerouting function when the intermediate node detects a link failure in the first forwarding path; wherein, the second forwarding path is the backup path switched when the link failure in the first forwarding path occurs, and the backup link is included in the second forwarding path; a link segment identifier for identifying the anti-micro-loop path is inserted into the packets to the destination node, the link segment identifier being End.X SID, used to instruct each intermediate node to forward the packets along the second forwarding path to the destination node; wherein, each intermediate node completes route convergence within the timeout period set by its respective anti-micro-loop timer. The issuing unit is used to, after the anti-micro-loop timer expires, cancel the insertion of the link segment identifier by the intermediate node and issue the target forwarding path after route convergence; The forwarding unit is used to forward packets to the destination node according to the target forwarding path.
7. A computer device, characterized in that, The computer device is applied to a communication network, which includes a source node, a destination node, and multiple intermediate nodes that constitute multiple forwarding paths of a message from the source node to the destination node. The computer device includes a communication interface, a processor, a memory, and a bus, and the communication interface, the processor, and the memory are interconnected via the bus. The memory stores computer program instructions that, when executed, cause the processor to perform the method as described in any one of claims 1-5.
8. A computer-readable medium, characterized in that, It stores computer program instructions that can be executed by a processor to implement the method as described in any one of claims 1-5.