Pixel circuit with sign detection function and display panel

Abstract

Embodiments of the present application provide a pixel circuit with a vital sign detection function and a display panel, wherein the pixel circuit is electrically connected with a light sensing unit and a light emitting unit, the pixel circuit comprises a light emitting collecting module, a composite function module and an energy storage transistor, the composite function module comprises a first transistor, a source side of the first transistor is electrically connected with the light emitting unit, and the source side or a drain side of the first transistor is electrically connected with the light sensing unit, the light sensing unit is used for generating a detection electrical signal according to a reflected light signal in a reverse bias state; wherein the composite function module has a signal integrated transmission end, and the signal integrated transmission end is used for outputting the detection electrical signal. According to the technology of the present application, the pixel circuit can simultaneously have the functions of driving a display pixel unit to display and emit light and driving a detection pixel unit to detect vital signs, which is beneficial to improving the display resolution and also reduces the manufacturing cost of the display panel.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel circuit with vital sign detection function and a display panel. Background Technology

[0002] Currently, fingerprint recognition has become a standard feature in mobile phones and other display products. Fingerprint recognition technology is divided into under-display fingerprint recognition and in-display fingerprint recognition. Under-display fingerprint recognition is achieved by placing the fingerprint sensor module on the underside of the display panel, while in-display fingerprint recognition is achieved by integrating the fingerprint sensor module directly into the display panel. In-display fingerprint recognition allows for thinner and lighter display products. As display products gradually develop towards curved screens and foldable screens, OLED (Organic Electroluminescence Display) panels have become the mainstream products. Therefore, the combination of OLED display panels and in-display fingerprint recognition technology is an important research direction for future mobile phones and other display products.

[0003] In related technologies, in-screen fingerprint recognition technology usually involves adding a separate light sensing unit and acquisition and reading circuit to the LTPS (Low Temperature Poly-Silicon) backplane of the OLED display panel. This not only occupies pixel unit space but also affects display resolution and the accuracy of fingerprint detection. Summary of the Invention

[0004] This application provides a pixel circuit and a display panel with vital sign detection function to solve or alleviate one or more technical problems in the prior art.

[0005] In a first aspect, embodiments of this application provide a pixel circuit with vital sign detection function, electrically connected to a photosensitive unit and a light-emitting unit. The pixel circuit includes a light-emitting acquisition module, a composite functional module, and an energy storage transistor. The composite functional module includes a first transistor, the source side of which is electrically connected to the light-emitting unit, and the source side or drain side of the first transistor is electrically connected to the photosensitive unit. The photosensitive unit is used to generate a detection electrical signal based on the reflected light signal in a reverse-biased state. The composite functional module has a signal integration and transmission terminal, which is used to output the detection electrical signal.

[0006] In one implementation, the signal integration transmission end is also used to receive initialization drive signals or pixel data signals.

[0007] In one embodiment, the signal integrated transmission terminal is electrically connected to the signal integrated transmission line, which includes a first signal transmission line and a second signal transmission line. The first signal transmission line is provided with a first switch, and the second signal transmission line is provided with a second switch.

[0008] In response to the first switch drive signal, the first switch is turned on and the second switch is turned off; in response to the second switch drive signal, the second switch is turned on and the first switch is turned off.

[0009] In one embodiment, the photosensitive unit and the light-emitting unit are integrated, wherein the light-emitting unit includes an organic light-emitting device, and the organic light-emitting device generates a detection electrical signal based on the reflected light signal in a reverse-biased state.

[0010] In one embodiment, the photosensitive unit and the light-emitting unit are provided separately, wherein the light-emitting unit includes an organic light-emitting device, and the photosensitive unit includes a PIN, an OPD, or a photosensitive TFT.

[0011] In one embodiment, the photosensitive unit is disposed in the display panel on the side of the anode layer or source / drain layer of the light-emitting unit away from the substrate.

[0012] In one embodiment, a reverse bias voltage signal is connected to the negative side of the photosensitive unit; or, the positive and negative sides of the photosensitive unit are connected to the drain power supply signal and the source power supply signal of the pixel circuit, respectively.

[0013] In one implementation, the composite functional module further includes a second transistor;

[0014] In this configuration, the drain side of the first transistor is electrically connected to the source side of the second transistor, and the signal integrated transmission terminal is located between the drain side of the first transistor and the source side of the second transistor; or, the source side of the first transistor is electrically connected to the drain side of the second transistor, and the signal integrated transmission terminal is located at the drain side of the first transistor or the source side of the second transistor.

[0015] In one embodiment, both the light-emitting unit and the photosensitive unit are electrically connected to the source side of the first transistor; or, the light-emitting unit is electrically connected to the source side of the first transistor, and the photosensitive unit is electrically connected to the drain side of the second transistor.

[0016] In one embodiment, the pixel circuit is integrated on the display backplane based on LTPS technology, the first transistor and the second transistor are of the same type, and the voltage direction of the gate drive signal input to the first transistor and the second transistor is the same.

[0017] Alternatively, the pixel circuitry is integrated into the display backplane based on LTPO technology, with the first transistor being a P-type transistor and the second transistor being an N-type transistor, and the voltage directions of the gate drive signals input to the first and second transistors being opposite.

[0018] In one embodiment, the pixel circuit further includes a compensation module, the composite function module includes a reset submodule and a readout submodule, and the signal integrated transmission terminal is used to output a detection electrical signal and receive an initialization drive signal; the composite function module has a first gate drive signal input terminal, the compensation module has a second gate drive signal input terminal, and the light emission acquisition module has a light emission acquisition drive signal input terminal.

[0019] In response to the first gate drive signal and the second switch drive signal, the reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit, respectively.

[0020] In response to the second gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit. The potential of the first pixel data signal is lower than the potential of the second pixel data signal.

[0021] In response to the light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate a detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit.

[0022] In response to the first gate drive signal and the first switch drive signal, the read submodule outputs a detection electrical signal through the first signal transmission line.

[0023] In one embodiment, the pixel circuit further includes a compensation module, a storage module, and an energy storage capacitor. The composite function module includes a first reset submodule, a second reset submodule, and a readout submodule. The signal integrated transmission terminal is used to output a detection electrical signal and receive an initialization drive signal. The composite function module has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0024] In response to the first gate drive signal, the second gate drive signal, and the second switch drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage submodule of the photosensitive unit, respectively.

[0025] In response to the third gate drive signal and the fourth gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit. The potential of the first pixel data signal is lower than the potential of the second pixel data signal.

[0026] In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate a detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit.

[0027] In response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input from the second signal transmission line into the energy storage capacitor;

[0028] In response to the third gate drive signal, the memory module writes the detection electrical signal into the energy storage capacitor;

[0029] In response to the second gate drive signal and the first switch drive signal, the read submodule outputs the detection electrical signal stored in the energy storage capacitor through the first signal transmission line.

[0030] In one embodiment, the pixel circuit further includes a compensation module, a storage module, and an energy storage capacitor. The composite function module includes a first reset submodule, a second reset submodule, and a readout submodule. The signal integrated transmission terminal is used to output a detection electrical signal and receive an initialization drive signal. The composite function module has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0031] In response to the first gate drive signal, the second gate drive signal, and the second switch drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage submodule of the photosensitive unit, respectively.

[0032] In response to the third gate drive signal and the fourth gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit. The potential of the first pixel data signal is lower than the potential of the second pixel data signal.

[0033] In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate a detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit.

[0034] In response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input from the second signal transmission line into the energy storage capacitor;

[0035] In response to the third gate drive signal, the memory module writes the detection electrical signal into the energy storage capacitor;

[0036] In response to the second gate drive signal, the first light emission acquisition drive signal, and the second light emission acquisition drive signal, the reading submodule drives the energy storage transistor to operate under a low-potential drain power supply signal, so as to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and, in response to the first switch drive signal, the reading submodule outputs the current signal through the first signal transmission line.

[0037] In one embodiment, the pixel circuit further includes a reset module, a storage module, and an energy storage capacitor. The composite function module includes a compensation submodule and a readout submodule. The reset module includes a first reset submodule, a second reset submodule, and a third reset submodule. The signal integrated transmission terminal is used to output detection electrical signals and receive pixel data signals. The reset module has a first gate drive signal input terminal, the composite function module has a second gate drive signal input terminal and two third gate drive signal input terminals, and the light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0038] In response to the first gate drive signal, the first reset submodule writes the first initialization signal into the gate of the energy storage transistor;

[0039] In response to the second gate drive signal, the third gate drive signal, and the second switch drive signal, the compensation submodule writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal; and the second reset module writes the second initialization signal into the signal storage subunit of the photosensitive unit.

[0040] In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate a detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit.

[0041] In response to the first gate drive signal and the second light emission acquisition drive signal, the third reset submodule writes the first initialization signal into the energy storage capacitor;

[0042] In response to the second gate drive signal, the memory module writes the detection electrical signal into the energy storage capacitor;

[0043] In response to the third gate drive signal and the second light emission acquisition drive signal, the reading submodule drives the energy storage transistor to operate under a low-potential drain power supply signal, so as to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and in response to the first switch drive signal, the reading submodule outputs the current signal through the first signal transmission line.

[0044] Secondly, embodiments of this application also provide a display panel, including a driving circuit with vital sign detection function according to any of the above embodiments of this application.

[0045] According to the technology of this application, by electrically connecting the source side of the first transistor of the composite functional module to the light-emitting unit and electrically connecting the source side or drain side of the first transistor to the photosensitive unit, the light-emitting unit and the photosensitive unit share the first transistor. The light-emitting unit is driven to emit light by the light-emitting acquisition module, and the photosensitive unit is driven to perform vital sign detection. The detection electrical signal generated by the photosensitive unit is then output through the signal integration and transmission terminal of the composite functional module. Therefore, the pixel circuit of this application embodiment can simultaneously drive the display pixel unit to emit light for display and drive the detection pixel unit to perform vital sign detection. Thus, the pixel circuit of this application embodiment can be used to implement the in-screen fingerprint recognition function of an OLED display panel. Furthermore, compared to OLED display panels using in-screen fingerprint recognition technology in related technologies, the OLED display panel using the pixel circuit of this application embodiment does not require a separate acquisition and reading circuit in the back panel, thereby reducing the space occupied by the pixel unit. This not only improves the integration of the OLED display panel but also helps to improve the display resolution and vital sign recognition resolution of the OLED display panel. Furthermore, since the pixel circuit of this application embodiment does not require additional mask and light sensing unit besides OLED display function, the manufacturing process of the backplate for in-screen fingerprint recognition function can be simplified, significantly reducing the manufacturing cost of OLED display panel.

[0046] The above overview is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of this application will become readily apparent from the accompanying drawings and the following detailed description. Attached Figure Description

[0047] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in this application and should not be construed as limiting the scope of this application.

[0048] Figure 1 A schematic diagram of a fingerprint recognition unit in related technologies is shown;

[0049] Figure 2 A circuit diagram illustrating a specific example 1 of a pixel circuit embodiment of this application is shown;

[0050] Figure 3 A schematic diagram of the photoresponse current of an OLED EL light-emitting unit in reverse bias state is shown.

[0051] Figure 4 A schematic diagram of the signal integrated transmission line of a specific example 1 of the pixel circuit of this application is shown;

[0052] Figure 5 This diagram illustrates the working timing of a specific example 1 of the pixel circuit embodiment of this application.

[0053] Figure 6 A circuit diagram illustrating a specific example 2 of a pixel circuit embodiment 1 of this application is shown.

[0054] Figure 7 This document shows another circuit diagram of a specific example 2 of the pixel circuit of an embodiment of this application;

[0055] Figure 8 A schematic diagram of the photosensitive unit of a specific example 2 of the pixel circuit of this application is shown;

[0056] Figure 9 This diagram illustrates a specific example 2 of the pixel circuit embodiment 1 of this application, showing a schematic diagram of the arrangement position of the photosensitive unit;

[0057] Figure 10 This diagram illustrates another arrangement position of the photosensitive unit in a specific example 2 of the pixel circuit of this application embodiment;

[0058] Figure 11 The diagram shows a circuit schematic of Example 3 of a specific embodiment of the pixel circuit of this application;

[0059] Figure 12 A circuit diagram illustrating a specific example 4 of a pixel circuit embodiment of this application;

[0060] Figure 13 Another circuit diagram is shown in Example 4 of a specific embodiment of the pixel circuit of this application;

[0061] Figure 14 A circuit diagram illustrating a specific example 1 of a second embodiment of the pixel circuit of this application is shown;

[0062] Figure 15 A schematic diagram of the signal integrated transmission line of a specific example 1 of a pixel circuit according to an embodiment of this application is shown.

[0063] Figure 16 The circuit diagram shows a specific example 2 of the pixel circuit of this application embodiment;

[0064] Figure 17 A circuit diagram illustrating a specific example 3 of a second embodiment of the pixel circuit of this application is shown;

[0065] Figure 18 The circuit diagram shows a specific example 4 of the second embodiment of the pixel circuit of this application;

[0066] Figure 19 A circuit diagram illustrating a specific example 1 of a pixel circuit according to an embodiment of this application is shown.

[0067] Figure 20 A schematic diagram of the signal integrated transmission line of a specific example 1 of a pixel circuit according to an embodiment of this application is shown.

[0068] Figure 21 A schematic diagram illustrating the working timing of Example 1 of Embodiment 3 of the pixel circuit of this application is shown.

[0069] Figure 22 A circuit diagram illustrating a specific example 2 of a pixel circuit embodiment 3 of this application is shown;

[0070] Figure 23 This document illustrates another circuit diagram of a specific example 2 of a pixel circuit according to an embodiment of this application.

[0071] Figure 24 This diagram illustrates another circuit schematic of a specific example 2 of a pixel circuit according to an embodiment of this application.

[0072] Figure 25 The circuit diagram shows a specific example 3 of the pixel circuit of the present application.

[0073] Figure 26 A circuit diagram illustrating a specific example 4 of embodiment 3 of the pixel circuit of this application is shown;

[0074] Figure 27 Another circuit diagram is shown in Example 4 of a specific embodiment of the pixel circuit of this application;

[0075] Figure 28 This diagram illustrates another circuit schematic of a specific example 4 of a pixel circuit according to an embodiment of the present application.

[0076] Figure 29 A circuit diagram illustrating a specific example 1 of a pixel circuit according to an embodiment of this application is shown.

[0077] Figure 30 A schematic diagram of the signal integration transmission line of a specific example 1 of the pixel circuit of this application is shown;

[0078] Figure 31 The diagram shows the working timing of Example 1 of Embodiment 4 of the pixel circuit of this application;

[0079] Figure 32 A circuit diagram illustrating a specific example 2 of embodiment four of the pixel circuit of this application is shown;

[0080] Figure 33 This document illustrates another circuit diagram of Example 2 of a specific embodiment of the pixel circuit of this application.

[0081] Figure 34 This diagram illustrates another circuit schematic of Example 2 of a specific embodiment of the pixel circuit of this application.

[0082] Figure 35 The circuit diagram shows a specific example 3 of embodiment 4 of the pixel circuit of this application;

[0083] Figure 36 A circuit diagram illustrating a specific example 4 of a pixel circuit according to an embodiment of this application;

[0084] Figure 37 Another circuit diagram of a specific example 4 of the pixel circuit of this application is shown;

[0085] Figure 38 This diagram illustrates another circuit schematic of a specific example 4 of a pixel circuit according to an embodiment of this application.

[0086] Figure 39 A circuit diagram of a specific example 1 of a pixel circuit according to an embodiment of this application is shown;

[0087] Figure 40 A schematic diagram of the signal integration transmission line of a specific example 1 of embodiment 5 of the pixel circuit of this application is shown;

[0088] Figure 41 The diagram shows the working timing of Example 1 of Embodiment 5 of the pixel circuit of this application;

[0089] Figure 42 A circuit diagram illustrating a specific example 2 of embodiment 5 of the pixel circuit of this application is shown;

[0090] Figure 43 This document illustrates another circuit diagram of Example 2 of Embodiment 5 of the pixel circuit of this application.

[0091] Figure 44 This diagram illustrates another circuit schematic of Example 2 of Embodiment 5 of the pixel circuit of this application. Detailed Implementation

[0092] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of this application. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0093] In the description of this specification, it should be understood that the terms "center," "longitudinal," "transverse," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0094] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0095] Figure 1 This diagram illustrates a fingerprint recognition unit 100' in an OLED display panel employing in-display fingerprint recognition technology, as shown in related technologies. Figure 1As shown, a fingerprint recognition unit 100' is integrated on the substrate of the OLED display panel. The fingerprint recognition unit 100' includes a light sensing unit 10' and a data acquisition and reading circuit 20'. The light sensing unit 10' can be a PIN (Photodiode) or an OPD (Organic Photodiode), and the data acquisition and reading circuit 20' includes a TFT (Thin Film Transistor). Since the TFT occupies a certain amount of space in the pixel units of the OLED display panel, it will affect the display resolution of the OLED display panel and also affect the accuracy of fingerprint detection.

[0096] To address the aforementioned technical problems existing in OLED display panels employing in-screen fingerprint recognition technology in related technologies, this application provides a pixel circuit with vital sign detection function and a display panel. See below for further details. Figures 2 to 44 A pixel circuit with vital sign detection function according to an embodiment of this application is described.

[0097] Figure 2 A schematic diagram of a pixel circuit 1 with vital sign detection function according to an embodiment of this application is shown. Figure 1 As shown, the pixel circuit 1 with vital sign detection function in this embodiment is electrically connected to the photosensitive unit 3 and the light-emitting unit 2, respectively. Specifically, the pixel circuit 1 includes a light-emitting acquisition module, a composite function module 10, and an energy storage transistor. The composite function module 10 includes a first transistor 11, the source side of which is electrically connected to the light-emitting unit 2, and the source side or drain side of the first transistor 11 is electrically connected to the photosensitive unit 3. The photosensitive unit 3 is used to generate a detection electrical signal based on the reflected light signal in a reverse-biased state. The composite function module 10 has a signal integration transmission terminal 10a, which is used to output the detection electrical signal.

[0098] In this embodiment, the pixel circuit 1 is used to drive the pixel units of the OLED display panel to operate. Each pixel unit may include a light-emitting pixel unit and a detection pixel unit. The light-emitting pixel unit emits light under the drive of the pixel circuit 1, and the detection pixel unit is used for vital sign detection under the drive of the pixel circuit 1. It should be noted that, in addition to fingerprint detection, the pixel circuit 1 in this embodiment can also detect other vital signs such as heart rate, pressure, blood oxygen saturation, blood pressure, blood sugar, and skin condition.

[0099] For example, the light-emitting unit 2 may include an OLED device corresponding to the pixel unit. It is understood that the OLED device includes an anode, an organic layer group, and a cathode, the organic layer group including at least one organic light-emitting layer. It is understood that when a current is applied, electrons are injected into the cathode and holes are formed in the anode. The electrons and holes move towards each other through the layers and combine in the organic light-emitting layer, releasing energy in the form of photons. This process occurs rapidly and continuously as current passes through, thereby achieving continuous light emission.

[0100] In this embodiment, the photosensitive unit 3 and the light-emitting unit 2 can be configured separately or integrated. For example, the source side of the first transistor 11 can be electrically connected to both the light-emitting unit 2 and the photosensitive unit 3, or the source side of the first transistor 11 can be electrically connected to the light-emitting unit 2 and the drain side of the first transistor 11 can be electrically connected to the photosensitive unit 3. The photosensitive unit 3 may include a PIN, an OPD, or a photosensitive TFT, etc.

[0101] Preferably, such as Figure 2 , 11 As shown in Figures 14, 17, 19, 25, 29, 35, and 39, the photosensitive unit 3 and the light-emitting unit 2 are integrated. The light-emitting unit 2 includes an organic light-emitting device, and the organic light-emitting device generates a detection electrical signal based on the reflected light signal in the reverse-biased state.

[0102] It should be noted that, as Figure 3 As shown, the red, green, or blue organic light-emitting units 2 of the OLED device all exhibit near-linear photoresponse capability in the reverse-biased state. That is, the organic light-emitting unit 2 in the reverse-biased state generates a current signal, and this current signal increases accordingly with increasing light intensity. Based on this, the pixel circuit 1 of this embodiment can use the organic light-emitting unit 2 of the OLED device as the photosensitive unit 3 for fingerprint recognition. In other words, by applying a positive voltage to the light-emitting unit 2 electrically connected to the pixel circuit 1 used to drive the light-emitting pixel unit, and applying a reverse voltage to the light-emitting unit 2 electrically connected to the pixel circuit 1 used to drive the detection pixel unit, the light-emitting unit 2 can be made photoresponse-capable. This allows the light-emitting unit 2 in the reverse-biased state to generate a corresponding detection electrical signal based on the light signal reflected back when the light emitted by the pixel light-emitting unit 2 is blocked by the user's body surface, thereby obtaining the vital sign detection result based on the detection electrical signal. It is understood that the light-emitting unit 2 in the reverse-biased state does not emit light, and therefore its self-emission will not affect the generated detection electrical signal.

[0103] In this embodiment, the light-emitting acquisition module is activated in response to a corresponding driving signal, used to drive the light-emitting unit 2 of the light-emitting pixel unit to emit light, and to drive the photosensitive unit 3 of the detection pixel unit to be in a reverse-biased state and perform light response. The composite function module 10 is activated in response to a corresponding driving signal, at least used to output the detection electrical signal generated by the photosensitive unit 3; furthermore, the composite function module 10 can also be used to reset at least the gate of the energy storage transistor during the reset phase of the pixel circuit 1, or to write pixel data signals and compensation signals to the energy storage transistor during the compensation phase of the pixel circuit 1. That is, the composite function module 10 integrates signal reading functions and other functions, specifically reset functions or compensation functions.

[0104] In the embodiments of this application, the pixel circuit 1 can adopt any type of driving circuit, such as a 7T1C circuit (including 7 transistors and 1 capacitor) or an 11T3C circuit (including 11 transistors and 3 capacitors). This application does not specifically limit this. In the following description of this application specification, the pixel circuit 1 adopting a 7T1C circuit will be used as an example for detailed explanation.

[0105] For example, such as Figure 2 As shown, pixel circuit 1 includes 7 transistors (i.e., transistors T1, T2, T3, T4, T5, T6 and T7 in the figure) and 1 capacitor (i.e. C1 in the figure). In this circuit, the gates of transistors T1 and T6 form the first gate drive signal input terminals, the source of transistor T6 is electrically connected to the source of transistor T5 and the positive terminal of light-emitting unit 2, and the negative terminal of light-emitting unit 2 is electrically connected to the source power supply signal input terminal of pixel circuit 1; the gates of transistors T2 and T3 form the second gate drive signal input terminals, and the drain of transistor T3 forms the pixel data signal input terminal; the gates of transistors T4 and T5 form the light-emitting acquisition drive signal input terminals; transistor T7 forms the energy storage transistor, and the source, drain, and gate of transistor T7 are electrically connected to the drain of transistor T5, the source of transistor T4, and the drain power supply signal input terminals, respectively; capacitor C1 forms the energy storage capacitor of pixel circuit 1, and one end of capacitor C1 is electrically connected to the gate of transistor T7, the drain of transistor T1, and the drain of transistor T2, respectively, and the other end of capacitor C1 is electrically connected to the drain power supply signal input terminal. It should be noted that the embodiments of this application do not specifically limit the type of each transistor included in the pixel circuit 1. The type of transistor may include Pmos, Nmos, Oxide, a-Si, or silicon-based TFT, etc.

[0106] The light-emitting acquisition module can be composed of transistors T4 and T5, and the composite functional module 10 can be composed of transistors T6 and T1. The first transistor 11 can be transistor T6 as shown in the figure. Furthermore, the pixel circuit 1 can also include a compensation module composed of transistors T2 and T3. The compensation module is used to write pixel data signals and compensation signals to the energy storage transistor (i.e., transistor T7) during the compensation phase of the pixel circuit 1. The drain of transistor T6 and the source of transistor T1 are electrically connected. The signal integration transmission terminal 10a is located between the drain of transistor T6 and the source of transistor T1, and is used to output a detection electrical signal during the signal reading phase of the pixel circuit 1 and to receive an initialization drive signal during the reset phase of the pixel circuit 1.

[0107] According to the pixel circuit 1 of this application embodiment, by electrically connecting the source side of the first transistor 11 of the composite function module 10 to the light-emitting unit 2 and electrically connecting the source side or drain side of the first transistor 11 to the photosensitive unit 3, the light-emitting unit 2 and the photosensitive unit 3 share the first transistor 11. The light-emitting unit 2 is driven to emit light and the photosensitive unit 3 is driven to perform vital sign detection by the light-emitting acquisition module. Then, the detection electrical signal generated by the photosensitive unit 3 is output through the signal integration and transmission terminal 10a of the composite function module 10. Thus, the pixel circuit 1 of this application embodiment can simultaneously have the functions of driving the display pixel unit to emit light for display and driving the detection pixel unit to perform vital sign detection. Therefore, the pixel circuit 1 of this application embodiment can be used to realize the in-screen fingerprint recognition function of the OLED display panel. Furthermore, compared with the OLED display panels using in-screen fingerprint recognition technology in related technologies, the OLED display panel using the pixel circuit 1 of this application embodiment does not need to set up a separate acquisition and reading circuit in the back panel, thereby reducing the space occupation of the pixel unit, which not only improves the integration of the OLED display panel, but also helps to improve the display resolution and vital sign recognition resolution of the OLED display panel. Furthermore, since the pixel circuit 1 in this embodiment does not require additional mask and light sensing unit besides the OLED display function, the manufacturing process of the backplate for the in-screen fingerprint recognition function can be simplified, significantly reducing the manufacturing cost of the OLED display panel.

[0108] In one embodiment, the signal integrated transmission terminal 10a is also used to receive an initialization drive signal or a pixel data signal.

[0109] In some examples, such as Figure 2 , 6As shown in figures 7, 11, 12, 13, 14, 15, 16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 32, 33, 34, 35, 36, 37, and 38, the composite function module 10 has reset and signal reading functions. The signal integrated transmission terminal 10a is used to receive initialization drive signals and output detection electrical signals. Specifically, during the reset phase of the pixel circuit 1, in response to the corresponding gate drive signal, the composite function module 10 starts and receives the initialization drive signal through the signal integrated transmission terminal 10a, and writes the initialization drive signal into the gate of the energy storage transistor and the signal storage sub-unit of the photosensitive unit 3, respectively. During the signal reading phase of the pixel circuit 1, in response to the corresponding gate drive signal, the composite function module 10 starts and outputs the detection electrical signal stored in the signal storage sub-unit of the photosensitive unit or the detection electrical signal stored in the gate of the energy storage transistor through the signal integrated transmission terminal 10a.

[0110] In other examples, such as Figure 39 , 42 As shown in Figures 43 and 44, the composite function module 10 has compensation and signal readout functions. The signal integrated transmission terminal 10a is used to receive pixel data signals and output detection electrical signals. Specifically, during the compensation phase of the pixel circuit 1, in response to the corresponding gate drive signal, the composite function module 10 starts and receives the pixel data signal through the signal integrated transmission terminal 10a, and writes the pixel data signal and the compensation signal into the gate of the energy storage transistor. During the signal readout phase of the pixel circuit 1, in response to the corresponding gate drive signal, the composite function module 10 starts and outputs the detection electrical signal stored in the signal storage subunit of the photosensitive unit or the detection electrical signal stored in the gate of the energy storage transistor through the signal integrated transmission terminal 10a.

[0111] Optionally, the signal integrated transmission terminal 10a is electrically connected to the first signal transmission line 21 and the second signal transmission line 22 respectively. The first signal transmission line 21 is provided with a first switch 21a, and the second signal transmission line 22 is provided with a second switch 22a. In response to the drive signal of the first switch 21a, the first switch 21a is turned on and the second switch 22a is turned off. In response to the drive signal of the second switch 22a, the second switch 22a is turned on and the first switch 21a is turned off.

[0112] It is understood that the first signal transmission line 21 is used to transmit the detection electrical signal output from the signal integration transmission terminal 10a, and the second transmission line is used to transmit the initialization drive signal or pixel data signal input to the signal integration transmission terminal 10a.

[0113] For example, multiple pixel unit arrays are arranged in multiple columns and rows, and multiple signal integrated transmission lines 20 are provided corresponding to the multiple columns of pixel units. Each signal integrated transmission line 20 is electrically connected to the signal integrated transmission terminal 10a of the pixel circuit 1 of each pixel unit in the corresponding column. Thus, the signal integrated transmission line 20 can uniformly input an initialization drive signal to the signal integrated transmission terminal 10a of each pixel circuit 1 in the corresponding column, or uniformly read a detection electrical signal from the signal integrated transmission terminal 10a of each pixel circuit 1 in the corresponding column.

[0114] In some examples, such as Figure 4 , 15 As shown in Figures 20, 30, and 40, multiple pixel units are arranged in three columns, and three signal integrated transmission lines 20 correspond to the three columns of pixel units respectively. In each signal integrated transmission line 20, the first switch 21a on the first signal transmission line 21 can be a Tr switch, and the second switch 22a can be a Ti switch. The first switches 21a on the first transmission lines of the three signal integrated transmission lines 20 can uniformly receive the first switch 21a drive signal (i.e., in Figure...). Figure 4 , 15 The read_col signals in 20, 30, and 40, and the second switch 22a on the second transmission line of the three integrated transmission lines 20 can uniformly receive the drive signal of the second switch 22a (i.e., Figure 4 Vinit_col in Figure 15 Vinit2_col, Figure 20 Vinit1_col, Figure 30 Vinit2_col, Figure 40 (Vdata_col in the middle).

[0115] Therefore, by driving the first switch 21a and the second switch 22a, the signal integrated transmission line 20 can switch between transmitting detection electrical signals and initialization drive signals (or pixel data signals).

[0116] In addition, in other embodiments of this application, the IC module of the display panel may also provide the functions of compatible driving and reading signals.

[0117] In one implementation, such as Figure 6 , 7 As shown in Figures 12, 13, 16, 18, 22, 23, 24, 26, 27, 28, 32, 33, 34, 36, 37, 38, 42, 43, and 44, the photosensitive unit 3 and the light-emitting unit 2 are separately configured. The light-emitting unit 2 includes an organic light-emitting device, and the photosensitive unit 3 includes a PIN, an OPD, or a photosensitive TFT.

[0118] For example, the positive terminal of the photosensitive unit 3 is electrically connected to the source side of the first transistor 11, or the negative terminal of the photosensitive unit 3 is electrically connected to the source side of the first transistor 11, as long as a reverse bias voltage is applied to the photosensitive unit 3 so that the photosensitive unit 3 operates in the reverse bias state.

[0119] In some examples, the photosensitive unit 3 may include a PIN. The PIN includes a stacked arrangement of P-type semiconductors, I-type semiconductors, and N-type semiconductors, wherein the I-type semiconductor is an undoped semiconductor material with extremely high resistivity, which can prevent the recombination of electrons and holes, thereby improving the response speed and sensitivity of the photodiode.

[0120] In other examples, the photosensitive unit 3 may include an OPD. For example... Figure 8 As shown, the OPD includes an HBL (electron transport layer) 32, a photosensitive layer 33, and an HTL (hole transport layer) 34 stacked between an anode layer 31 and a cathode layer 35. The HBL layer 32, located at the bottom, is typically composed of small organic molecules or polymer materials. Its main function is to prevent electrons from leaking out of the ITO electrode and also to improve the photoelectric conversion efficiency of the OPD. The photosensitive layer 33 is the core component of the OPD and is usually composed of organic molecular materials. When photons irradiate the photosensitive layer, they excite electrons in the photosensitive molecules, causing them to jump to the conductive band, forming electron-hole pairs and generating current. The HTL layer 34, located at the top, is also typically composed of small organic molecules or polymer materials. Its main function is to prevent holes from leaking out of the ITO electrode and also to improve the photoelectric conversion efficiency of the OPD.

[0121] Optionally, such as Figure 9 and 10 As shown, the photosensitive unit 3 is disposed in the display panel on the side of the anode layer 2a or the source / drain layer of the light-emitting unit 2 away from the substrate.

[0122] In some examples, such as Figure 9 As shown, the photosensitive unit 3 may include a PIN, and the PIN may be disposed on the side of the source / drain layer 4 of the OLED device away from the substrate (i.e., the glass in the figure). Furthermore, in other examples of this application, the PIN may also be disposed on the side of the anode layer 2a of the OLED device away from the substrate in the display panel.

[0123] In other examples, such as Figure 10 As shown, the photosensitive unit 3 may include an OPD, and the OPD is disposed in the display panel on the side of the anode layer 2a of the OLED device that is away from the substrate. Furthermore, in other examples of this application, the OPD may also be disposed on the side of the source / drain layer 4 of the OLED device that is away from the substrate.

[0124] Optionally, a reverse bias voltage signal is connected to the negative side of the photosensitive unit 3; or, the positive and negative sides of the photosensitive unit 3 are connected to the drain power supply signal and the source power supply signal of the pixel circuit 1, respectively.

[0125] In some examples, such as Figure 2 , 11 As shown in Figures 14, 17, 19, 25, 29, 35, and 39, the photosensitive unit 3 and the light-emitting unit 2 are integrated, and the positive and negative sides of the photosensitive unit 3 are connected to the drain power supply signal (i.e., Vdd in the figure) and the source power supply signal (i.e., Vss in the figure) of the pixel circuit 1, respectively.

[0126] In other examples, such as Figure 6 , 7 As shown in 12, 13, 16, 18, 22, 23, 24, 26, 27, 28, 32, 33, 34, 36, 37, 38, 42, 43 and 44, the negative electrode side of photosensitive unit 3 is connected to a reverse bias voltage signal (i.e. Vbias in the figure).

[0127] In one embodiment, the composite functional module 10 further includes a second transistor. The drain side of the first transistor 11 is electrically connected to the source side of the second transistor, and the signal integrated transmission terminal 10a is disposed between the drain side of the first transistor 11 and the source side of the second transistor; alternatively, the source side of the first transistor 11 is electrically connected to the drain side of the second transistor, and the signal integrated transmission terminal 10a is disposed at either the drain side of the first transistor 11 or the source side of the second transistor.

[0128] In some examples, such as Figure 2 , 6 As shown in Figures 7, 11, 12, and 13, the first transistor 11 is transistor T6, and the second transistor is transistor T1. The drain of transistor T1 is electrically connected to the drain of transistor T2 and the drain power signal input terminal of pixel circuit 1, respectively. The source of transistor T1 is electrically connected to the drain of transistor T6, and the source of transistor T6 is electrically connected to the source of light-emitting unit 2 and transistor T5, respectively. The signal integrated transmission terminal 10a is disposed between the drain of transistor T6 and the source of transistor T1. The signal integrated transmission terminal 10a is used to input initialization drive signals and output detection electrical signals.

[0129] In other examples, such as Figure 14 , 16As shown in Figures 17 and 18, the first transistor 11 is transistor T6, and the second transistor is transistor T1. The drain of transistor T1 is electrically connected to the drain of transistor T2 and the drain power signal input terminal of pixel circuit 1, respectively. The source of transistor T6 is electrically connected to the source of light-emitting unit 2 and transistor T5, respectively. The source of transistor T1 forms the first initialization drive signal input terminal, which is used to reset the energy storage capacitor. The signal integrated transmission terminal 10a is located at the drain of transistor T6 and is used to input the second initialization drive signal and output a detection electrical signal. The second initialization drive signal is used to reset the gate of the energy storage transistor (i.e., transistor T7) and the signal storage subunit of photosensitive unit 3.

[0130] In some other examples, such as Figure 19 , 22 As shown in Figures 23, 24, 25, 26, 27, 28, 29, 32, 33, 34, 35, 36, 37, and 38, the first transistor 11 is transistor T6, and the second transistor is transistor T1. The drain of transistor T1 is electrically connected to the drain of transistor T2 and the drain power signal input terminal of pixel circuit 1, respectively. The source of transistor T6 is electrically connected to the source of light-emitting unit 2 and transistor T5, respectively. In this configuration, the signal integrated transmission terminal 10a is located at the source of transistor T1, used to input a first initialization drive signal and output a detection signal. The first initialization drive signal is used to reset the energy storage capacitor. The drain of transistor T6 forms the input terminal of the second initialization drive signal, which is used to reset the gate of the energy storage transistor (i.e., transistor T7) and the signal storage subunit of the photosensitive unit 3. Alternatively, the signal integrated transmission terminal 10a is located at the drain of transistor T6, used to input a first initialization drive signal and output a detection signal. The first initialization drive signal is used to reset the energy storage capacitor. The source of transistor T1 forms the input terminal of the second initialization drive signal, which is used to reset the gate of the energy storage transistor (i.e., transistor T7) and the signal storage subunit of the photosensitive unit 3.

[0131] In some other examples, such as Figure 39 , 42 As shown in Figures 43 and 44, the first transistor 11 is transistor T6, and the second transistor is transistor T3. The drain of transistor T3 is electrically connected to the source of transistor T4 and the drain of transistor T7, respectively. The source of transistor T6 is electrically connected to the source of light-emitting unit 2 and the source of transistor T5, respectively. An integrated signal transmission terminal is located at the source of transistor T3, used for inputting pixel data signals and outputting detection electrical signals. The drain of transistor T6 forms the second initialization drive signal input terminal, which is used to reset the signal storage subunit of photosensitive unit 3.

[0132] Optionally, both the light-emitting unit 2 and the photosensitive unit 3 are electrically connected to the source side of the first transistor 11; or, the light-emitting unit 2 is electrically connected to the source side of the first transistor 11, and the photosensitive unit 3 is electrically connected to the drain side of the second transistor.

[0133] In some examples, such as Figure 6 , 12 As shown in 16, 18, 22, 23, 26, 27, 32, 33, 36, 37, 42 and 43, the first transistor 11 is transistor T6, and the light-emitting unit 2 and the photosensitive unit 3 are both electrically connected to the source side of transistor T6.

[0134] In other examples, such as Figure 7 , 13 24, 28, 34, and 38, the first transistor 11 is transistor T6, the second transistor is T1, the light-emitting unit 2 is electrically connected to the source side of transistor T6, and the photosensitive unit 3 is electrically connected to the drain side of transistor T1. And, as... Figure 44 As shown, the first transistor 11 is transistor T6, the second transistor is T3, the light-emitting unit 2 is electrically connected to the source side of transistor T6, and the photosensitive unit 3 is electrically connected to the drain side of transistor T3.

[0135] Optionally, the pixel circuit 1 is integrated into the display backplane based on LTPS technology, the first transistor 11 and the second transistor are of the same type, and the voltage directions of the gate drive signals input to the first transistor 11 and the second transistor are the same; or, the pixel circuit 1 is integrated into the display backplane based on LTPO technology, the first transistor 11 is a P-type transistor, the second transistor is an N-type transistor, and the voltage directions of the gate drive signals input to the first transistor 11 and the second transistor are opposite.

[0136] In some examples, such as Figure 2 , 6 As shown in Figures 7, 14, 15, 16, 19, 22, 23, 24, 29, 32, 33, and 34, the pixel circuit is integrated on the display backplane based on LTPS technology. The first transistor 11 (i.e., transistor T6) and the second transistor (i.e., transistor T1) are of the same type and are both P-type MOS transistors. In addition, the other transistors included in the pixel circuit 1 are also P-type MOS transistors.

[0137] In other examples, such as Figure 11 , 12As shown in 13, 17, 18, 25, 26, 27, 28, 35, 36, 37, 38, 39, 42, 43 and 44, the pixel circuit 1 is integrated on the display back panel based on LTPO technology. The first transistor 11 (i.e. transistor T6) is a P-type MOS transistor, and the second transistor (i.e. transistor T1 or T3) is an N-type MOS transistor, and the voltage directions of the gate drive signals corresponding to the two are opposite.

[0138] In one embodiment, the pixel circuit 1 further includes a compensation module, the composite function module 10 includes a reset submodule and a readout submodule, and the signal integrated transmission terminal 10a is used to output a detection electrical signal and receive an initialization drive signal. The composite function module 10 has a first gate drive signal input terminal, the compensation module has a second gate drive signal input terminal, and the light emission acquisition module has a light emission acquisition drive signal input terminal.

[0139] In response to the first gate drive signal and the second switch 22a drive signal, the reset submodule writes the initialization drive signal input from the second signal transmission line 22 into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit 3, respectively; in response to the second gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal; in response to the light emission acquisition drive signal, the light emission acquisition module drives the light emission unit 2 to emit light, and drives the photosensitive unit 3 to generate a detection electrical signal based on the reflected light signal in the reverse bias state, and writes it into the signal storage subunit of the photosensitive unit 3; in response to the first gate drive signal and the first switch 21a drive signal, the read submodule outputs the detection electrical signal through the first signal transmission line 21.

[0140] In one embodiment, the pixel circuit 1 further includes a compensation module, a storage module, and an energy storage capacitor. The composite function module 10 includes a first reset submodule, a second reset submodule, and a readout submodule. The signal integrated transmission terminal 10a is used to output a detection electrical signal and receive an initialization drive signal. The composite function module 10 has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0141] In response to the first gate drive signal, the second gate drive signal, and the second switch 22a drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line 22 into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit 3, respectively; in response to the third gate drive signal and the fourth gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal; in response to the first light emission acquisition drive signal... The light emission acquisition module drives the light emission unit 2 to emit light and drives the photosensitive unit 3 to generate a detection electrical signal based on the reflected light signal in a reverse-biased state, and writes it into the signal storage subunit of the photosensitive unit 3; in response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input by the second signal transmission line 22 into the energy storage capacitor; in response to the third gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; in response to the second gate drive signal and the first switch 21a drive signal, the reading submodule outputs the detection electrical signal stored in the energy storage capacitor through the first signal transmission line 21.

[0142] In one embodiment, the pixel circuit 1 further includes a compensation module, a storage module, and an energy storage capacitor. The composite function module 10 includes a first reset submodule, a second reset submodule, and a readout submodule. The signal integrated transmission terminal 10a is used to output a detection electrical signal and receive an initialization drive signal. The composite function module 10 has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0143] In response to the first gate drive signal, the second gate drive signal, and the second switch 22a drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line 22 into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit 3, respectively. In response to the third and fourth gate drive signals, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal. In response to the first and second light emission acquisition drive signals, the light emission acquisition module drives the light emission unit 2 to emit light, and drives the photosensitive unit 3 to emit light. In reverse bias state, the optical unit 3 generates a detection electrical signal based on the reflected light signal and writes it into the signal storage subunit of the photosensitive unit 3; in response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input by the second signal transmission line 22 into the energy storage capacitor; in response to the third gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; in response to the second gate drive signal, the first light emission acquisition drive signal and the second light emission acquisition drive signal, the reading submodule drives the energy storage transistor to operate under a low-potential drain power supply signal, so as to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and in response to the first switch 21a drive signal, the reading submodule outputs the current signal through the first signal transmission line 21.

[0144] In one embodiment, the pixel circuit 1 further includes a reset module, a storage module, and an energy storage capacitor. The composite function module 10 includes a compensation submodule and a reading submodule. The reset module includes a first reset submodule, a second reset submodule, and a third reset submodule. The signal integrated transmission terminal 10a is used to output detection electrical signals and receive pixel data signals. The reset module has a first gate drive signal input terminal. The composite function module 10 has a second gate drive signal input terminal and two third gate drive signal input terminals. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal.

[0145] In this configuration, in response to a first gate drive signal, the first reset submodule writes a first initialization signal to the gate of the energy storage transistor; in response to a second gate drive signal, a third gate drive signal, and a second switch 22a drive signal, the compensation submodule writes a light emission compensation signal and a first pixel data signal to the gate of the energy storage transistor of the light emission pixel unit, and writes a collection compensation signal and a second pixel data signal to the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal; and the second reset module writes a second initialization signal to the signal storage subunit of the photosensitive unit 3; in response to a first light emission collection drive signal and a second light emission collection drive signal, the light emission collection module drives the light emission unit... The photosensitive unit 2 emits light and drives the photosensitive unit 3 to generate a detection electrical signal based on the reflected light signal in a reverse bias state, and writes it into the signal storage sub-unit of the photosensitive unit 3; in response to the first gate drive signal and the second light emission acquisition drive signal, the third reset sub-module writes the first initialization signal into the energy storage capacitor; in response to the second gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; in response to the third gate drive signal and the second light emission acquisition drive signal, the reading sub-module drives the energy storage transistor to operate under a low-potential drain power supply signal, so as to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and in response to the first switch 21a drive signal, the reading sub-module outputs the current signal through the first signal transmission line 21.

[0146] The pixel circuit 1 with vital sign detection function according to the present application is described in detail below with five embodiments.

[0147] Example 1

[0148] In Embodiment 1, pixel circuit 1 adopts a PPS type circuit, and the source of transistor T1 is electrically connected to the drain of transistor T6. The following is in conjunction with... Figures 2 to 13 The four specific examples listed in Example 1 are described below.

[0149] (1) In a specific example 1 of Embodiment 1, such as Figure 2 and Figure 4As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology, while light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. All transistors in pixel circuit 1 are P-type MOS transistors. The first transistor 11 is transistor T6, which also serves as the display's reset TFT and read TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a (Vinit & read) is integrated between transistors T1 and T6, used to output detection electrical signals and receive initialization drive signals. Signal integrated transmission terminal 10a is electrically connected to signal integrated transmission line 20. The first signal transmission line 21 and the second signal transmission line 22 of signal integrated transmission line 20 are switched via Ti and Tr switches to serve as Vinit drive lines and read signal lines, respectively. The drive signals of Ti and Tr switches are Vinit_col and read_col, respectively. Compatible drive and read functions can also be provided through internal IC design. Figure 5 As shown, the operating timing process of pixel circuit 1 is as follows:

[0150] ① Reset Phase: When G(n-1) inputs the first gate drive signal (low level signal), transistors T1 and T6 are turned on, and transistors T2, T3, T4, and T5 are turned off; when Vinit_col inputs a low level signal Ti switch is turned on, when read_col inputs a high level signal Tr switch is turned off, and when the signal integration transmission terminal 10a inputs the initialization drive signal (Vinit), the reset submodule of the composite function module 10 resets the anode of the OLED device and the gate of transistor T7 to the initialization drive signal;

[0151] ② Compensation Stage: When G(n) receives the second gate drive signal (low-level signal), transistors T2 and T3 are turned on, while transistors T1, T6, T4, and T5 are turned off. Display information is written to Vdata, and the compensation module writes pixel data signals and compensation signals (Vdata+Vth signals) to the gate of transistor T7. Specifically, for pixel circuit 1 of the light-emitting pixel unit, a low-level signal is written to Vdata to ensure that transistor T7 provides current to the OLED device according to grayscale requirements during the light-emitting stage; for pixel circuit 1 of the detection pixel unit, a high-level signal is written to Vdata to ensure that transistor T7 is turned off during the light-emitting stage.

[0152] ③Emitting and Acquiring Stage: When the EM(n) inputs the emission and acquisition drive signal (low level signal), transistors T4 and T5 are turned on, and transistors T1, T6, T2, and T3 are turned off. The OLED device electrically connected to the pixel circuit 1 of the display pixel unit emits light normally according to the input grayscale requirements. The transistor T7 of the pixel circuit 1 of the detection pixel unit is turned off. The OLED device is still in reverse bias state. In response to the light signal reflected back from the body surface by the received display light, the anode potential of the OLED device changes to generate a detection electrical signal and is maintained on the capacitance of the OLED device itself.

[0153] ④ Reading stage: When G(n-1) inputs the first gate drive signal (low level signal), transistors T1 and T6 are turned on, and transistors T2, T3, T4, and T5 are turned off; when Vinit_col inputs a high level signal, the Ti switch is turned off; when read_col inputs a low level signal, the Tr switch is turned on; the detection electrical signal stored in the anode of the OLED device is read out line by line through the signal integrated transmission terminal 10a and the signal integrated transmission line 20.

[0154] (2) In specific example 2 of embodiment one, such as Figure 6 and Figure 7 As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 shown in the diagram is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signals of pixel circuit 1. All transistors included in pixel circuit 1 are P-type MOSFETs. Figure 6 In the middle, T6 serves as both the reset TFT for display and the readout TFT, and the photosensitive unit 3 is located on the source side of transistor T6; Figure 7 In this circuit, T1 serves as both the display reset TFT and the read TFT, and the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light emission acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a (Vinit & read) is integrated between transistors T1 and T6, used to output detection electrical signals and receive initialization drive signals. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in specific example 1, and it can also provide compatible drive and read functions through internal IC design, which will not be described further here. The operating timing process of this pixel circuit 1 is the same as in specific example 1, and will not be described further here.

[0155] (3) In specific example 3 of embodiment one, such as Figure 11As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. Transistor T6 serves as both the reset TFT and the read-out TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The integrated signal transmission terminal 10a (Vinit & read) is integrated between transistors T1 and T6, used to output detection electrical signals and receive initialization drive signals. The integrated signal transmission terminal 10a is electrically connected to an integrated signal transmission line 20. The routing of the integrated signal transmission line 20 is the same as in specific example 1, and compatible drive and read functions can also be provided through internal IC design, which will not be elaborated here. The operation of pixel circuit 1 is the same as in specific example 1, and will not be elaborated here either.

[0156] (4) In specific example 4 of embodiment one, such as Figure 12 and 13 As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 shown in the diagram is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. Transistors T1 and T2 are N-type MOSFETs, and the remaining transistors are P-type MOSFETs. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. Figure 12 In the middle, T6 serves as both the reset TFT for display and the readout TFT, and the photosensitive unit 3 is located on the source side of transistor T6; Figure 13In this circuit, T1 serves as both the display reset TFT and the read TFT, and the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light emission acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a (Vinit & read) is integrated between transistors T1 and T6, used to output detection electrical signals and receive initialization drive signals. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in specific example 1, and it can also provide compatible drive and read functions through internal IC design, which will not be described further here. The operation of the pixel circuit 1 is the same as in specific example 1, and will not be described further here either.

[0157] Example 2

[0158] In Embodiment 2, pixel circuit 1 adopts a PPS type circuit, and the source of transistor T1 is electrically isolated from the drain of transistor T6. Specifically, the source of transistor T1 forms the first initialization drive signal input terminal (Vinit1), and the drain of transistor T6 forms the signal integration transmission terminal 10a (Vinit2&read), used to output detection electrical signals and receive the second initialization drive signal. The following describes the process in conjunction with... Figures 14 to 18 The four specific examples listed in Example 2 are described below.

[0159] (1) In specific example 1 of embodiment 2, such as Figure 14 and Figure 15 As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology, and light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. All transistors in pixel circuit 1 are P-type MOS transistors. The first transistor 11 is transistor T6, which also serves as the reset TFT and read TFT for the display. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to signal integrated transmission line 20. The first signal transmission line 21 and the second signal transmission line 22 of signal integrated transmission line 20 are switched via Ti and Tr switches to serve as Vinit drive lines and read signal lines, respectively. The drive signals of Ti and Tr switches are Vinit2_col and read_col, respectively. Compatible drive and read functions can also be provided through internal IC design. The operating timing process of pixel circuit 1 is the same as in Example 1 of Embodiment 1, and will not be repeated here.

[0160] (2) In a specific example 2 of Embodiment 2, such as Figure 16As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the diagram is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. All transistors in pixel circuit 1 are P-type MOSFETs. T6 serves as both the reset TFT and the read TFT for the display, with photosensitive unit 3 located on the source side of transistor T6. Composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. Signal integrated transmission terminal 10a is electrically connected to signal integrated transmission line 20. The routing of signal integrated transmission line 20 is the same as in specific example 1 of embodiment 2. It can also provide compatible driving and read functions through internal IC design, which will not be elaborated here. The timing process of the pixel circuit 1 is the same as that of Specific Example 1 in Embodiment 1, and will not be repeated here.

[0161] (3) In specific example 3 of embodiment 2, such as Figure 17 As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. Transistor T6 serves as both the reset TFT and the read-out TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to a signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Example 1 of Embodiment Two, and can also provide compatible drive and read functions through internal IC design, which will not be elaborated here. The operation of pixel circuit 1 is the same as in Example 1 of Embodiment One, and will not be elaborated here either.

[0162] (4) In specific example 4 of embodiment 2, such as Figure 18As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 shown in the diagram is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. Transistors T1 and T2 are N-type MOSFETs, and the remaining transistors are P-type MOSFETs. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. T6 serves as both the reset TFT and the read-out TFT for the display. Photosensitive unit 3 is located on the source side of transistor T6. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as that of Specific Example 1 of Embodiment 2. It can also provide compatible driving and read functions through the internal design of the IC, which will not be described in detail here. The operation process of the pixel circuit 1 is the same as that of Specific Example 1 of Embodiment 1, which will not be described in detail here either.

[0163] Example 3

[0164] In embodiment three, pixel circuit 1 adopts a PPS type circuit, and the source of transistor T1 is electrically isolated from the drain of transistor T6. Specifically, the source of transistor T1 forms a signal integrated transmission terminal 10a (Vinit1&read), used to output a detection electrical signal and receive a first initialization drive signal, while the drain of transistor T6 forms a second initialization drive signal input terminal (Vinit2). The following describes the process in conjunction with... Figures 19 to 28 The four specific examples listed in Example 3 are described below.

[0165] (1) In specific example 1 of embodiment 3, such as Figures 19 to 21As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology, and light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. All transistors in pixel circuit 1 are P-type MOS transistors. Specifically, the first transistor 11 is transistor T6, and transistor T1 serves as both the display reset TFT and the read TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to signal integrated transmission line 20. The first signal transmission line 21 and the second signal transmission line 22 of signal integrated transmission line 20 are switched via Ti and Tr switches to serve as Vinit1 drive lines and read signal lines, respectively. The drive signals of Ti and Tr switches are Vinit1_col and read_col, respectively. Compatible drive and read functions can also be provided through internal IC design. Figure 21 As shown, the timing sequence of the pixel circuit 1 is as follows:

[0166] ① Reset Phase: When G'(n-1) inputs the first gate drive signal (low level signal) and G(n-1) inputs the second gate drive signal (low level signal), transistors T1 and T6 are turned on, and transistors T2, T3, T4, and T5 are turned off; when Vinit1_col inputs the low level signal Ti switch is turned on, when read_col inputs the high level signal Tr switch is turned off, and when the signal integration transmission terminal 10a inputs the first initialization drive signal (Vinit1), the first reset submodule of the composite function module 10 resets the anode of the OLED device and the gate of transistor T7 to the first initialization drive signal;

[0167] ② Compensation Stage: When G(n) receives the third gate drive signal (low level signal) and G'(n) receives the fourth gate drive signal (low level signal), transistors T2 and T3 are turned on, while transistors T1, T6, T4, and T5 are turned off. Display information is written to Vdata, and the compensation module writes pixel data signals and compensation signals (Vdata+Vth signals) to the gate of transistor T7. Specifically, for pixel circuit 1 of the light-emitting pixel unit, a low-level signal is written to Vdata to ensure that transistor T7 provides current to the OLED device according to grayscale requirements during the light-emitting stage; for pixel circuit 1 of the detection pixel unit, a high-level signal is written to Vdata to ensure that transistor T7 is turned off during the light-emitting stage.

[0168] ③Emitting and Acquiring Stage: EM(n) inputs the first emission and acquisition drive signal (low level signal) and EM'(n) inputs the second emission and acquisition drive signal (low level signal). Transistors T4 and T5 are turned on, and transistors T1, T6, T2, and T3 are turned off. The OLED device electrically connected to the pixel circuit 1 of the display pixel unit emits light normally according to the input grayscale requirements. Transistor T7 of the pixel circuit 1 of the detection pixel unit is turned off. The OLED device is still in reverse bias state. In response to the light signal reflected back from the body surface by the received display light, the anode potential of the OLED device changes to generate a detection electrical signal and is maintained on the capacitance of the OLED device itself.

[0169] ④ Capacitor C1 reset stage: When the second gate drive signal (low level signal) is input to G(n-1), transistor T1 is turned on, and the second reset submodule resets the potential of capacitor C1 to the second initialization drive signal (Vinit2); when the first light emission acquisition drive signal (low level signal) is input to EM(n), transistor T4 is turned off, EM'(n) remains at a low level, transistor T5 remains on, and transistors T2, T3, and T6 are in the off state;

[0170] ⑤ Capacitor C1 writing stage: G(n) inputs the third gate drive signal (low level signal), transistor T2 turns on, and the detection electrical signal stored in the anode of the OLED device of the detection pixel unit is written into capacitor C1 through transistors T5 and T2. After the capacitor C1 of the pixel circuit 1 of this row is stored, EM'(n) inputs the second light emission acquisition drive signal (low level signal), transistor T5 turns off, and the next row of pixel circuit 1 repeats the above process to store the detection electrical signal into capacitor C1;

[0171] ⑥ Reading stage: When the second gate drive signal (low level signal) is input to G(n-1), transistor T1 is turned on, and transistors T2, T3, T4, and T5 are turned off; when the high level signal Ti is input to Vinit_col, the switch is turned off, and when the low level signal Tr is input to read_col, the switch is turned on. The detection electrical signal stored in capacitor C1 is read out line by line through the signal integrated transmission terminal 10a and the signal integrated transmission line 20.

[0172] (2) In specific example 2 of embodiment 3, such as Figure 22 , 23As shown in Figure 24, pixel circuit 1 is integrated into the display backplane using LTPS technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the figure is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. All transistors included in pixel circuit 1 are P-type MOSFETs. T1 serves as both the display reset TFT and the read-out TFT. Figure 22 In the middle, the photosensitive unit 3 is disposed on the source side of transistor T6; Figure 33 In the middle, the photosensitive unit 3 is located at the drain of transistor T5; Figure 24 In this circuit, the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to a signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Specific Example 1 of Embodiment 3, and it can also provide compatible driving and read functions through internal IC design, which will not be described further here. The operating timing process of this pixel circuit 1 is the same as in Specific Example 1 of Embodiment 3, and will not be described further here.

[0173] (3) In specific example 3 of embodiment 3, such as Figure 25 As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. Transistor T1 serves as both the reset TFT and the read-out TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to a signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Example 1 of Embodiment 3, and can also provide compatible drive and read functions through internal IC design, which will not be elaborated here. The operation of pixel circuit 1 is the same as in Example 1 of Embodiment 3, and will not be elaborated here either.

[0174] (4) In specific example 4 of embodiment 3, such as Figure 26 , 27As shown in Figure 28, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the figure is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. Transistors T1 and T2 are N-type MOSFETs, and the remaining transistors are P-type MOSFETs. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. T1 serves as both the reset TFT and the read-out TFT for the display. Figure 26 In the middle, the photosensitive unit 3 is disposed on the source side of transistor T6; Figure 27 In the middle, the photosensitive unit 3 is disposed on the drain side of the transistor T5; Figure 28 In this circuit, the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light emission acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Specific Example 1 of Embodiment 3. It can also provide compatible driving and read functions through the internal design of the IC, which will not be described in detail here. The operation process of the pixel circuit 1 is the same as in Specific Example 1 of Embodiment 3, which will also not be described in detail here.

[0175] Example 4

[0176] In embodiment four, pixel circuit 1 adopts an APS type circuit, and the source of transistor T1 is electrically isolated from the drain of transistor T6. Specifically, the source of transistor T1 forms the first initialization drive signal input terminal (Vinit1), and the drain of transistor T6 forms the signal integration transmission terminal 10a (Vinit2&read), used to output detection electrical signals and receive the second initialization drive signal. The following describes the process in conjunction with... Figures 29 to 38 The four specific examples listed in Example 4 are described below.

[0177] (1) In specific example 1 of embodiment four, such as Figure 29 and 30As shown, pixel circuit 1 is integrated into the display backplane using LTPS technology, and light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. All transistors in pixel circuit 1 are P-type MOS transistors. The first transistor 11 is transistor T6, which also serves as the display's reset TFT and read TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to signal integrated transmission line 20. The first signal transmission line 21 and the second signal transmission line 22 of signal integrated transmission line 20 are switched via Ti and Tr switches to serve as Vinit2 drive lines and read signal lines, respectively. The drive signals of Ti and Tr switches are Vinit2_col and read_col, respectively. Compatible drive and read functions can also be provided through internal IC design. Figure 31 As shown, the timing sequence of the pixel circuit 1 is as follows:

[0178] ① Reset Phase: When G'(n-1) inputs the first gate drive signal (low level signal) and G(n-1) inputs the second gate drive signal (low level signal), transistors T1 and T6 are turned on, and transistors T2, T3, T4, and T5 are turned off; when Vinit1_col inputs the low level signal Ti switch is turned on, when read_col inputs the high level signal Tr switch is turned off, and when the signal integration transmission terminal 10a inputs the second initialization drive signal (Vinit2), the first reset submodule of the composite function module 10 resets the anode of the OLED device and the gate of transistor T7 to the second initialization drive signal;

[0179] ② Compensation Stage: When G(n) receives the third gate drive signal (low level signal) and G'(n) receives the fourth gate drive signal (low level signal), transistors T2 and T3 are turned on, while transistors T1, T6, T4, and T5 are turned off. Display information is written to Vdata, and the compensation module writes pixel data signals and compensation signals (Vdata+Vth signals) to the gate of transistor T7. Specifically, for pixel circuit 1 of the light-emitting pixel unit, a low-level signal is written to Vdata to ensure that transistor T7 provides current to the OLED device according to grayscale requirements during the light-emitting stage; for pixel circuit 1 of the detection pixel unit, a high-level signal is written to Vdata to ensure that transistor T7 is turned off during the light-emitting stage.

[0180] ③Emitting and Acquiring Stage: EM(n) inputs the first emission and acquisition drive signal (low level signal) and EM'(n) inputs the second emission and acquisition drive signal (low level signal). Transistors T4 and T5 are turned on, and transistors T1, T6, T2, and T3 are turned off. The OLED device electrically connected to the pixel circuit 1 of the display pixel unit emits light normally according to the input grayscale requirements. Transistor T7 of the pixel circuit 1 of the detection pixel unit is turned off. The OLED device is still in reverse bias state. In response to the light signal reflected back from the body surface by the received display light, the anode potential of the OLED device changes to generate a detection electrical signal and is maintained on the capacitance of the OLED device itself.

[0181] ④ Capacitor C1 reset stage: When the second gate drive signal (low level signal) is input to G(n-1), transistor T1 is turned on, and the second reset submodule resets the potential of capacitor C1 to the first initialization drive signal (Vinit1); when the high level signal is input to EM(n), transistor T4 is turned off, EM'(n) remains at a low level signal, transistor T5 remains on, and transistors T2, T3, and T6 are in the off state;

[0182] ⑤ Capacitor C1 writing stage: When G(n) inputs the third gate drive signal (low level signal), transistor T2 is turned on. The detection electrical signal stored in the anode of the OLED device of the detection pixel unit is written into capacitor C1 through transistors T5 and T2. After the capacitor C1 of pixel circuit 1 in this row is stored, EM'(n) inputs a high level signal, transistor T5 is turned off, and the next row of pixel circuit 1 repeats the above process to store the detection electrical signal into capacitor C1.

[0183] ⑥ Reading stage: G'(n-1) inputs the first gate drive signal (low level signal), EM(n) inputs the first light emission acquisition drive signal (low level signal), and EM'(n) inputs the second light emission acquisition drive signal (low level signal). Transistors T4, T5, and T6 are turned on, and transistors T1, T2, and T3 are turned off. Vinit_col inputs a high level signal Ti switch and turns off, and read_col inputs a low level signal Tr switch and turns on. The detection electrical signal stored in capacitor C1 is read out line by line through transistors T5 and T6, signal integrated transmission terminal 10a, and signal integrated transmission line 20.

[0184] (2) In specific example 2 of embodiment four, such as Figure 32 , 33As shown in Figure 34, pixel circuit 1 is integrated into the display backplane using LTPS technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the figure is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signals of pixel circuit 1. All transistors included in pixel circuit 1 are P-type MOSFETs. T6 serves as both the display reset TFT and the read-out TFT. Figure 32 In the middle, the photosensitive unit 3 is disposed on the source side of transistor T6; Figure 33 In the middle, the photosensitive unit 3 is located at the drain of transistor T5; Figure 34 In this circuit, the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to a signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Specific Example 1 of Embodiment 4, and it can also provide compatible driving and read functions through internal IC design, which will not be described further here. The operating timing process of this pixel circuit 1 is the same as in Specific Example 1 of Embodiment 4, and will not be described further here.

[0185] (3) In specific example 3 of embodiment four, such as Figure 35 As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. Transistor T6 serves as both the reset TFT and the read-out TFT. The composite function module 10 includes transistors T6 and T1, the light-emitting acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to a signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Example 1 of Embodiment 3, and can also provide compatible drive and read functions through internal IC design, which will not be elaborated here. The operation of pixel circuit 1 is the same as in Example 1 of Embodiment 3, and will not be elaborated here either.

[0186] (4) In specific example 4 of embodiment four, such as Figure 36 , 37As shown in Figure 38, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the figure is for illustrative purposes only; it can also be reverse-connected and its voltage difference set to reverse bias. Photosensitive unit 3 can be provided with a separate reverse bias voltage signal via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. Transistors T1 and T2 are N-type MOSFETs, and the remaining transistors are P-type MOSFETs. The gate drive signals for transistors T1 and T6 have opposite voltage directions, as do the gate drive signals for transistors T2 and T3. T6 serves as both the reset TFT and the read-out TFT for the display. Figure 36 In the middle, the photosensitive unit 3 is disposed on the source side of transistor T6; Figure 37 In the middle, the photosensitive unit 3 is disposed on the drain side of the transistor T5; Figure 38 In this circuit, the photosensitive unit 3 is located on the drain side of transistor T1. The composite function module 10 includes transistors T6 and T1, the light emission acquisition module includes transistors T4 and T5, and the compensation module includes transistors T2 and T3. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as in Specific Example 1 of Embodiment 4, and it can also provide compatible driving and read functions through the internal design of the IC, which will not be described in detail here. The operation process of the pixel circuit 1 is the same as in Specific Example 1 of Embodiment 4, and will not be described in detail here either.

[0187] Example 5

[0188] In embodiment five, pixel circuit 1 adopts an APS type circuit, and the source of transistor T1 is electrically isolated from the drain of transistor T6. Specifically, the source of transistor T1 forms the first initialization drive signal input terminal (Vinit1), the drain of transistor T6 forms the second initialization drive signal input terminal (Vinit2), and the source of transistor T3 forms the signal integration transmission terminal 10a (Vdata&read), used for outputting detection electrical signals and receiving pixel data signals. The following describes the process in conjunction with... Figures 39 to 44 The following describes two specific examples listed in Example 5.

[0189] (1) In specific example 1 of embodiment 5, such as Figure 39 and 40As shown, pixel circuit 1 is integrated into the display backplane using LTPO technology, and light-emitting unit 2 and photosensitive unit 3 are integrated into the OLED device. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals for transistors T1 and T6 have opposite voltage directions, and the gate drive signals for transistors T2 and T3 have opposite voltage directions. The first transistor 11 is transistor T6. Transistors T6 and T1 are used as the reset TFT for the display, and transistor T3 serves as both the pixel data input TFT and the readout TFT. The composite function module 10 includes transistors T2, T3, and T6; the reset module includes transistors T1 and T6; and the light-emitting acquisition module includes transistors T4 and T5. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The first signal transmission line 21 and the second signal transmission line 22 of the signal integrated transmission line 20 are switched via Ti and Tr switches to serve as Vdata drive lines and read signal lines, respectively. The drive signals of Ti and Tr switches are Vdata_col and read_col, respectively. Compatible drive and read functions can also be provided through the internal design of the IC. Figure 41 As shown, the timing sequence of the pixel circuit 1 is as follows:

[0190] ① Reset phase: NG(n-1) inputs the first gate drive signal (high level signal), transistor T1 is turned on, transistors T2, T3, T4, T5, and T6 are turned off, and the first reset submodule resets the gate of T7 to the first initialization drive signal;

[0191] ② Compensation & Reset Stage: NG(n) inputs the second gate drive signal (high level signal) and PG(n) inputs the third gate drive signal (low level signal). Transistors T2, T3, and T6 are turned on, while transistors T1, T4, and T5 are turned off. The second reset submodule resets the anode of the OLED device to the second initialization drive signal. Vdata_col inputs a low level signal, switch Ti is turned on, and read_col inputs a high level signal, switch Tr is turned off. The signal integration transmission terminal 10a inputs Vdata display information. The compensation submodule of the composite function module 10 writes pixel data signals and compensation signals (Vdata+Vth signals) to the gate of transistor T7. Specifically, for pixel circuit 1 of the light-emitting pixel unit, Vdata is written with a low level signal so that transistor T7 provides current to the OLED device according to grayscale requirements during the light-emitting stage; for pixel circuit 1 of the detection pixel unit, Vdata is written with a high level signal so that transistor T7 is in the off state during the light-emitting stage.

[0192] ③Emitting and Acquiring Stage: EM(n) inputs the first emission and acquisition drive signal (low level signal) and EM'(n) inputs the second emission and acquisition drive signal (low level signal). Transistors T4 and T5 are turned on, and transistors T1, T6, T2, and T3 are turned off. The OLED device electrically connected to the pixel circuit 1 of the display pixel unit emits light normally according to the input grayscale requirements. Transistor T7 of the pixel circuit 1 of the detection pixel unit is turned off. The OLED device is still in reverse bias state. In response to the light signal reflected back from the body surface by the received display light, the anode potential of the OLED device changes to generate a detection electrical signal and is maintained on the capacitance of the OLED device itself.

[0193] ④ Capacitor C1 reset stage: NG(n-1) inputs the first gate drive signal (high level signal), transistor T1 turns on, and the third reset submodule resets the potential of capacitor C1 to the first initialization drive signal (Vinit1); EM(n) inputs a high level signal, transistor T4 turns off, EM'(n) remains at a low level signal, transistor T5 remains on, and transistors T2, T3, and T6 are in the off state;

[0194] ⑤ Capacitor C1 writing stage: NG(n) inputs the second gate drive signal (high level signal), transistor T2 turns on, and the detection electrical signal stored in the anode of the OLED device of the detection pixel unit is written into capacitor C1 through transistors T5 and T2. After the capacitor C1 of the pixel circuit 1 of this row is stored, EM'(n) inputs a high level signal, transistor T5 turns off, and the next row of pixel circuit 1 repeats the above process to store the detection electrical signal into capacitor C1;

[0195] ⑥ Reading stage: PG(n) inputs the third gate drive signal (low level signal) and EM'(n) inputs the second light emission acquisition drive signal (low level signal). Transistor T5 is turned on, and transistors T1, T2, and T4 are turned off. The second initialization signal uses a preset low level signal to make transistor T7 work but not enough to drive the OLED device to emit light. Vdata_col inputs a high level signal Ti switch is turned off, and read_col inputs a low level signal Tr switch is turned on. The reading submodule converts the detection electrical signal stored in capacitor C1 into a current signal through the transconductance of transistor T7, and reads the current signal line by line through the signal integrated transmission terminal 10a of the source of transistor T3 and the signal integrated transmission line 20.

[0196] (2) In specific example 2 of embodiment 5, such as Figure 42 , 43As shown in Figure 44, pixel circuit 1 is integrated into the display backplane using LTPO technology. Light-emitting unit 2 and photosensitive unit 3 (PD) are separately configured. Photosensitive unit 3 operates in reverse bias. The conduction direction of photosensitive unit 3 in the figure is for illustrative purposes only; it can also be reverse-connected and the voltage difference of photosensitive unit 3 set to reverse bias. Photosensitive unit 3 can be provided with a reverse bias voltage signal independently via Vbias, or it can share the Vss or Vdd power supply signal of pixel circuit 1. Transistors T1 and T2 are N-type MOS transistors, and the remaining transistors are P-type MOS transistors. The gate drive signals of transistors T1 and T6 have opposite voltage directions, and the gate drive signals of transistors T2 and T3 have opposite voltage directions. The first transistor 11 is transistor T6. Transistors T6 and T1 are used as the display reset TFT, and transistor T3 serves as both the pixel data input TFT and the readout TFT. The composite function module 10 includes transistors T2, T3, and T6; the reset module includes transistors T1 and T6; and the light-emitting acquisition module includes transistors T4 and T5. Figure 42 In the middle, the photosensitive unit 3 is disposed on the source side of transistor T6; Figure 43 In the middle, the photosensitive unit 3 is disposed on the drain side of the transistor T5; Figure 44 In this embodiment, the photosensitive unit 3 is disposed on the drain side of the transistor T1. The signal integrated transmission terminal 10a is electrically connected to the signal integrated transmission line 20. The routing of the signal integrated transmission line 20 is the same as that of Specific Example 1 in Embodiment 5. It can also provide compatible driving and read functions through the internal design of the IC, which will not be described in detail here. The operation process of the pixel circuit 1 is the same as that of Specific Example 1 in Embodiment 5, which will not be described in detail here either.

[0197] Secondly, embodiments of this application also provide a display panel, including a pixel circuit 1 with vital sign detection function according to any of the above embodiments of this application.

[0198] The display device according to the embodiments of this application, by employing the pixel circuit 1 of the above embodiments of this application, not only improves the integration of the display panel, but also helps to improve the display resolution and the resolution of facial recognition. Furthermore, since the pixel circuit 1 of the embodiments of this application does not require additional masks or light sensing units other than those for display functions, the manufacturing process of the backplate for in-screen fingerprint recognition is simplified, significantly reducing the manufacturing cost of the display panel.

[0199] Furthermore, other components of the display panel in the above embodiments can be derived from various technical solutions now and in the future known to those skilled in the art, and will not be described in detail here.

[0200] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a communication connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0201] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0202] The foregoing disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described above. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various implementations and / or arrangements discussed.

[0203] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various variations or substitutions within the technical scope disclosed in this application, and these should all be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A pixel circuit with vital sign detection function, characterized in that, The pixel circuit is electrically connected to a photosensitive unit and a light-emitting unit, which are integrated together. The pixel circuit includes a light-emitting acquisition module, a composite function module, and an energy storage transistor. The composite function module includes a first transistor, the source side of which is electrically connected to the light-emitting unit, and the source side of which is electrically connected to the photosensitive unit. The photosensitive unit is used to generate a detection electrical signal based on the reflected light signal under reverse bias conditions. The composite function module has a signal integration transmission terminal, which is used to output the detection electrical signal.

2. The pixel circuit with vital sign detection function according to claim 1, characterized in that, The signal integration transmission terminal is also used to receive initialization drive signals or pixel data signals.

3. The pixel circuit with vital sign detection function according to claim 2, characterized in that, The signal integrated transmission terminal is electrically connected to the signal integrated transmission line. The signal integrated transmission line includes a first signal transmission line and a second signal transmission line. The first signal transmission line is provided with a first switch, and the second signal transmission line is provided with a second switch. In response to a first switch drive signal, the first switch is turned on and the second switch is turned off; in response to a second switch drive signal, the second switch is turned on and the first switch is turned off.

4. The pixel circuit with vital sign detection function according to claim 1, characterized in that, The light-emitting unit includes an organic light-emitting device, and the organic light-emitting device generates a detection electrical signal based on the reflected light signal in a reverse-biased state.

5. The pixel circuit with vital sign detection function according to claim 1, characterized in that, The photosensitive unit and the light-emitting unit are provided separately, wherein the light-emitting unit includes an organic light-emitting device, and the photosensitive unit includes a PIN, an OPD, or a photosensitive TFT.

6. The pixel circuit with vital sign detection function according to claim 5, characterized in that, The photosensitive unit is disposed in the display panel on the side of the anode layer or source / drain layer of the light-emitting unit away from the substrate.

7. The pixel circuit with vital sign detection function according to claim 5, characterized in that, The negative electrode side of the photosensitive unit is connected to a reverse bias voltage signal; or, the positive electrode side and the negative electrode side of the photosensitive unit are respectively connected to the drain power supply signal and the source power supply signal of the pixel circuit.

8. The pixel circuit with vital sign detection function according to claim 1, characterized in that, The composite functional module also includes a second transistor; Wherein, the drain side of the first transistor is electrically connected to the source side of the second transistor, and the signal integrated transmission terminal is disposed between the drain side of the first transistor and the source side of the second transistor; or, the source side of the first transistor is electrically connected to the drain side of the second transistor, and the signal integrated transmission terminal is disposed at the drain side of the first transistor or the source side of the second transistor.

9. The pixel circuit with vital sign detection function according to claim 8, characterized in that, Both the light-emitting unit and the photosensitive unit are electrically connected to the source side of the first transistor; or, the light-emitting unit is electrically connected to the source side of the first transistor, and the photosensitive unit is electrically connected to the drain side of the second transistor.

10. The pixel circuit with vital sign detection function according to claim 8, characterized in that, The pixel circuit is integrated on the display backplane based on LTPS technology. The first transistor and the second transistor are of the same type, and the voltage direction of the gate drive signal input to the first transistor and the second transistor is the same. Alternatively, the pixel circuit is integrated into the display backplane based on LTPO technology, the first transistor is a P-type transistor, the second transistor is an N-type transistor, and the voltage directions of the gate drive signals input to the first transistor and the second transistor are opposite.

11. The pixel circuit with vital sign detection function according to any one of claims 1 to 10, characterized in that, It also includes a compensation module. The composite function module includes a reset submodule and a read submodule. The signal integrated transmission terminal is used to output the detection electrical signal and receive the initialization drive signal. The composite function module has a first gate drive signal input terminal, the compensation module has a second gate drive signal input terminal, and the light emission acquisition module has a light emission acquisition drive signal input terminal. In response to the first gate drive signal and the second switch drive signal, the reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit, respectively. In response to the second gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal. In response to the light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate the detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit; In response to the first gate drive signal and the first switch drive signal, the readout submodule outputs the detection electrical signal through the first signal transmission line.

12. The pixel circuit with vital sign detection function according to any one of claims 1 to 10, characterized in that, It also includes a compensation module, a storage module, and an energy storage capacitor. The composite functional module includes a first reset submodule, a second reset submodule, and a reading submodule. The signal integrated transmission terminal is used to output the detection electrical signal and receive the initialization drive signal. The composite functional module has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal. In response to the first gate drive signal, the second gate drive signal, and the second switch drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit, respectively. In response to the third gate drive signal and the fourth gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal. In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate the detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit. In response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input from the second signal transmission line into the energy storage capacitor; In response to the third gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; In response to the second gate drive signal and the first switch drive signal, the read submodule outputs the detection electrical signal stored in the energy storage capacitor through the first signal transmission line.

13. The pixel circuit with vital sign detection function according to any one of claims 1 to 10, characterized in that, It also includes a compensation module, a storage module, and an energy storage capacitor. The composite functional module includes a first reset submodule, a second reset submodule, and a reading submodule. The signal integrated transmission terminal is used to output the detection electrical signal and receive the initialization drive signal. The composite functional module has a first gate drive signal input terminal and a second gate drive signal input terminal. The compensation module has a third gate drive signal input terminal and a fourth gate drive signal input terminal. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal. In response to the first gate drive signal, the second gate drive signal, and the second switch drive signal, the first reset submodule writes the initialization drive signal input from the second signal transmission line into the gate of the energy storage transistor and the signal storage subunit of the photosensitive unit, respectively. In response to the third gate drive signal and the fourth gate drive signal, the compensation module writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal. In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate the detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit. In response to the second gate drive signal and the second light emission acquisition drive signal, the second reset submodule writes the initialization drive signal input from the second signal transmission line into the energy storage capacitor; In response to the third gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; In response to the second gate drive signal, the first light emission acquisition drive signal, and the second light emission acquisition drive signal, the reading submodule drives the energy storage transistor to operate under a low-potential drain power supply signal to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and, in response to the first switch drive signal, the reading submodule outputs the current signal through the first signal transmission line.

14. The pixel circuit with vital sign detection function according to any one of claims 1 to 10, characterized in that, It also includes a reset module, a storage module, and an energy storage capacitor. The composite functional module includes a compensation submodule and a reading submodule. The reset module includes a first reset submodule, a second reset submodule, and a third reset submodule. The signal integrated transmission terminal is used to output the detection electrical signal and receive pixel data signals. The reset module has a first gate drive signal input terminal. The composite functional module has a second gate drive signal input terminal and two third gate drive signal input terminals. The light emission acquisition module has a first light emission acquisition drive signal input terminal and a second light emission acquisition drive signal input terminal. In response to the first gate drive signal, the first reset submodule writes the first initialization signal into the gate of the energy storage transistor; In response to the second gate drive signal, the third gate drive signal, and the second switch drive signal, the compensation submodule writes the light emission compensation signal and the first pixel data signal into the gate of the energy storage transistor of the light emission pixel unit, and writes the acquisition compensation signal and the second pixel data signal into the gate of the energy storage transistor of the detection pixel unit, wherein the potential of the first pixel data signal is lower than the potential of the second pixel data signal; and the second reset module writes the second initialization signal into the signal storage subunit of the photosensitive unit. In response to the first light emission acquisition drive signal and the second light emission acquisition drive signal, the light emission acquisition module drives the light emission unit to emit light, and drives the photosensitive unit to generate the detection electrical signal based on the reflected light signal in the reverse polarization state, and writes it into the signal storage subunit of the photosensitive unit. In response to the first gate drive signal and the second light emission acquisition drive signal, the third reset submodule writes the first initialization signal into the energy storage capacitor; In response to the second gate drive signal, the storage module writes the detection electrical signal into the energy storage capacitor; In response to the third gate drive signal and the second light emission acquisition drive signal, the reading submodule drives the energy storage transistor to operate under a low-potential drain power supply signal to convert the detection electrical signal stored in the energy storage capacitor from a voltage signal into a current signal; and, in response to the first switch drive signal, the reading submodule outputs the current signal through the first signal transmission line.

15. A display panel, characterized in that, Includes a drive circuit with vital sign detection function as described in any one of claims 1 to 14.

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