An ultra-wideband high-efficiency power amplifier based on negative feedback regulation
By designing an ultrawideband high-efficiency power amplifier based on negative feedback regulation, the problems of efficiency loss and matching difficulties in the broadband in the prior art are solved, achieving high-efficiency amplification and stable matching in the entire frequency band, and improving the overall performance of the power amplifier.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XIAN INSTITUE OF SPACE RADIO TECH
- Filing Date
- 2023-08-03
- Publication Date
- 2026-07-07
AI Technical Summary
Existing technologies struggle to achieve high-efficiency power amplifiers over broadband, especially with significant efficiency losses during multi-frequency bandwidth expansion, and matching network design remains challenging.
An ultrawideband high-efficiency power amplifier based on negative feedback regulation is adopted. By designing the power amplifier input network, negative feedback network and output network, the gain and efficiency of high and low frequency bands are balanced. Microstrip lines and components such as capacitors and resistors are used to build a stable and matching network to achieve high-efficiency amplification across the entire frequency band.
While ensuring high efficiency and gain flatness over a wide bandwidth, impedance matching difficulty is reduced, thus improving the overall performance of the power amplifier.
Smart Images
Figure CN117200710B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to an ultrawideband high-efficiency power amplifier based on negative feedback regulation, belonging to the field of communication and navigation technology. Background Technology
[0002] Broadband high-efficiency power amplifiers (or simply power amplifiers) are key hardware components of broadband, high-capacity satellite payload systems. Due to the scarcity of spectrum and power resources on satellites, achieving high efficiency across a wider frequency band has become a bottleneck in realizing broadband satellite payload systems, as it requires overcoming traditional amplifier theories and methods.
[0003] Traditional power amplifiers and continuous-mode power amplifiers typically have a theoretical bandwidth extension limit of only one octave. When the operating bandwidth exceeds one octave, the second harmonics at some frequencies of the continuous-mode power amplifier will fall within the operating frequency band, making it impossible to accurately match the fundamental and harmonic impedances to the optimal impedance region across the entire frequency band. Therefore, theoretically, some efficiency is sacrificed to extend the bandwidth of power amplifiers to multiple octaves. However, how to minimize the efficiency sacrifice, maintain overall performance across multiple octaves, and provide a clear direction for the design of the output matching network remains a problem to be solved in power amplifier bandwidth extension technology. Summary of the Invention
[0004] The technical problem solved by this invention is to overcome the shortcomings of the prior art and provide an ultra-wideband high-efficiency power amplifier based on negative feedback regulation, thereby improving the operating bandwidth of microwave power amplifiers.
[0005] The technical solution of the present invention is: an ultra-wideband high-efficiency power amplifier based on negative feedback regulation, comprising a power amplifier input network, a power amplifier negative feedback network, and an output network;
[0006] The power amplifier input network is connected to the power amplifier negative feedback network and is used for power amplifier input matching and signal stabilization.
[0007] The power amplifier negative feedback network connects the gate and drain of the power amplifier transistor, controls the frequency and magnitude of the negative feedback signal from the drain to the gate, balances the gain and efficiency of the power amplifier in the high-frequency and low-frequency bands, and improves the reduction of gain and efficiency in the high-frequency band by reducing the gain and efficiency in the low-frequency band.
[0008] The power amplifier output network is used to perform power amplifier output matching, matching the power amplifier output to the required frequency band.
[0009] Furthermore, the power amplifier input network includes several resistors, several capacitors, several strip microstrip lines, and several convex microstrip lines;
[0010] One end of the first strip microstrip line receives the input signal, and the other end of the first strip microstrip line is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the first end of the first convex microstrip line; the second capacitor and the first resistor are connected in parallel, and the two are connected in series between the second end of the first convex microstrip line and the first end of the second convex microstrip line; the second resistor is connected in series between the second end of the second convex microstrip line and one end of the second strip microstrip line, and the other end of the second strip microstrip line is connected to the transistor gate power supply; the third end of the second convex microstrip line is connected to the first end of the third convex microstrip line, the second end of the third convex microstrip line is connected to the negative feedback loop, and the third end of the third convex microstrip line is connected to the transistor gate.
[0011] Furthermore, in the power amplifier input network, the parallel network of the second capacitor and the first resistor, as well as the connected second convex microstrip line, constitute a stable network structure for stabilizing the power amplifier signal; wherein, the length and width of the microstrip line, the capacitance and resistance, together determine the stability performance of the power amplifier.
[0012] Furthermore, the first convex microstrip line and the third strip microstrip line are used for power amplifier input matching, and their length and width parameters determine the power amplifier input matching.
[0013] Furthermore, the power amplifier negative feedback network includes several resistors, several capacitors, several inductors, several strip microstrip lines, and several arc-shaped microstrip lines; one end of the third strip microstrip line is connected to the power amplifier input network, and the other end is sequentially connected to the first arc-shaped microstrip line, the fourth strip microstrip line, the third capacitor, the fifth strip microstrip line, the first inductor, the second arc-shaped microstrip line, the third resistor, the fifth strip microstrip line, and the power amplifier output network.
[0014] Furthermore, the bending angle of the first arc-shaped microstrip line and the second arc-shaped microstrip line is 90 degrees.
[0015] Furthermore, in the power amplifier negative feedback network, the parameter values of capacitors, inductors, and resistors jointly determine the magnitude and frequency of the negative feedback signal, and microstrip lines are used to adjust the signal phase; the parameter values of capacitors, inductors, resistors, and microstrip lines are adjusted according to the power amplifier operating frequency and the required magnitude of the negative feedback signal.
[0016] Furthermore, the power amplifier output network includes several capacitors, square microstrip lines, and several strip microstrip lines; the first end of the square microstrip line is connected to the drain of the transistor, the second end is connected to the negative feedback loop, the third end is connected in sequence to the sixth strip microstrip line, the seventh strip microstrip line, the eighth strip microstrip line and the power supply, and the fourth end is connected in sequence to the ninth strip microstrip line, the tenth strip microstrip line, the eleventh strip microstrip line, the twelfth strip microstrip line, the capacitor, the thirteenth strip microstrip line and the output terminal of the power amplifier output network.
[0017] Furthermore, the third terminal is sequentially connected to the sixth, seventh, and eighth microstrip lines to form an output matching network, and the ninth, tenth, eleventh, twelfth, and thirteenth microstrip lines, along with a capacitor and a thirteenth microstrip line, form a bias circuit for blocking radio frequency; the length and width of the microstrip lines are determined according to the output matching requirements.
[0018] Furthermore, the sixth and seventh stripe microstrip lines are arranged in parallel, and the eighth stripe microstrip line is arranged perpendicular to the sixth and seventh stripe microstrip lines; the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines are arranged in parallel; and the sixth and seventh stripe microstrip lines are arranged perpendicular to the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines.
[0019] The advantages of this invention compared to the prior art are:
[0020] Compared to the problems of insufficient efficiency and large circuit size of traditional balanced power amplifiers and distributed power amplifiers, as well as the matching difficulties of hybrid continuous mode power amplifiers, the design method of ultra-wideband high-efficiency power amplifier based on negative feedback in this invention improves the efficiency of the power amplifier and reduces the difficulty of impedance matching while ensuring bandwidth, and significantly improves the flatness of efficiency and gain. Attached Figure Description
[0021] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:
[0022] Figure 1 This is a schematic diagram of the power amplifier input network structure of the present invention;
[0023] Figure 2 This is a schematic diagram of the negative feedback network structure of the power amplifier of the present invention;
[0024] Figure 3 This is a schematic diagram of the power (left) and efficiency (right) contour lines at different frequencies according to the present invention;
[0025] Figure 4 This is a schematic diagram of the output network structure of the present invention;
[0026] Figure 5 The output load impedance of this invention is represented by contour lines of power (left) and efficiency (right);
[0027] Figure 6This is a schematic diagram of the overall structure of an embodiment of the present invention. Detailed Implementation
[0028] To better understand the above technical solutions, the technical solutions of this application will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of this application and the specific features in the embodiments are detailed descriptions of the technical solutions of this application, rather than limitations on the technical solutions of this application. In the absence of conflict, the embodiments of this application and the technical features in the embodiments can be combined with each other.
[0029] The following description, in conjunction with the accompanying drawings, provides a more detailed account of an ultrawideband high-efficiency power amplifier based on negative feedback regulation, as provided in the embodiments of this application. Specific implementation methods may include (e.g.) Figure 1 , 2 As shown in Figure 4): power amplifier input network, power amplifier negative feedback network, and output network; the power amplifier input network is connected to the power amplifier negative feedback network and is used for input matching and signal stabilization of the power amplifier; the power amplifier negative feedback network is connected to the gate and drain of the power amplifier transistor, controls the frequency and magnitude of the negative feedback signal from the drain to the gate, balances the gain and efficiency of the high-frequency and low-frequency bands of the power amplifier, and improves the reduction of gain and efficiency in the high-frequency band by reducing the gain and efficiency in the low-frequency band; the power amplifier output network is used for output matching of the power amplifier, matching the output of the power amplifier to the required frequency band.
[0030] Specifically, this includes: firstly, optimizing the input matching design to achieve absolute stability and high-gain amplification across the entire frequency band; secondly, adding a negative feedback loop and extracting a high-power, high-efficiency output matching impedance space through multiple load-pulling designs at different frequencies within the target frequency band; and finally, applying a four-segment Chebyshev impedance converter as the output matching topology to achieve high-efficiency and high-power output over a wide frequency band. The implementation scheme includes the following:
[0031] 1) Input and stability design:
[0032] Based on the transistor's IV curve, select the drain voltage V. gs Gate voltage V ds Rogers 4350 was selected as the substrate material.
[0033] Based on this, the transistors are designed for stability. The power amplifier's stability network and input network are designed according to the target requirements to ensure the power amplifier has full-band stability and good gain. Specific input design details are as follows: Figure 1As shown, the RC network is selected as resistor R2 and capacitor C2, and the power supply resistor is R1. The resistor R2 is responsible for consuming low-frequency signals, while the capacitor C2 allows high-frequency signals to pass through. In addition to providing the static operating point, the remaining bias circuit is also responsible for blocking the entry of high-frequency signals. The resistor R1 is responsible for blocking low-frequency signals in the bias circuit.
[0034] 2) Negative feedback loop design:
[0035] The goal of the negative feedback loop is to reduce the gain in the low-frequency range and compensate for the gain tilt as the frequency decreases; therefore, a selection is made as follows: Figure 2 In the structure shown, resistor R is used to control the magnitude of the feedback signal, capacitor C is used for DC blocking, L is used to select the fundamental frequency, and the microstrip line in the loop is used to adjust the phase of the signal introduced by the negative feedback circuit to ensure that the phase difference between the introduced signal and the input signal is 180°.
[0036] 3) High-efficiency acquisition of matching space
[0037] Load-pulling techniques are applied to extract multi-level isopower and isoefficiency circles for amplifiers within a specific frequency band. The desired output power and PAE are selected, along with five different frequency points to determine the isoefficiency and isopower profiles at different frequencies. Based on observations of the power and efficiency contour lines, the target for the output matching network design is obtained, and the results are observed. Figure 3 The common area in the diagram is selected as the target for impedance matching.
[0038] 4) Implementation of wideband output matching
[0039] Using a Chebyshev impedance converter, the output network design was derived and optimized. A center frequency of 2.5 GHz and a maximum in-band reflection coefficient of 0.05 were selected. Considering both performance and amplifier size, an order N=4 was chosen to obtain a suitable bandwidth and good in-band ripple. The theoretical values for the four-segment wavelength converter were calculated, and the design was further optimized based on load pulling results. The resulting output matching network is shown below. Figure 4 As shown. The final output network simulation is then applied to a load-driven system, and its impedance change process and optimal output impedance region are shown below. Figure 5 As shown, the output impedance basically falls within the optimal region as the frequency changes, meeting the design requirements and specifications.
[0040] like Figure 6 In the technical solution provided in the embodiments of this application, the power amplifier input network includes several resistors, several capacitors, several strip microstrip lines, and convex microstrip lines;
[0041] Furthermore, one end of the first strip microstrip line receives the input signal, and the other end of the first strip microstrip line is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the first end of the first convex microstrip line; the second capacitor and the first resistor are connected in parallel, and the two are connected in series between the second end of the first convex microstrip line and the first end of the second convex microstrip line; the second resistor is connected in series between the second end of the second convex microstrip line and one end of the second strip microstrip line, and the other end of the second strip microstrip line is connected to the transistor gate power supply; the third end of the second convex microstrip line is connected to the first end of the third convex microstrip line, the second end of the third convex microstrip line is connected to the negative feedback loop, and the third end of the third convex microstrip line is connected to the transistor gate.
[0042] In one possible implementation, the power amplifier input network consists of a parallel network of a second capacitor and a first resistor, and a connected second convex microstrip line forming a stable network structure for stabilizing the power amplifier signal; wherein the length and width of the microstrip line, the capacitance and resistance, together determine the stability performance of the power amplifier.
[0043] Furthermore, in one possible implementation, the first convex microstrip line and the third strip microstrip line are used for power amplifier input matching, and their length and width parameters determine the power amplifier input matching.
[0044] In one possible implementation, the power amplifier negative feedback network includes several resistors, several capacitors, several inductors, several strip microstrip lines, and several arc-shaped microstrip lines; one end of the third strip microstrip line is connected to the power amplifier input network, and the other end is sequentially connected to the first arc-shaped microstrip line, the fourth strip microstrip line, the third capacitor, the fifth strip microstrip line, the first inductor, the second arc-shaped microstrip line, the third resistor, the fifth strip microstrip line, and the power amplifier output network.
[0045] Optionally, in one possible implementation, the bending angle of the first arcuate microstrip line and the second arcuate microstrip line is 90 degrees.
[0046] In one possible implementation, the parameter values of capacitors, inductors, and resistors in the power amplifier negative feedback network jointly determine the magnitude and frequency of the negative feedback signal, and microstrip lines are used to adjust the signal phase; the parameter values of capacitors, inductors, resistors, and microstrip lines are adjusted according to the power amplifier operating frequency and the required magnitude of the negative feedback signal.
[0047] Furthermore, the power amplifier output network includes several capacitors, square microstrip lines, and several strip microstrip lines; the first end of the square microstrip line is connected to the drain of the transistor, the second end is connected to the negative feedback loop, the third end is connected in sequence to the sixth, seventh, and eighth strip microstrip lines and the power supply, and the fourth end is connected in sequence to the ninth, tenth, eleventh, and twelfth strip microstrip lines, the capacitor, the thirteenth strip microstrip line and the output terminal of the power amplifier output network.
[0048] In one possible implementation, the third terminal is sequentially connected to the sixth, seventh, and eighth microstrip lines to form an output matching network, and the ninth, tenth, eleventh, twelfth, and thirteenth microstrip lines, along with a capacitor and a thirteenth microstrip line, form a bias circuit for blocking radio frequency; the length and width of the microstrip lines are determined according to the output matching requirements.
[0049] Optionally, the sixth and seventh stripe microstrip lines are arranged in parallel, and the eighth stripe microstrip line is arranged perpendicular to the sixth and seventh stripe microstrip lines; the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines are arranged in parallel; and the sixth and seventh stripe microstrip lines are arranged perpendicular to the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines.
[0050] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0051] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
[0052] The contents not described in detail in this specification are common knowledge to those skilled in the art.
Claims
1. A high-efficiency power amplifier based on negative feedback regulation, characterized by, This includes the power amplifier input network, the power amplifier negative feedback network, and the power amplifier output network; The power amplifier input network is connected to one end of the power amplifier negative feedback network and is used for power amplifier input matching and signal stabilization. The power amplifier negative feedback network connects the gate and drain of the power amplifier transistor, controls the frequency and magnitude of the negative feedback signal from the drain to the gate, balances the gain and efficiency of the power amplifier in the high-frequency and low-frequency bands, and improves the reduction of gain and efficiency in the high-frequency band by reducing the gain and efficiency in the low-frequency band. The power amplifier output network is connected to the other end of the power amplifier negative feedback network and is used to perform power amplifier output matching, matching the power amplifier output to the required frequency band. The power amplifier input network includes several resistors, several capacitors, several strip microstrip lines, and several convex microstrip lines; One end of the first strip microstrip line receives the input signal, and the other end of the first strip microstrip line is connected to one end of the first capacitor, and the other end of the first capacitor is connected to the first end of the first convex-shaped microstrip line; the second capacitor and the first resistor are connected in parallel, and the two are connected in series between the second end of the first convex-shaped microstrip line and the first end of the second convex-shaped microstrip line; the second resistor is connected in series between the second end of the second convex-shaped microstrip line and one end of the second strip microstrip line, and the other end of the second strip microstrip line is connected to the transistor gate power supply; the third end of the second convex-shaped microstrip line is connected to the first end of the third convex-shaped microstrip line, the second end of the third convex-shaped microstrip line is connected to the power amplifier negative feedback network, and the third end of the third convex-shaped microstrip line is connected to the transistor gate; The power amplifier negative feedback network includes several resistors, several capacitors, several inductors, several strip microstrip lines, and several arc-shaped microstrip lines; one end of the third strip microstrip line is connected to the power amplifier input network, and the other end is sequentially connected to the first arc-shaped microstrip line, the fourth strip microstrip line, the third capacitor, the fifth strip microstrip line, the first inductor, the second arc-shaped microstrip line, the third resistor, the fifth strip microstrip line, and the power amplifier output network; Microstrip lines are used to adjust the phase of the signal introduced by the negative feedback circuit to ensure that the phase difference between the introduced signal and the input signal is 180°. The bending angle of the first arc-shaped microstrip line and the second arc-shaped microstrip line is 90 degrees; The power amplifier output network includes several capacitors, square microstrip lines, and several strip microstrip lines. The first end of the square microstrip line is connected to the drain of a transistor, the second end is connected to the negative feedback network of the power amplifier, the third end is connected in sequence to the sixth, seventh, and eighth strip microstrip lines and the power supply, and the fourth end is connected in sequence to the ninth, tenth, eleventh, and twelfth strip microstrip lines, the capacitor, the thirteenth strip microstrip line and the output terminal of the power amplifier output network.
2. The ultra-wideband high-efficiency power amplifier based on negative feedback regulation of claim 1, wherein, In the power amplifier input network, the parallel network of the second capacitor and the first resistor, as well as the connected second convex microstrip line, constitute a stable network structure for stabilizing the power amplifier signal; wherein, the length and width of the microstrip line, the capacitance and resistance, together determine the stability performance of the power amplifier.
3. The ultra-wideband high-efficiency power amplifier based on negative feedback regulation of claim 1, wherein, The first convex microstrip line and the third strip microstrip line are used for power amplifier input matching, and their length and width parameters determine the power amplifier input matching.
4. The ultra-wideband high-efficiency power amplifier based on negative feedback regulation of claim 1, wherein, In the power amplifier negative feedback network, the parameter values of capacitors, inductors, and resistors jointly determine the magnitude and frequency of the negative feedback signal, while microstrip lines are used to adjust the signal phase. The parameter values of capacitors, inductors, resistors, and microstrip lines are adjusted according to the power amplifier's operating frequency and the required magnitude of the negative feedback signal.
5. The ultra-wideband high-efficiency power amplifier based on negative feedback regulation of claim 1, wherein, The third terminal is sequentially connected to the sixth, seventh, and eighth microstrip lines to form an output matching network. The ninth, tenth, eleventh, twelfth, and thirteenth microstrip lines, along with the capacitor and thirteenth microstrip line, form a bias circuit for blocking radio frequency. The length and width of the microstrip lines are determined according to the output matching requirements.
6. The ultra-wideband high-efficiency power amplifier based on negative feedback regulation of claim 1, wherein, The sixth and seventh stripe microstrip lines are arranged in parallel, and the eighth stripe microstrip line is arranged perpendicular to the sixth and seventh stripe microstrip lines; the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines are arranged in parallel; and the sixth and seventh stripe microstrip lines are arranged perpendicular to the ninth, tenth, eleventh, twelfth, and thirteenth stripe microstrip lines.