Timing controller, working method of timing controller and display device

Abstract

The application discloses a timing controller, a working method of the timing controller and a display device. The timing controller is applied to a display panel and comprises a reading module for reading a flag sequence; a processing module connected with the reading module, the processing module verifying the flag sequence to obtain a verification result; in response to the verification result being a first result, the processing module controls the reading module to read compensation data; and in response to the verification result being a second result, the processing module skips the operation of controlling the reading module to read the compensation data. The timing controller provided by the application reads the flag sequence before reading the compensation data, verifies the flag sequence, and thus obtains whether to read the compensation data. When the timing controller finds that the flag sequence is incorrect, the timing controller skips the step of reading the compensation data, thereby shortening the waiting time for reading the compensation data, saving the waiting time from power-on to the display screen lighting process, and avoiding the black screen phenomenon of the display screen.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of liquid crystal display technology, and in particular to a timing controller, a working method of the timing controller, and a display device. Background Art

[0002] In some LCD display products, when the device is first powered on and automatically starts up, the timing controller downloads compensation data from memory such as FLASH or EEPROM. It then processes the compensation data and then compensates the grayscale. However, some LCD display products do not require downloading compensation data, but the timing controller still performs this process. This process requires a certain waiting time. During this waiting time, the display may appear black, affecting the subjective experience. Summary of the Invention

[0003] The embodiments of the present application provide a timing controller, a working method of the timing controller, and a display device to solve the technical problem in the prior art that an LCD display product that does not require compensation causes the display screen to be black for too long during the process of downloading compensation data.

[0004] In order to solve the above technical problems, the embodiments of the present application disclose the following technical solutions:

[0005] In a first aspect, a timing controller is provided, wherein the timing controller is applied to a display panel and includes:

[0006] A reading module, configured to read a flag sequence;

[0007] a processing module, the processing module being connected to the reading module, and the processing module verifying the flag sequence to obtain a verification result;

[0008] In response to the verification result being a first result, the processing module controls the reading module to read compensation data;

[0009] In response to the verification result being the second result, the processing module skips controlling the reading module to read the compensation data.

[0010] In combination with the first aspect, the compensation data and the flag sequence are stored in a memory of the display panel.

[0011] In combination with the first aspect, the processing module includes a buffer, the buffer is used to store a check code, and the processing module checks the flag sequence with the check code to obtain the check result.

[0012] In combination with the first aspect, the processing module is further configured to process the compensation data to obtain transcoded data.

[0013] In combination with the first aspect, the timing controller further includes a storage module and an output module, the storage module is connected to the processing module, and the storage module is used to store the transcoded data;

[0014] The output module is connected to the storage module, and is used to output the transcoded data.

[0015] In combination with the first aspect, the data volume of the flag sequence is smaller than the data volume of the compensation data.

[0016] In combination with the first aspect, the flag sequence and the compensation data are located in the same sequence, and the flag sequence is located at the front end of the compensation data;

[0017] The flag sequence includes any one of binary numbers, octal numbers, decimal numbers and hexadecimal numbers.

[0018] In a second aspect, a working method of a timing controller is provided, comprising:

[0019] In response to an initial power-on instruction, reading a flag sequence;

[0020] Verifying the flag sequence to obtain a verification result;

[0021] In response to the verification result being a first result, reading compensation data;

[0022] In response to the verification result being the second result, the step of reading the compensation data is skipped.

[0023] In combination with the second aspect, the method further includes processing the compensation data to obtain transcoded data, and transmitting the transcoded data to a driver chip;

[0024] The driving chip outputs driving data based on the transcoded data.

[0025] In a third aspect, a display device is provided, comprising a display panel and a timing controller as described in any one of the first aspects, or the timing controller in the display device adopts a working method of the timing controller as described in any one of the second aspects.

[0026] One of the above technical solutions has the following advantages or beneficial effects:

[0027] Compared with the prior art, the present application provides a timing controller, which is applied to a display panel and includes: a reading module, which is used to read a flag sequence; a processing module, which is connected to the reading module and verifies the flag sequence to obtain a verification result; in response to the verification result being a first result, the processing module controls the reading module to read compensation data; in response to the verification result being a second result, the processing module skips the operation of controlling the reading module to read compensation data. The timing controller provided by the present application reads the flag sequence before reading the compensation data and verifies the flag sequence, thereby determining whether to read the compensation data. When the timing controller finds that the flag sequence is incorrect, the timing controller skips the step of reading the compensation data, thereby shortening the waiting time for reading the compensation data, thereby saving the waiting time from power-on to display screen lighting, and avoiding the black screen phenomenon on the display screen.

[0028] The present application also provides a method for operating a timing controller, comprising: reading a flag sequence in response to an initial power-on instruction; verifying the flag sequence to obtain a verification result; reading compensation data in response to a first verification result; and skipping the step of reading the compensation data in response to a second verification result. The method for operating a timing controller provided in the present application reads and verifies the flag sequence. If the flag sequence is found to be incorrect, the timing controller skips the step of reading the compensation data and directly performs a power-on operation, thereby shortening the waiting time for reading the compensation data and, in turn, saving the waiting time from power-on to display screen lighting, thereby avoiding the display screen from appearing black. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0030] Figure 1 A schematic diagram of module connections of a timing controller provided in an embodiment of the present application;

[0031] Figure 2 A schematic diagram of module connections of a display device provided in an embodiment of the present application;

[0032] Figure 3 A partial schematic diagram of an array sequence provided in an embodiment of the present application;

[0033] Figure 4 A schematic diagram of the display device workflow provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0035] The specific implementation of this application is described below through examples:

[0036] like Figure 1 As shown, an embodiment of the present application provides a timing controller, which is applied to a display panel and includes: a reading module, the reading module is used to read a flag sequence; a processing module, the processing module is connected to the reading module, and the processing module verifies the flag sequence to obtain a verification result; in response to the verification result being a first result, the processing module controls the reading module to read compensation data; in response to the verification result being a second result, the processing module skips the operation of controlling the reading module to read compensation data. Specifically, TCON (Timing Controller) is a timing controller, which is an important component of a liquid crystal display and is mainly responsible for controlling the display timing of the LCD. The timing controller includes a reading module and a processing module, and the reading module is mainly used to read data. In an embodiment of the present application, the reading module is used to read the flag sequence and compensation data; the processing module includes a microprocessor, which is mainly used to verify the flag sequence to determine whether the flag sequence is correct. If the flag sequence is correct, the first result is output to indicate that it is correct, and the processing module controls the reading module to read the compensation data, and continues to read other power-on data after reading the compensation data; if the flag sequence is wrong, the second result is output to indicate that it is wrong, and the processing module skips the step of controlling the reading module to read the compensation data and directly reads other power-on data, thereby speeding up the power-on operation of the display screen, greatly shortening the waiting time for reading the compensation data, and thus saving the waiting time from power-on to the display screen lighting process, and avoiding the black screen phenomenon of the display screen.

[0037] like Figure 1 As shown, in an embodiment of the present application, the compensation data and the flag sequence are stored in the memory of the display panel. Specifically, some memories may be built into the display panel to facilitate the storage of correction data, display data and control parameters. The stored correction data can be output when the display panel needs correction for subsequent use and correction. The compensation data is stored in the memory of the display panel so that the timing controller can read and use it. Correspondingly, the flag sequence can also be stored in the memory of the display panel. In some other embodiments of the present application, the flag sequence and compensation data may also be stored in a storage module in the timing controller or other functional modules with data storage, or stored in the panel controller, so as to facilitate the timing controller to directly read the flag sequence and compensation data, thereby reducing the time for reading the flag sequence and compensation data, further saving the waiting time from power-on to display screen lighting, and avoiding the black screen phenomenon of the display screen.

[0038] like Figure 1 As shown, in an embodiment of the present application, the processing module includes a buffer, and the buffer is used to store the check code. The processing module checks the flag sequence with the check code to obtain the check result. Specifically, after the reading module reads the flag sequence, the processing module matches the flag sequence with the check code to determine whether the flag sequence matches the check code set in advance. If the flag sequence and the check code match correctly, the first result is output to indicate that it is correct, and the processing module controls the reading module to read the compensation data, and continues to read other power-on data after reading the compensation data; if the flag sequence and the check code match incorrectly, the second result is output to indicate that it is wrong, and the processing module skips the step of controlling the reading module to read the compensation data, and directly reads other power-on data, thereby speeding up the power-on operation of the display screen, greatly shortening the waiting time for reading the compensation data, and thus saving the waiting time from power-on to the display screen lighting process, and avoiding the black screen phenomenon of the display screen.

[0039] like Figure 1 As shown, in an embodiment of the present application, the processing module is further used to process the compensation data to obtain transcoded data. Specifically, the processing module transcodes the compensation data, adjusts the grayscale mapping relationship through transcoding, and implements gamma compensation for the pixels by adjusting the grayscale. Gamma compensation refers to performing certain nonlinear compensation on the display signal after the display signal undergoes digital-to-analog conversion, so that the response relationship between the output signal and the input signal is more consistent with the human eye's perception of light. Gamma compensation can be used to adjust the display brightness and color of the LCD panel to improve the display effect and color reproduction.

[0040] like Figure 1As shown, in an embodiment of the present application, the timing controller further includes a storage module, which is connected to the processing module and is used to store transcoded data. Specifically, the storage module is a display data cache module included in the timing controller. The storage module in the timing controller primarily stores timing parameters, intermediate results, and correction data. The timing controller generates various timing signals and control signals based on the display's parameters and specifications to control the display of the LCD panel. These parameters typically include horizontal synchronization parameters, vertical synchronization parameters, number of rows, and period. The storage module can temporarily store these parameters for use during the timing controller's operation. During the timing controller's operation, calculations and processing are typically required to generate timing signals and control signals that match the LCD panel. Intermediate results generated during these processes, such as counter values ​​and clock cycles, can be temporarily stored in the storage module for use in subsequent calculations and processing. Transcoded data is also considered an intermediate result. During the production and use of LCDs, they may be affected by various factors, such as temperature, humidity, and voltage. These factors can cause changes in the performance and display quality of the LCD display. In order to ensure the display effect and quality of the liquid crystal display, the timing controller usually needs to be calibrated, and the data and parameters generated during the calibration process can be temporarily stored in the storage module for use in subsequent use and calibration processes.

[0041] like Figure 1 As shown, in an embodiment of the present application, the timing controller further includes an output module, which is connected to the storage module and is used to output transcoded data. Specifically, the output module is the signal driving module in the timing controller. The function of the output module is to output the processed timing signal and control signal to each pixel of the LCD panel, control its display brightness and color, and ultimately present a complete image. Therefore, the main function of the output module is to output the timing signal, control the brightness and color of the pixel points, and output gamma compensation and pixel correction.

[0042] Based on the above, the present application rewrites the microprocessor in the timing controller. The rewriting mainly includes storing a check code in the microprocessor's buffer and rewriting the microprocessor's execution steps. Before the rewriting, the microprocessor's execution steps are to directly read the compensation data. After the rewriting, the microprocessor first obtains the flag sequence, then matches the flag sequence with the check code for verification, and decides whether to read the compensation data based on the verification result. By rewriting the timing controller, it is possible to avoid some LCD screens skipping the step of reading compensation data when compensation data is not needed and directly performing normal operation, thereby greatly shortening the waiting time for reading compensation data, thereby saving the waiting time from power-on to display screen lighting, and avoiding the black screen phenomenon on the display screen.

[0043] like Figure 3 As shown, in an embodiment of the present application, the data volume of the flag sequence is smaller than the data volume of the compensation data. Specifically, the flag sequence is used to identify the compensation data or to provide a label for the timing controller to feedback whether to read the compensation data. Therefore, the reading and verification process of the flag sequence cannot take up too much time. Since the compensation data requires all the data required to adjust the display brightness and color of the LCD panel, the data volume will be larger and will take more time to read. Therefore, the process of the timing controller reading the flag sequence and matching it will not take up too much time.

[0044] like Figure 3 As shown, in an embodiment of the present application, the flag sequence and the compensation data are located in the same sequence, and the flag sequence is located at the front end of the compensation data. Specifically, in order to make the flag sequence play the role of marking the compensation data, the flag sequence is placed at the front end of the compensation data. When the timing controller reads the flag sequence, the flag sequence can be quickly locked, thereby avoiding the timing controller consuming too much time to read the flag sequence. Placing the flag sequence and the compensation data in the same information sequence is beneficial for the timing controller to quickly lock the position of the compensation data after reading the flag sequence. In other embodiments of the present application, the flag sequence and the compensation data can also be in different information sequences, and it is only necessary to ensure that the flag sequence is read first and quickly.

[0045] like Figure 3 As shown, in an embodiment of the present application, the flag sequence includes any one of a binary number, an octal number, a decimal number and a hexadecimal number. Specifically, representing the flag sequence by a binary number, an octal number, a decimal number or a hexadecimal number can facilitate the timing controller to quickly compare with the check code, thereby reducing the matching time of the flag sequence and the check code. Generally speaking, the flag sequence and the check code are converted into a sequence of numbers in the same base, and then the principle of one-to-one comparison of each digit is used to confirm whether the flag sequence and the check code are consistent. In some other embodiments of the present application, it is also possible to perform four arithmetic operations on the flag sequence and compare the operation results with the check code. If the results are consistent or within a certain range, the flag sequence is considered to be correct, otherwise the flag sequence is considered to be wrong.

[0046] Based on the same inventive concept, an embodiment of the present application also provides a working method of a timing controller, including: in response to the first power-on instruction, reading a flag sequence; verifying the flag sequence to obtain a verification result; in response to the verification result being a first result, reading compensation data; in response to the verification result being a second result, skipping the step of reading compensation data. Specifically, when the timing controller receives the power-on instruction, it first obtains the flag sequence, verifies the flag sequence, and then determines whether to continue reading compensation data based on the verification result. If the verification result is an error, it means that the flag sequence is incorrect, and the timing controller no longer continues to read compensation data. By setting a flag sequence in the memory of the display panel and starting to read compensation data or perform the next operation based on the flag sequence, the waiting time for reading compensation data is greatly shortened, thereby saving the waiting time from power-on to display screen lighting, and avoiding the black screen phenomenon of the display screen.

[0047] In an embodiment of the present application, the compensation data is further processed to obtain transcoded data, and the transcoded data is transmitted to the driver chip; the driver chip outputs the driving data based on the transcoded data. Specifically, the driver chip is connected to the timing controller, the timing controller processes the compensation data to obtain transcoded data, and the driver chip outputs the driving data based on the transcoded data. Specifically, after being processed by the timing controller, the compensation data is usually transmitted to the driver chip (DriverIC) of the liquid crystal display, and the driver chip further transmits the compensation data to the source driver (Source Driver) and row driver (Gate Driver) of the liquid crystal display. Generally, the timing controller is responsible for transmitting the image signal and related parameters to the driver chip. In this process, the compensation data is processed by the timing controller and transmitted to the driver chip together with other image processing operations. In other words, the driver chip transmits the compensation data to the source driver and row driver respectively so that appropriate voltage or current adjustment is performed on each pixel during the display process, thereby achieving correction. By adjusting the intensity and waveform of the drive signal, the liquid crystal display can more accurately display the brightness and color of the image.

[0048] like Figure 1 、 Figure 2 and Figure 4As shown, an embodiment of the present application provides a display device, comprising: a display panel, the display panel including a memory for storing a flag sequence and compensation data; a timing controller provided in any of the above items, the timing controller being connected to the memory, the timing controller including a storage module for storing a check code; in response to an initial power-on instruction, the timing controller reads the flag sequence; the timing controller compares the flag sequence with the check code to obtain a check result; in response to the check result being a first result, the timing controller reads the compensation data; in response to the check result being a second result, the timing controller performs a power-on operation; or, the timing controller in the display device operates using the operating method of the timing controller provided in any of the above items. Specifically, the display panel has a built-in memory, and when receiving the power-on instruction, the timing controller first obtains the flag sequence from the memory, checks the flag sequence with the check code, and then determines whether to continue reading the compensation data based on the check result. If the check result is an error, indicating that the flag sequence does not match the check code, the timing controller will no longer continue reading the compensation data. By setting a flag sequence in the memory of the display panel and starting to read the compensation data or perform the next operation based on the flag sequence, the waiting time for reading the compensation data is greatly shortened, thereby saving the waiting time from power-on to display screen lighting, and avoiding the black screen phenomenon of the display screen. It should be noted that the first power-on instruction refers to the moment when the power is first received in the initial state. When the display device is powered on for the first time, the various circuits in the display device will start from the initial state and complete a series of initialization operations to prepare for normal display work. The preparation work includes reading the compensation data, and adjusting the display brightness and color of the LCD panel through the compensation data to improve the display effect and color reproduction.

[0049] In some other embodiments of the present application, when the LCD panel does not need compensation data for grayscale compensation, the flag sequence can be set to empty data. When the timing controller reads the flag sequence and feedback fails, it can be considered that the compensation data is not stored in the memory of the display panel. Therefore, the timing controller can skip the step of reading the compensation data and proceed to the next step. By setting the flag sequence to empty data, the waiting time from power-on to display screen lighting can also be saved, thereby avoiding the black screen phenomenon on the display screen.

[0050] The above is a detailed introduction to a timing controller, a working method of the timing controller and a display device provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A timing controller, which is applied to a display panel, characterized in that: include: A reading module, configured to read a flag sequence; a processing module, the processing module being connected to the reading module, and the processing module verifying the flag sequence to obtain a verification result; In response to the verification result being a first result, the processing module controls the reading module to read compensation data; In response to the verification result being the second result, the processing module skips controlling the reading module to read the compensation data, the compensation data and the flag sequence are stored in the memory of the display panel, and the data amount of the flag sequence is smaller than the data amount of the compensation data.

2. The timing controller according to claim 1, wherein: The processing module includes a buffer, the buffer is used to store a check code, and the processing module verifies the flag sequence with the check code to obtain the verification result.

3. The timing controller according to claim 1, wherein: The processing module is further configured to process the compensation data to obtain transcoded data.

4. The timing controller according to claim 3, wherein: The timing controller further includes a storage module and an output module, wherein the storage module is connected to the processing module and is used to store the transcoded data; The output module is connected to the storage module, and is used to output the transcoded data.

5. The timing controller according to claim 1, wherein: The flag sequence and the compensation data are located in the same sequence, and the flag sequence is located at the front end of the compensation data; The flag sequence includes any one of binary numbers, octal numbers, decimal numbers and hexadecimal numbers.

6. A method for operating a timing controller, characterized in that: include: In response to an initial power-on instruction, reading a flag sequence; Verifying the flag sequence to obtain a verification result; In response to the verification result being a first result, reading compensation data; In response to the verification result being the second result, the step of reading the compensation data is skipped.

7. The operating method of the timing controller according to claim 6, wherein: The method further includes processing the compensation data to obtain transcoded data, and transmitting the transcoded data to a driver chip; The driving chip outputs driving data based on the transcoded data.

8. A display device, characterized in that: The display device includes a display panel and the timing controller according to any one of claims 1 to 5, or the timing controller in the display device adopts the working method of the timing controller according to any one of claims 6 to 7.

Images