Method for manufacturing circuit board line structure with through hole and manufactured circuit board line structure with through hole
Patent Information
- Application Number
- CN202211010959.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-23
- Publication Date
- 2026-09-11
- Estimated Expiration
- 2042-08-23
AI Technical Summary
然而,此种制作方法,将影响电路板结构的制作效率,也产生额外的步骤及成本消耗
[0014] In summary, by covering the surface of two copper layers with two first photoresist layers, exposure, development, and etching are performed to first form the circuit patterns on both sides, followed by the fabrication of other structures. This simplifies the manufacturing process and reduces labor and cost. Furthermore, in subsequent structural fabrication, the metallization and electroplating area is increased by using a second photoresist layer. During electroplating, the copper layer extends to the surface of the second photoresist layer. Then, the copper layer exceeding the height of the second photoresist layer and the second photoresist layer are removed simultaneously to control the protrusion of the copper layer. This avoids the problem of the electroplated layer overflowing into the holes during plating, forming protrusions around the holes. Additionally, controlling the protrusion of the electroplated layer facilitates subsequent multilayer board stacking. For example, when stacking outer layers, the heights of the copper layer and the second photoresist layer can be made approximately the same to increase the connectivity between the substrate and the outer layers. If the circuit board circuit structure has already been fabricated, the heights of the copper layer and the copper layer can also be made approximately the same to ensure a flat outer surface of the circuit board circuit structure.
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Figure CN117677059B_ABST
Abstract
Description
Technical Field
[0001] A method for manufacturing a circuit board with vias, particularly a method for fabricating a circuit board circuit structure and the resulting circuit board circuit structure with vias. Background Technology
[0002] Conventional circuit board fabrication methods typically involve first plating the vias, then fabricating the circuitry on both sides, usually through a full-coverage plating process or a selective plating process. In this general process, any breaks in the conductive layer's insulation will affect the plating quality. However, in specialized metallization systems, due to the characteristics of metallization, the circuitry on the substrate must be fabricated separately. For example, in graphene metallization systems, if there are breaks in the conductive layer on both sides during plating, it will affect the plating performance. Therefore, only by maintaining a complete conductor on one side can the circuitry on that side be formed first, followed by the other side. This allows for better control of the substrate and conductor thickness. However, this method reduces the efficiency of circuit board fabrication and introduces additional steps and costs. Summary of the Invention
[0003] In view of this, this invention provides a method for manufacturing a circuit board circuit structure with vias in one embodiment, comprising providing a substrate, the substrate including a substrate layer and two copper layers, the substrate layer having opposing first and second surfaces, and the two copper layers respectively formed on the first and second surfaces of the substrate layer. Two first photoresist layers are covered on the surfaces of the two copper layers, and by exposure and development, a first pattern structure is formed on one side of the first surface of the first photoresist layer, and a second pattern structure is formed on one side of the first surface of the first photoresist layer. An etching process is performed to remove the surfaces of each copper layer not covered by the respective first photoresist layers. The two first photoresist layers are removed. Two second photoresist layers are covered on the surfaces of each copper layer, and by exposure, a third pattern structure is formed on one side of the first surface of the second photoresist layer, and a fourth pattern structure is formed on one side of the second surface of the second photoresist layer. Drilling is performed on the surface of the second photoresist layer located on one side of the first surface to form at least one first hole, which connects to the second surface of the substrate layer. Drilling is also performed on the surface of the second photoresist layer located on one side of the second surface to form at least one second hole, which connects to the first surface of the substrate layer. A metallization layer is formed by direct chemical metallization, covering the surfaces of at least one first hole, the second photoresist layer located on one side of the first surface, the at least one second hole, and the second photoresist layer located on one side of the second surface. A copper plating layer is formed by electroplating, covering the surfaces of at least one first hole and at least one second hole, extending along the at least one first hole and at least one second hole, and covering the second photoresist layer on one side of both the first and second surfaces. Part of the copper plating layer is removed by chemical etching. The second photoresist layer is then removed.
[0004] In some embodiments, after removing the two second photoresist layers, two outer layer plates are provided. Each outer layer plate includes a material layer and a copper layer. The material layer has opposing third and fourth surfaces. The third surfaces of the material layers of each outer layer plate are respectively disposed on the copper layers on the first and second surfaces of the substrate. The copper layer is formed on the fourth surface of the material layer. A third photoresist layer is covered on the surface of the copper layer, and a fifth pattern structure is formed by exposure and development. An etching process is performed to remove the surface of the copper layer not covered by the third photoresist layer. The third photoresist layer is removed. A fourth photoresist layer is covered on the surface of the copper layer, and a sixth pattern structure is formed by exposure. A hole is drilled from the surface of the fourth photoresist layer to form at least one third hole. The at least one third hole of each outer layer plate is respectively connected to the copper cladding layer on one side of the first surface and one side of the second surface of the substrate. A metallization layer is formed by direct chemical metallization, and the metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer. A copper plating layer is formed by electroplating, covering at least one third hole and extending along the at least one third hole and covering a fourth photoresist layer. Part of the copper plating layer is removed by chemical etching. The fourth photoresist layer is then removed.
[0005] In some embodiments, after removing the two second photoresist layers, an outer layer is provided. The outer layer includes a material layer and a copper layer. The material layer has opposing third and fourth surfaces. The third surface of the material layer is disposed on a copper layer on the first surface side of the substrate, and the copper layer is formed on the fourth surface of the material layer. The third photoresist layer is covered on the surface of the copper layer and the surface of the copper layer on one side of the second surface. By exposure and development, the third photoresist layer forms a fifth pattern structure. An etching process is performed to remove the surface of the copper layer not covered by the third photoresist layer. The third photoresist layer is removed. The fourth photoresist layer is covered on the surface of the copper layer and the surface of the copper layer on one side of the second surface. By exposure, the fourth photoresist layer forms a sixth pattern structure. A hole is drilled from the surface of the fourth photoresist layer on one side of the first surface to form at least one third hole. The at least one third hole is conductive to a copper-clad layer on one side of the first surface of the substrate. A metallization layer is formed by direct chemical metallization. The metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer. A copper plating layer is formed by electroplating, covering at least one third hole and extending along the at least one third hole and covering a fourth photoresist layer. Part of the copper plating layer is removed by chemical etching. The fourth photoresist layer is then removed.
[0006] In some embodiments, after chemical etching, the height of the copper cladding layer is flush with that of the second photoresist layer.
[0007] In some embodiments, after chemical etching, the height of the copper cladding is flush with that of the copper layer.
[0008] In some embodiments, after chemical etching of the outer layer, the height of the copper plating layer is flush with that of the fourth photoresist layer.
[0009] In some embodiments, after chemical etching of the outer layer, the height of the copper plating layer is flush with that of the copper material layer.
[0010] In some embodiments, the material layer of the outer layer covers a portion of the copper plating layer on one side of the first surface of the substrate.
[0011] In some embodiments, the first photoresist layer and the second photoresist layer are dry film photoresist.
[0012] In some embodiments, at least one first hole and at least one second hole are formed using laser drilling.
[0013] Furthermore, in one embodiment of this invention, a circuit board structure with vias is provided, which is manufactured by the manufacturing methods of the embodiments described above.
[0014] In summary, by covering the surface of two copper layers with two first photoresist layers, exposure, development, and etching are performed to first form the circuit patterns on both sides, followed by the fabrication of other structures. This simplifies the manufacturing process and reduces labor and cost. Furthermore, in subsequent structural fabrication, the metallization and electroplating area is increased by using a second photoresist layer. During electroplating, the copper layer extends to the surface of the second photoresist layer. Then, the copper layer exceeding the height of the second photoresist layer and the second photoresist layer are removed simultaneously to control the protrusion of the copper layer. This avoids the problem of the electroplated layer overflowing into the holes during plating, forming protrusions around the holes. Additionally, controlling the protrusion of the electroplated layer facilitates subsequent multilayer board stacking. For example, when stacking outer layers, the heights of the copper layer and the second photoresist layer can be made approximately the same to increase the connectivity between the substrate and the outer layers. If the circuit board circuit structure has already been fabricated, the heights of the copper layer and the copper layer can also be made approximately the same to ensure a flat outer surface of the circuit board circuit structure. Attached Figure Description
[0015] Figure 1 A schematic diagram (I) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment;
[0016] Figure 2 A schematic diagram (II) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0017] Figure 3 A schematic diagram (III) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0018] Figure 4 A schematic diagram (IV) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0019] Figure 5A schematic diagram (V) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0020] Figure 6 A schematic diagram (VI) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0021] Figure 7 A schematic diagram (VII) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0022] Figure 8 A schematic diagram (VIII) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0023] Figure 9 A schematic diagram (IX) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0024] Figure 10 A schematic diagram (X) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0025] Figure 11 A schematic diagram (XI) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment;
[0026] Figure 12 A schematic diagram (XII) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0027] Figure 13 A schematic diagram (XIII) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment;
[0028] Figure 14 A schematic diagram (XIV) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0029] Figure 15 A schematic diagram (XV) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0030] Figure 16 A schematic diagram (XVI) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0031] Figure 17 A schematic diagram (XVII) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0032] Figure 18 A schematic diagram (XVIII) of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment;
[0033] Figure 19 A schematic diagram (I) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0034] Figure 20 A schematic diagram (II) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0035] Figure 21 A schematic diagram (III) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0036] Figure 22 A schematic diagram (IV) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0037] Figure 23 A schematic diagram (V) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0038] Figure 24 A schematic diagram (VI) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0039] Figure 25 A schematic diagram (VII) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0040] Figure 26 A schematic diagram (VIII) of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment;
[0041] Figure 27 A flowchart (I) shows a method for fabricating a circuit board circuit structure with vias according to a first embodiment;
[0042] Figure 28 A flowchart (II) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment;
[0043] Figure 29 This is a flowchart illustrating a method for fabricating a circuit board circuit structure with vias according to a second embodiment.
[0044] [Symbol Explanation]
[0045] 100: Circuit board structure
[0046] 10:Substrate
[0047] 11: Substrate layer
[0048] 111: First Surface
[0049] 112: Second Surface
[0050] 12A, 12B: Copper layer
[0051] 13A, 13B: First photoresist layer
[0052] 131A: First Pattern Structure
[0053] 131B: Second Pattern Structure
[0054] 14A, 14B: Second photoresist layer
[0055] 141A: Third Pattern Structure
[0056] 141B: Fourth Pattern Structure
[0057] 15A: First hole
[0058] 15B: Second hole
[0059] 151A, 151B: Hole wall
[0060] 152A, 152B: Bottom of the hole
[0061] 16A, 16B: Metallization layers
[0062] 17A, 17B: Copper cladding
[0063] 20: Outer panel
[0064] 21: Material layer
[0065] 211: Third Surface
[0066] 212: Fourth Surface
[0067] 22: Copper layer
[0068] 23: Third photoresist layer
[0069] 231: Fifth Pattern Structure
[0070] 24: Fourth photoresist layer
[0071] 241: Sixth Pattern Structure
[0072] 25: Third hole
[0073] 251: Hole Wall
[0074] 252: Bottom of Hole
[0075] 26: Metallization layer
[0076] 27: Copper plating layer
[0077] 30: Outer panel
[0078] 31: Material layer
[0079] 311: Third Surface
[0080] 312: Fourth Surface
[0081] 32: Copper layer
[0082] 33: Third photoresist layer
[0083] 331: Fifth Pattern Structure
[0084] 34: Fourth photoresist layer
[0085] 341: Sixth Pattern Structure
[0086] 35: Third hole
[0087] 351: Hole Wall
[0088] 352: Bottom of Hole
[0089] 36: Metallization layer
[0090] 37: Copper plating layer
[0091] S10-S29: Steps
[0092] S20'-S29': Steps Detailed Implementation
[0093] Please see Figures 1 to 10 And see also Figure 27 . Figures 1 to 10 The diagrams (I) to (X) are schematic diagrams of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment. Figure 27 This is a flowchart (I) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment. Figure 1 and Figure 27 As shown, the method for fabricating a circuit board circuit structure 100 with vias in this embodiment includes providing a substrate (step S10). The substrate 10 includes a substrate layer 11 and two copper layers 12A and 12B. The substrate layer 11 has a first surface 111 and a second surface 112 facing each other. The two copper layers 12A and 12B are respectively formed on the first surface 111 and the second surface 112 of the substrate layer 11. In this embodiment, circuit board circuit structures 100 of different specifications are fabricated simultaneously using the first surface 111 and the second surface 112 of the substrate layer 11, but it is not limited to this; circuit board circuit structures 100 of the same specifications can also be fabricated.
[0094] like Figure 2 and Figure 27As shown, two first photoresist layers 13A and 13B are covered on the surfaces of two copper layers 12A and 12B. Through exposure and development, the first photoresist layer 13A on one side of the first surface 111 forms a first pattern structure 131A, and the first photoresist layer 13B on one side of the second surface 112 forms a second pattern structure 131B (step S11). In this embodiment, the photoresist layer is formed by laminating dry film photoresist.
[0095] like Figure 3 and Figure 27 As shown, an etching process is performed to remove the surfaces of the copper layers 12A and 12B that are not covered by the first photoresist layers 13A and 13B (step S12). Next, as... Figure 4 and Figure 27 As shown, removing the first photoresist layers 13A and 13B (step S13) completes part of the circuit structure.
[0096] like Figure 5 and Figure 27 As shown, two second photoresist layers 14A and 14B are covered on the surfaces of each copper layer 12A and 12B. Through exposure, the second photoresist layer 14A on one side of the first surface 111 forms a third pattern structure 141A, and the second photoresist layer 14B on one side of the second surface 112 forms a fourth pattern structure 141B (step S14). In this embodiment, dry film photoresist is used as an example, and the photoresist is formed into a chemically resistant state by full exposure.
[0097] like Figure 6 and Figure 27As shown, drilling is performed on the surface of the second photoresist layer 14A located on one side of the first surface 111 (step S15) to form at least one first hole 15A, which is connected to the second surface 112 of the substrate layer 11. Drilling is performed on the surface of the second photoresist layer 14B located on one side of the second surface 112 to form at least one second hole 15B, which is connected to the first surface 111 of the substrate layer 11. In this embodiment, the first hole 15A and the second hole 15B are formed by laser drilling. Here, one of the first hole 15A and the second hole 15B is used as an example, but it is not limited thereto. The first hole 15A passes sequentially through the second photoresist layer 14A on one side of the first surface 111 to the copper layer 12B on one side of the second surface 112, forming a via. The first aperture 15A includes an aperture wall 151A and an aperture bottom 152A. The aperture wall 151A includes the side surface of the second photoresist layer 14A, the copper layer 12A, and the substrate layer 11 exposed through drilling. The aperture bottom 152A includes the surface of the copper layer 12B that is bonded to the second surface 112. The second aperture 15B extends from the second photoresist layer 14B on one side of the second surface 112 to the copper layer 12A on one side of the first surface 111, sequentially passing through the second photoresist layer 14B, the copper layer 12B, and the substrate layer 11 to form a via. The second aperture 15B includes an aperture wall 151B and an aperture bottom 152B. The aperture wall 151B includes the side surface of the second photoresist layer 14B, the copper layer 12B, and the substrate layer 11 exposed through drilling. The aperture bottom 152B includes the surface of the copper layer 12A that is bonded to the second surface 112.
[0098] like Figure 7 and Figure 27 As shown, metallization layers 16A and 16B are formed chemically (step S16). Metallization layers 16A and 16B cover the surface of the first hole 15A, the surface of the second photoresist layer 14A located on one side of the first surface 111, the surface of the second hole 15B, and the surface of the second photoresist layer 14B located on one side of the second surface 112. For ease of explanation, the metallization layer located on the first surface 111 is shown as metallization layer 16A, and the metallization layer located on the second surface 112 is shown as metallization layer 16B. In this embodiment, metallization layers 16A and 16B are formed by direct chemical metallization. Because direct chemical metallization is used, metallization can be performed even if the copper layers 12A and 12B on both sides of the substrate 10 are not in a fully copper state.
[0099] like Figure 8 and Figure 27As shown, copper layers 17A and 17B are formed by electroplating (step S17). Copper layers 17A and 17B respectively cover the surfaces of the first hole 15A and the second hole 15B, and extend along the first hole 15A and the second hole 15B respectively, covering one side of the first surface 111 and the second surface 112, respectively, as second photoresist layers 14A and 14B. For ease of explanation, the copper layer located on the first surface 111 side is shown as copper layer 17A, and the copper layer located on the second surface 112 side is shown as copper layer 17B.
[0100] like Figure 9 and Figure 27 As shown, a portion of the copper clad layers 17A and 17B are removed by chemical etching (step S18). In this embodiment, the heights of the copper clad layers 17A and 17B are made flush with the second photoresist layers 14A and 14B to facilitate subsequent double-sided or multi-layer board stacking operations (described in detail later), but this is not limited to this. For example, when no further stacking operations are desired, the heights of the copper clad layers 17A and 17B can also be flush with the two copper layers 12A and 12B, respectively. Next, as... Figure 10 and Figure 27 As shown, removing the second photoresist layers 14A and 14B (step S19) completes the circuit board circuit structure 100.
[0101] Specifically, the circuit patterns on both sides of the substrate 10 are formed first, and other structures are then fabricated. This simplifies the manufacturing process and reduces costs. Furthermore, in subsequent structural fabrication, the metallization and electroplating area is increased by using the second photoresist layers 14A and 14B. During electroplating, the copper layers 17A and 17B extend to the surfaces of the second photoresist layers 14A and 14B, respectively. Then, the portion of the copper layers 17A and 17B exceeding the height of the second photoresist layers 14A and 14B, as well as the second photoresist layers 14A and 14B, is removed to control the protrusion of the copper layers 17A and 17B. This prevents the electroplated layer from overflowing into the holes during plating, thus avoiding protrusions around the holes. Moreover, controlling the protrusion of the copper layers 17A and 17B facilitates the subsequent fabrication of multilayer boards. If another substrate is to be stacked, the heights of the copper cladding layers 17A and 17B and the second photoresist layers 14A and 14B can be made approximately the same to increase the connectivity efficiency between the substrate 10 and the other substrate. If the circuit board structure has already been fabricated, the heights of the copper cladding layers 17A and 17B and the copper layers 12A and 12B can also be made approximately the same to ensure that the outer surface of the circuit board structure is flat.
[0102] Please see Figures 11 to 18 See also Figure 28 . Figures 11 to 18 The diagrams (xii) to (xviii) are schematic diagrams of a method for fabricating a circuit board circuit structure with through holes according to a first embodiment. Figure 28This is a flowchart (II) of a method for fabricating a circuit board circuit structure with vias according to a first embodiment. In this embodiment, the circuit board circuit structure 100 is applicable, for example, to the inner board of a double-sided or multilayer board. Taking a double-sided board as an example, the double-sided board stacking operation is performed on both sides of the circuit board circuit structure 100, but it is not limited to this; the multilayer board stacking operation can also be performed on a single side of the circuit board circuit structure 100.
[0103] like Figure 11 and Figure 28 As shown, after removing the two second photoresist layers (step S19), two outer layer plates 20 are provided (step S20). Each outer layer plate 20 includes a material layer 21 and a copper layer 22. The material layer 21 has a third surface 211 and a fourth surface 212 opposite to each other. The third surface 211 of the material layer 21 is disposed on the copper layer 12A on the first surface 111 side and the copper layer 12B on the second surface 112 side of the substrate 10. The copper layer 22 is formed on the fourth surface 212 of the material layer 21. In this embodiment, due to step S18, the heights of the copper cladding layers 17A and 17B are flush with the heights of the second photoresist layers 14A and 14B. After the second photoresist layers 14A and 14B are removed, the copper cladding layers 17A and 17B will protrude. When the outer layer plate 20 is stacked on one side of the first surface 111 of the substrate 10, the material layer 21 of the outer layer plate 20 will respectively cover the portion of the copper cladding layers 17A and 17B on one side of the first surface 111 and one side of the second surface 112 of the substrate 10.
[0104] like Figure 12 and Figure 28 As shown, a third photoresist layer 23 is applied to the surface of the copper layer 22, and the third photoresist layer 23 is exposed and developed to form a fifth pattern structure 231 (step S21). Next, an etching process is performed to remove the surface of the copper layer 22 that is not covered by the third photoresist layer 23 (step S22), and the third photoresist layer 23 is removed (step S23).
[0105] like Figure 13 and Figure 28 As shown, a fourth photoresist layer 24 is covered on the surface of the copper layer 22, and the fourth photoresist layer 24 is exposed to form a sixth pattern structure 241 (step S24). In this embodiment, dry film photoresist is used as an example, and the photoresist is formed into a chemically resistant state by full exposure.
[0106] like Figure 14 and Figure 28As shown, drilling is performed on the surface of the fourth photoresist layer 24 (step S25) to form at least one third hole 25. The third holes 25 of each outer layer 20 are respectively connected to the copper cladding layers 17A and 17B on one side of the first surface 111 and one side of the second surface 112 of the substrate 10. In this embodiment, the third holes 25 are formed by laser drilling. Here, taking one side of the first surface 111 as an example, the number of third holes 25 corresponds to one first hole 15A. The third hole 25 passes through the fourth photoresist layer 24, the copper layer 22 and the material layer 21 sequentially from the copper cladding layer 17A of the substrate 10 to form a via. The third hole 25 includes a hole wall 251 and a hole bottom 252. The hole wall 251 includes the side surfaces of the fourth photoresist layer 24, the copper layer 22 and the material layer 21 exposed by drilling. In this embodiment, since the material layer 21 of the outer layer 20 covers part of the copper-clad layer 17A on one side of the first surface 111 of the substrate 10, the depth required for drilling can be reduced. Furthermore, the substrate 10 and the outer layer 20 can be easily connected after the copper plating layer 27 formed subsequently is connected to the copper-clad layer 17A.
[0107] like Figure 15 and Figure 28 As shown, a metallization layer 26 is formed chemically (step S26), and the metallization layer 26 covers the surface of the third hole 25 and the surface of the fourth photoresist layer 24. In this embodiment, the metallization layer 26 is formed by direct chemical metallization.
[0108] like Figure 16 and Figure 28 As shown, a copper plating layer 27 is formed by electroplating (step S27). The copper plating layer 27 covers the third hole 25 and extends along the third hole 25 and covers the fourth photoresist layer 24.
[0109] like Figure 17 and Figure 28 As shown, a portion of the copper plating layer 27 is removed by chemical etching (step S28). In this embodiment, since no further lamination is required, the height of the copper plating layer 27 is flush with the copper layer 22. However, this is not a limitation; if further lamination is desired, the height of the copper plating layer 27 can be flush with the fourth photoresist layer 24. This reduces the A / R value after hole formation in subsequent lamination operations and improves the yield during electroplating. Next, as... Figure 18 and Figure 28 As shown, removing the fourth photoresist layer 24 (step S29) completes the fabrication of the multilayer board.
[0110] In addition, please see Figures 19 to 26 See also Figure 29 . Figures 19 to 26 The diagrams (a) to (viii) are schematic diagrams of a method for fabricating a circuit board circuit structure with through holes according to a second embodiment. Figure 29 This is a flowchart illustrating a method for fabricating a circuit board circuit structure with vias according to a second embodiment. In the first embodiment, a double-layer board stacking operation was exemplified using both sides of the circuit board circuit structure 100; however, this is not limited to this, and a multi-layer board stacking operation can also be performed using only one side of the circuit board circuit structure 100. This second embodiment will be used to illustrate this approach. The parts of the second embodiment similar to the first embodiment will not be repeated. In the second embodiment, as... Figure 19 and Figure 29 As shown, after removing the two second photoresist layers 14A and 14B, an outer layer 30 is provided (step S20'). The outer layer 30 includes a material layer 31 and a copper layer 32. The material layer 31 has a third surface 311 and a fourth surface 312 opposite to each other. The third surface 311 of the material layer 31 is disposed on the copper layer 12A on the side of the first surface 111 of the substrate 10, and the copper layer 32 is formed on the fourth surface 312 of the material layer 31. In the second embodiment, since the stacking operation is performed only on a single side, namely the side of the first surface 111, in step S18, the height of the copper clad layer 17A is made flush with the second photoresist layer 14A to increase the connectivity efficiency between the substrate 10 and the outer layer 30. Furthermore, on the side of the second surface 112 where the stacking operation is no longer performed, the heights of the copper clad layer 17B and the copper layer 12B are made approximately the same to make the outer side of the circuit board circuit structure flat.
[0111] like Figure 20 and Figure 29 As shown, the third photoresist layer 33 is covered on the surface of the copper layer 32 and the surface of the copper layer 12B on one side of the second surface 112. Through exposure and development, the third photoresist layer 33 forms a fifth pattern structure 331 (step S21'). Next, an etching process is performed to remove the surface of the copper layer 32 not covered by the third photoresist layer 33 (step S22'), and the third photoresist layer 33 is then removed (step S23'). In the second embodiment, even if no layering operation is performed on one side of the second surface 112, a photoresist layer is still required for protection.
[0112] like Figure 21 and Figure 29 As shown, the fourth photoresist layer 34 is covered on the surface of the copper layer 32 and the surface of the copper layer 12B on one side of the second surface 112, and the fourth photoresist layer 34 is exposed to form the sixth pattern structure 341 (step S24').
[0113] like Figure 22 and Figure 29As shown, a hole (S25') is drilled from the surface of the fourth photoresist layer 34 on one side of the first surface 111 to form at least one third hole 35. The at least one third hole 35 is conductive to the copper plating layer 17A on one side of the first surface 111 of the substrate 10. The third hole 35 passes sequentially through the fourth photoresist layer 34, the copper material layer 32, and the material layer 31 from the fourth photoresist layer 34 to the copper plating layer 17A of the substrate 10, forming a via. The third hole 35 includes a hole wall 351 and a hole bottom 352. The hole wall 351 includes the side surfaces of the fourth photoresist layer 34, the copper material layer 32, and the material layer 31 exposed by drilling.
[0114] like Figure 23 and Figure 29 As shown, a metallization layer 36 is formed by direct metallization through chemical means (step 26'), and the metallization layer 36 covers the surface of the third hole 35 and the surface of the fourth photoresist layer 34.
[0115] like Figure 24 and Figure 29 As shown, a copper plating layer 37 is formed by electroplating (step S27'). The copper plating layer 37 covers the third hole 35 and extends along the third hole 35 and covers the fourth photoresist layer 34.
[0116] like Figure 25 and Figure 29 As shown, a portion of the copper plating layer 37 is removed by chemical etching (step S28'). In the second embodiment, since the lamination operation is not to continue, the height of the copper plating layer 37 is flush with the copper layer 32. However, this is not a limitation; if the lamination operation is to continue, the height of the copper plating layer 37 can also be flush with the fourth photoresist layer 34. Next, as... Figure 26 and Figure 29 As shown, removing the fourth photoresist layer 34 (step S29') completes the fabrication of the multilayer board.
[0117] In summary, by first shaping the circuit patterns on both sides of the substrate, and then fabricating other structures, the manufacturing process is simplified and costs are reduced. Furthermore, in subsequent structural fabrication, the metallization and electroplating area is increased by using a second photoresist layer. During electroplating, the copper plating layer extends to the surface of the second photoresist layer. Then, the copper plating layer exceeding the height of the second photoresist layer and the second photoresist layer are removed simultaneously to control the protrusion of the copper plating layer. This avoids the problem of the electroplated layer overflowing into the holes during plating, forming protrusions around the holes. Moreover, controlling the protrusion of the copper plating layer facilitates the subsequent fabrication of multilayer boards. If an outer layer is to be stacked, the height of the copper plating layer and the second photoresist layer can be made approximately the same to increase the connectivity between the substrate and the outer layer. If the circuit board circuit structure has already been fabricated, the height of the copper plating layer and the copper layer can also be made approximately the same to ensure a flat outer surface of the circuit board circuit structure.
Claims
1. A method for manufacturing a circuit board circuit structure with through holes, characterized in that, include: A substrate is provided, the substrate including a substrate layer and two copper layers, the substrate layer having a first surface and a second surface opposite to each other, and the two copper layers being formed on the first surface and the second surface of the substrate layer, respectively; Two first photoresist layers are covered on the surface of the two copper layers, and through exposure and development, a first pattern structure is formed on one side of the first surface of the first photoresist layer, and a second pattern structure is formed on one side of the second surface of the first photoresist layer. An etching process is performed to remove the surface of each copper layer that is not covered by each of the first photoresist layers; Remove the first photoresist layer of the two layers; Two second photoresist layers are covered on the surface of each copper layer, and by exposure, the second photoresist layer on one side of the first surface forms a third pattern structure, and the second photoresist layer on one side of the second surface forms a fourth pattern structure. Drilling is performed on the surface of the second photoresist layer located on one side of the first surface to form at least one first hole, the at least one first hole being connected to the second surface of the substrate layer; drilling is performed on the surface of the second photoresist layer located on one side of the second surface to form at least one second hole, the at least one second hole being connected to the first surface of the substrate layer. A metallization layer is formed by direct metallization using chemical methods. The metallization layer covers the surface of the at least one first hole, the surface of the second photoresist layer located on one side of the first surface, the surface of the at least one second hole, and the surface of the second photoresist layer located on one side of the second surface. A copper plating layer is formed by electroplating, which covers the surfaces of the at least one first hole and the at least one second hole respectively, extends along the at least one first hole and the at least one second hole respectively, and covers the second photoresist layer on one side of the first surface and the second surface. Part of the copper plating is removed by chemical etching; as well as Remove the second photoresist layer.
2. The method for manufacturing a circuit board circuit structure with through holes as described in claim 1, characterized in that, After removing the two second photoresist layers, the method further includes: Two outer layer plates are provided, each outer layer plate including a material layer and a copper material layer. The material layer has a third surface and a fourth surface opposite to each other. The third surface of the material layer of each outer layer plate is respectively disposed on the copper layer on the first surface side and the second surface side of the substrate. The copper material layer is formed on the fourth surface of the material layer. A third photoresist layer is applied to the surface of the copper material layer, and the third photoresist layer is exposed and developed to form a fifth pattern structure. An etching process is performed to remove the surface of the copper layer that is not covered by the third photoresist layer; Remove the third photoresist layer; A fourth photoresist layer is applied to the surface of the copper layer, and the fourth photoresist layer is exposed to form a sixth pattern structure. Drilling is performed on the surface of the fourth photoresist layer to form at least one third hole, and the at least one third hole of each outer layer is respectively connected to the copper cladding layer on one side of the first surface and one side of the second surface of the substrate. A metallization layer is formed by direct metallization using chemical methods, and the metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer; A copper plating layer is formed by electroplating, which covers the at least one third hole and extends along the at least one third hole and covers the fourth photoresist layer; Part of the copper plating layer is removed by chemical etching; and Remove the fourth photoresist layer.
3. The method for manufacturing a circuit board circuit structure with through holes as described in claim 1, characterized in that, After removing the two second photoresist layers, the method further includes: An outer layer is provided, the outer layer comprising a material layer and a copper layer, the material layer having a third surface and a fourth surface opposite to each other, the third surface of the material layer being disposed on the copper layer on the first surface side of the substrate, and the copper layer being formed on the fourth surface of the material layer. A third photoresist layer is applied to the surface of the copper layer and one side of the second surface, and the third photoresist layer is exposed and developed to form a fifth pattern structure. An etching process is performed to remove the surface of the copper layer that is not covered by the third photoresist layer; Remove the third photoresist layer; A fourth photoresist layer is applied to the surface of the copper layer and one side of the second surface, and the fourth photoresist layer is exposed to form a sixth pattern structure. Drilling is performed on the surface of the fourth photoresist layer on one side of the first surface to form at least one third hole, which is connected to the copper cladding layer on one side of the first surface of the substrate. A metallization layer is formed by direct metallization using chemical methods, and the metallization layer covers the surface of the at least one third hole and the surface of the fourth photoresist layer; A copper plating layer is formed by electroplating, which covers the at least one third hole and extends along the at least one third hole and covers the fourth photoresist layer; Part of the copper plating layer is removed by chemical etching; and Remove the fourth photoresist layer.
4. The method for manufacturing a circuit board circuit structure with through holes as described in any one of claims 1 to 3, characterized in that, After chemical etching, the height of the copper cladding layer is flush with that of the second photoresist layer.
5. The method for manufacturing a circuit board circuit structure with through holes as described in any one of claims 1 to 3, characterized in that, After chemical etching, the height of the copper cladding layer is flush with that of the copper layer.
6. The method for manufacturing a circuit board circuit structure with through holes as described in claim 2, characterized in that, After the outer layer is chemically etched, the height of the copper plating layer is flush with that of the fourth photoresist layer.
7. The method for manufacturing a circuit board circuit structure with through holes as described in claim 2, characterized in that, After the outer layer is chemically etched, the height of the copper plating layer is flush with that of the copper material layer.
8. The method for manufacturing a circuit board circuit structure with through holes as described in claim 2, characterized in that, The material layers of the two outer layers respectively cover a portion of the copper plating layer on one side of the first surface and one side of the second surface of the substrate.
9. The method for manufacturing a circuit board circuit structure with through holes as described in claim 3, characterized in that, The material layer of the outer layer covers the copper plating layer on one side of the first surface of the substrate.
10. The method for manufacturing a circuit board circuit structure with vias as described in claim 1, characterized in that, The first and second photoresist layers are dry film photoresists.
11. The method for manufacturing a circuit board circuit structure with vias as described in claim 1, characterized in that, The at least one first hole and the at least one second hole are formed using a laser drilling method.
12. A circuit board circuit structure with through holes manufactured by a method for manufacturing a circuit board circuit structure with through holes as described in any one of claims 1 to 11.
Citation Information
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