Display panel, display device and image display method

Abstract

The embodiment of the present application discloses a display panel and a display device, in the display panel, two columns of sub-pixels arranged adjacently are connected to one data line and receive data signals of opposite polarities respectively, two scanning lines arranged adjacently constitute a group of scanning lines and are connected to sub-pixels in the same row, during a frame image display period, the sub-pixels in the same row connected to the same group of scanning lines receive the scanning signals from the two scanning lines simultaneously during a first period before receiving the data signals, the sub-pixels in the same row connected to the same data line are electrically connected through the data line, and are adjusted to a first reference potential through charge sharing, thereby effectively improving the rate of the sub-pixels when loading the data signals subsequently while reducing the power consumption correspondingly. The embodiment of the present application also provides an image display method of the aforementioned display device.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to display panels, display devices, and image display methods. Background Technology

[0002] Currently, due to the high cost of data-driven integrated circuits, in order to reduce the cost of display panels, the number of data-driven integrated circuits is usually reduced. By reducing the number of data-driven integrated circuits and data lines, two columns of pixels are connected to the same data line. At the same time, the number of scan lines is increased so that two scan lines are connected to the same row of pixels, which are used to control the same row of pixels to turn on and receive data signals.

[0003] However, the increased number of scan lines reduces the scanning speed of a single frame, resulting in a lower image refresh rate and higher power consumption. Therefore, improving the scanning speed while reducing the power consumption of the display panel is an urgent problem to be solved. Summary of the Invention

[0004] In view of the shortcomings of the prior art, this application provides a display panel and display device that can effectively improve scanning speed and have low power consumption.

[0005] This application provides a display panel including m data lines arranged along a first direction, n scan lines arranged along a second direction, and a plurality of sub-pixels arranged in an array, wherein m and n are positive integers, the first direction is perpendicular to the second direction, and the sub-pixels are used to receive data signals from the data lines for image display under the control of the scan signals output by the scan lines. Two adjacent columns of sub-pixels are connected to one of the data lines and receive data signals of opposite polarities respectively. Two adjacent scan lines form a group of scan lines and are connected to the same row of sub-pixels. During each frame of image display time, sub-pixels connected to the same group of scan lines and located in the same row simultaneously receive the scan signals from the two scan lines during a first time period before receiving the data signals. Sub-pixels connected to the same data line in the same row are electrically connected through the data lines and are all adjusted to a first reference potential through charge sharing.

[0006] The plurality of sub-pixels includes a first sub-pixel and a second sub-pixel, which are located adjacent to each other in the same row and connected to the same data line. The first sub-pixel and the second sub-pixel are each connected to a scan line in a set of scan lines. During any single frame of image display, the polarities of the data signals received by the first sub-pixel and the second sub-pixel are opposite. Furthermore, during any two adjacent frames of image display, the polarities of the data signals received by the first sub-pixel and the second sub-pixel are opposite.

[0007] A single frame of image display comprises multiple consecutive scan cycles, where each scan cycle corresponds to a set of scan lines outputting scan signals. This set of scan lines includes the i-th scan line and the (i+1)-th scan line. The scan cycle comprises a first time period, a second time period, a buffer time period, and a fourth time period that are consecutive in time. During the first time period, both the i-th and (i+1)-th scan lines simultaneously output the scan signals, and the data lines do not output the data signals. During the second time period, the i-th scan line outputs the scan signals, and the (i+1)-th scan line stops outputting the scan signals. During the buffer time period, both the i-th and (i+1)-th scan lines simultaneously stop outputting the scan signals. During the fourth time period, the i-th scan line stops outputting the scan signals, and the (i+1)-th scan line outputs the scan signals, where i is an odd number greater than or equal to 1.

[0008] The duration of the first time period is shorter than the duration of the buffer time period.

[0009] The display panel further includes a scan driving circuit and a scan control circuit. The scan driving circuit is connected to the n scan lines and is used to output the scan signal to the n scan lines. The scan control circuit is connected to the scan driving circuit and the n scan lines and is used to control the transmission of the scan signal to the scan line at a preset position.

[0010] In one embodiment, the device includes a power module and the aforementioned display panel, wherein the power module is used to provide driving power for the display panel to display images.

[0011] Secondly, one embodiment of this application provides an image display method applied to a display device including a display panel. The display panel includes m data lines arranged along a first direction, n scan lines arranged along a second direction, and a plurality of sub-pixels arranged in an array, wherein m and n are positive integers, the first direction is perpendicular to the second direction, and the sub-pixels are used to receive data signals from the data lines for image display under the control of the scan signals output by the scan lines. Two adjacent columns of sub-pixels are connected to one data line and receive data signals of opposite polarity respectively. Two adjacent scan lines form a group of scan lines and are connected to the same row of sub-pixels. The image display method includes: during each frame image display period, sub-pixels connected to the same group of scan lines and located in the same row simultaneously receive the scan signals from two scan lines during a first period before receiving the data signals; sub-pixels connected to the same data line in the same row are electrically connected through the data lines and are all adjusted to a first reference potential through charge sharing.

[0012] In one embodiment, the plurality of sub-pixels includes a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel being located in the same row and connected to the same data line, and the first sub-pixel and the second sub-pixel being respectively connected to one scan line in a set of scan lines. During any frame of image display time, the polarities of the data signals received by the first sub-pixel and the second sub-pixel are opposite, and during any two adjacent frame of image display time, the polarities of the data signals received by the first sub-pixel are opposite, and the polarities of the data signals received by the second sub-pixel are opposite.

[0013] In one embodiment, a frame of image display includes multiple consecutive scan cycles. In one scan cycle, a set of scan lines connected to sub-pixels in the same row outputs the scan signal. This set of scan lines includes an i-th scan line and an (i+1)-th scan line. The scan cycle includes a first time period, a second time period, a buffer time period, and a fourth time period that are consecutive in time. In the first time period, the i-th scan line and the (i+1)-th scan line simultaneously output the scan signal, and the data line does not output a data signal, where i is an odd number greater than or equal to 1. In the second time period, the i-th scan line outputs the scan signal, and the (i+1)-th scan line stops outputting the scan signal. In the buffer time period, the i-th scan line and the (i+1)-th scan line simultaneously stop outputting the scan signal. In the fourth time period, the i-th scan line stops outputting the scan signal, and the (i+1)-th scan line outputs the scan signal.

[0014] Compared to existing technologies, controlling two rows of sub-pixels to scan simultaneously under the Dual Gate pixel architecture in the display panel effectively improves the image refresh rate while reducing the number of data lines. Furthermore, two adjacent sub-pixels in the same row, connected to the same data line, share charge before loading data signals, ensuring their potentials are adjusted to the same first reference potential. Therefore, when loading data signals subsequently, this first reference potential can serve as a reference potential. During frame inversion between adjacent image display periods, there is no need to charge the data signal on two completely opposite polarity reference potentials, effectively improving the rate and accuracy of sub-pixel data signal loading while also reducing power consumption during data loading. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1A schematic diagram of the structure of a display device provided in this application;

[0017] Figure 2 for Figure 1 A schematic diagram of the side structure of the central display panel;

[0018] Figure 3 for Figure 2 A schematic diagram of the planar layout structure of the central display panel;

[0019] Figure 4 for Figure 3 The equivalent circuit diagram for any one of the sub-pixels is shown below.

[0020] Figure 5 for Figure 3 The diagram shows the polarity layout of some sub-pixels during different frame image display periods.

[0021] Figure 6 for Figure 5 The diagram shows the polarity of the data signal received by any one of the sub-pixels.

[0022] Figure 7 for Figure 5 Timing diagram of the mid-scan signal output;

[0023] Figure 8 for Figure 6 A schematic diagram of the output timing of the scanning signal corresponding to the data signal in the middle;

[0024] Figure 9 As shown in one embodiment of this application Figure 3 The diagram shows a flowchart illustrating the image display method of the display panel.

[0025] Explanation of reference numerals in the attached figures:

[0026] Display device-100, display panel-10, power module-20, support frame-30, display area-10a, non-display area-10b, sub-pixel-P, backlight module-17, array substrate-10c, display medium layer-10e, opposing substrate-10d, first direction-F1, second direction-F2, m data lines-D1~Dm, n scan lines-G1~Gn, first pixel unit-P1, second pixel unit-P2, first blue sub-pixel-B11, first green sub-pixel-G11, first red sub-pixel-B11, second ... Color sub-pixel - R11, second red sub-pixel - R21, second green sub-pixel - G21, second blue sub-pixel - B21, first time period - Ha, second time period - Hb, buffer time period - Hg, third time period - Hc, first time point - t1, second time point - t2, third time point - t3, fourth time point - t4, fifth time point - T5, data signal - Data, first reference voltage - Vcom, display capacitor - C1, storage capacitor - C2, transistor - T, pixel electrode - IT, steps - S100~S400. Detailed Implementation

[0027] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0028] The following descriptions of the embodiments are based on the accompanying illustrations and are used to illustrate specific embodiments in which this application can be implemented. The component designations used herein, such as "first," "second," etc., are merely for distinguishing the described objects and do not have any sequential or technical meaning. Unless otherwise specified, the terms "connection" and "linkage" used in this application include both direct and indirect connections (linkages). Directional terms used in this application, such as "up," "down," "front," "rear," "left," "right," "inner," "outer," "side," etc., are merely for reference to the accompanying drawings. Therefore, the use of directional terms is for better and clearer explanation and understanding of this application, and does not indicate or imply that the referred device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on this application.

[0029] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order.

[0030] Furthermore, the terms "comprising," "may include," "include," or "may include" used in this application indicate the presence of the corresponding functions, operations, elements, etc., disclosed, but do not limit the inclusion of one or more other functions, operations, elements, etc. Additionally, the terms "comprising" or "include" indicate the presence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusion. Furthermore, when describing embodiments of this application, "may" is used to mean "one or more embodiments of this application." And the term "exemplary" is intended to refer to examples or illustrations.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0032] Please see Figure 1 , Figure 1 This is a schematic diagram of a display device provided in this application. The display device 100 includes a display panel 10, a power module 20, and a support frame 30. The display panel 10 and the power module 20 are fixed to the support frame 30. The power module 20 is disposed on the back of the display panel 10, i.e., the non-display surface of the display panel 10. The power module 20 provides power voltage for the display panel 10 to display images, and the support frame 30 provides fixation and protection for the display panel 10 and the power module 20.

[0033] In other embodiments of this application, the display device 100 may not require the support frame 30, for example, it may be a portable electronic device, such as a mobile phone or tablet computer.

[0034] Please see Figure 2 , Figure 2 for Figure 1 A schematic diagram of the side structure of the central display panel.

[0035] like Figure 2 As shown, the display panel 10 includes an array substrate 10c and a counter substrate 10d, and a display medium layer 10e sandwiched between the array substrate 10c and the counter substrate 10d. Driving elements are disposed on the array substrate 10c and the counter substrate 10d to generate corresponding electric fields according to data signals, thereby driving the display medium layer 10e to emit light of corresponding brightness to perform image display.

[0036] Taking a liquid crystal display panel as an example, the display panel 10 may also include a backlight module 17 (BM). The backlight module 17 is used to provide light for display to the display area 10a of the display panel 10. The display panel 10 emits corresponding light according to the image signal to be displayed to perform image display. The non-display area 10b is located around the display area 10a and is used to set the functional circuit for driving the pixel units in the display area 10a.

[0037] Please refer to the following: Figure 3 , Figure 3 for Figure 2 A schematic diagram of the planar layout structure of the central display panel.

[0038] like Figure 3 As shown, the display panel 10, corresponding to the display area 10a, includes m data lines D1-Dm and n scan lines G1-Gn arranged in a grid pattern. The m data lines D1-Dm extend along a first direction F1, and the n scan lines G1-Gn extend along a second direction F2. The first direction F1 and the second direction F2 are perpendicular to each other. Sub-pixels are disposed at the intersections of the n scan lines G1-Gn and the data lines D1-Dm. Under the control of the n scan lines S1-Sn, the sub-pixels receive grayscale data voltages from the corresponding data signals provided by the data lines D1-Dm within a predetermined time period. Based on this voltage, they drive the display medium in the display medium layer 10e to deflect by a corresponding angle, thereby emitting light of corresponding brightness according to the deflected angle, thus achieving image display by emitting light of corresponding brightness based on the image signal.

[0039] Each row of sub-pixels P is connected to a set of scan lines consisting of two scan lines. It is used to receive data signals from the data line under the control of the scan signals output by the two scan lines respectively. Each pair of adjacent sub-pixels is connected to the same data line and is located in the same row. The two adjacent sub-pixels are connected to two different scan lines in a set of scan lines and receive data signals from the same data line. That is, the sub-pixels in the display panel 10 form a dual gate pixel architecture.

[0040] For example, multiple sub-pixels in the first row are connected to the first scan line G1 and the second scan line G2 respectively, for receiving scan signals from the first scan line G1 and the second scan line G2 respectively, as shown in the figure. The sub-pixel P in the first column is connected to the first scan line G1, the sub-pixel P in the second column is connected to the second scan line G2, and the sub-pixel P in the first column and the sub-pixel P in the second column are simultaneously connected to the first data line D1, for receiving data signals from the first data line D1 for image display.

[0041] In this embodiment, the multiple sub-pixels arranged sequentially along the first direction F1 are sub-pixels of the same color, and the multiple sub-pixels arranged along the second direction F2 include a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. These three colors of sub-pixels are arranged sequentially to form a pixel unit P that emits light of different colors for image display. For example, the first pixel unit P1 includes a first red sub-pixel R11, a first green sub-pixel G11, and a first blue sub-pixel B11; the second pixel unit P2 includes a second red sub-pixel R21, a second green sub-pixel G21, and a second blue sub-pixel B21. Similarly, other pixel units are arranged and combined according to the sub-pixels included in the aforementioned pixel units.

[0042] In an exemplary embodiment, other color sub-pixels, such as white sub-pixels, may also be set as needed, and this application does not impose any restrictions on this.

[0043] Please see Figure 4 , Figure 4 for Figure 3 The diagram shows the equivalent circuit diagram for any one of the sub-pixels. Figure 4 As shown, sub-pixel B11 is a sub-pixel in any pixel unit arranged in the array substrate 10c, such as the first blue sub-pixel B11 in the first pixel unit P1. It includes a transistor T, a display capacitor C1, and a storage capacitor C2. The gate of transistor T is connected to the i-th scan line Gi, used to control transistor T to be turned on or off. The source of transistor T is connected to the j-th data line Dj, and the drain of transistor T is connected to the pixel electrode IT, so that under the control of the i-th scan line Gi, transistor T receives data signals from the j-th data line Dj and transmits them to the pixel electrode IT.

[0044] It can be understood that the display capacitor C1 is formed by the pixel electrode IT, the liquid crystal molecules as the display medium layer 10e, and the common electrode. The display capacitor C1 and the storage capacitor C2 are connected in parallel. The storage capacitor C2 is used to maintain the electric field of the display capacitor C1 between the pixel electrode IT and the common electrode before the next data signal is loaded.

[0045] Please see Figure 5 , Figure 5 for Figure 3 The diagram shows the polarity layout of some sub-pixels during different frame display periods. Figure 5 As shown, multiple sub-pixels include a first sub-pixel and a second sub-pixel. The first sub-pixel and the second sub-pixel are located in the same row and are adjacent to each other, and are connected by the same data line. For example, the first blue sub-pixel B11 can be the first sub-pixel, the first green sub-pixel G11 can be the second sub-pixel, the second blue sub-pixel B21 can be the first sub-pixel, and the second green sub-pixel G21 can be the second sub-pixel.

[0046] When the display panel 10 displays an image, the polarities of the data signals received by the first and second sub-pixels are opposite. Simultaneously, the polarities of the data signals sequentially input to each sub-pixel connected to the same data line are also opposite. In this embodiment, the display panel 10 uses a dot-inversion and frame-flipping driving method for image display.

[0047] Specifically, please refer to the following: Figures 5-6 , Figure 6 for Figure 5 The diagram shows the polarity of the data signal received by any sub-pixel. For any data signal Data transmitted on any data signal line, during the Nth frame image display period, the polarity of the data signal Data is negative (-) relative to the common voltage Vcom, that is, less than the common voltage Vcom; during the N+1th frame image display period, the polarity of the data signal Data is positive (+) relative to the common voltage Vcom, that is, greater than the common voltage Vcom, and so on. During any two adjacent frame image display periods, the polarity of the data signal Data is opposite.

[0048] For example, for the first green sub-pixel G11, which is the first sub-pixel, a negative (-) polarity data signal Data is loaded during the Nth frame image display period, and a positive (+) polarity data signal Data is loaded during the N+1th frame image display period.

[0049] Please see Figure 7 , Figure 7 for Figure 5 Timing diagram of the mid-scan signal output. (See diagram below.) Figure 3 , Figure 7 As shown, during any frame of image display time, there are 1 / 2*n scan cycles that output scan signals sequentially. Each scan cycle corresponds to a set of scan lines formed by two adjacent scan lines, which output scan signals.

[0050] For example, for a display panel 10 with n scan lines, the first scan line G1 and the second scan line G2 simultaneously output scan signals in the first scan period T1, and the third scan line S3 and the fourth scan line S4 output scan signals in the second scan period T2; and so on, the (n-1)th scan line Sn-1 and the nth scan line Sn output scan signals in the 1 / 2n scan period T1 / 2n.

[0051] Specifically, each scan cycle corresponds to a scan line group consisting of two adjacent scan lines, which outputs scan signals including a first scan signal Ga and a second scan signal Gb. The first scan signal Ga and the second scan signal Gb begin outputting simultaneously, specifically at time t1. After a first time interval Ha, i.e., at time t2, the output of the second scan signal Gb stops while the output of the first scan signal Gb continues. After a second time interval Hb, the output of the first scan signal Ga stops at time t3. After a buffer period Hg following time t3, the second scan signal is output again at time t4, and after a third time interval Hc, it stops at time T5. In this embodiment, the duration of the first time interval H1 is shorter than the duration of the buffer period Tg.

[0052] Similarly, each scan cycle outputs a set of scan signals corresponding to two adjacent scan lines. The waveforms of the first scan signal Ga and the second scan signal Gb included in each set of scan signals are the same, which will not be described again in this embodiment.

[0053] Please refer to the following: Figures 8-9 , Figure 8 for Figure 6 A schematic diagram of the output timing of the scanning signal corresponding to the data signal in the middle. Figure 9 As shown in one embodiment of this application Figure 3 The flowchart shown is a diagram illustrating the image display method of the display panel. Now, combined with... Figure 5 , Figures 8-9 The detailed instruction manual explains the working principle and process of how a row of pixel units P on the display panel performs image display during any frame of image display.

[0054] like Figure 8As shown, any frame of image display period can be the N+1th frame of image display period. A row of pixel units is connected to two adjacent scan lines. Since each pair of adjacent sub-pixels is connected to the same data line, the two scan signals output in a corresponding scan cycle are used by each data line to output the data signals corresponding to the two columns of sub-pixels. At the same time, the two sub-pixels connected to the same row of sub-pixels simultaneously receive scan signals from the two scan lines before receiving the data signals, so that the charge of the sub-pixels connected to the same data line is shared and adjusted to the aforementioned first reference potential.

[0055] In this embodiment, the first set of scan lines G1 to G2 and the first data line D1 are used as examples for explanation. The first data line D1 is connected to the first blue sub-pixel B11 and the first green sub-pixel G11. The first data line D1 outputs the data signals Data corresponding to the first blue sub-pixel B11 and the first green sub-pixel G11 in a series of consecutive time periods.

[0056] Specifically, in step S100, during the first scan period T1, the first scan line G1 outputs the first scan signal Ga, and the second scan line G2 outputs the second scan signal Gb. During the first time period Ha, the first data line D1 does not output the data signal Data. At this time, the first blue sub-pixel B11 still stores the first blue data signal with positive polarity (+) from the previous frame, and the first green sub-pixel G11 still stores the first green data signal with negative polarity (-) from the previous frame. For example, corresponding to the first time period Ha, the first blue sub-pixel B11 still stores the first blue data signal Data with positive polarity (+) from the Nth frame display period, and the first green sub-pixel G11 still stores the first green data signal Data with negative polarity (-) from the previous frame.

[0057] Based on the simultaneous output of scanning signals from the first scan line G1 and the second scan line G2, the first blue sub-pixel B11 and the first green sub-pixel G11 are simultaneously electrically connected through the data line D1. Since the first data line D1 does not output a data signal Data, the charges between the first blue sub-pixel B11 and the first green sub-pixel G11 are mutually neutralized and shared, thereby causing both the first blue sub-pixel B11 and the first green sub-pixel G11 to reach the first reference potential. In this embodiment, the first reference potential is approximately close to the common voltage Vcom of 0V.

[0058] It should be noted that, for the other scan lines in the corresponding display panel 10, the first scan line G1 can be represented by the i-th scan line, and the second scan line G2 can be represented by the (i+1)-th scan line, where i is an odd number greater than or equal to 1.

[0059] In step S200, during the second time period Hb, the first scan line G1 continues to output the first scan signal Ga, the second scan line G2 stops outputting the second scan signal Gb, and at the same time, the first data line D1 outputs the first data signal DB1 to the first blue sub-pixel B11 to drive the first blue sub-pixel B11 to perform the corresponding image display. In the N+1 frame image display period, the polarity of the first data signal DB1 is negative (-), which is opposite to the polarity of the first blue data signal Data in the Nth frame image display period.

[0060] In step S300, during the buffer period Hg, the first scan line G1 stops outputting the first scan signal Ga, and the second scan line G2 also stops outputting the second scan signal Gb. That is, during the buffer period Tg, the first blue sub-pixel B11 and the first green sub-pixel G11 both stop receiving scan signals Ga and Gb, in order to prevent the data signal loaded by the first blue sub-pixel B11 from being misloaded or leaked to the first green sub-pixel G11 during the second period Hb, and to ensure that the two sub-pixels connected to the same data line D1 can accurately display the image.

[0061] In step S400, during the fourth time period Hc, the first scan line G1 stops outputting the first scan signal Ga, the second scan line G2 outputs the second scan signal Gb, and at the same time, the first data line D1 outputs the second data signal DG1 to the first green sub-pixel G11 to drive the first green sub-pixel G11 to perform the corresponding image display. The polarity of the second data signal DG1 is positive (+).

[0062] It is understandable that during the N+1th frame of the image display period, the polarity of the third data DR1 output to the first red sub-pixel R11 is negative (-).

[0063] In this embodiment, under the dual-gate pixel architecture, the first blue sub-pixel B11 and the first green sub-pixel G11, connected to the same data line D1, are adjusted to the same near-0V first reference potential through charge sharing before the first data signal DB1 and the second data signal DG1 are loaded. Therefore, the first reference potential can serve as a reference potential when subsequent data signals are loaded. Thus, when each sub-pixel performs frame inversion during the display period of two adjacent frames, it is not necessary to charge the data signal on two completely opposite polarity potential references, effectively improving the rate and accuracy of data signal loading for the sub-pixel.

[0064] Furthermore, for each data line, its power consumption can be expressed as W = fCV. 2 / 2, where W represents the power consumption of a data line, f is the frequency of data loading on the data line, C is the capacitance of the data line, and V is the voltage change value of the data line. When the frequency f and capacitance C are constant, the greater the voltage change value V, the greater the power consumption W; the smaller the voltage change value V, the smaller the power consumption W. Therefore, in this embodiment, by adjusting the voltage of the sub-pixel before loading the data signal Data on the data line, the voltage change of the sub-pixel and the data line is effectively reduced, thereby effectively reducing the power consumption of the data line and the sub-pixel during data loading.

[0065] Specifically, in the latest frame of image display, the first blue sub-pixel B11 does not need to change from the positive (+) data signal loaded in the previous frame to the negative data signal. Instead, it can directly change from the first reference potential close to 0V to the negative (-) data signal. Similarly, in the latest frame of image display, the first green sub-pixel G11 does not need to change from the negative (-) data signal loaded in the previous frame to the positive (+) data signal. Instead, it can directly change from the first reference potential close to 0V to the positive data signal. This effectively reduces the voltage change of the data line and sub-pixel, thereby effectively increasing the voltage difference and time from the start of data signal loading to reaching the preset target voltage. Consequently, it reduces the power consumption of the sub-pixel during the data loading process.

[0066] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A display panel, comprising m data lines arranged along a first direction, n scan lines arranged along a second direction, and a plurality of sub-pixels arranged in an array, wherein, m and n are positive integers, the first direction is perpendicular to the second direction, and the sub-pixel is used to receive data signals from the data line for image display under the control of the scan signal output by the scan line; The feature is that two adjacent columns of sub-pixels are connected to a data line and receive data signals of opposite polarity respectively. Two adjacent scan lines form a set of scan lines and are connected to the same row of sub-pixels. During the display period of each frame image, the sub-pixels connected to the same set of scan lines and located in the same row receive the scan signal from the two scan lines simultaneously during the first time period before receiving the data signal. Sub-pixels connected to the same data line in the same row are electrically connected through the data line and are adjusted to the first reference potential through charge sharing.

2. The display panel as described in claim 1, characterized in that, The plurality of sub-pixels includes a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel are located in adjacent positions in the same row and connected to the same data line, the first sub-pixel and the second sub-pixel are respectively connected to a scan line in a set of scan lines, during any frame of image display time, the polarity of the data signal received by the first sub-pixel and the second sub-pixel is opposite, and during any two adjacent frame of image display time, the polarity of the data signal received by the first sub-pixel is opposite, and the polarity of the data signal received by the second sub-pixel is opposite.

3. The display panel as described in claim 2, characterized in that, Each frame of image display time period includes multiple consecutive scanning cycles, wherein one scanning cycle corresponds to a set of scanning lines outputting scanning signals, wherein the set of scanning lines includes the i-th scanning line and the (i+1)-th scanning line, and the scanning cycle includes a first time period, a second time period, a buffer time period, and a fourth time period that are consecutive in time. In the first time period, the i-th scanning line and the (i+1)-th scanning line simultaneously output the scanning signal, and the data line does not output the data signal; in the second time period, the i-th scanning line outputs the scanning signal, and the (i+1)-th scanning line stops outputting the scanning signal; in the buffer time period, the i-th scanning line and the (i+1)-th scanning line simultaneously stop outputting the scanning signal; in the fourth time period, the i-th scanning line stops outputting the scanning signal, and the (i+1)-th scanning line outputs the scanning signal, where i is an odd number greater than or equal to 1.

4. The display panel as described in claim 3, characterized in that, The duration of the first time period is shorter than the duration of the buffer time period.

5. The display panel as described in any one of claims 1-4, characterized in that, The display panel further includes a scan driving circuit and a scan control circuit. The scan driving circuit is connected to the n scan lines and is used to output the scan signal to the n scan lines. The scan control circuit is connected to the scan driving circuit and the n scan lines and is used to control the transmission of the scan signal to the scan line at a preset position.

6. A display device, characterized in that, It includes a power module and a display panel as described in any one of claims 1-5, wherein the power module is used to provide driving power for the display panel to display images.

7. An image display method, applied to a display device including a display panel, said display panel comprising m data lines arranged along a first direction, n scan lines arranged along a second direction, and a plurality of sub-pixels arranged in an array, wherein, m and n are positive integers. The first direction is perpendicular to the second direction. The sub-pixels are used to receive data signals from the data lines for image display under the control of the scan signals output by the scan lines. Two adjacent columns of sub-pixels are connected to one data line and receive data signals of opposite polarity. Two adjacent scan lines form a set of scan lines and are connected to the same row of sub-pixels. The image display method includes: during each frame image display period, sub-pixels connected to the same group of scan lines and located in the same row simultaneously receive the scan signal from two scan lines during a first period before receiving the data signal; sub-pixels connected to the same data line in the same row are electrically connected through the data line and are adjusted to a first reference potential through charge sharing.

8. The image display method as described in claim 7, characterized in that, The plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel are located in adjacent positions in the same row and connected to the same data line, the first sub-pixel and the second sub-pixel are respectively connected to a scan line in a set of scan lines, during each frame of image display time, the polarity of the data signals received by the first sub-pixel and the second sub-pixel are opposite, and during any two adjacent frame of image display time, the polarity of the data signals received by the first sub-pixel is opposite, and the polarity of the data signals received by the second sub-pixel is opposite.

9. The image display method as described in claim 8, characterized in that, Each frame of image display includes multiple consecutive scan cycles. Within one scan cycle, a set of scan lines connected to the same row of sub-pixels outputs the scan signal. The scan cycle includes a first time period, a second time period, a buffer time period, and a fourth time period that are consecutive in time. The set of scan lines includes the i-th scan line and the (i+1)-th scan line. During the first time period, the i-th scan line and the (i+1)-th scan line simultaneously output the scan signal, and the data line does not output the data signal, where i is an odd number greater than or equal to 1; During the second time period, the i-th scan line outputs the scan signal, and the (i+1)-th scan line stops outputting the scan signal; During the buffer period, the i-th scan line and the (i+1)-th scan line simultaneously stop outputting the scan signal; During the fourth time period, the i-th scan line stops outputting the scan signal, and the (i+1)-th scan line outputs the scan signal.

10. The image display method as described in claim 9, characterized in that, The duration of the first time period is shorter than the duration of the buffer time period.

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