Display panel, display device and crack detection method

Abstract

A display panel comprises a substrate (41), a plurality of display units (Px), at least one first data line (11), at least one second data line (12), at least one first detection control unit (35), at least one second detection control unit (36), at least one first detection line (31a, 31b), and at least one second detection line (32a, 32b). The first detection line (31a, 31b) is located at least in the first frame area (21), the first end of the first detection line (31a, 31b) is electrically connected to the first data line (11) through the first detection control unit (35), and the second end is configured to receive a first detection signal. The second detection line (32a, 32b) is located at least in the bending area (221) of the second frame area (22), the first end of the second detection line (32a, 32b) is electrically connected to the second data line (12) through the second detection control unit (36), and the second end is configured to receive a first detection signal.

Description

Technical Field

[0001] This article relates to, but is not limited to, the field of display technology, and in particular to a display panel, display device, and crack detection method. Background Technology

[0002] With the continuous development of display technology, there are more and more types of display products, such as liquid crystal displays (LCD), organic light-emitting diode (OLED) displays, plasma display panels (PDP), and field emission displays (FED). Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] This disclosure provides a display panel, a display device, and a crack detection method.

[0005] On one hand, this disclosure provides a display panel, including: a substrate, a plurality of display units, at least one first data line, at least one second data line, at least one first detection control unit, at least one second detection control unit, at least one first detection line, and at least one second detection line. The substrate includes a display area and a border area surrounding the display area. The border area includes a first border area surrounding the display area and a second border area located on the side of the first border area away from the display area. The second border area includes at least a bent area. The plurality of display units, at least one first data line, and at least one second data line are located in the display area, and the first data line and the second data line are electrically connected to a portion of the plurality of display units, respectively. The first detection line is at least located in the first border area, a first end of the first detection line is electrically connected to the first data line via the first detection control unit, and a second end of the first detection line is configured to receive a first detection signal. The second detection line is at least located in the bent area, a first end of the second detection line is electrically connected to the second data line via the second detection control unit, and a second end of the second detection line is configured to receive the first detection signal.

[0006] In some exemplary embodiments, a plurality of display units electrically connected to the first data line are configured to emit light to display a first bright line when the first detection control unit is turned on and the first detection line cracks. A plurality of display units electrically connected to the second data line are configured to emit light to display a second bright line when the second detection control unit is turned on and the second detection line cracks.

[0007] In some exemplary embodiments, the second end of the first detection line and the second end of the second detection line are electrically connected to the same first signal pin.

[0008] In some exemplary embodiments, the second frame region further includes a trace lead-out area and a signal access area located on the side of the bent region away from the display area. In the trace lead-out area, the first detection line and the second detection line are electrically connected via a detection connection line, which is electrically connected to a first signal pin in the signal access area.

[0009] In some exemplary embodiments, the display panel includes two first detection lines and two second detection lines. The two first detection lines are located on both sides of the display area along a second direction, and the two second detection lines are also located on both sides of the display area along the second direction. The detection connection line includes a first detection connection line, a second detection connection line, and a third detection connection line electrically connected in sequence. The first detection connection line is electrically connected to the first and second detection lines located on one side of the display area, and the third detection connection line is electrically connected to the first and second detection lines located on the other side of the display area. The first and third detection connection lines extend along the second direction, and the second detection connection line extends along a first direction, with the first and second directions intersecting.

[0010] In some exemplary embodiments, the first detection connection line and the third detection connection line are in the same layer, and the second detection connection line is located on the side of the first detection connection line closer to the substrate.

[0011] In some exemplary embodiments, the first detection line includes a first sub-trace located in the first border region, and the first sub-trace is a serpentine trace. The second detection line includes a fifth sub-trace located in the bending region, and the fifth sub-trace is a serpentine trace.

[0012] In some exemplary embodiments, in the first border region, at least a portion of the first detection line is located on the side of the second detection line away from the display area.

[0013] In some exemplary embodiments, the border area further includes: a first power line and a second power line; in the bending area, the second power line is located on the side of the first detection line and the second detection line away from the first power line.

[0014] In some exemplary embodiments, the display panel further includes: at least one third data line located in the display area, at least one third detection line located in the first bezel area, and at least one third detection control unit located in the bezel area; a first end of the third detection line is electrically connected to the third data line via the third detection control unit, and a second end of the third detection line is configured to receive a second detection signal. A plurality of display units electrically connected to the third data line are configured to display dark lines when the third detection control unit is turned on and receives the second detection signal.

[0015] In some exemplary embodiments, the display panel further includes: at least one third data line located in the display area, at least one third detection line located in the first bezel area, and at least one third detection control unit located in the bezel area; a first end of the third detection line is electrically connected to the third data line via the third detection control unit, and a second end of the third detection line is configured to receive the first detection signal. A plurality of display units electrically connected to the third data line are configured to emit light to display a bright line when the third detection control unit is turned on and the third detection line cracks.

[0016] In some exemplary embodiments, the first detection control unit includes a first detection transistor, the gate of which is electrically connected to a detection control line, a first electrode of which is electrically connected to the first detection line, and a second electrode of which is electrically connected to the first data line. The second detection control unit includes a second detection transistor, the gate of which is electrically connected to the detection control line, a first electrode of which is electrically connected to the second detection line, and a second electrode of which is electrically connected to the second data line.

[0017] In some exemplary embodiments, the at least one first detection control unit and the at least one second detection control unit are located in the first border area.

[0018] On the other hand, embodiments of this disclosure provide a display device including the display panel described above.

[0019] On the other hand, this disclosure provides a crack detection method applied to a display panel as described above, comprising: when performing crack detection on the display panel, electrically connecting a first detection line and a first data line through a first detection control unit, electrically connecting a second detection line and a second data line through a second detection control unit, and providing a first detection signal to the first detection line and the second detection line; determining whether a crack exists in the first detection line or the second detection line based on the light emission state of a plurality of display units electrically connected to the first data line and the second data line.

[0020] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood. Attached Figure Description

[0021] The accompanying drawings are provided to further illustrate the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure. The shape and size of one or more components in the drawings do not reflect actual proportions and are only intended to illustrate the content of this disclosure.

[0022] Figure 1 This is a schematic diagram of a display panel according to at least one embodiment of the present disclosure;

[0023] Figure 2 for Figure 1 A partial cross-sectional view along the R-R' direction;

[0024] Figure 3 This is a partial wiring diagram of the border area of ​​a display panel according to at least one embodiment of the present disclosure;

[0025] Figure 4 This is a schematic diagram of another partial wiring diagram of the bezel area of ​​a display panel according to at least one embodiment of the present disclosure;

[0026] Figure 5 This is a partial wiring diagram of the first and second border regions according to at least one embodiment of the present disclosure;

[0027] Figure 6 for Figure 5 A magnified view of a portion of the central region S1;

[0028] Figure 7 for Figure 5 A magnified view of a portion of the central region S2;

[0029] Figure 8 for Figure 5 A magnified view of a portion of the central region S3;

[0030] Figure 9 for Figure 5 A magnified view of a portion of the central region S4;

[0031] Figure 10 for Figure 5 A magnified view of a portion of the central region S5;

[0032] Figure 11 This is a schematic diagram of a display device according to at least one embodiment of the present disclosure. Detailed Implementation

[0033] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. The implementation can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be transformed into other forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Unless otherwise specified, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other.

[0034] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, this disclosure is not necessarily limited to these dimensions, and the shape and size of one or more parts in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0035] The ordinal numbers such as "first," "second," and "third" used in this specification are used to avoid confusion among the constituent elements, not to limit the quantity. The term "multiple" in this disclosure refers to two or more quantities.

[0036] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the constituent elements being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0037] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or joint; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of these terms in this disclosure as appropriate.

[0038] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other multifunctional elements.

[0039] In this specification, a transistor is a device that includes at least three terminals: a gate, a drain, and a source. A transistor has a channel region between its drain (drain terminal, drain region, or drain electrode) and its source (source terminal, source region, or source electrode), and current can flow through the drain, the channel region, and the source. In this specification, the channel region refers to the region through which current primarily flows.

[0040] In this specification, to distinguish the two terminals of a transistor other than the gate, one electrode is referred to as the first terminal and the other as the second terminal. The first terminal can be either the source or the drain, and the second terminal can be either the drain or the source. The gate of the transistor is referred to as the control terminal. In cases where transistors with opposite polarities are used or where the current direction changes during circuit operation, the functions of the "source" and "drain" are sometimes interchanged. Therefore, in this specification, the "source" and "drain" can be interchanged.

[0041] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0042] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0043] In this specification, "approximately" and "roughly" mean without strictly defined limits, allowing for errors in the process and measurement. "Approximately the same" means values ​​differing by no more than 10%.

[0044] In this specification, "A extends along direction B" means that A may include a main part and a secondary part connected to the main part. The main part is a line, line segment, or strip-shaped body. The main part extends along direction B, and the length of the main part extending along direction B is greater than the length of the secondary part extending along other directions. In the following description, "A extends along direction B" refers to "the main part of A extends along direction B".

[0045] In this specification, "A and B are in the same layer" or "A and B are in the same layer" means that A and B are formed simultaneously through the same patterning process, or that the surfaces of A and B closest to the substrate are at approximately the same distance from the substrate, or that the surfaces of A and B closest to the substrate are in direct contact with the same film layer.

[0046] In some implementations, each process stage in the display panel manufacturing process has its own inspection function to prevent defective products from being missed and flowing into the next process stage, thus avoiding waste of materials and resources. Therefore, it is necessary to perform effective and rapid inspection at each process stage as much as possible in the display panel manufacturing process to effectively control production costs and improve the yield of display panels.

[0047] This embodiment provides a display panel, including: a substrate, a plurality of display units, at least one first data line, at least one second data line, at least one first detection control unit, at least one second detection control unit, at least one first detection line, and at least one second detection line. The substrate includes a display area and a border area surrounding the display area. The border area includes a first border area surrounding the display area and a second border area located on the side of the first border area away from the display area. The second border area includes at least a bent area. The plurality of display units, at least one first data line, and at least one second data line are located in the display area, and the first data line and the second data line are electrically connected to a portion of the plurality of display units. The first detection line is at least located in the first border area, with a first end electrically connected to the first data line via the first detection control unit, and a second end configured to receive a first detection signal. The second detection line is at least located in the bent area, with a first end electrically connected to the second data line via the second detection control unit, and a second end configured to receive the first detection signal.

[0048] The first and second detection lines of the display panel provided in this embodiment can both receive the first detection signal. By utilizing the first detection signal, crack detection can be performed on the first and second detection lines simultaneously, thereby enabling simultaneous detection of cracks in the first frame area and the bending area to determine whether the display panel is qualified. In this way, fast and effective crack detection can be achieved, which can improve the quality of the display panel and reduce production costs.

[0049] In some exemplary embodiments, a plurality of display units electrically connected to a first data line can be configured to emit light to display a first bright line when a first detection control unit is turned on and a crack occurs in the first detection line. A plurality of display units electrically connected to a second data line can be configured to emit light to display a second bright line when a second detection control unit is turned on and a crack occurs in the second detection line. This example can determine whether cracks have occurred in the first frame area and the bending area based on whether the display panel displays the first and second bright lines, and can identify the location of the crack when the display panel displays either the first or second bright line. This enables effective and rapid detection of the first frame area and the bending area, thereby effectively controlling production costs and improving the yield of the display panel.

[0050] The following examples illustrate the solution of this embodiment.

[0051] Figure 1 This is a schematic diagram of a display panel according to at least one embodiment of the present disclosure. In some examples, such as Figure 1 As shown, the display panel may include a display area 10 and a border area surrounding the display area 10. The border area may include a first border area 21 surrounding the display area 10 and a second border area 22 located on one side of the display area 10. The second border area 22 may be located on the side of the first border area 21 away from the display area 10. In the first direction D1, a portion of the first border area 21 may be located between the display area 10 and the second border area 22. The second border area 22 may include a bent area 221, a trace lead-out area 222, and a signal access area (including a first signal access area 223 and a second signal access area 224) sequentially arranged along the direction away from the display area 10 (i.e., the first direction D1). The bent area 221 may be located on the side of the first border area 21 away from the display area 10, and the bent area 221 may be connected to the first border area 21. The trace lead-out area 222 is located between the bent area 221 and the first signal access area 223, and the second signal access area 224 is located on the side of the first signal access area 223 away from the display area 10.

[0052] In some examples, such as Figure 1As shown, the bending area 221 can be configured to bend the trace lead-out area 222, the first signal access area 223, and the second signal access area 224 to the back of the display area 10. The first signal access area 223 can be configured to house a corresponding integrated circuit, such as a display driver integrated circuit (DDI) or a touch and display driver integrated circuit (TDDI). The second signal access area 224 can be configured to house multiple bonding pins, which can bond to a flexible printed circuit board (FPC), allowing multiple signal leads (e.g., drive control lines, power lines, etc.) to be connected to an external control device through the multiple bonding pins.

[0053] In some examples, such as Figure 1 As shown, the display area 10 can be circular. However, this embodiment is not limited to this. For example, the display area 10 can be rectangular, elliptical, or other shapes.

[0054] In some examples, display area 10 may include: a substrate, a display structure layer disposed on the substrate, and an encapsulation structure layer. The display structure layer may include multiple display units (i.e., sub-pixels), multiple gate lines, and multiple data lines. The multiple data lines may extend along a first direction D1, and the multiple gate lines may extend along a second direction D2. The first direction D1 intersects the second direction D2; for example, the first direction D1 may be perpendicular to the second direction D2. The orthogonal projections of the multiple gate lines and the multiple data lines onto the substrate may intersect to form multiple sub-pixel regions. A sub-pixel is disposed within one sub-pixel region. The multiple data lines are electrically connected to the multiple sub-pixels and are configured to provide data signals to the multiple sub-pixels. The multiple gate lines are electrically connected to the multiple sub-pixels and are configured to provide gate drive signals to the multiple sub-pixels.

[0055] In some examples, a pixel unit of the display area may include three sub-pixels: a red sub-pixel, a green sub-pixel, and a blue sub-pixel. These three sub-pixels can be arranged horizontally side-by-side, vertically side-by-side, or in a triangular arrangement. However, this embodiment is not limited to this. In other examples, a pixel unit may include four sub-pixels: a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel. These four sub-pixels can be arranged horizontally side-by-side, vertically side-by-side, or in a square arrangement.

[0056] In some examples, at least one sub-pixel may include a pixel circuit and a light-emitting element. The pixel circuit may be configured to drive the connected light-emitting element. For example, the pixel circuit may include multiple transistors and at least one capacitor. For example, the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure. In the above circuit structures, T refers to a thin-film transistor, C refers to a capacitor, the number before T represents the number of thin-film transistors in the circuit, and the number before C represents the number of capacitors in the circuit. In some examples, the multiple transistors in the pixel circuit may be P-type transistors or N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the manufacturing difficulty of the display panel, and improve the product yield. In other examples, the multiple transistors in the pixel circuit may include both P-type and N-type transistors.

[0057] In some examples, the multiple transistors in the pixel circuit can be low-temperature polysilicon (LTPS) thin-film transistors (TFTs), oxide thin-film transistors (OPTs), or a combination of both. The active layer of the LTPS TFT is made of low-temperature polysilicon (LTPS), while the active layer of the OPT TFT is made of oxide. LTPS TFTs offer advantages such as high mobility and fast charging, while OPTs offer advantages such as low leakage current. Integrating LTPS and OPTs onto a single display panel—an LTPS+Oxide (LTPO) display panel—leverages the advantages of both, enabling low-frequency driving, reducing power consumption, and improving display quality.

[0058] In some examples, the light-emitting element can be any of the following: a light-emitting diode (LED), an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), or a micro-LED (including mini-LED or micro-LED). For example, the light-emitting element can be an OLED, which can emit red, green, blue, or white light under the drive of its corresponding pixel circuit. The color of the light emitted by the light-emitting element can be determined as needed. In some examples, the light-emitting element may include an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode. The anode of the light-emitting element can be electrically connected to the corresponding pixel circuit. However, this embodiment is not limited in this respect.

[0059] In some examples, the display panel can also integrate a touch structure. The display area of ​​the display panel can also include a touch structure layer located on the side of the encapsulation structure layer away from the substrate. The touch structure layer can be disposed on the encapsulation structure layer of the display panel, forming a Touch on Thin Film Encapsulation (TFE) structure. The display structure and touch structure are integrated together, which has the advantages of being thin, light, and foldable, and can meet the product requirements of flexible folding and narrow bezels. The Touch on TFE structure mainly includes the Flexible Multi-Layer On Cell (FMLOC) structure and the Flexible Single-Layer On Cell (FSLOC) structure. The FMLOC structure is based on the working principle of mutual capacitance detection. It generally uses two metal layers to form a driving (Tx) electrode and a sensing (Rx) electrode. The integrated circuit (IC) realizes the touch action by detecting the mutual capacitance between the driving electrode and the sensing electrode. The FSLOC structure is based on the working principle of self-capacitance (or voltage) detection. It generally uses a single layer of metal to form the touch electrode, and the integrated circuit realizes the touch action by detecting the self-capacitance (or voltage) of the touch electrode.

[0060] In some examples, the touch structure layer may include multiple touch units. At least one touch unit may include at least one touch electrode. The orthographic projection of at least one touch electrode onto the substrate may include the orthographic projections of multiple sub-pixels onto the substrate. When a touch unit includes multiple touch electrodes, the multiple touch electrodes may be spaced apart, and adjacent touch electrodes may be connected to each other through connecting portions. The touch electrodes and connecting portions may be in the same layer. In some examples, the touch electrode may have a rhombus shape, such as a regular rhombus, a horizontally elongated rhombus, or a vertically elongated rhombus. However, this embodiment is not limited to this. In some examples, the touch electrode may have any one or more of the following shapes: triangle, square, trapezoid, parallelogram, pentagon, hexagon, and other polygons.

[0061] In some examples, the touch electrodes in the display panel can be in the form of a metal mesh, which is formed by multiple interwoven metal lines. The metal mesh includes multiple mesh patterns, each a polygon formed by multiple metal lines. Touch electrodes in the form of a metal mesh have advantages such as low resistance, small thickness, and fast response speed. However, this embodiment is not limited to this.

[0062] Figure 2 for Figure 1 A partial cross-sectional view along the R-R' direction. In some examples, such as... Figure 1 and Figure 2As shown, in the direction perpendicular to the display panel, the display area 10 may include: a substrate 41, a driving circuit layer 42, a light-emitting element 43, an encapsulation structure layer 44, and a touch structure layer 45 sequentially disposed on the substrate 41. Figure 2 The diagram uses only the structure of a single sub-pixel as an example.

[0063] In some examples, substrate 41 may be a flexible substrate. The flexible substrate may include a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked together. The first and second flexible material layers may be made of materials such as polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer film. The first and second inorganic material layers may be made of materials such as silicon nitride (SiNx) or silicon oxide (SiOx) to improve the substrate's resistance to water and oxygen. The semiconductor layer may be made of amorphous silicon (a-Si). However, this embodiment is not limited to these methods.

[0064] In some examples, such as Figure 2 As shown, the driving circuit layer 42 may include a plurality of transistors forming a pixel circuit and at least one storage capacitor. Figure 2 The following example illustrates a first transistor 401 and a first storage capacitor 402. The driving circuit layer 42 of the display area 10 may include: a semiconductor layer disposed on a substrate 41, a first insulating layer 51 covering the semiconductor layer, a first gate metal layer disposed on the first insulating layer 51, a second insulating layer 52 covering the first gate metal layer, a second gate metal layer disposed on the second insulating layer 52, a third insulating layer 53 covering the second gate metal layer, and a first source / drain metal layer disposed on the third insulating layer 53. The semiconductor layer may include at least a first active layer, the first gate metal layer may include at least a first gate electrode and a first capacitor electrode, the second gate metal layer may include at least a second capacitor electrode, and the first source / drain metal layer may include at least a first source electrode and a first drain electrode. The first active layer, the first gate electrode, the first source electrode, and the first drain electrode can form the first transistor 401, and the first capacitor electrode and the second capacitor electrode can form the first storage capacitor 402. In other examples, the driving circuit layer may also include a sixth insulating layer and a second source / drain metal layer located on the side of the first source / drain metal layer away from the substrate. However, this embodiment is not limited to this.

[0065] In some examples, such as Figure 2As shown, the light-emitting element 43 may include a first electrode 431, a pixel definition layer 434, an organic light-emitting layer 432, and a second electrode 433. The first electrode 431 is disposed on the fifth insulating layer 55 and connected to the first drain electrode of the first transistor 401 through vias formed in the fourth insulating layer 54 and the fifth insulating layer 55. The pixel definition layer 434 may be disposed on the first electrode 431 and the fifth insulating layer 55, and may have a pixel opening that exposes a portion of the surface of the first electrode 431. The organic light-emitting layer 432 is at least partially disposed within the pixel opening and is connected to the first electrode 431. The second electrode 433 is disposed on the organic light-emitting layer 432 and is connected to the organic light-emitting layer 432.

[0066] In some examples, such as Figure 2 As shown, the organic light-emitting layer 432 of the light-emitting element 43 may include an emitting layer (EML) and one or more films including a hole injection layer (HIL), a hole transport layer (HTL), a hole block layer (HBL), an electron block layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL). Driven by the voltage of the first electrode 431 and the second electrode 433, the light-emitting characteristics of the organic material are utilized to emit light at the required grayscale. In some examples, the emitting layers of different colored light-emitting elements are different. For example, a red light-emitting element includes a red emitting layer, a green light-emitting element includes a green emitting layer, and a blue light-emitting element includes a blue emitting layer. To reduce process complexity and improve yield, the hole injection layer and hole transport layer on one side of the emitting layer can be common layers, and the electron injection layer and electron transport layer on the other side of the emitting layer can also be common layers. In some examples, any one or more of the hole injection layer, hole transport layer, electron injection layer, and electron transport layer can be fabricated in a single process (single vapor deposition or single inkjet printing) and isolated by surface steps or surface treatment. For example, any one or more of the hole injection layer, hole transport layer, electron injection layer, and electron transport layer corresponding to adjacent sub-pixels can be isolated. In some examples, the organic light-emitting layer can be formed by vapor deposition using a fine metal mask (FMM) or an open mask, or by inkjet printing.

[0067] In some examples, such as Figure 2 As shown, the encapsulation structure layer 44 may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked together. The first and third encapsulation layers may be made of inorganic materials, while the second encapsulation layer may be made of organic materials. The second encapsulation layer is disposed between the first and third encapsulation layers to prevent external moisture from entering the light-emitting element 43. However, this embodiment is not limited to this. For example, the encapsulation layer may employ a five-layer stacked structure of inorganic / organic / inorganic / organic / inorganic.

[0068] In some examples, such as Figure 2 As shown, the touch structure layer 45 may include: a first touch insulating layer 451 disposed on the side of the encapsulation structure layer 44 away from the substrate 41, a touch electrode layer 452 disposed on the side of the first touch insulating layer 451 away from the substrate 41, and a touch protective layer 455 disposed on the side of the touch electrode layer 452 away from the substrate 41. This example illustrates the touch structure layer using an FSLOC structure as an example. However, this embodiment is not limited to this.

[0069] Figure 3 This is a partial wiring diagram of a display panel according to at least one embodiment of the present disclosure. Figure 3 The diagram uses several data lines in the display area and several detection lines in the border area as examples, omitting other wiring diagrams.

[0070] In some examples, such as Figure 3 As shown, the display area 10 may include at least two first data lines 11, at least two second data lines 12, and multiple third data lines 13. Each data line may be electrically connected to multiple display units Px arranged along the first direction D1, and configured to provide data signals to the multiple display units Px. For example, the first data lines 11 and 12 may be configured to be electrically connected to display units emitting light of the same color; for instance, the first data lines 11 and 12 may be configured to be electrically connected to multiple display units emitting green light. However, this embodiment is not limited to this.

[0071] In some examples, two first data lines 11 may be approximately symmetrical about the center line of the display area 10 along the second direction D2, and two second data lines 12 may be approximately symmetrical about the center line of the display area 10 along the second direction D2. The first data lines 11 and 12 may not be adjacent, and multiple third data lines 13 may be arranged between the first data lines 11 and 12. The number of third data lines 13 arranged between the first data lines 11 and 12 should be such that multiple display units electrically connected to the first data lines 11 and 12 can be distinguished by the naked eye when illuminated. The two first data lines 11 may not be adjacent, and multiple third data lines 13 may be arranged between the two first data lines 11. The number of third data lines 13 arranged between the two first data lines 11 should be such that multiple display units electrically connected to the two first data lines 11 can be distinguished by the naked eye when illuminated. The two second data lines 12 may not be adjacent, and multiple third data lines 13 may be arranged between the two second data lines 12. The number of third data lines 13 disposed between the two second data lines 12 should be such that multiple display units electrically connected to the two second data lines 12 can be distinguished by the naked eye when lit. For example, all data lines in the display area 10 other than the first data line 11 and the second data line 12 can be used as third data lines 13. However, this embodiment is not limited in this respect.

[0072] In some examples, such as Figure 3 As shown, the border area may include: multiple detection control units (e.g., a first detection control unit 35, a second detection control unit 36, and a third detection control unit 37), two first detection lines 31a and 31b, two second detection lines 32a and 32b, a third detection line 33, and a detection control line 34. For example, the multiple detection control units may be located in the first border area 21. A first detection control unit 35 may be electrically connected to a first detection line and at least one first data line 11, a second detection control unit 36 ​​may be electrically connected to a second detection line and at least one second data line 12, and a third detection control unit 37 may be electrically connected to a third detection line 33 and at least one third data line 13. A third detection line 33 may be electrically connected to multiple third detection control units 37 and multiple third data lines 13. The detection control line 34 may be electrically connected to the first detection control unit 35, the second detection control unit 36, and the third detection control unit 37. However, this embodiment is not limited to this. In other examples, the multiple detection control units may be located in the second border area.

[0073] In some examples, such as Figure 3As shown, the two first detection lines 31a and 31b can be approximately symmetrical about the centerline of the display panel along the second direction D2. For example, the first detection line 31a can be located in the left half of the bezel area, and the first detection line 31b can be located in the right half of the bezel area. The first detection line 31a may include: a first sub-trace 311a located in the first bezel area 21, a second sub-trace 312a located in the bending area 221, and a third sub-trace 313a located in the trace lead-out area 222. The first detection line 31b may include a first sub-trace 311b located in the first bezel area 21, a second sub-trace 312b located in the bending area 221, and a third sub-trace 313b located in the trace lead-out area 222. The first sub-traces 311a and 311b can be serpentine traces. A serpentine trace is a curved path. For example, one end of a trace extends a distance in one direction, then bends and extends a distance in the opposite direction, then bends and extends in the same direction again, repeating this bend and twist several times to form a serpentine trace. In this example, the first sub-traces 311a and 311b can wind along the first border area 21 away from the display area 10. For example, the first sub-traces 311a and 311b can include multiple arc segments (e.g., three arc segments) and straight lines connecting adjacent arc segments. The shape of the arc segments can be approximately the same as the edge shape of the left or right portion of the display area 10. One end of the first sub-line 311a (or 311b) can be electrically connected to the first detection control unit 35, and the other end can be electrically connected to one end of the second sub-line 312a (or 312b). The other end of the second sub-line 312a (or 312b) can be electrically connected to one end of the third sub-line 313a (or 313b), and the other end of the third sub-line 313a (or 313b) can be electrically connected to the first signal pin 391 located in the first signal access area 223 via the detection connection line 38. The detection connection line 38 can also extend to the second signal access area 224 and be electrically connected to the fourth signal pin 394 located in the second signal access area 224. The fourth signal pin 394 can serve as a test pin. For example, by providing a test signal through the fourth signal pin 394, it is possible to identify whether the integrated circuit set in the first signal access area is faulty.

[0074] In some examples, such as Figure 3 As shown, the first detection control unit 35 can be located on the side of the first detection line 31a or 31b near the display area 10. The first detection control unit 35 may include a first detection transistor. The gate of the first detection transistor can be electrically connected to the detection control line 34, the first electrode of the first detection transistor can be electrically connected to the first end of the first detection line 31a or 31b, and the second electrode of the first detection transistor can be electrically connected to the first data line 11 of the display area 10.

[0075] In some examples, such as Figure 3 As shown, the two second detection lines 32a and 32b can be approximately symmetrical about the centerline of the display panel along the second direction D2. For example, the second detection line 32a can be located in the left half of the bezel area, and the second detection line 32b can be located in the right half of the bezel area. The second detection line 32a may include: a fourth sub-line 321a located in the first bezel area 21, a fifth sub-line 322a located in the bending area 221, and a sixth sub-line 323a located in the line lead-out area 222. The second detection line 32b may include: a fourth sub-line 321b located in the first bezel area 21, a fifth sub-line 322b located in the bending area 221, and a sixth sub-line 323b located in the line lead-out area 222. The fifth sub-lines 322a and 322b can be serpentine lines. The fifth sub-lines 322a and 322b can be wound along the second direction D2 within the bending area 221. One end of the fourth sub-line 321a (or 321b) can be electrically connected to the second detection control unit 36, and the other end can be electrically connected to one end of the fifth sub-line 322a (or 322b); the other end of the fifth sub-line 322a (or 322b) can be electrically connected to one end of the sixth sub-line 323a (or 323b), and the other end of the sixth sub-line 323a (or 323b) can be electrically connected to the first signal pin 391 located in the first signal access area 223 through the detection connection line 38.

[0076] In some examples, such as Figure 3 As shown, the second detection control unit 36 ​​can be located on the side of the second detection line 32a or 32b near the display area 10. The second detection control unit 36 ​​may include a second detection transistor. The gate of the second detection transistor can be electrically connected to the detection control line 34, the first terminal of the second detection transistor can be electrically connected to the first end of the second detection line 32a or 32b, and the second terminal of the second detection transistor can be electrically connected to the second data line 12 of the display area 10.

[0077] In some examples, such as Figure 3 As shown, the third detection line 33 may include a seventh sub-line 331 located within the first border region 21 and an eighth sub-line 332 extending from the first border region 21 to the second border region. For example, the seventh sub-line 331 may be a loop line surrounding the display region 10. One end of the eighth sub-line 332 is electrically connected to the seventh sub-line 331, and the other end may be electrically connected to the second signal pin 392 within the first signal access region 223.

[0078] In some examples, such as Figure 3As shown, the third detection control unit 37 may include a third detection transistor. The gate of the third detection transistor may be electrically connected to the detection control line 34, the first terminal of the third detection transistor may be electrically connected to the third detection line 33, and the second terminal of the third detection transistor may be electrically connected to the third data line 13 of the display area 10.

[0079] In some examples, such as Figure 3 As shown, the detection control line 34 may include a ninth sub-line 341 located within the first border region 21 and a tenth sub-line 342 extending from the first border region 21 to the second border region. For example, the ninth sub-line 341 may be a loop around the display region 10. For example, the ninth sub-line 341 may be located on the side of the seventh sub-line 331 near the display region 10. One end of the tenth sub-line 342 is electrically connected to the ninth sub-line 341, and the other end may be electrically connected to a third signal pin 393 within the first signal access region 223. In this example, the detection control line 34 may provide a detection control signal configured to turn on or off multiple detection control units.

[0080] In some examples, the detection control unit includes a P-type transistor, and the detection control line 34 can turn on the detection transistor by providing a low-level detection control signal and turn it off by providing a high-level detection control signal. However, this embodiment is not limited to this. For example, the detection transistor can be an N-type transistor, and the detection control line can turn on the detection transistor by providing a high-level detection control signal and turn it off by providing a low-level detection control signal.

[0081] In some examples, during crack detection, the detection control signal provided by detection control line 34 can turn on the detection transistor, thereby turning on the first detection control unit 35, the second detection control unit 36, and the third detection control unit 37. The first detection lines 31a and 31b, the second detection lines 32a and 32b can receive the first detection signal (e.g., a high-level signal), and the third detection line 33 can receive the second detection signal (e.g., a high-level signal). When the display panel has no cracks, since the first detection control unit 35, the second detection control unit 36, and the third detection control unit 37 are all turned on, the first detection lines 31a and 31b can be connected to the corresponding first data line 11, the second detection lines 32a and 32b can be connected to the corresponding second data line 12, and the third detection line 33 can be connected to the corresponding third data line 13. This provides the first detection signal to the first data line 11 and the second data line 12, and the second detection signal to the third data line 13, so that the display units electrically connected to these data lines do not emit light. The display units in the entire display area of ​​the display panel appear black, that is, the display area displays a dark image. Taking a crack in the first detection line 31a as an example, the voltage drop caused by the increased wiring resistance of the first detection line 31a prevents the first detection signal from being transmitted to the corresponding first data line 11. The display unit connected to this first data line 11 can emit light, the second data line can receive the first detection signal, and the third data line can receive the second detection signal. The display units electrically connected to the second and third data lines do not emit light, thus displaying a first bright line corresponding to the first data line 11 in the display area. Similarly, when a crack exists in the second detection line 32a or 32b, the second data line 12 electrically connected to the second detection line 32a or 32b cannot receive the first detection signal. The display unit electrically connected to the second data line 12 can emit light, while the display units electrically connected to the other data lines do not emit light, thus displaying a second bright line corresponding to the second data line 12 in the display area. In this way, the location of the crack in the display panel can be identified based on the positions of the first and second bright lines.

[0082] In this example, a second detection signal is provided to data lines not connected to the first and second detection lines via a third detection control unit and a third detection line, causing the display area to show a dark image, thus facilitating human visual identification when bright lines appear in the display area. In other examples, the display panel may not have a third detection control unit and a third detection line. In this case, during crack detection, a first detection signal can be directly provided to data lines not connected to the first and second detection lines, so that the display units electrically connected to these data lines do not emit light.

[0083] Figure 4 This is a schematic diagram of another partial wiring of a display panel according to at least one embodiment of the present disclosure. In some examples, such as Figure 4 As shown, the eighth sub-trace 332 of the third detection line 33 can be electrically connected to the detection connection line 38 in the second frame area to be configured to receive the first detection signal. In this example, the second signal pin 392 may not be provided in the first signal access area 223. The first detection lines 31a and 31b, the second detection lines 32a and 32b, and the third detection line 33 can receive the same first detection signal. The first detection lines 31a and 31b and the third detection line 33 can be configured to perform crack detection in the first frame area, and the second detection lines 32a and 32b can be configured to perform crack detection in the bending area. The remaining structure of the display panel of this embodiment can be referred to the description of the foregoing embodiment, and therefore will not be repeated here.

[0084] In some examples, during crack detection, the detection control signal provided by detection control line 34 can turn on the detection transistor, thereby turning on the first detection control unit 35, the second detection control unit 36, and the third detection control unit 37. The first detection lines 31a and 31b, the second detection lines 32a and 32b, and the third detection line 33 can receive the first detection signal (e.g., a high-level signal). When the display panel has no cracks, since the first detection control unit 35, the second detection control unit 36, and the third detection control unit 37 are all turned on, the first detection lines 31a and 31b can be connected to the corresponding first data line 11, the second detection lines 32a and 32b can be connected to the corresponding second data line 12, and the third detection line 33 can be connected to the corresponding third data line 13. This provides the first detection signal to the first data line 11, the second data line 12, and the third data line 13, causing the display units electrically connected to these data lines to not emit light. The display units in the entire display area of ​​the display panel appear black, i.e., the display area displays a dark image. Taking a crack in the first detection line 31a as an example, the voltage drop caused by the increased wiring resistance of the first detection line 31a prevents the first detection signal from being transmitted to the corresponding first data line 11. The display unit connected to this first data line 11 can emit light, while the other data lines can receive the first detection signal. The display units electrically connected to the other data lines do not emit light, thus displaying a first bright line corresponding to the first data line 11 in the display area. Similarly, when a crack exists in the second detection line 32a or 32b, the second data line 12 electrically connected to the second detection line 32a or 32b cannot receive the first detection signal. The display unit electrically connected to the second data line 12 can emit light, while the display units electrically connected to the other data lines do not emit light, thus displaying a second bright line corresponding to the second data line 12 in the display area. When a crack exists on the third detection line 33, the third data line 13 electrically connected to the third detection line 33 cannot receive the first detection signal. The display unit electrically connected to the third data line 13 can emit light, while the display units electrically connected to the other data lines do not emit light, and a bright line corresponding to the third data line 13 can be displayed in the display area. In this way, the location of the crack in the display panel can be identified based on the position of the bright line. In this example, the first detection signal can simultaneously detect frame cracks through three sets of detection lines (first detection line, second detection line, and third detection line), which can increase the detection range and improve detection efficiency.

[0085] In some examples, when a display unit electrically connected to the first data line 11 corresponding to the first detection line 31a emits light to display a first bright line, a crack in the first detection line 31a can be identified. When a display unit electrically connected to the first data line 11 corresponding to the first detection line 31b emits light to display a first bright line, a crack in the first detection line 31b can be identified. When a display unit electrically connected to the second data line 12 corresponding to the second detection line 32a emits light to display a second bright line, a crack in the second detection line 32a can be identified. When a display unit electrically connected to the second data line 12 corresponding to the second detection line 32b emits light to display a second bright line, a crack in the second detection line 32b can be identified. When a display unit electrically connected to the third data line 13 corresponding to the third detection line 33 emits light to display a bright line, a crack in the third detection line 33 can be identified. For example, the third detection line 33 can be configured to detect whether a crack exists in the area surrounding the display area.

[0086] In this example, by setting the first detection line 31a to wrap around the left side of the first border region 21, the first detection line 31a can be configured to primarily detect whether there are cracks in the left side of the first border region 21. By setting the first detection line 31b to wrap around the right side of the first border region 21, the first detection line 31b can be configured to primarily detect whether there are cracks in the right side of the first border region 21. By setting the second detection line 32a to wrap around the left side of the bending region 221, the second detection line 32a can be configured to primarily detect whether there are cracks in the left side of the bending region 221. By setting the second detection line 32b to wrap around the right side of the bending region 221, the second detection line 32b can be configured to primarily detect whether there are cracks in the right side of the bending region 221.

[0087] In this example, since the first detection line is connected to the first data line and the second detection line is connected to the second data line, and the first and second detection lines can synchronously receive the first detection signal, crack detection can be performed simultaneously on both lines. The presence of cracks at the positions of the first and second detection lines can be simultaneously identified based on the position of the bright lines in the display area, thereby determining whether the entire display panel has cracks. Compared to some implementations that use bright line detection for cracks in the first frame area and resistance detection for cracks in the bending area, this example simultaneously uses bright line detection to detect cracks in both the first frame area and the bending area. This reduces detection processes and time, significantly increases production capacity, lowers production costs, and improves the yield of the display panel. By setting up a first and second detection line and performing synchronous detection on both, the detection range can be increased.

[0088] Figure 5This is a partially enlarged schematic diagram of the first and second border regions according to at least one embodiment of the present disclosure. In some examples, such as... Figure 5 As shown, the border area may include: multiple data leads 61 and multiple drive control signal lines 62. The multiple data leads 61 may be approximately symmetrical about the center line of the display panel along the second direction D2, and the multiple drive control signal lines 62 may be approximately symmetrical about the center line of the display panel along the second direction D2. Figure 5 The diagram illustrates the multiple data leads and drive control signal lines. This embodiment does not limit the number of data leads and drive control signal lines. Figure 5 The circuit structure of the first frame region 21 (including, for example, gate drive circuit, multiplexing circuit, test circuit and electrostatic discharge circuit, etc.) is not shown in the figure.

[0089] In some examples, such as Figure 5 As shown, at least one data lead-out line 61 may include: a first sub-data lead-out line 611 located in the first border region 21, a data connection line 613 located in the bending region 221 and extending along the first direction D1, and a second sub-data lead-out line 612 located in the trace lead-out region 222 and extending along the first direction D1. The first sub-data lead-out line 611 and the second sub-data lead-out line 612 can be electrically connected through the data connection line 613 in the bending region 221. For example, the first sub-data lead-out line 61 can be electrically connected to a multiplexing circuit, extend along the edge shape of the display area to the region of the first border region 21 near the bending region 221, and then extend along the first direction D1 towards the bending region 221. The second sub-data lead-out line 612 can be configured to be electrically connected to the integrated circuit in the first signal access region 223. In some examples, the first sub-data lead-out line 611 and the second sub-data lead-out line 612 can be disposed on the same layer as the first gate metal layer or the second gate metal layer of the display area, and the data connection line 613 can be disposed on the same layer as the first source-drain metal layer of the display area.

[0090] In some examples, such as Figure 5As shown, at least one drive control signal line 62 may include: a first sub-drive control signal line 621 and a second sub-drive control signal line 622 located in the first frame region 21; a drive control connection line 626 located in the bending region 221; a third sub-drive control signal line 623, a fourth sub-drive control signal line 624, and a fifth sub-drive control signal line 625 located in the trace lead-out region 222. The first sub-drive control signal line 621 may extend along the edge shape of the display region 10 and, after being electrically connected to the electrostatic discharge circuit, be electrically connected to the second sub-drive control signal line 622 extending along the first direction D1. The second sub-drive signal control line 622 may be electrically connected to the third sub-drive signal control line 623 extending along the first direction D1 via the drive control connection line 626 extending along the first direction D1. The third sub-drive control signal line 623 may be electrically connected to the fourth sub-drive control signal line 624 extending at least along the second direction D2, and may also be electrically connected to the fifth sub-drive control signal line 625. The fifth sub-drive control signal line 625 can be electrically connected to the signal pin in the first signal access area 223, and the fourth sub-drive control signal line 624 can be electrically connected to the bonding pin in the second signal access area.

[0091] In some examples, such as Figure 5 As shown, the bezel area can also be provided with multiple touch signal lines. The touch signal lines may include a first sub-touch signal line (not shown) located in the first bezel area, a touch connection line 63 located in the bending area 221, and a second sub-touch signal line (not shown) located in the trace lead-out area. The second sub-touch signal line can extend along a first direction D1 to a first signal access area 223, for example, it can be electrically connected to a TDDI circuit. The touch connection line 63 can be disposed on the same layer as the first source / drain metal layer of the display area. In other examples, the second sub-touch signal line located in the trace lead-out area can extend along the first direction D1 and a fourth direction D4 to a second signal access area, be electrically connected to the signal pins of the second signal access area, and be electrically connected to a flexible printed circuit board (FPC) through the signal pins of the second signal access area. For example, in the second bezel area, the touch signal line can be located on the side of the second power line 65 away from the first power line 64.

[0092] In some examples, such as Figure 5 As shown, the bezel area may also be provided with a first power line 64 and a second power line 65. For example, the first power line 64 and the second power line 65 can be on the same layer. The first power line 64 and the second power line 65 can be disposed on the same layer as the first source / drain metal layer of the display area.

[0093] In some examples, such as Figure 5As shown, the first power line 64 may include a first sub-power line 641 located in the first frame region 21, a first power connection line 643 located in the bending region 221, and a second sub-power line 642 located in the trace lead-out region 222. The first power connection line 643 can electrically connect the first sub-power line 641 and the second sub-power line 642. The second sub-power line 642 can extend along the first direction D1, then extend to both sides along the second direction D2, and then extend to the second signal access region along the third direction D3 and the fourth direction D4 respectively, so as to electrically connect with the bonding pin of the second signal access region. The third direction D3 and the fourth direction D4 both intersect the first direction D1 and the second direction D2, and the third direction D3 intersects the fourth direction D4. For example, the third direction D3 can be perpendicular to the fourth direction D4.

[0094] In some examples, such as Figure 5 As shown, the second power line 65 can be located on the side of the first power line 64 near the edge of the display panel. The second power line 65 may include: a third sub-power line 651 located in the first bezel area 21, a second power connection line 653 located in the bending area 221, and a fourth sub-power line 652 located in the trace lead-out area 222. The fourth sub-power line 652 located in the left area of ​​the second bezel area can first extend along the first direction D1, and then extend along the fourth direction D4 towards the second signal access area. The fourth sub-power line 652 located in the right area of ​​the second bezel area can first extend along the first direction D1, and then extend along the third direction D3 towards the second signal access area. The fourth sub-power line 652 can be electrically connected to the bonding pin of the second signal access area.

[0095] In some examples, such as Figure 5 As shown, in a portion of the first border area 21, the first sub-trace 311a of the first detection line 31a can be located on the side of the third sub-power line 651 of the second power line 65 away from the display area 10, and the fourth sub-trace 321a of the second detection line 32a can be located on the side of the third sub-power line 651 of the second power line 65 closer to the display area 10. Similarly, the first sub-trace 311b of the first detection line 31b can be located on the side of the third sub-power line of the second power line away from the display area 10, and the fourth sub-trace 321b of the second detection line 32b can be located on the side of the third sub-power line of the second power line closer to the display area 10.

[0096] Figure 6 for Figure 5 A magnified view of a portion of region S1. In some examples, such as... Figure 5 and Figure 6As shown, the second sub-trace 312a of the first detection line 31a can be a straight segment extending along the first direction D1. The first sub-trace 311a and the third sub-trace 313a can be in the same layer, for example, in the same layer as the second gate metal layer of the display area. The second sub-trace 312a can be in the same layer as the first source / drain metal layer of the display area. One end of the second sub-trace 312a can be electrically connected to the first sub-trace 311a through a via in the third insulating layer, and the other end can be electrically connected to the third sub-trace 313a through a via in the third insulating layer. The fifth sub-trace 322a of the second detection line 32a can include multiple (e.g., five) first straight segments along the first direction D1 and second straight segments extending along the second direction D2 connecting adjacent first straight segments. The second straight segments can connect multiple first straight segments in series. The fifth sub-trace 322a can be in the same layer as the first source / drain metal layer of the display area. The fourth sub-trace 321a can be disposed on the same layer as the first gate metal layer of the display area, and the sixth sub-trace 323a can be disposed on the same layer as the second gate metal layer of the display area. One end of the fifth sub-trace 322a can be electrically connected to the fourth sub-trace 321a through a via formed in the third and second insulating layers, and the other end can be electrically connected to the sixth sub-trace 323a through a via formed in the third insulating layer. In this example, the more straight segments the fifth sub-trace 322a has, the wider the range of bending areas that the second detection line 32a can detect.

[0097] In some examples, such as Figure 5 and Figure 6 As shown, in the bending region 221, the second sub-trace 312a of the first detection line 31a and the fifth sub-trace 322a of the second detection line 32a can be located between the second power connection line 653 of the second power line 65 and the multiple touch connection lines 63. The fifth sub-trace 322a of the second detection line 32a can be located on the side of the second sub-trace 312a of the first detection line 31a away from the second power connection line 653 of the second power line 65. In this example, by setting the second detection line in the bending region on the side of the second power line away from the edge of the display panel, it is beneficial for the second detection line to perform crack detection in the bending region. In addition, setting the first detection line and the second detection line adjacent to each other in the bending region is beneficial for the wiring arrangement.

[0098] Figure 7 for Figure 5 A magnified view of a portion of region S2. In some examples, such as... Figures 5 to 7As shown, the third sub-trace 313a of the first detection line 31a can first extend along the first direction D1 towards the side away from the display area, then extend along the third direction D3 towards the center line of the display panel along the second direction, and then extend again along the first direction D1 towards the side away from the display area. The extension direction of the sixth sub-trace 323a of the second detection line 32a is approximately the same as that of the third sub-trace 313a. The sixth sub-trace 323a can be located on the side of the third sub-trace 313a close to the center line of the display panel along the second direction. The structures of the first detection line 31b and the second detection line 32b can be referred to the structures of the first detection line 31a and the second detection line 32a, and therefore will not be described in detail here.

[0099] Figure 8 for Figure 5 A magnified view of a portion of the central region S3. Figure 9 for Figure 5 A magnified view of a portion of the central region S4. Figure 10 for Figure 5 A magnified view of a portion of region S5 in the middle. In some examples, such as... Figures 5 to 10 As shown, the third sub-trace 313a of the first detection line 31a can be electrically connected to the first detection connection line 381, and the sixth sub-trace 323a of the second detection line 32a can be electrically connected to the first detection connection line 381. The first detection connection line 381 can extend along the second direction D2, and its first end can be electrically connected to the fourth detection connection line 384 extending along the fourth direction D4. The fourth detection connection line 384 can be electrically connected to the fifth detection connection line 385, and the fifth detection connection line 385 can be electrically connected to the first signal pin of the first signal access area. The fourth detection connection line 384 can extend sequentially along the fourth direction D4, the second direction D2, the fourth direction D4, and the first direction D1 to the second signal access area, and is electrically connected to the fourth signal pin of the second signal access area. The second end of the first detection connection line 381 can be electrically connected to the first end of the second detection connection line 382 extending along the first direction D1 toward the display area. The second end of the second detection connection line 382 can be electrically connected to the third detection connection line 383 extending along the second direction D2. The third sub-trace 313b of the first detection line 31b and the sixth sub-trace 323b of the second detection line 32b can be electrically connected to the third detection connection line 383. The first detection connection line 381, the second detection connection line 382, ​​and the third detection connection line 383 can be located on the side of the first power line 64 away from the display area 10. In some examples, the fourth detection connection line 384 and the first detection connection line 381 can be an integral structure. The first detection connection line 381 and the third detection connection line 383 can be disposed on the same layer as the first source / drain metal layer of the display area, and the second detection connection line 382 can be disposed on the same layer as the first gate metal layer of the display area.

[0100] In this example, the detection connection line 38 may include: a first detection connection line 381, a second detection connection line 382, ​​a third detection connection line 383, a fourth detection connection line 384, and a fifth detection connection line 385. The first detection connection line 381, the second detection connection line 382, ​​and the third detection connection line 383 can electrically connect the two first detection lines 31a and 31b, and the two second detection lines 32a and 32b, to the same first signal pin within the first signal access area. The fourth detection connection line 384 can also electrically connect to a fourth signal pin within the second signal access area. The wiring method in this example can save wiring space.

[0101] In some examples, such as Figure 8 As shown, the first detection connection line 381 can also be electrically connected to the eighth sub-trace 332 of the third detection line 33 to provide a first detection signal to the third detection line 33. In this example, the third detection line 33 can also receive the first detection signal provided by the first signal pin. The connection method in this example can save wiring space and reduce the space occupied by the signal pins.

[0102] In some examples, such as Figure 7 and Figure 8 As shown, the tenth sub-line 342 of the detection control line 34 can extend along the first direction D1 in the line lead-out area 222 and be electrically connected to the first control connection line 386, and can also be electrically connected to the second control connection line 387. The extension direction of the first control connection line 386 is approximately the same as the extension direction of the first detection connection line 381, and the first control connection line 386 and the first detection connection line 381 are adjacent in the first direction D1.

[0103] In some examples, such as Figures 5 to 8As shown, the multiple drive control signal lines 62 may include: a first voltage line 62a, a second voltage line 62b, an initial signal (INIT) line 62c, an output signal line 62d, a start signal (STV) line 62e, a first clock signal line 62f, a second clock signal line 62g, a test control line 62h, a first test signal line 62i, a second test signal line 62j, and a third test signal line 62k. The first voltage line 62a and the second voltage line 62b can be configured to provide power signals to the gate drive circuit. The first clock signal line 62f and the second clock signal line 62g can be configured to provide clock signals to the gate drive circuit. The start signal line 62e can be configured to provide a start signal to the gate drive circuit. The initial signal line 62c can be configured to provide an initial signal to the pixel circuit. The output signal line 62d can be configured to transmit the output signal of the gate drive circuit. The test control line 62h, the first test signal line 62i, the second test signal line 62j, and the third test signal line 62k can be configured to provide signals to the test circuit.

[0104] In some examples, such as Figure 8 As shown, the third sub-drive control signal line 623a of the first voltage line 62a, the third sub-drive control signal line 623b of the second voltage line 62b, the third sub-drive control signal line 623c of the initial signal line 62c, the third sub-drive control signal line 623d of the output signal line 62d, the eighth sub-line 332 of the third detection line 33, the tenth sub-line 342 of the detection control line 34, the third sub-drive control signal line 623e of the start signal line 62e, the third sub-drive control signal line 623f of the first clock signal line 62f, the third sub-drive control signal line 623g of the second clock signal line 62g, the third sub-drive control signal line 623h of the test control line 62h, the third sub-drive control signal line 623i of the first test signal line 62i, the third sub-drive control signal line 623j of the second test signal line 62j, and the third sub-drive control signal line 623k of the third test signal line 62k can be arranged sequentially along the second direction D2.

[0105] In some examples, such as Figure 7 and Figure 8As shown, the fourth sub-drive control signal line 624e of the start signal line 62e, the fourth sub-drive control signal line 624f of the first clock signal line 62f, the fourth sub-drive control signal line 624g of the second clock signal line 62g, the fourth sub-drive control signal line 624d of the output signal line 62d, the fourth sub-drive control signal line 624d of the initial signal line 62c, the fourth sub-drive control signal line 624b of the second voltage line 62b, the fourth sub-drive control signal line 624a of the first voltage line 62a, the first control connection line 385, the first detection connection line 381, the fourth sub-drive control signal line 624h of the test control line 62h, the fourth sub-drive control signal line 624i of the first test signal line 62i, the fourth sub-drive control signal line 624j of the second test signal line 62j, and the fourth sub-drive control signal line 624k of the third test signal line 62k can be arranged sequentially along the first direction D1.

[0106] In some examples, such as Figure 8 As shown, the third sub-drive control signal line 623a of the first voltage line 62a is electrically connected to the fourth sub-drive control signal line 624a and the fifth sub-drive control signal line 625a. The third sub-drive control signal line 623b of the second voltage line 62b is electrically connected to the fourth sub-drive control signal line 624b and the fifth sub-drive control signal line 625b. The third sub-drive control signal line 623c of the initial signal line 62c is electrically connected to the fourth sub-drive control signal line 624c. The third sub-drive control signal line 623d of the output signal line 62d is electrically connected to the fourth sub-drive control signal line 624d. The third sub-drive control signal line 623e of the start signal line 62e is electrically connected to the fourth sub-drive control signal line 624e and the fifth sub-drive control signal line 625e. The third sub-drive control signal line 623f of the first clock signal line 62f is electrically connected to the fourth sub-drive control signal line 624f and the fifth sub-drive control signal line 625f. The third sub-drive control signal line 623g of the second clock signal line 62g is electrically connected to the fourth sub-drive control signal line 624g and the fifth sub-drive control signal line 625g. The third sub-drive control signal line 623h of the test control line 62h is electrically connected to the fourth sub-drive control signal line 624h and the fifth sub-drive control signal line 625h. The third sub-drive control signal line 623i of the first test signal line 62i is electrically connected to the fourth sub-drive control signal line 624i and the fifth sub-drive control signal line 625i. The third sub-drive control signal line 623j of the second test signal line 62j is electrically connected to the fourth sub-drive control signal line 624j and the fifth sub-drive control signal line 625j. The third sub-drive control signal line 623k of the third test signal line 62k is electrically connected to the fourth sub-drive control signal line 624k and the fifth sub-drive control signal line 625k.

[0107] In this example, the first detection connection line 381 is arranged within multiple fourth sub-drive control signal lines, which facilitates connection to the third detection line 33. Furthermore, signal switching can be achieved through the second detection connection line 382 and the third detection connection line 383. This routing method saves space occupied by traces and pins and avoids interference with other signals.

[0108] In some examples, such as Figure 10 As shown, the fourth detection connection line 384 can be electrically connected to the first signal pin 391 located in the first signal access area via the fifth detection connection line 385. For example, the first signal pin 391 may include a first sub-pin and a second sub-pin that are stacked and electrically connected to each other. The fifth detection connection line 385 can be electrically connected to the first sub-pin. The fifth detection connection line 385 and the first sub-pin can be an integral structure, for example, they can be disposed on the same layer as the first gate metal layer of the display area, and the second sub-pin can be disposed on the same layer as the first source-drain metal layer of the display area. The first control connection line 386 can be electrically connected to the third control connection line 388, and the third control connection line 388 can be electrically connected to the third signal pin 393 located in the first signal access area. The connection method of the third control connection line 388 and the third signal pin 393 is similar to the connection method of the fifth detection connection line 385 and the first signal pin 391, so it will not be described again here. The third control connection line 388, near the fifth detection connection line 385, can also be configured with connection lines between the start signal line 62e, the first clock signal line 62f, and the second clock signal line 62g and the corresponding signal pins in the first signal access area.

[0109] The fabrication process of the display panel in this exemplary embodiment can be achieved using existing mature fabrication equipment, is highly compatible with existing fabrication processes, is simple to implement, has high production efficiency, low production cost, and high yield.

[0110] This embodiment also provides a crack detection method applied to the display panel described above, comprising: when performing crack detection on the display panel, electrically connecting a first detection line and a first data line through a first detection control unit, electrically connecting a second detection line and a second data line through a second detection control unit, and providing a first detection signal to the first detection line and the second detection line; determining whether a crack exists in the first detection line or the second detection line based on the light emission state of the plurality of display units electrically connected to the first data line and the second data line.

[0111] In some examples, if multiple display units electrically connected to the first data line emit light to form a first bright line in the display area, it is determined that a crack exists in the first detection line (e.g., the first bezel area). If multiple display units electrically connected to the second data line reflect light to form a second bright line in the display area, it is determined that a crack exists in the second detection line (e.g., the bending area).

[0112] The crack detection method provided in this example can simultaneously detect cracks on the first and second detection lines, saving on detection processes and enabling effective and rapid detection of the first frame area and bending area. This can effectively control production costs and improve the yield of display panels.

[0113] This disclosure also provides a display device, including the display panel of the foregoing embodiments.

[0114] Figure 11 This is a schematic diagram of a display device according to at least one embodiment of the present disclosure. In some examples, such as... Figure 11 As shown, the display panel 910 can be an OLED display panel. The display device 91 can be any product or component with display function, such as an OLED display device, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. However, this embodiment is not limited to this.

[0115] The accompanying drawings in this disclosure only illustrate the structures involved in this disclosure; other structures can be referred to with common design. Unless otherwise specified, the embodiments and features described in these embodiments can be combined to obtain new embodiments. Those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this disclosure without departing from the spirit and scope of this disclosure, and all such modifications and substitutions should be covered within the scope of the claims of this disclosure.

Claims

1. A display panel, comprising: The substrate includes a display area and a border area surrounding the display area. The border area includes a first border area surrounding the display area and a second border area located on the side of the first border area away from the display area. The second border area includes at least a bent area. The second border area also includes a trace lead-out area and a signal access area located on the side of the bent area away from the display area. Multiple display units, at least one first data line, and at least one second data line are located in the display area, wherein the first data line and the second data line are electrically connected to a portion of the multiple display units; At least one first detection control unit and at least one second detection control unit; Two first detection lines are located at least in the first border area. The first end of the first detection line is electrically connected to the first data line through the first detection control unit. The second end of the first detection line is configured to receive a first detection signal. Two second detection lines are located at least in the bending area of ​​the second frame region; the first end of the second detection line is electrically connected to the second data line through the second detection control unit, and the second end of the second detection line is configured to receive the first detection signal; The frame area further includes: a first power line and a second power line, the second power line being located on the side of the first power line closer to the edge of the display panel; in the bending area, the second power line is located on the side of the first detection line and the second detection line away from the first power line, the first detection line and the second detection line being arranged adjacent to each other; Wherein, the two first detection lines are located on both sides of the display area along the second direction, and the two second detection lines are located on both sides of the display area along the second direction; in the trace lead-out area, the first detection lines and the second detection lines are electrically connected by a detection connection line, and the detection connection line is electrically connected to the first signal pin of the signal access area; The detection connection line includes: a first detection connection line, a second detection connection line, and a third detection connection line that are electrically connected in sequence. The first detection connection line is electrically connected to the first detection line and the second detection line located on one side of the display area, and the third detection connection line is electrically connected to the first detection line and the second detection line located on the other side of the display area. The first detection connection line and the third detection connection line extend along the second direction, the second detection connection line extends along the first direction, and the first direction intersects the second direction.

2. The display panel according to claim 1, wherein, The plurality of display units electrically connected to the first data line are configured to emit light to display a first bright line when the first detection control unit is turned on and the first detection line cracks. The plurality of display units electrically connected to the second data line are configured to emit light to display a second bright line when the second detection control unit is turned on and the second detection line cracks.

3. The display panel according to claim 1, wherein, The second end of the first detection line and the second end of the second detection line are electrically connected to the same first signal pin.

4. The display panel according to claim 1, wherein, The first detection connection line and the third detection connection line are in the same layer, and the second detection connection line is located on the side of the first detection connection line closer to the substrate.

5. The display panel according to any one of claims 1 to 4, wherein, The first detection line includes a first sub-trace located in the first border area, and the first sub-trace is a serpentine trace; The second detection line includes a fifth sub-trace located in the bending region, and the fifth sub-trace is a serpentine trace.

6. The display panel according to any one of claims 1 to 4, wherein, In the first border area, at least a portion of the first detection line is located on the side of the second detection line away from the display area.

7. The display panel according to any one of claims 1 to 4, further comprising: The system includes at least one third data line located in the display area, at least one third detection line located in the first bezel area, and at least one third detection control unit located in the bezel area; the first end of the third detection line is electrically connected to the third data line through the third detection control unit, and the second end of the third detection line is configured to receive a second detection signal. The plurality of display units electrically connected to the third data line are configured to display dark lines when the third detection control unit is turned on and receives the second detection signal.

8. The display panel according to any one of claims 1 to 4, further comprising: The system includes at least one third data line located in the display area, at least one third detection line located in the first border area, and at least one third detection control unit located in the border area; the first end of the third detection line is electrically connected to the third data line through the third detection control unit, and the second end of the third detection line is configured to receive the first detection signal; a plurality of display units electrically connected to the third data line are configured to emit light to display a bright line when the third detection control unit is turned on and the third detection line cracks.

9. The display panel according to any one of claims 1 to 4, wherein, The first detection control unit includes a first detection transistor, the gate of which is electrically connected to a detection control line, the first electrode of which is electrically connected to the first detection line, and the second electrode of which is electrically connected to the first data line; the second detection control unit includes a second detection transistor, the gate of which is electrically connected to the detection control line, the first electrode of which is electrically connected to the second detection line, and the second electrode of which is electrically connected to the second data line.

10. The display panel according to any one of claims 1 to 4, wherein, The at least one first detection control unit and the at least one second detection control unit are located in the first border area.

11. A display device comprising a display panel as claimed in any one of claims 1 to 10.

12. A crack detection method, applied to a display panel as described in any one of claims 1 to 10, the crack detection method comprising: When performing crack detection on the display panel, the first detection line and the first data line are connected through the first detection control unit, and the second detection line and the second data line are connected through the second detection control unit, and a first detection signal is provided to the first detection line and the second detection line; The presence of cracks in the first or second detection line is determined based on the light emission status of multiple display units electrically connected to the first and second data lines.

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