Substation Current Transformer Operation Status Monitoring System

Abstract

The present invention belongs to the technical field of power monitoring, and specifically discloses a substation current transformer operating status monitoring system. The system includes: a host and a slave, the host is used to manage and control the monitoring system, and the slave is used to execute the instructions transmitted by the host, collect and transmit the detection data of the current transformer; the host includes a host power supply and FPGA, simulated current transformer loop side data, communication transmission, network port circuit, and wireless connection with the slave; FPGA is used for signal processing and control; simulated current transformer loop side data is used to simulate current transformer loop and data acquisition; slaves exchange data between slaves through wired connections. This solution solves the technical problem that the existing technology cannot realize real-time monitoring of the operating status of the current transformer.

Description

Technical Field

[0001] The invention belongs to the technical field of power monitoring, and in particular relates to a substation current transformer operating status monitoring system. Background Art

[0002] At present, the main means of inspecting oil-immersed current transformers are to inspect oil level changes, perform routine tests, and conduct live testing. Traditional testing has a long testing cycle, and some tests require power outages. In addition, defects such as partial discharge, insulation moisture, insulation oil degradation caused by overheating, temperature changes, and oil pressure changes cannot be discovered in a timely manner, and there is a lack of real-time monitoring of oil-immersed current transformer faults. Summary of the invention

[0003] The purpose of the present invention is to provide a substation current transformer operating status monitoring system to solve the technical problem that the prior art cannot realize real-time monitoring of the current transformer.

[0004] To achieve the above object, the present invention adopts the following technical solution:

[0005] A substation current transformer operation status monitoring system comprises: a host and a slave, wherein the host is used for managing and controlling the monitoring system, and the slave is used for executing instructions transmitted by the host, collecting and transmitting detection data of the current transformer; the host comprises a host power supply and FPGA, analog current transformer loop side data, communication transmission, network port circuit, and is wirelessly connected to the slave; the FPGA is used for signal processing and control; the analog current transformer loop side data is used for simulating the current transformer loop and data acquisition; the slave exchanges data between slaves through wired connection; the slave comprises detection transmission, a wireless module, RS485, a slave power supply, a slave master control and a dip switch; the slave master control is the core control unit of the slave; the signal transmission port of the slave master control is connected to the signal transmission port of the dip switch; the FPGA communicates with the slave master control through the network port circuit to transmit the detection current value and temperature value of the current transformer.

[0006] In the present invention, the host manages and controls the monitoring system, and the slave executes the instructions sent by the host, collects the detection data of the current transformer and uploads it to the host; the FPGA of the host is used for signal processing and control; the simulated current transformer loop side data is used to simulate the current transformer loop and data acquisition; communication transmission is used for communication between devices; the network port circuit is used for network connection; the host power supply is used to provide power to the host; the detection transmission of the slave is used to detect the current transformer status and transmit data; the wireless module is used for wireless communication; RS485 is a serial communication protocol for device data exchange; the slave power supply is used to provide power to the slave; the slave master is the core control unit of the slave; the dip switch is used to set the address code ID of each slave or change the configuration, thereby realizing all-round, high-precision, and multi-dimensional monitoring of the operating status of the current transformer under complex operating conditions, solving the technical problem that the existing technology cannot realize real-time monitoring of the current transformer, and achieving the technical effect of real-time monitoring of the current transformer. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a schematic diagram of an FPGA circuit of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0008] Figure 2 It is a schematic diagram of an FPGA circuit of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0009] Figure 3 It is a circuit schematic diagram of simulating current transformer loop side data of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0010] Figure 4 It is a circuit schematic diagram of simulating current transformer loop side data of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0011] Figure 5 It is a circuit schematic diagram of communication transmission of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0012] Figure 6 It is a circuit schematic diagram of a network port circuit of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0013] Figure 7 It is a circuit schematic diagram of a wired-connected local slave of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0014] Figure 8 It is a circuit schematic diagram of a host power supply of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0015] Fig. 9 It is a circuit schematic diagram of detection transmission of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0016] Fig.10 It is a circuit schematic diagram of detection transmission of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0017] Fig.11 It is a circuit schematic diagram of detection transmission of a substation current transformer operation status monitoring system in an embodiment of the present invention;

[0018] Fig.12 It is a circuit schematic diagram of a wireless module of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0019] Fig.13 It is a circuit schematic diagram of RS485 of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0020] Fig.14 It is a circuit schematic diagram of a slave power supply of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0021] Fig.15 It is a circuit schematic diagram of a slave master control of a substation current transformer operating status monitoring system in an embodiment of the present invention;

[0022] Fig.16 The present invention is a circuit diagram of a DIP switch of a substation current transformer operation status monitoring system in an embodiment of the present invention. DETAILED DESCRIPTION

[0023] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are all in very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0024] It should be noted that, in order to clearly explain the content of the present invention, the present invention specifically cites multiple embodiments to further illustrate different implementations of the present invention, wherein the multiple embodiments are enumerated rather than exhaustive. In addition, for the sake of brevity of explanation, the contents mentioned in the previous embodiments are often omitted in the subsequent embodiments. Therefore, the contents not mentioned in the subsequent embodiments can refer to the previous embodiments accordingly.

[0025] Definitions of key terms involved in the present invention:

[0026] FPGA (Field-Programmable Gate Array) is a semiconductor device that contains a large number of programmable logic blocks and programmable interconnect resources. FPGA allows users to configure these logic blocks and interconnect resources through programming in hardware description languages ​​(such as VHDL or Verilog) to implement specific digital circuit functions. This flexibility makes FPGAs very popular in electronic design and prototyping because they allow rapid iteration and modification of designs without changing physical hardware. FPGAs contain a special configuration memory that stores the configuration of the device. When powered on or reset, the FPGA loads configuration data from external memory or internal configuration memory to determine its logical function.

[0027] Example 1

[0028] A substation current transformer operating status monitoring system, the system comprises: a host and a slave, the host is used to manage and control the monitoring system, the slave is used to execute instructions sent by the host, collect and transmit detection data of the current transformer;

[0029] The host includes FPGA, data on the analog current transformer loop side, communication transmission, network port circuit, wired connection slave and host power supply; FPGA is used for signal processing and control; data on the analog current transformer loop side is used for simulating current transformer loop and data acquisition; communication transmission is used for communication between devices; network port circuit is used for network connection; host power supply is used to provide power to the host;

[0030] The signal transmission port of the FPGA is respectively connected to the signal transmission port of the analog current transformer loop side data, the signal transmission port of the communication transmission, the signal transmission port of the network port circuit, and the signal transmission port of the wired connection local slave; the power output port of the host power supply is respectively connected to the power port of the FPGA, the power port of the analog current transformer loop side data, the power port of the communication transmission, the power port of the network port circuit, and the power port of the wired connection local slave;

[0031] The slave includes detection transmission, wireless module, RS485, slave power supply, slave master control and dip switch; detection transmission is used to detect the current transformer status and transmit data; wireless module is used for wireless communication; RS485 is a serial communication protocol used for data exchange between devices; slave power supply is used to provide power for the slave; slave master control is the core control unit of the slave; dip switch is used to set or change the address code ID configuration of the slave;

[0032] The signal transmission port of the slave master is respectively connected to the signal transmission port of the detection transmission, the signal transmission port of the wireless module, the signal transmission port of RS485, and the signal transmission port of the dip switch, and the power output port of the slave power supply is respectively connected to the power port of the detection transmission, the power port of the wireless module, the power port of RS485, the power port of the slave master, and the power port of the dip switch.

[0033] As an optional implementation, the FPGA communicates with the slave master through a network port circuit to transmit the detected current value and temperature value of the current transformer.

[0034] As an optional implementation, the FPGA sends out a PWM signal to control different digital-to-analog conversion chips to output analog quantities based on the current transformer detection signal received from the slave, and converts the digital signal into an analog signal output by the analog transformer and sends it to a display instrument to display the detection current value of the current transformer.

[0035] As an optional implementation, the FPGA reports the detected current value and temperature value of the current transformer sent by the slave main control through the network port circuit for cloud monitoring.

[0036] As an optional implementation, when the detection data received through communication transmission and the wireless module of the slave exceeds a preset threshold, the FPGA reports an early warning through communication transmission or a network port circuit.

[0037] As an optional implementation, one host corresponds to one or more slaves, and signals are transmitted between the multiple slaves via RS485.

[0038] As an optional implementation, the FPGA uses the EP4CE15E22I7 chip, the analog current transformer loop side data uses the GP8101S chip, the network port circuit includes the HR871155A chip and the LAN8720A chip, and the wired connection local slave uses the SP3485EN-L / TR chip.

[0039] As an optional implementation, the communication transmission uses the WH-L102-L module and the host power supply uses the TPS62040DGQ module.

[0040] As an optional implementation, the detection transmission uses a DS18B20+ chip, the wireless module uses a WH-L102-L chip, the RS485 uses an SP3485EN-L / TR chip, and the slave master uses an STM32F103C8T6 chip.

[0041] As an optional implementation, the dip switch is used to set the ID of the SP3485EN-L / TR chip of RS485.

[0042] Specifically, the above-mentioned substation current transformer operation status monitoring system includes a host and a slave, and the host includes an FPGA, analog current transformer loop side data, communication transmission, network port circuit, wired connection local slave and host power supply:

[0043] FPGA is the core processing unit, responsible for signal processing and control; the data on the analog current transformer loop side is used to simulate the current transformer loop and data acquisition; communication transmission realizes communication between devices; the network port circuit provides network connection function; the wired connection local slave exchanges data through the wired connection slave; the host power supply provides power for the host.

[0044] The signal transmission port of the FPGA is respectively connected to the signal transmission port of the data on the analog current transformer loop side, the signal transmission port for communication transmission, the signal transmission port of the network port circuit, and the signal transmission port for wired connection to the local slave. The power output port of the host power supply is respectively connected to the power port of the FPGA, the power port of the data on the analog current transformer loop side, the power port for communication transmission, the power port of the network port circuit, and the power port for wired connection to the local slave.

[0045] The slave includes data acquisition and transmission, wireless module, RS485, slave power supply, slave master control and DIP switch:

[0046] Detection and transmission detect the current transformer status and transmit data; the wireless module provides wireless communication function; RS485 is a serial communication protocol used for data exchange with other devices; the slave power supply provides power for the slave; the slave master is the core control unit of the slave; the dip switch is used to set or change the configuration.

[0047] The signal transmission port of the slave master is respectively connected to the signal transmission port of the detection transmission, the signal transmission port of the wireless module, the signal transmission port of RS485, and the signal transmission port of the dip switch, and the power output port of the slave power supply is respectively connected to the power port of the detection transmission, the power port of the wireless module, the power port of RS485, the power port of the slave master, and the power port of the dip switch.

[0048] Specifically, for the host:

[0049] FPGA: It is a programmable logic chip that is responsible for processing complex logic operations and signal control;

[0050] Simulate current transformer loop side data: simulate the current transformer loop to generate and detect current signals;

[0051] Communication transmission: responsible for communicating with other devices, such as sending and receiving data;

[0052] Network port circuit: provides network connection, such as connecting to the Internet or local area network;

[0053] Wireless connection to local slave: connect to the slave wirelessly to exchange data;

[0054] Host power supply: provides power for the entire host.

[0055] The various components of the above host are interconnected through signal transmission ports and power ports and work together to realize the functions of the host.

[0056] For slaves:

[0057] Detection and transmission: responsible for detecting the status of the current transformer and transmitting the data;

[0058] Wireless module: provides wireless communication functions, such as connecting to Wi-Fi or Bluetooth; used for connection and data exchange with the host;

[0059] RS485: Serial communication protocol, used for data exchange with other devices;

[0060] Slave power supply: provides power for the entire slave;

[0061] Slave master: The control center of the slave, responsible for processing data and instructions;

[0062] DIP switch: A simple input device used to set or change the ID configuration of a slave.

[0063] The various components of the above slave are connected to each other through the signal transmission port and the power supply port to jointly complete the tasks of the slave.

[0064] The FPGA of the host and the main control of the slave are their respective cores, responsible for data processing and control. The host and slave are connected by wire, ensuring the stability and reliability of data transmission. The communication transmission and wireless modules provide flexible communication methods, and wired or wireless connections can be selected as needed. The network port circuit and RS485 expand the connection capabilities of the device, and have the ability to connect to more types of networks or devices. The power supply provides a stable power supply to ensure normal operation.

[0065] The host is responsible for managing and controlling the entire system. The FPGA is like the brain, responsible for handling complex tasks and making decisions. The other parts follow the host's instructions and work together to ensure the normal operation of the system.

[0066] The slave is the assistant of the master, responsible for executing the master's instructions, collecting and transmitting data. Each part of the slave performs its own duties and assists the slave to complete the work assigned by the master.

[0067] The circuit principle of the host FPGA implementation is not limited to the following Figure 1 and Figure 2 As shown, FPGA uses EP4CE15E22I7 chip U3, and pins 58 to 67, 68, 69, 71, and 72 of U3 are connected to PWM0 to PWM7, ETH_MIDO, ETH_CRS_DV, ETH_RXER, and ETH_RXD0 respectively;

[0068] Pins 1, 2, 5, and 6 of the EPCS4SI8N chip U4 are connected to FPGA_nCSO, FPGA_DATA0, FPGA_ASDO, and FPGA_DCLK respectively;

[0069] Pins 76, 77, 80, 83, 85-87 of U3 are connected to ETH_TXEN, ETH_TXD0, ETH_TXD1, ETH_RST, REFCLK, ETH_MDC, and ETH_RXD1 respectively;

[0070] Pin 13 of U3 is connected to FPGA_DATA0 through resistor R11, and pins 8 and 6 of U3 are connected to FPGA_nCSO and FPGA_ASDO respectively;

[0071] Pins 132-137, 141-142, and 143 of U3 are connected to PWM8-PWM13, PWM14-PWM15, and COM1_TX respectively;

[0072] Pins 98, 99~101, and 103 of U3 are connected to COM5_TXD, WDCJ1~WDCJ3, and WDCJ4 respectively;

[0073] Pins 39, 42, 43, 44, 46, 49, 50, and 51 of U3 are connected to M0, M1, E51_TXD, E51_RXD, AUX, COM1_RX, COM_CONR, and COM5_RXD respectively.

[0074] The circuit principle for the host's analog current transformer loop side data is not limited to the following: Figure 3 , Figure 4 As shown,

[0075] The analog current transformer loop side data uses the GP8101S chip U7, the 3rd pin of U7 is connected to PWM0, and the 5th and 6th pins of U7 are connected to the 2nd and 1st pins of the connector P2 respectively.

[0076] U7 is a digital-to-analog converter chip. Figure 3 , Figure 4As shown, taking the setting of sixteen groups of loop side data circuits U7-U10, U12-U15, U18-U21, U24-U27 as an example, U7 is a digital-to-analog chip of one group of loop side data circuits.

[0077] P2 is connected to a display instrument to display the current value detected by the current transformer. P2 to P18 display the detected current values ​​of 16 current transformers respectively.

[0078] According to the current detection signal received from the slave, FPGA sends out different PWM digital-to-analog conversion modules to output the analog quantity of the analog transformer output. After U7 converts the digital signal into an analog signal, it sends it to the display instrument through P2.

[0079] The circuit principle of communication transmission is not limited to Figure 5 As shown, it includes WH-L102-L module U1, and pins 1 to 5 of U1 are respectively connected to M0, M1, E51_TXD, E51_RXD, and AUX; pins 4 and 5 of Q560 module U2 are respectively connected to COM5_RXD and COM5_TXD.

[0080] Pin 1 of SP3485EN-L / TR module U5 is connected to COM1_RX, pins 2 and 3 of U5 are connected to COM_CONR, pin 4 of U5 is connected to COM1_TX, pins 6 and 7 of U5 are respectively connected to pins 2 and 1 of connector P1, and P1 is connected to the DC10768EW150_1VW1_C_C4 touch screen.

[0081] The touch screen is not limited to displaying the current value measured by the current transformer. The measured current value can be displayed by a display instrument or by a touch screen according to different requirements.

[0082] WH-L102-L module U1 is used for communication between the FPGA part and the slave master part.

[0083] The circuit principle of the network port circuit is not limited to Figure 6 As shown, the network port circuit includes a HR871155A chip T1 and a LAN8720A chip U6. Pin 3 of T1 is connected to TX_P and one end of a resistor R14 respectively. The other end of R14 is connected to AVCC, one end of a resistor R16, one end of a resistor R17, one end of a resistor R18, and one end of a capacitor C29 respectively. The other end of C29 is grounded. The other end of R16 is connected to pin 4 of T1 and TX_N respectively. Pins 6 and 7 of T1 are connected to one end of a capacitor C34 and one end of a resistor R15 respectively. The other end of R15 is connected to AVCC, and the other end of C34 is grounded. The other end of R17 is connected to RX_P and pin 5 of T1 respectively. The other end of R18 is connected to RX_N and pin 8 of T1 respectively.

[0084] Pin 11 of T1 is connected to LEDA through resistor R20; pin 14 of T1 is connected to LEDB through resistor R21; pins 12, 13, and 1 of T1 are grounded, and pins 15, 16, and 10 of T1 are connected to the earth, which is the grounding of the casing to filter out external interference.

[0085] Pins 20 to 23 of U6 are connected to TX_N, TX_P, RX_N, and RX_P respectively; pins 2 and 3 of U6 are connected to LEDB and LEDA respectively; pins 7, 8, 10, 11, and 12 of U6 are connected to ETH_RXD1, ETH_RXD0, ETH_RXER, ETH_CRS_DV, and ETH_MIDO respectively; pins 13 to 18 of U6 are connected to ETH_MDC, REFCLK, ETH_RST, ETH_TXEN, ETH_TXD0, and ETH_TXD1 respectively.

[0086] U3 communicates with Ethernet through LAN8720A chip U6 and HR871155A connector T1 to transmit information.

[0087] The FPGA detects the current value and temperature value sent from the main control part of the slave through the network port circuit, and reports it through the Q560 module U2 for cloud monitoring.

[0088] The circuit principle of wired connection to local slave is not limited to the following Figure 7 As shown, the wired local slave uses SP3485EN-L / TR chip U11, U11's pin 1 is connected to WDCJ1, U11's pins 2 and 3 are connected to WDCJ2, U11's pin 4 is connected to WDCJ3, and U11's pins 6 and 7 are connected to pins 2 and 1 of connector P6 respectively. P6 is a reserved interface for other devices to collect current transformer current, and U11 is an RS485 communication chip. The host's FPGA communicates with the slave's main control part through the network port. This system realizes wired transmission between slaves and wireless transmission between slaves and hosts. Through internal circuit switching, it can realize wireless communication between only one slave and the host to realize the upload of all slave data information.

[0089] The circuit principle of the host power supply is not limited to Figure 8 As shown, the host power supply includes a TPS62040DGQ module U17, pin 2 of U17 is connected to 5V, pins 7 and 8 of U17 are connected to VCC_1.2V and one end of resistor R24 ​​through inductor L2, pin 5 of U17 is connected to the other end of R24 and one end of resistor R25, and the other end of R25 is connected to GND;

[0090] Pin 3 of AMS1117-3.3 module U16 is connected to 5V, and pins 2 and 4 of U6 are connected to VCC_3.3V through inductor L1; pin 3 of AMS1117-2.5 module U22 is connected to 5V, and pins 2 and 4 of U22 are connected to VCC_2.5V; pin 1 of XL2596-5.0 module U23 is connected to +24V and cathode of diode D26 respectively, and anode of D26 is connected to VIN+ through fuse F1 and magnetic bead L3 in turn; pin 2 of U23 is connected to +5V through inductor L4, and VIN+ is powered by 24V power supply.

[0091] The circuit principle of the slave detection transmission is not limited to the following Fig. 9 , Fig.10 , Fig.11 As shown, the detection transmission includes DS18B20+ chip U15, and the 2nd pin of U15 is connected to WDCJ3; the 1st and 2nd pins of the connector P3 are respectively connected to M1- and M1+, and the 1st and 2nd pins of P3 are connected through the controlled switch of the relay KM1; the control end of KM1 is connected to the collector of the NPN transistor Q4, the emitter of Q4 is connected to GND, and the base of Q4 is connected to PA15 through the resistor R2;

[0092] M1+ is connected to the anode of diode D1 and the cathode of diode D2 respectively, M1- is connected to the anode of diode D5 and the cathode of diode D3 respectively, the cathode of D1 is connected to the cathode of D5 and one end of magnetic bead L5 respectively, the other end of L5 is connected to VM and one end of resistor R4 respectively, the other end of R4 is connected to one end of resistor R6 and one end of resistor R56 respectively, the other end of R6 is connected to GND, anode of D2 and anode of D3 respectively through magnetic bead L3; the other end of R56 is connected to pin 3 of AD8541ARZ chip U8, and pin 6 of U8 is connected to YLIN1;

[0093] The 1, 2, 3, 9, and 10 pins of the AD7788 chip U7 are connected to PA0, PA1, YLIN1, PA3, and PA2 respectively;

[0094] The 4th pin of LT1790AIS6 module U10 is connected to VCC_YL and one end of magnetic bead L6 respectively, the other end of L6 is connected to VCC_3.3V, and the 6th pin of U10 is connected to +2.5V1; VM is connected to one end of resistors R7~R11 respectively;

[0095] The other end of R7 is connected to the collector of NPN transistor Q1, and the base of Q1 is connected to PA12 through resistor R12 and diode D6 in sequence; the emitters of NPN transistors Q1~Q3, Q5, and Q6 are grounded; the other end of R8 is connected to the collector of Q2, and the base of Q2 is connected to PA7 through resistor R13 and diode D7 in sequence; the other end of R9 is connected to the collector of Q3, and the base of Q3 is connected to PA6 through resistor R14 and diode D8 in sequence; the other end of R10 is connected to the collector of Q5, and the base of Q5 is connected to PA5 through resistor R15 and diode D10 in sequence; the other end of R11 is connected to the collector of Q6, and the base of Q6 is connected to PA4 through resistor R16 and diode D11 in sequence.

[0096] U7 is an analog-to-digital conversion chip, which converts the collected current transformer current analog signal into a digital signal and sends it to the slave master.

[0097] P3 is connected to the two terminals of the current transformer; PA4~PA7 and PA12 are used to control the size of the VM grounding resistance. The circuit realizes the rapid connection of resistors with different resistance values ​​to the system by controlling the on and off of the transistors. When the system is powered on, the CPU controls different transistors to conduct according to the detected voltage value of the current transformer, and realizes the connection of the resistor connected to the transistor to the circuit. According to the different voltage parameters of the transformer, the corresponding resistance value is changed to realize the accurate measurement of the current transformer.

[0098] If the slave fails or freezes, KM will not be attracted, and the transformer will be open-circuited. The transformer output end is high voltage, which poses a safety hazard. To prevent problems, the normally closed end of relay KM is connected to the current transformer. When the slave is in normal working state, the KM1 controlled switch is not closed. The common end and the normally closed end of KM1 are connected in parallel to the secondary side of the transformer. Because the secondary side of the transformer is less than one percent of the primary side, the current is very small, which prevents the transformer from generating high voltage. When the system is working normally, U1 drives the coil of KM1 to attract, and the normally closed end of KM1 is disconnected. Current flows out of M1+. The four diodes D1, D2, D3 and D5 form a rectifier bridge, which passes through the magnetic beads of L5 and L3, the overvoltage protection voltage regulator diode D4, and the resistor network composed of R7~R11. The resistor converts the current of M1 into a voltage value according to Ohm's law. The 5 channels corresponding to R7~R11 are set through the touch screen of the host, and the output signals of PA4~PA7 and PA12 are set.

[0099] When the current transformer under test is large, it is not limited to opening more circuits, and when the current transformer under test is small, it is not limited to opening fewer circuits, which is used for adjustment. For example, PA4~PA6 are set to be opened, and the output signals of PA4~PA6 are the same. Control the VM grounding resistance to improve the measurement accuracy. When the current is fixed, the resistance changes, the voltage changes, and the detection voltage is exactly at the best position of the ADC circuit.

[0100] U15 is used to measure the temperature of the current transformer coil. If the current transformer coil fails, such as a short circuit between turns, the temperature of the current transformer coil will rise. After the STM32F103C8T6 detects the temperature rise signal, it sends the temperature rise signal to the host to alarm.

[0101] The current transformer in the project is used to detect the size of the primary current. The principle is the same as that of the transformer. Primary voltage: secondary voltage = primary turns: secondary turns = 1 / primary current: 1 / secondary current. D1, D2, D3, and D5 convert the AC signal output by the current transformer into a pulsating DC signal. This is convenient for back-end detection. The AD8541ARZ chip U8 filters out high-frequency interference from the detected signal and attenuates frequencies above 30HZ.

[0102] The circuit principle of the wireless module is not limited to Fig.12 As shown, the wireless module part uses WH-L102-L chip U32, and pins 1 to 5 of U32 are respectively connected to pins PA7 to PA11. The wireless module chip U32 is used to transmit the detected current value and temperature value of the current transformer to the WH-L102-L chip U1 of the host.

[0103] The circuit principle of RS485 is not limited to Fig.13 As shown, RS485 includes SP3485EN-L / TR chip U2, pin 1 of U2 is connected to PB11, pins 2 and 3 of U2 are connected to PB9, pin 4 of U2 is connected to PB10, and pins 6 and 7 of U2 are respectively connected to pins 2 and 1 of connector P2.

[0104] One host is not limited to corresponding to multiple slaves, and the signals between the slaves are transmitted via RS485.

[0105] The circuit principle of the slave power supply is not limited to the following Fig.14 As shown, the slave power supply uses AMS1117-3.3 module U4, U4's 3rd pin is connected to +5V and connector P4 respectively, U4's 2nd pin is connected to +3.3V. P4 is connected to an external 5V power supply.

[0106] The circuit principle of the slave master is not limited to the following Fig.15 As shown, the slave master uses the STM32F103C8T6 chip U1, and pins 10 to 17 of U1 are connected to PA0 to PA7 respectively, pins 29 to 33 and 38 of U1 are connected to PA8 to PA12 and PA15 respectively, and pins 18, 19, 39 to 43, 45, 46, 25 to 26, 27, 28, and 2 to 4 of U1 are connected to PB0, PB1, PB3 to PB7, PB8, PB9, PB12 to PB13, WDCJ3, PB15, and PC13 to PC15 respectively.

[0107] The circuit principle of the DIP switch is not limited to Fig.16 As shown, the dip switch uses a dip switch U3, and the 5th, 6th, and 8th pins of U3 are respectively connected to PB15 and PC13 to PC15. U3 is used to set the ID of the SP3485EN-L / TR chip U2.

[0108] In this example, U3 is not limited to 16 IDs, and one ID corresponds to one slave. The SP3485EN-L / TR chip of one slave is used as the central 485 chip of each slave. The central 485 chip collects data from other slaves, and after aggregation, sends it to the host through the wireless module. This setting only requires setting up a wireless module on one slave, reducing equipment costs and wireless interference.

[0109] In the above embodiment, for the connection between the host and the slave: the communication between the host and the slave is realized by wired and wireless means;

[0110] For data transmission: the host FPGA part communicates with the slave main control part through the network port circuit to transmit the detection current value and temperature value of the current transformer;

[0111] For current transformer detection and display: the P2 connector is connected to the display instrument to display the detected current value of the current transformer; the FPGA sends out different PWM analog-to-digital conversion chips according to the current detection signal received from the slave, and outputs the analog value output by the analog transformer. After U7 converts the digital signal into an analog signal, it is sent to the display instrument through P2, cutting off the direct connection between the display instrument and the transformer, avoiding the impact on other circuits when the transformer fails.

[0112] For touch screen display: P1 connector connects to DC10768EW150_1VW1_C_C4 touch screen, such as Fig. 9 shown.

[0113] For display function: the touch screen displays the current value measured by the current transformer.

[0114] For display selection: select to display the measured current value through the display instrument or touch screen according to the needs.

[0115] For the power supply module: TPS62040DGQ module U17: provides 5V power for the host; AMS1117-3.3 module U16: provides 3.3V power for the host; AMS1117-2.5 module U22: provides 2.5V power for the host; XL2596-5.0 module U23: provides 5V power for the host.

[0116] For current transformer coil temperature monitoring: DS18B20+ chip U15 is used to measure the current transformer coil temperature; STM32F103C8T6 chip detects the temperature signal and sends it to the host for alarm.

[0117] For safety: Relay KM1 is designed to be connected to the current transformer at the normally closed end to prevent the transformer from being open-circuited. Diodes D1 to D5 are used to rectify the current transformer signal to prevent high voltage. Rectifier bridge and resistor network: The rectifier bridge is composed of D1 to D5, which is used to convert the AC signal into a pulsating DC signal; the resistor network converts the current of M1 into a voltage value through the resistor network composed of R7 to R11.

[0118] For measurement accuracy control: the VM grounding resistance is controlled by setting several output signals in PA4~PA7 and PA12. The output signals control the on-off of the correspondingly connected transistors, so that the resistors connected to the transistors can be quickly connected to the system. By controlling the on-off of several open transistors, the grounding resistance can be quickly and accurately switched, thereby improving the measurement accuracy.

[0119] For fault detection and alarm: If the slave fails or freezes, KM will not be attracted, resulting in an open circuit of the transformer. When the slave is in normal working state, the KM1 controlled switch is not closed to ensure system safety. The voltage at the detection end of the current transformer is detected by the detection transmission part of the slave to determine the operating status of the current transformer.

[0120] The host receives the detection information through communication transmission and the wireless module of the slave. When the detection voltage exceeds the threshold or the temperature is abnormal, the host's FPGA uploads it to the monitoring center through communication transmission or network port circuit for monitoring and reporting of early warning.

[0121] In the embodiment of the present application, the host and the slave transmit information through a wireless network, thereby achieving physical isolation between the master and the slave. When a high voltage condition or fire occurs in the current transformer circuit, the disaster will not be transmitted to the host circuit, thereby improving work safety and reliability.

[0122] The host's network port circuit and the 4G network for communication transmission can both transmit data remotely, improving the reliability of the device's operation and having a wide range of applications.

[0123] At the same time, a unique resistor network mode is designed, where P3 is connected to the two terminals of the current transformer. PA4~PA7 and PA12 are used to control the size of the VM grounding resistance. The size of the VM grounding resistance can be adjusted by controlling the saturation on and off of the corresponding transistor according to the parameters of the connected current transformer and the size of the measured current to meet the needs of different current transformer tests. Control the number of channels to be opened, control the VM grounding resistance, and improve the measurement accuracy.

[0124] In the embodiment of the present application, one host can correspond to multiple slaves, and the slaves transmit signals via RS485. The monitoring terminal is connected to an integrated sensor for oil pressure, oil temperature and H2 content, a laser ranging sensor, and a leakage current and dielectric loss factor monitoring sensor.

[0125] Monitoring terminals and smart sensors are not limited to being the basis for implementing the monitoring system from the hardware dimension, but also include monitoring platforms.

[0126] Smart sensors are not limited to wireless, and are powered by batteries or solar energy. Specifically, they include three types of sensors: integrated oil pressure, oil temperature and H2 content sensors, laser ranging sensors, and leakage current and dielectric loss factor monitoring sensors. The main task is to obtain the oil level, oil temperature, oil pressure, leakage current, dielectric loss, capacitance and other data of the current transformer, and transmit them to the monitoring terminal in real time through the wireless network.

[0127] The monitoring terminal is not limited to a data acquisition unit, a data processing unit (containing FPGA), a communication module, and a power module. Its main functions are to collect and aggregate information from multiple sensors, process it, issue early warning alarms, and upload it to the monitoring platform via 4G, 5G, and Ethernet to achieve two-way interaction between smart sensors and the monitoring platform.

[0128] The monitoring platform receives data from all monitoring terminals, realizes equipment management, real-time monitoring, data analysis, and early warning functions, and gives early warning before the current transformer fault deteriorates or suddenly changes, avoiding the occurrence of serious accidents. The abnormal state of the current transformer before the failure, such as the increase in the expander oil level, the increase in internal pressure, the increase in temperature, and the H2 content in the insulating oil, is displayed on the data display screen, and the state quantity is intelligently judged based on the threshold to realize the intelligent online monitoring of the current transformer.

[0129] Smart sensors are the intelligent eyes and ears installed on the current transformer, which monitor the status of the current transformer in real time, such as oil level, oil temperature, oil pressure, etc., and transmit the data to the monitoring terminal.

[0130] The monitoring terminal is a data transfer station that collects data from smart sensors, processes and analyzes them, and then sends them to the monitoring platform. At the same time, it can also determine whether the current transformer is normal based on the data. If a problem is found, an early warning or alarm will be issued.

[0131] The monitoring platform is the control center of the entire system, receiving data from the monitoring terminal for more in-depth analysis and processing. The monitoring platform can also display the status of the current transformer in real time. If an abnormality is found, an early warning can be issued in time to avoid serious accidents.

[0132] In the embodiments of the present application, by monitoring the operating status of the current transformer, potential problems can be discovered in a timely manner, potential safety hazards in the operation of the power grid can be reduced, the stable operation of the power grid can be ensured, and the safety of the power grid is improved: timely detection of faults or abnormal conditions of the current transformer helps to improve the reliability of the equipment, reduce the impact of equipment damage and faults on the operation of the power grid, and improve the reliability of the equipment; by real-time monitoring of the operating status of the current transformer, equipment maintenance and maintenance can be performed more accurately, unnecessary maintenance can be avoided, and maintenance costs can be reduced; the system can provide real-time current transformer status information, which helps to discover and solve problems in a timely manner, ensure the efficient operation of the power grid, and improve the operating efficiency of the power grid; the monitoring system can help to discover problems with the current transformer in a timely manner, help to ensure power quality, reduce the risk of power supply interruptions, and ensure power quality.

[0133] In the embodiment of the present application, the current transformer operating status monitoring system achieves the technical effects of improving power grid security, equipment reliability, reducing maintenance costs, improving operating efficiency and ensuring power quality.

Claims

1. A substation current transformer operating status monitoring system, characterized in that: include: A host and a slave, wherein the host is used to manage and control the monitoring system, and the slave is used to execute instructions transmitted by the host, collect and transmit detection data of the current transformer; The host includes a host power supply and FPGA, analog current transformer loop side data, communication transmission, network port circuit, and wireless connection with the slave; The FPGA is used for signal processing and control; the FPGA adopts the EP4CE15E22I7 chip U3, and the 58-67, 68, 69, 71, and 72 pins of U3 are respectively connected to PWM0-PWM7, ETH_MIDO, ETH_CRS_DV, ETH_RXER, and ETH_RXD0; the 132-137, 141-142, and 143 pins of U3 are respectively connected to PWM8-PWM13, PWM14-PWM15, and COM1_TX; The simulated current transformer loop side data is used for simulating the current transformer loop and data collection; the simulated current transformer loop side data adopts the GP8101S chip, and sixteen groups of loop side data circuits U7-U10, U12-U15, U18-U21, U24-U27 are set, and the 3rd pins of U7-U10, U12-U15, U18-U21, U24-U27 are connected to PWM0-PWM15, and the 5th and 6th pins of U7-U10, U12-U15, U18-U21, U24-U27 are respectively connected to the 2nd and 1st pins of the connectors P2-P5 and P7-P18; The slaves exchange data with each other through wired connections; The slave includes detection transmission, wireless module, RS485, slave power supply, slave master control and DIP switch; the slave master control is the core control unit of the slave; The signal transmission port of the slave master is connected to the signal transmission port of the DIP switch; The FPGA communicates with the slave master through the network port circuit to transmit the detection current value and temperature value of the current transformer; P2-P5 and P7-P18 respectively display the detection current values ​​of 16 current transformers; The FPGA sends out corresponding PWM signals to control different digital-to-analog conversion chips according to the current detection signal received from the slave, and sends the digital signal to the display instrument after converting the digital signal into an analog signal, so as to display the detected current value of the current transformer, realize the backward movement of the display instrument, cut off the physical connection between the digital display instrument and the transformer, and protect the instrument from the influence of the transformer damage.

2. The substation current transformer operating status monitoring system according to claim 1, characterized in that: One of the host machines corresponds to one or more slave machines, and multiple slave machines transmit signals via RS485. The slave machines and the host machine switch internal circuits to achieve wireless communication between the slave machine and the host machine and data exchange between the slave machine and the host machine.

3. The substation current transformer operating status monitoring system according to claim 2, characterized in that: The SP3485EN-L / TR chip of a slave is used as the central 485 chip of the slave. The central 485 chip collects data from other slaves, summarizes it, and sends it to the host through the wireless module.

4. The substation current transformer operating status monitoring system according to any one of claims 2 or 3, characterized in that: The detection transmission circuit of the slave machine is provided with an analog-to-digital conversion chip, which converts the collected current transformer current analog signal into a digital signal and then sends it to the slave machine master control.

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