Capacitance tomography system and method based on ZYNQ

Abstract

The present invention relates to a capacitance tomography system and method based on ZYNQ. The system includes: a ZYNQ unit, a power supply unit, an electrode sensor, a capacitance measurement unit, a DDR4 storage unit, and a host computer; the electrode sensor is connected to the capacitance measurement unit; the capacitance measurement unit includes a switch switching circuit, a C / V conversion circuit, an excitation circuit, and an analog-to-digital conversion circuit; the ZYNQ unit includes a programmable logic end and a processor system end connected to each other, and the programmable logic end includes a switch switching module, a signal generation module, a digital orthogonal demodulation module, and an image reconstruction module; the processor system end is respectively connected to the DDR4 storage unit and the host computer. By using the hardware of each unit for parallel calculation, and an image reconstruction module is provided in the ZYNQ unit, the image reconstruction algorithm is accelerated, and compared with the traditional PC host computer processing data, the power consumption is effectively reduced, the device volume is reduced, the imaging speed and accuracy are improved, and the measurement error is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of pipeline nondestructive testing and signal processing, and in particular to a ZYNQ-based capacitance tomography system and method. Background Art

[0002] As land resources gradually decrease, people's attention has gradually turned to the ocean. In nature and engineering, multiphase flow refers to the flow of two or more substances in the same system. These substances with the same composition and characteristics are called "phases", such as liquids, gases, solids, etc. The multiphase flow parameter measurement methods mainly include differential pressure method, correlation method, ultrasonic method, flow meter method, microwave method, ray method (X and gamma rays, etc.), magnetic resonance imaging (MRI), optical tomography, electrical tomography, etc., depending on the measurement object and applicable occasion. Among them, capacitance tomography has the characteristics of high resolution, non-invasiveness, and high safety. It can achieve high-precision monitoring of the dynamic behavior of multiphase flow by measuring the capacitance changes in the target area.

[0003] At present, the image reconstruction algorithm in electrical capacitance tomography is run on the PC side. The amount of data that needs to be transmitted from the data acquisition end to the PC side is huge, and the algorithm of the PC processor is executed sequentially, which has the problems of low efficiency, poor real-time performance and high power consumption. Summary of the invention

[0004] Based on this, in order to solve the above technical problems, a ZYNQ-based capacitance tomography system and method are provided, which can improve the efficiency of capacitance tomography and reduce power consumption.

[0005] A ZYNQ-based capacitance tomography system, the system comprising a ZYNQ unit and a power supply unit, an electrode sensor, a capacitance measurement unit, a DDR4 storage unit, and a host computer connected to the ZYNQ unit, wherein:

[0006] The electrode sensor is arranged in the pipeline, and the electrode sensor is connected to the capacitance measuring unit;

[0007] The capacitance measurement unit includes a switch switching circuit, a C / V conversion circuit, an excitation circuit, and an analog-to-digital conversion circuit. The ZYNQ unit sends a control instruction to the switch switching circuit to switch the connection between the electrode sensor, the C / V conversion circuit, and the excitation circuit; the analog-to-digital conversion circuit is used to convert the analog quantity of the C / V conversion circuit into a digital quantity and send it to the ZYNQ unit;

[0008] The ZYNQ unit includes a programmable logic end and a processor system end connected to each other, and the programmable logic end includes a switch switching module, a signal generating module, a digital orthogonal demodulation module, and an image reconstruction module; the switch switching module is connected to the switch switching circuit, the signal generating module is connected to the excitation circuit, and the digital orthogonal demodulation module is respectively connected to the analog-to-digital conversion circuit and the image reconstruction module; the programmable logic end is used to generate an excitation signal, a timing control switch switching circuit signal, digitally orthogonally demodulate the analog-to-digital conversion circuit, and hardware accelerate the image reconstruction module; the processor system end is respectively connected to the DDR4 storage unit and the host computer, and is used to receive commands from the host computer and send the obtained image to the host computer;

[0009] The DDR4 storage unit is used to cache image data;

[0010] The host computer is used to set imaging parameters and display the image in the pipeline.

[0011] In one of the embodiments, the power supply unit includes a fixed voltage and a variable voltage; the variable voltage is connected to the ZYNQ unit, and the ZYNQ unit controls the power supply unit to provide the variable voltage for the excitation circuit.

[0012] In one embodiment, the signal generating module is further used to provide an excitation signal to the excitation circuit; and the ZYNQ unit is further used to control the amplitude of the excitation signal.

[0013] In one embodiment, the electrode sensor switches modes according to the state of the switch switching circuit; wherein the modes of the electrode sensor include an idle mode, an excitation mode, and a measurement mode;

[0014] When the electrode sensor is in the idle mode, the electrode is grounded;

[0015] When the electrode sensor is in the excitation mode, the electrode is connected to the excitation circuit;

[0016] When the electrode sensor is in the measurement mode, the electrode is connected to the C / V conversion circuit.

[0017] In one embodiment, the switch switching circuit is a T-type switch circuit; the ZYNQ unit controls the switch switching circuit to switch states; the switch switching circuit is used to control one electrode in the electrode sensor to be in the excitation mode and the other electrodes to be in the measurement mode; the switch switching circuit is also used to control each electrode in the electrode sensor to switch to the excitation mode in turn.

[0018] In one embodiment, the programmable logic end is connected to the processor system end via an AXI bus; the capacitance measurement circuit is connected to the programmable logic end; and the host computer is connected to the processor system end via Ethernet.

[0019] A ZYNQ-based capacitance tomography method is applied to a ZYNQ-based capacitance tomography system, the method comprising:

[0020] Initialize the system, start the Petalinux system on the processor system side of the ZYNQ unit, the host computer sends an image acquisition command to the ZYNQ unit, and sets the excitation electrode to 1;

[0021] The signal generating module inside the programmable logic terminal of the ZYNQ unit generates an excitation signal, the switch switching module generates a timing signal, and the ZYNQ unit sends the excitation signal and the timing signal to the capacitance measuring unit;

[0022] The capacitance measurement unit controls the switch circuit to select the electrode mode according to the excitation signal and the timing signal, places one electrode in the excitation mode and connects to the excitation circuit, and places the other electrodes in the measurement mode and connects to the C / V conversion circuit; the analog-to-digital conversion circuit converts the analog signal of the C / V conversion circuit into a digital signal;

[0023] The digital orthogonal demodulation module inside the programmable logic terminal of the ZYNQ unit demodulates the voltage data obtained by the capacitance measurement unit to obtain capacitance data, and sends the data to the image reconstruction module;

[0024] The image reconstruction module processes the capacitance data through a hardware accelerated algorithm to reconstruct the image inside the tube, and sends the image inside the tube to the programmable logic end cache and then to the Petalinux system;

[0025] The Petalinux system caches the in-tube image in a DDR4 storage unit, and sends the in-tube image to the host computer via Ethernet with TCP / IP protocol.

[0026] In one embodiment, the hardware accelerated algorithm is a Landweber iterative algorithm based on linear back projection accelerated by the programmable logic end hardware, and the method further includes:

[0027] Converting the Landweber iterative algorithm into a hardware description language;

[0028] Determining the parallelism and computing requirements of the Landweber iterative algorithm based on the hardware description language, and designing a hardware structure based on the parallelism and computing requirements;

[0029] A data flow architecture is set up based on the hardware structure.

[0030] In one embodiment, the configuration process of the Petalinux system includes:

[0031] After the configuration of the signal generation module, the switch switching module, the digital orthogonal demodulation module, the image reconstruction module, the FIFO module and the DMA module in the programmable logic end is completed, the hdf hardware description file is obtained;

[0032] On the processor system side, modifying a device tree file based on the hdf hardware description file, and adding the DDR4 storage unit and the Ethernet protocol to the device tree file;

[0033] Compile the boot image and root file system, make an SD boot card, and complete the system configuration.

[0034] The above-mentioned ZYNQ-based capacitance tomography system and method, by setting up a ZYNQ unit, a power supply unit, an electrode sensor, a capacitance measurement unit, and a DDR4 storage unit, uses hardware for parallel computing, and an image reconstruction module is provided in the ZYNQ unit, which accelerates the image reconstruction algorithm. Compared with traditional PC host computer data processing, it effectively reduces power consumption, reduces the size of the device, improves the speed and accuracy of imaging, and reduces measurement errors. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a structural block diagram of a ZYNQ-based electrical capacitance tomography system in one embodiment;

[0036] Figure 2 is a diagram of an application environment of a ZYNQ-based electrical capacitance tomography method in an embodiment;

[0037] Figure 3 1 is a schematic diagram of a flow chart of a capacitance tomography method based on ZYNQ in one embodiment;

[0038] Figure 4 FIG. 4 is a flow chart of a ZYNQ-based capacitance tomography method in another embodiment. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0040] In one embodiment, Figure 1As shown, a capacitance tomography system based on ZYNQ is provided, comprising: a ZYNQ unit 100 and a power supply unit 200, an electrode sensor 300, a capacitance measurement unit 400, a DDR4 storage unit 500, and a host computer 600 connected to the ZYNQ unit 100, wherein: the electrode sensor 300 is arranged in a pipeline, and the electrode sensor 300 is connected to the capacitance measurement unit 400; the capacitance measurement unit 400 comprises a switch switching circuit 410, a C / V conversion circuit 420, an excitation circuit 430, and an analog-to-digital conversion circuit 440, and the ZYNQ unit 100 sends a control instruction to the switch switching circuit 410 for switching the connection between the electrode sensor 300, the C / V conversion circuit 420, and the excitation circuit 430; the analog-to-digital conversion circuit 440 is used to convert the analog quantity of the C / V conversion circuit 420 into a digital quantity and send it to the ZYNQ unit 100; the ZYNQ unit 100 comprises a programmable logic circuit 410 and a C / V conversion circuit 420; the C / V conversion circuit 420 is used to convert the analog quantity of the C / V conversion circuit 420 into a digital quantity and send it to the ZYNQ unit 100; the ZYNQ unit 100 comprises a plurality of programmable logic circuits connected to each other. The programmable logic end 110 and the processor system end 120, the programmable logic end 110 includes a switch switching module 111, a signal generating module 112, a digital orthogonal demodulation module 113, and an image reconstruction module 114; the switch switching module 111 is connected to the switch switching circuit 410, the signal generating module 112 is connected to the excitation circuit 430, and the digital orthogonal demodulation module 113 is respectively connected to the analog-to-digital conversion circuit 440 and the image reconstruction module 440; the programmable logic end 110 is used to generate an excitation signal, a timing control switch switching circuit signal, a digital orthogonal demodulation analog-to-digital conversion circuit 440, and a hardware accelerated image reconstruction module 114; the processor system end 120 is respectively connected to the DDR4 storage unit 500 and the host computer 600, and is used to receive commands from the host computer 600 and send the obtained image to the host computer 600; the DDR4 storage unit 500 is used to cache image data; the host computer 600 is used to set imaging parameters and display the image in the pipeline.

[0041] like Figure 1 As shown, in this embodiment, the programmable logic end 110 may also include a FIFO module 115 and a DMA module 116, wherein the FIFO module 115 is connected to the image reconstruction module 114 and the DMA module 116 respectively; a customized Petalinux system 121 may be provided inside the processor system end 120.

[0042] Specifically, the power supply unit 200 is responsible for providing voltages of different specifications to each circuit; the electrode sensor 300 is placed in the pipeline, composed of 12 electrodes, and welded with a coaxial cable, which is led out through a BNC interface and connected to the capacitance measurement unit 400.

[0043] Among them, the ZYNQ unit 100 sends a command to the switch switching circuit 410, switches the connection between the electrode sensor 300 and the C / V conversion circuit 420 and the excitation circuit 430, and the analog-to-digital conversion circuit 440 converts the analog quantity of the C / V conversion circuit 420 into a digital quantity and sends it to the ZYNQ unit 100; the programmable logic end 110 is responsible for the generation of the excitation signal, the timing control of the switch switching circuit signal, the digital orthogonal demodulation of the analog-to-digital conversion circuit 440, and the hardware acceleration of the image reconstruction module 114, and the processor system end 120 is responsible for controlling the DDR4 storage unit 500 and connecting to the host computer 600, receiving the command of the host computer 600, and sending the obtained image to the host computer 600.

[0044] In one embodiment, the power supply unit includes a fixed voltage and a variable voltage; the variable voltage is connected to the ZYNQ unit, and the ZYNQ unit controls the power supply unit to provide the variable voltage for the excitation circuit.

[0045] Specifically, the power supply unit can output three fixed voltages of +5V, +12V, and +24V, and one variable voltage of 0 to 10V controlled by the ZYNQ unit. The variable voltage is generated by the control command issued by the ZYNQ unit and the AD7524 cooperates with the AD9764. The ZYNQ unit controls the power supply unit to provide a variable voltage of 0 to 10V to the excitation circuit in the capacitance measurement unit according to the different distances between the electrodes to be excited and measured.

[0046] like Figure 1 As shown, in one embodiment, the signal generation module 112 is further used to provide an excitation signal to the excitation circuit 430; and the ZYNQ unit 100 is further used to control the amplitude of the excitation signal.

[0047] Specifically, in this embodiment, the main control chip of the ZYNQ unit 100 is the Zynq UltraScale+MPSoC EG, and the programmable logic terminal 110 of the ZYNQ unit 100 includes a signal generation module 112 written in Verilog, which is responsible for providing an excitation signal to the excitation circuit 430 of the capacitance measurement unit 400. The excitation circuit 430 uses the AD7524 plus AD9764 chip to generate a sine wave with a variable amplitude of 500Khz to 1Mhz. When the two electrodes to be measured are far apart, the ZYNQ unit 100 will control the amplitude of the excitation signal to increase so that the C / V conversion circuit 420 can measure the capacitance value between the electrodes.

[0048] In one embodiment, the electrode sensor switches modes according to the state of the switch switching circuit; wherein the modes of the electrode sensor include an idle mode, an excitation mode, and a measurement mode; when the electrode sensor is in the idle mode, the electrode is grounded; when the electrode sensor is in the excitation mode, the electrode is connected to the excitation circuit; when the electrode sensor is in the measurement mode, the electrode is connected to the C / V conversion circuit.

[0049] Specifically, in one embodiment, the switch switching circuit is a T-type switch circuit; the ZYNQ unit controls the switch switching circuit to switch states; the switch switching circuit is used to control one electrode in the electrode sensor to be in an excitation mode and the other electrodes to be in a measurement mode; the switch switching circuit is also used to control each electrode in the electrode sensor to switch to the excitation mode in turn.

[0050] That is, in this embodiment, the switch switching circuit in the capacitance measurement unit is a T-type switch circuit, which is controlled by the ZYNQ unit. The programmable logic end of the ZYNQ unit includes a switch switching module written in Verilog. After the processor system end in the ZYNQ unit receives the instruction issued by the host computer, it will notify the programmable logic end through the AXI bus to issue switch switching instructions in sequence to ensure that only one electrode is in the excitation state and the other electrodes are in the measurement state, such as electrode 1 is in the excitation state, and electrodes 2 to 12 are in the measurement state, and then the excitation electrodes are switched in sequence to obtain 66 sets of data.

[0051] In one embodiment, the programmable logic end is connected to the processor system end via an AXI bus; the capacitance measurement circuit is connected to the programmable logic end; and the host computer is connected to the processor system end via Ethernet.

[0052] In this embodiment, the programmable logic end of the ZYNQ unit and the processor system end are connected through an AXI bus, the capacitance measurement unit is connected to the GPIO port of the programmable logic end, the logic level is +3.3v, the DDR4 storage unit is connected to the memory interface of BANK504 on the processor system end, the DDR4 storage unit has 4 DDR4 chips with a capacity of 512M×16bit, the chip model is MT40A512M16GE-083E, and the host computer is connected to the processor system end through Ethernet.

[0053] A ZYNQ-based capacitance tomography system provided in the present application is used to detect the flow state of multiphase flow in a pipeline and display it in an image, including a power supply unit, an electrode sensor, a capacitance measurement unit, a ZYNQ unit, a DDR4 storage unit, and a host computer. Among them, the power supply unit is responsible for providing voltages of different specifications to each circuit; the electrode sensor consists of 12 electrodes, which is responsible for responding to changes in the dielectric constant in the pipeline; the capacitance measurement unit consists of a switch switching circuit, a C / V conversion circuit, an excitation circuit and an analog-to-digital conversion circuit, which is responsible for applying excitation signals to the electrodes and converting the capacitance values ​​on other electrodes into voltage values; the ZYNQ unit includes two parts: the processor system end and the programmable logic end. The programmable logic end includes a signal generation module, a switch switching module, a digital orthogonal demodulation module, an image reconstruction module, a FIFO module, and a DMA module, which is responsible for controlling the signal acquisition of the measurement unit, performing digital orthogonal demodulation on the collected data, and then hardware accelerating the image reconstruction algorithm to finally obtain the grayscale value of the image. The processor system end includes a customized Petalinux system, which is responsible for controlling the DDR4 storage unit and connecting to the host computer, receiving commands from the host computer, and sending the obtained image to the host computer; the host computer is responsible for setting imaging parameters and displaying the image in the pipeline. The present invention realizes online monitoring of the flow state of multiphase flow in the pipeline, and utilizes the hardware parallel computing in ZYNQ to accelerate the image reconstruction algorithm. Compared with the traditional PC host computer processing data, it effectively reduces power consumption, reduces the size of the device, improves the speed and accuracy of imaging, and reduces measurement errors.

[0054] The ZYNQ-based capacitance tomography method provided in the embodiment of the present application can be applied to Figure 2 In the application environment shown. Figure 2 As shown, the application environment includes a host computer, a ZYNQ unit, a power supply unit, an electrode sensor, a capacitance measurement unit, and a DDR4 storage unit.

[0055] In one embodiment, Figure 3 As shown, a ZYNQ-based capacitance tomography method is provided, comprising the following steps:

[0056] Step 302, system initialization, starting the Petalinux system on the processor system side of the ZYNQ unit, the host computer sends an image acquisition command to the ZYNQ unit, and sets the excitation electrode to 1;

[0057] Step 304: the signal generating module inside the programmable logic terminal in the ZYNQ unit generates an excitation signal, the switch switching module generates a timing signal, and the ZYNQ unit sends the excitation signal and the timing signal to the capacitance measuring unit;

[0058] Step 306, the capacitance measurement unit controls the switch circuit to select the electrode mode according to the excitation signal and the timing signal, puts one electrode in the excitation mode and connects it to the excitation circuit, puts the other electrodes in the measurement mode and connects them to the C / V conversion circuit; the analog-to-digital conversion circuit converts the analog signal of the C / V conversion circuit into a digital signal;

[0059] Step 308: The digital orthogonal demodulation module inside the programmable logic terminal in the ZYNQ unit demodulates the voltage data obtained by the capacitance measurement unit to obtain capacitance data, and sends the data to the image reconstruction module;

[0060] Step 310, the image reconstruction module processes the capacitance data through a hardware accelerated algorithm to reconstruct the image inside the tube, and sends the image inside the tube to the programmable logic end cache and then to the Petalinux system;

[0061] Step 312, the Petalinux system caches the in-pipe image in the DDR4 storage unit, and sends the in-pipe image to the host computer via Ethernet with TCP / IP protocol.

[0062] Specifically, in this embodiment, the ZYNQ unit accelerates the image reconstruction algorithm through hardware, and the image reconstruction algorithm is the Landweber iterative algorithm, such as Figure 4 As shown, the specific imaging process includes:

[0063] Initialization: the Petalinux system on the processor system side of the ZYNQ unit is started, the host computer issues an image acquisition command, and the excitation electrode N is set to 1;

[0064] The signal generation module at the programmable logic end of the ZYNQ unit generates a 500Khz excitation signal, and the switch switching module generates a timing signal;

[0065] The capacitance measurement unit receives the signal from the ZYNQ unit and controls the switch circuit to select the electrode mode;

[0066] Switch the switch so that the N electrode is in the excitation mode and connected to the excitation circuit, and the remaining electrodes are in the measurement mode and connected to the C / V conversion circuit;

[0067] The analog-to-digital conversion circuit converts the analog signal of the C / V conversion circuit into a digital signal;

[0068] The digital quadrature demodulation module at the programmable logic end of the ZYNQ unit demodulates the voltage data obtained by the capacitance measurement unit into capacitance data;

[0069] The image reconstruction module at the programmable logic end of the ZYNQ unit acquires capacitance data;

[0070] Determine whether the electrode N is greater than or equal to 11. If not, then N=N+1, and return to the step of switching the switch so that the N electrode is in the excitation mode; if yes, proceed to the next step;

[0071] The image reconstruction module at the programmable logic end of the ZYNQ unit back-projects, iterates, updates, and reconstructs the image inside the tube through a hardware-accelerated algorithm;

[0072] The programmable logic side caches the image data through the FIFO module and sends the data to the Petalinux system through the DMA module;

[0073] The Petalinux system caches the reconstructed image data in the DDR4 storage unit;

[0074] The Petalinux system sends the image data cached in the DDR4 storage unit to the host computer through Ethernet with TCP / IP protocol.

[0075] In one embodiment, a ZYNQ-based capacitance tomography method provided may also include a Landweber iterative algorithm implementation process based on linear back projection, the specific process including: converting the Landweber iterative algorithm into a hardware description language; determining the parallelism and computing requirements of the Landweber iterative algorithm based on the hardware description language, and designing a hardware structure based on the parallelism and computing requirements; and setting a data flow architecture based on the hardware structure.

[0076] Specifically, in this embodiment, the specific process of the hardware accelerated Landweber iterative algorithm is as follows:

[0077] Convert the Landweber iterative algorithm based on linear back-projection into an FPGA hardware implementation, including converting the algorithm into a hardware description language and designing hardware circuits to execute the various steps of the algorithm;

[0078] Design the hardware structure of the FPGA architecture based on the parallelism and computing requirements of the algorithm, including the design of parallel processing units, memory structures, and data paths;

[0079] Design data flow architecture to effectively process data flow on FPGA, including designing data input and output interfaces, data flow scheduling and management, data storage and transmission;

[0080] Optimize the performance of the designed hardware structure, including optimizing clock frequency, reducing resource usage, optimizing data paths and control logic to achieve higher operating speed and efficiency.

[0081] In one embodiment, specifically, the Landweber iterative algorithm based on linear back projection is implemented in the following steps:

[0082] First, make an initial estimate of the initial image: X (0) =S T C, where X (0) is the conductivity distribution vector, representing the gray value of the image, S is the normalized sensitivity matrix, and C is the normalized capacitance value;

[0083] For each iteration k, the image estimate is updated according to the update rule of the Landweber iterative method: (k+1) =X (k) -α k S T (SX (k) -C), where α k is the relaxation factor, which determines the iteration step size;

[0084] In each iteration, the current image is used to estimate X (k) Perform linear back projection to obtain a back projection image;

[0085] Perform filtering on the back-projected image obtained in each iteration to improve the image quality;

[0086] Determine whether to stop iteration based on the pre-set termination condition, which is when the maximum number of iterations is reached;

[0087] Output the final image reconstruction result X (k) .

[0088] In one embodiment, a ZYNQ-based capacitance tomography method provided may also include a configuration process of a Petalinux system, the specific process including: completing the configuration of a signal generation module, a switch switching module, a digital orthogonal demodulation module, an image reconstruction module, a FIFO module, and a DMA module in a programmable logic end to obtain an hdf hardware description file; at a processor system end, modifying a device tree file based on the hdf hardware description file, and adding a DDR4 storage unit and an Ethernet protocol to the device tree file; compiling a startup image and a root file system, and making an SD startup card to complete the system configuration.

[0089] The specific steps include:

[0090] In Vivado, configure the signal generation module, switch switching module, digital orthogonal demodulation module, image reconstruction module, FIFO module, and DMA module in the programmable logic end to obtain the hdf hardware description file;

[0091] Use petalinux to build the project structure in Ubuntu system and add the hdf hardware description file created by Vivado;

[0092] Modify the device tree file and add DDR4 and Ethernet protocols;

[0093] Compile boot image and Rootfs;

[0094] Make an SD boot card and complete the system configuration.

[0095] It should be understood that, although the various steps in the above-mentioned flow chart are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the above-mentioned flow chart may include a plurality of sub-steps or a plurality of stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0096] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0097] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A ZYNQ-based electrical capacitance tomography system, characterized in that: The system includes a ZYNQ unit and a power supply unit, an electrode sensor, a capacitance measurement unit, a DDR4 storage unit, and a host computer connected to the ZYNQ unit, wherein: The electrode sensor is arranged in the pipeline, and the electrode sensor is connected to the capacitance measuring unit; The capacitance measurement unit includes a switch switching circuit, a C / V conversion circuit, an excitation circuit, and an analog-to-digital conversion circuit. The ZYNQ unit sends a control instruction to the switch switching circuit to switch the connection between the electrode sensor, the C / V conversion circuit, and the excitation circuit; the analog-to-digital conversion circuit is used to convert the analog quantity of the C / V conversion circuit into a digital quantity and send it to the ZYNQ unit; The ZYNQ unit includes a programmable logic end and a processor system end connected to each other, and the programmable logic end includes a switch switching module, a signal generating module, a digital orthogonal demodulation module, and an image reconstruction module; the switch switching module is connected to the switch switching circuit, the signal generating module is connected to the excitation circuit, and the digital orthogonal demodulation module is respectively connected to the analog-to-digital conversion circuit and the image reconstruction module; the programmable logic end is used to generate an excitation signal, generate a timing control switch switching circuit signal, perform digital orthogonal demodulation on the analog-to-digital conversion circuit, and accelerate the hardware calculation of the image reconstruction module; the processor system end is respectively connected to the DDR4 storage unit and the host computer, and is used to receive commands from the host computer and send the obtained image to the host computer; The DDR4 storage unit is used to cache image data; The host computer is used to set imaging parameters and display the image in the pipeline.

2. The ZYNQ-based electrical capacitance tomography system according to claim 1, characterized in that: The power supply unit includes a fixed voltage and a variable voltage; the variable voltage is connected to the ZYNQ unit, and the ZYNQ unit is used to control the power supply unit so that the power supply unit provides the variable voltage for the excitation circuit.

3. The ZYNQ-based electrical capacitance tomography system according to claim 1, characterized in that: The signal generating module is further used to provide an excitation signal to the excitation circuit; and the ZYNQ unit is further used to control the amplitude of the excitation signal.

4. The ZYNQ-based electrical capacitance tomography system according to claim 1, characterized in that: The electrode sensor switches modes according to the state of the switch switching circuit; wherein the modes of the electrode sensor include an idle mode, an excitation mode, and a measurement mode; When the electrode sensor is in the idle mode, the electrode is grounded; When the electrode sensor is in the excitation mode, the electrode is connected to the excitation circuit; When the electrode sensor is in the measurement mode, the electrode is connected to the C / V conversion circuit.

5. The ZYNQ-based electrical capacitance tomography system according to claim 4, characterized in that: The switch switching circuit is a T-type switch circuit; the ZYNQ unit controls the switch switching circuit to switch states; the switch switching circuit is used to control one electrode in the electrode sensor to be in the excitation mode and the other electrodes to be in the measurement mode; the switch switching circuit is also used to control each electrode in the electrode sensor to switch to the excitation mode in turn.

6. The ZYNQ-based electrical capacitance tomography system according to claim 1, characterized in that: The programmable logic end is connected to the processor system end via an AXI bus; the capacitance measurement circuit is connected to the programmable logic end; and the host computer is connected to the processor system end via Ethernet.

7. A ZYNQ-based electrical capacitance tomography method, applied to the ZYNQ-based electrical capacitance tomography system according to any one of claims 1 to 6, characterized in that: The method comprises: Initialize the system, start the Petalinux system on the processor system side of the ZYNQ unit, the host computer sends an image acquisition command to the ZYNQ unit, and sets the excitation electrode to 1; The signal generating module inside the programmable logic terminal of the ZYNQ unit generates an excitation signal, the switch switching module generates a timing signal, and the ZYNQ unit sends the excitation signal and the timing signal to the capacitance measuring unit; The capacitance measurement unit controls the switch circuit to select the electrode mode according to the excitation signal and the timing signal, places one electrode in the excitation mode and connects to the excitation circuit, and places the other electrodes in the measurement mode and connects to the C / V conversion circuit; the analog-to-digital conversion circuit converts the analog signal of the C / V conversion circuit into a digital signal; The digital orthogonal demodulation module inside the programmable logic terminal of the ZYNQ unit demodulates the voltage data obtained by the capacitance measurement unit to obtain capacitance data, and sends the data to the image reconstruction module; The image reconstruction module processes the capacitance data through a hardware accelerated algorithm to obtain a reconstructed in-tube image, and sends the in-tube image to the programmable logic end cache and then to the Petalinux system; The Petalinux system caches the in-tube image in a DDR4 storage unit, and sends the in-tube image to the host computer via Ethernet with TCP / IP protocol.

8. The ZYNQ-based electrical capacitance tomography method according to claim 7, characterized in that: The hardware accelerated algorithm is a Landweber iterative algorithm based on linear back projection accelerated by the programmable logic end hardware, and the method further includes: Converting the Landweber iterative algorithm into a hardware description language; Determining the parallelism and computing requirements of the Landweber iterative algorithm based on the hardware description language, and designing a hardware structure based on the parallelism and computing requirements; A data flow architecture is set up based on the hardware structure.

9. The ZYNQ-based electrical capacitance tomography method according to claim 7, characterized in that: The configuration process of the Petalinux system includes: After the configuration of the signal generation module, the switch switching module, the digital orthogonal demodulation module, the image reconstruction module, the FIFO module and the DMA module in the programmable logic end is completed, the hdf hardware description file is obtained; On the processor system side, modifying a device tree file based on the hdf hardware description file, and adding the DDR4 storage unit and the Ethernet protocol to the device tree file; Compile the boot image and root file system, make an SD boot card, and complete the system configuration.

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