Display control circuit, method and display device
By setting a comparison delay module in the display device and adjusting the output timing of the common electrode voltage signal and the source drive signal, the problem of screen flickering during startup is solved, the synchronous output of the signal is achieved, and the user experience is improved.
Patent Information
- Application Number
- CN202411219033.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2044-08-30
AI Technical Summary
When the display device is turned on, a large voltage difference is formed between the common electrode voltage signal and the source drive signal, which causes the screen to flicker due to liquid crystal inversion, affecting the user experience.
A comparison delay module is set in the display device to determine whether the voltage difference between the source drive signal and the common electrode voltage signal is greater than the set threshold. The delay adjustment ensures that the signal is output synchronously when the voltage difference is less than the threshold to avoid excessive voltage difference.
It effectively avoids the screen flashing phenomenon during startup and improves the user experience of the display device.
Smart Images

Figure CN118942421B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a display control circuit, method, and display device. Background Art
[0002] The screen flickering issue on display devices during startup is generally caused by a large voltage difference between the common electrode voltage signal (Vcom signal) and the source drive signal (Source signal). When this large voltage difference forms between the common electrode voltage signal (Vcom signal) and the source drive signal (Source signal), the liquid crystal can invert, causing the human eye to see the screen flickering.
[0003] In related technologies, the backlight power signal of a display device is generally required to be later than the front-end input signal. However, with long-term use of the entire device, the backlight light source will age and decay to a certain extent, or if there is a problem with the backlight during use, it will easily cause a flickering screen when the device is turned on. For example, when the backlight is always on, the OC (liquid crystal panel) is controlled separately to power on and send a signal to the OC. Because different signals arrive at the panel at different times, the common electrode voltage signal will generally be sent to the panel before the source drive signal. In this way, it is easy to see a flickering screen when the backlight is always on, affecting the user experience. Summary of the Invention
[0004] To overcome the problems existing in the related art, the present disclosure provides a display control circuit, method and display device.
[0005] According to a first aspect of an embodiment of the present disclosure, a display control circuit of a display device is provided. The display device includes a chip-on-film (COF) and a glass substrate. The COF is used to transmit a common electrode voltage signal and a plurality of source drive signals to the glass substrate.
[0006] The display control circuit includes an array substrate row drive region, a driver chip, and a comparison delay module disposed on the glass substrate. The chip-on-film is electrically connected to the comparison delay module, which is also electrically connected to the array substrate row drive region. The chip-on-film transmits the common electrode voltage signal to the array substrate row drive region via the comparison delay module. The comparison delay module is electrically connected to the driver chip, and the chip-on-film outputs the source drive signal to the driver chip via the comparison delay module.
[0007] Among them, the comparison delay module is configured to determine whether the voltage difference between the maximum voltage of multiple source drive signals and the common electrode voltage signal is greater than or equal to a set threshold; if it is determined that the voltage difference is less than the set threshold, the common electrode voltage signal is controlled to be output to the array substrate row drive area, and the source drive signal is synchronously controlled to be output to the driver chip.
[0008] In an optional implementation, the comparison delay module is configured to:
[0009] If it is determined that the voltage difference is greater than or equal to the set threshold, then after a delay of a set period of time, the voltage difference between the delayed common electrode voltage signal and the maximum voltage is recalculated, and it is determined whether the voltage difference is greater than or equal to the set threshold until it is determined that the voltage difference is less than the set threshold.
[0010] In an optional embodiment, the display control circuit includes a detection module, and the detection module is electrically connected to the comparison delay module.
[0011] The detection module is configured to control the comparison delay module to be in the start-up state when the display device is in the power-on state and the voltage of at least one of the source drive signals reaches a set voltage, so that the comparison delay module determines whether the voltage difference is greater than or equal to the set threshold; wherein the set voltage is the voltage of the source drive signal corresponding to a black screen.
[0012] In an optional embodiment, the detection module is configured to control the comparison delay module to be in a closed state when the display device is in a working state.
[0013] In an optional embodiment, the detection module is configured to:
[0014] Determining the state of the display device by detecting the rising edge of the common electrode voltage signal;
[0015] in,
[0016] If a rising edge of the common electrode voltage signal is detected, determining that the display device is in the power-on state;
[0017] and / or,
[0018] If it is detected that the common electrode voltage signal is a constant voltage, it is determined that the display device is in the working state.
[0019] According to a second aspect of an embodiment of the present disclosure, a display control method for a display device is provided. The display control method is applied to the display control circuit according to any one of the first aspects, and the display control method includes:
[0020] Determine whether a voltage difference between a maximum voltage of a plurality of source driving signals and a common electrode voltage signal is greater than or equal to a set threshold;
[0021] If it is determined that the voltage difference is less than the set threshold, the common electrode voltage signal is controlled to be output to the row driving area of the array substrate, and the source driving signal is synchronously controlled to be output to the driving chip.
[0022] In an optional embodiment, whether the voltage difference between the maximum voltage of the plurality of source driving signals and the common electrode voltage signal is greater than or equal to a set threshold comprises:
[0023] If it is determined that the voltage difference is greater than or equal to the set threshold, then after a delay of a set period of time, the voltage difference between the delayed common electrode voltage signal and the maximum voltage is recalculated, and it is determined whether the voltage difference is greater than or equal to the set threshold until it is determined that the voltage difference is less than the set threshold.
[0024] In an optional embodiment, determining whether the voltage difference between the maximum voltage of the plurality of source driving signals and the common electrode voltage signal is greater than or equal to a set threshold includes:
[0025] When the display device is in a powered-on state and the voltage of at least one of the source driving signals reaches a set voltage, controlling the comparison delay module to be in an activated state so that the comparison delay module determines whether the voltage difference is greater than or equal to the set threshold; wherein the set voltage is the voltage of the source driving signal corresponding to a black screen;
[0026] and / or,
[0027] When the display device is in working state, the comparison delay module is controlled to be in closed state.
[0028] In an optional embodiment, the display control method includes:
[0029] Determining the state of the display device by detecting the voltage state of the common electrode voltage signal;
[0030] in,
[0031] If a rising edge of the common electrode voltage signal is detected, determining that the display device is in the power-on state;
[0032] and / or,
[0033] If it is detected that the common electrode voltage signal is a constant voltage, it is determined that the display device is in the working state.
[0034] According to a third aspect of an embodiment of the present disclosure, a display device is provided, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the display control method described in any one of the second aspects when executing the computer program.
[0035] The technical solution provided by the embodiments of the present disclosure may include the following beneficial effects: In the present disclosure, when the display device is in the power-on state, the comparison delay module may first compare the maximum voltage of multiple source drive signals with the common electrode voltage signal. When the voltage difference between the two is small (that is, when the voltage difference is less than the set threshold), the common electrode voltage signal and the source drive signal may be output synchronously. In this way, a large voltage difference may be avoided between the common electrode voltage signal output to the row drive area of the array substrate and the source drive signal output to the drive chip, thereby avoiding screen flashing during startup and improving the user experience.
[0036] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0038] Figure 1 is a schematic diagram of a display device (including a display control circuit) according to an exemplary embodiment.
[0039] Figure 2 is a schematic diagram showing a display control method according to an exemplary embodiment.
[0040] Figure 3 is a schematic diagram of a display device according to an exemplary embodiment.
[0041] Description of reference numerals:
[0042] 1. Glass substrate; 2. Chip-on-film;
[0043] 10. Comparison delay module; 20. Detection module; 30. Array substrate row drive area; 40. Driver chip;
[0044] 100. Display device;
[0045] 101. Processor; 102. Memory; 1021. Operating system; 1022. Application; 103. User interface; 104. Network interface; 105. Bus system. DETAILED DESCRIPTION
[0046] The following will describe the embodiments of the present application with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand the other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be understood that the preferred embodiments are only for the purpose of illustrating the present application and are not intended to limit the scope of protection of the present application.
[0047] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. Therefore, the illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component can be changed at will, and the component layout type may also be more complicated.
[0048] The following will describe the embodiments of the present application with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand the other advantages and effects of the present application from the contents disclosed in this specification. The present application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be understood that the preferred embodiments are only for the purpose of illustrating the present application and are not intended to limit the scope of protection of the present application.
[0049] The disclosed embodiments provide a display control method, apparatus, and display device. In this embodiment, when the display device is powered on, the comparison delay module can first compare the maximum voltage of multiple source drive signals with the common electrode voltage signal. When the voltage difference between the two is small (i.e., when the voltage difference is less than a set threshold), the common electrode voltage signal and the source drive signal can be output synchronously, and the common electrode voltage signal is output to the array substrate row drive area, and then output to the driver chip via the source drive signal. In this way, a large voltage difference can be avoided between the common electrode voltage signal output to the array substrate row drive area and the source drive signal output to the driver chip, thereby avoiding screen flickering during startup and improving the user experience.
[0050] Example 1
[0051] This embodiment provides a display control circuit that can be applied to the display device 100. Figure 1 As shown, the display control circuit may include a chip-on-film 2 and a glass substrate 1 , wherein the chip-on-film 2 is used to transmit a common electrode voltage signal and a plurality of source driving signals to the glass substrate 1 .
[0052] In this embodiment, the display control circuit includes an array substrate row drive region 30, a driver chip 40, and a comparison delay module 10 disposed on a glass substrate 1. The chip-on-film (COF) 2 is electrically connected to the comparison delay module 10. The comparison delay module 10 is electrically connected to the array substrate row drive region 30, and the COF 2 transmits the common electrode voltage signal to the array substrate row drive region 30 via the comparison delay module 10. The comparison delay module 10 is also electrically connected to the driver chip 40, and the COF 2 outputs the source drive signal to the driver chip 40 via the comparison delay module 10.
[0053] The comparison delay module 10 may be configured to determine whether a voltage difference between a maximum voltage of a plurality of source driving signals and a common electrode voltage signal is greater than or equal to a set threshold.
[0054] In addition, the comparison delay module 10 can also be configured to control the common electrode voltage signal and the source drive signal to be output synchronously if it is determined that the voltage difference is less than the set threshold; wherein the common electrode voltage signal is controlled to be output to the array substrate row drive area 30 of the display device 100, and the source drive signal is controlled to be output to the drive chip 40 of the display device 100.
[0055] For example, a comparison delay module 10 is etched onto the glass substrate 1 of the display device 100. When the Vcom signal and the Source signal are transmitted to the glass substrate 1 via the COF, they are first transmitted to the comparison delay module 10. The comparison delay module 10 then calculates the voltage difference between the maximum voltage of the Vcom signal and the Source signal input from the COF, and then compares this voltage difference with a set threshold.
[0056] When the voltage difference is greater than or equal to the set threshold, it indicates that the voltage difference between the Vcom signal and the maximum voltage in the Source signal is large. In this case, the comparison delay module 10 may not output the Vcom signal and the Source signal. Then, based on the Vcom signal after a 30ms delay, the voltage difference between the Vcom signal and the maximum voltage in the Source signal is recalculated, and it is determined whether the voltage difference is greater than or equal to the set threshold. This process is repeated until it is determined that the voltage difference is less than the set threshold. In this case, the voltage difference between the Vcom signal and the maximum voltage in the Source signal is sufficiently small. In this case, the comparison delay module 10 can synchronously output the Vcom signal and the Source signal. The comparison delay module 10 can output the Vcom signal to the array substrate row driver area 30 (GOA area) and can output the Source signal to the driver chip 40 (Driver IC) via the Data signal line. This achieves synchronization between the Vcom signal and the Source signal and avoids the problem of screen flickering during startup.
[0057] In this device, by providing a comparison delay module 10 within the display device 100, the comparison delay module 10 can first compare the maximum voltage of multiple Source signals with the magnitude of the Vcom signal. Only when the voltage difference between the two is small (i.e., when the voltage difference is less than a set threshold), the comparison delay module 10 will synchronously output the Vcom signal and the Source signal, and output the Vcom signal to the array substrate row drive area 30 and the Source signal to the driver chip 40. This prevents a large voltage difference between the Vcom signal output to the array substrate row drive area 30 and the Source signal output to the driver chip 40, thereby avoiding screen flickering during startup and improving the user experience. For example, when the display device 100 is in the power-on state, this device can prevent screen flickering during startup.
[0058] Example 2
[0059] This embodiment provides a display control method, which can be applied to the display control circuit in the above embodiment. Figure 1 and Figure 2 As shown, the method may include:
[0060] S110, determining whether a voltage difference between a maximum voltage of a plurality of source driving signals and a common electrode voltage signal is greater than or equal to a set threshold;
[0061] S120 : If it is determined that the voltage difference is less than the set threshold, control the common electrode voltage signal and the source driving signal to be output synchronously.
[0062] In step S110, in the display device 100, the common electrode voltage signal (Vcom signal) and the source drive signal (Source signal) are generally transmitted to the glass substrate 1 through the chip-on-film (COF) 2. However, a COF may have many signal lines for the Source signal, so a representative signal (which can be recorded as a Source enable signal) is introduced as a representative of all Source signals.
[0063] The signal with the largest voltage among the multiple Source signals can be used as the Source enable signal. Then, the voltage difference between the Source enable signal and the Vcom signal is calculated, and it is determined whether the voltage difference is greater than or equal to a set threshold.
[0064] It should be noted that the threshold value can be set based on actual needs and its specific value is not limited. For example, if the minimum voltage difference between the Source signal and the Vcom signal is V0 when the screen flashes at startup, the threshold value can generally be set to a voltage value less than or equal to V0.
[0065] In this step, if the voltage difference is greater than or equal to the set threshold, it indicates a significant voltage difference between the Vcom signal and the Source enable signal. This also indicates a significant voltage difference between the Vcom signal and the Source signal, which can easily cause screen flickering. Therefore, once the voltage difference is determined to be greater than or equal to the set threshold, a delay is set for the set duration. The voltage difference is then recalculated using the delayed Vcom signal. The recalculated voltage difference is then determined to be greater than or equal to the set threshold, and so on, until the voltage difference is determined to be less than the set threshold.
[0066] The set duration can be set based on actual needs, and its specific value is not limited. For example, the set duration can be 30ms. That is, if it is determined that the voltage difference is greater than or equal to the set threshold, then after a delay of 30ms, the voltage difference is recalculated using the delayed Vcom signal (the voltage at this time is greater than before the delay), and the voltage difference is recalculated to determine whether it is greater than or equal to the set threshold.
[0067] It should be noted that when the display device 100 is in the power-on state, the voltage of the Vcom signal generally increases, that is, the voltage of the Vcom signal generally continues to increase until it reaches a stable constant voltage. However, when the voltage difference between the voltage of the Vcom signal and the voltage of the Source signal is large, it is easy to cause a flickering screen when the power is turned on. Therefore, the voltage difference between the Vcom signal and the Source enable signal (that is, the maximum voltage among multiple Source signals) can be continuously calculated, and then it is determined whether the above voltage difference is less than a set threshold. It is understandable that under normal circumstances, as the voltage of the Vcom signal continues to increase, the above voltage difference can gradually decrease until it is less than the set threshold, and then the determination can be stopped.
[0068] In step S120, if the voltage difference is determined to be less than the set threshold, it indicates that the voltage difference between the Vcom signal and all Source signals in this case will not cause screen flicker. The common electrode voltage signal and the source drive signal can be controlled to be output synchronously, thereby avoiding the occurrence of screen flicker during startup. Specifically, the common electrode voltage signal can be controlled to be output to the array substrate row drive region 30 of the display device 100, and the source drive signal can be controlled to be output to the driver chip 40 of the display device 100. This achieves synchronization between the Vcom signal and the Source signal, thereby avoiding the problem of screen flicker during startup.
[0069] In this method, the maximum voltage of multiple source drive signals can be compared with the common electrode voltage signal. When the voltage difference between the two is small (i.e., when the voltage difference is less than a set threshold), the common electrode voltage signal and the source drive signal can be synchronously output and output to the array substrate row drive area 30. The common electrode voltage signal is then output to the driver chip 40 via the source drive signal. In this way, a large voltage difference between the common electrode voltage signal output to the array substrate row drive area 30 and the source drive signal output to the driver chip 40 can be avoided, thereby avoiding screen flicker and improving the user experience. For example, when the display device 100 is in the power-on state, this method can avoid screen flicker during startup.
[0070] Example 3
[0071] This embodiment provides a display control method and a display control circuit, which can be applied to the display device 100. The display control circuit is used to implement the display control method.
[0072] Among them, reference Figure 1 and Figure 2 As shown, the display control circuit may include a detection module 20 and a comparison delay module 10. The detection module 20 is electrically connected to the comparison delay module 10. The detection module 20 may be used to detect the state of the display device 100. The state of the display device 100 may include a power-on state, an operating state, or other states (e.g., a power-off state), without limitation.
[0073] It should be noted that the "off" state refers to the display device 100 being unpowered. The "on" state refers to the display device 100 being in normal operation. The "on" state refers to the intermediate state between the off and on states. Generally, after the display device 100 is powered on, the voltage of the Vcom signal continues to increase, meaning that the voltage of the Vcom signal is on a rising edge. Once the voltage of the Vcom signal reaches a constant voltage, the display device 100 enters normal operation.
[0074] The detection module 20 can determine whether the display device 100 is in the power-on state by detecting the voltage state of the Vcom signal. For example, if the detection module 20 detects a rising edge of the Vcom signal (i.e., the voltage of the Vcom signal is gradually increasing), the display device 100 can be determined to be in the power-on state. If the detection module 20 detects a constant voltage (i.e., a constant voltage) of the Vcom signal, the display device 100 can be determined to be in the operating state.
[0075] Among them, the detection module 20 can also be used to detect the voltage state of the Source signal. It should be noted that when the display device 100 is in the power-on state, the voltage of the Source signal generally has a short period of increase. In this embodiment, a set voltage can be configured in advance. The specific value of the set voltage is not limited and can be set according to actual needs. The set voltage can be the voltage of the Source signal corresponding to the black screen. That is, when the voltage of at least one Source signal reaches the set voltage, it means that the Source signal starts to output the voltage of the inserted black screen.
[0076] When the detection module 20 determines that the display device 100 is powered on and detects that the voltage of at least one Source signal has reached a set voltage, it activates the comparison and delay module 10. This control activates the comparison and delay module 10 so that it can determine whether the voltage difference is greater than or equal to a set threshold. In this case, the comparison and delay module 10 calculates the voltage difference between the Vcom signal and the Source enable signal and then compares this voltage difference with the set threshold.
[0077] Among them, if the comparison delay module 10 determines that the voltage difference is greater than or equal to the set threshold, it means that there is a large voltage difference between the Vcom signal and the Source enable signal, that is, there is a large voltage difference between the Vcom signal and the Source signal. In this case, it is easy to cause screen flickering. Therefore, in this case, the comparison delay module 10 can use the delayed Vcom signal to recalculate the voltage difference with the Source enable signal after the delay is set, and again determine whether the recalculated voltage difference is greater than or equal to the set threshold, and so on, until it is determined that the voltage difference is less than the set threshold, which means that the voltage difference between the maximum voltage in the Vcom signal and the Source signal is sufficiently small. In this case, the comparison delay module 10 can synchronously output the Vcom signal and the Source signal, and the Source signal at this time begins to output the voltage of the inserted black screen.
[0078] The comparison delay module 10 can transmit the Vcom signal value to the array substrate row driver area 30 (GOA area) and output the Source signal to the driver IC 40 (Driver IC) via the Data signal line. This can achieve synchronization between the Vcom signal and the Source signal and avoid the problem of screen flickering during startup.
[0079] When the detection module 20 determines that the display device 100 is in operation, the Vcom signal is a constant voltage. At this point, the comparison delay module 10 is disabled, effectively controlling the comparison delay module 10 to its off state. In this state, the Vcom and Source signals are transmitted via the COF to the glass substrate 1 and then output normally. Specifically, the Vcom signal is transmitted to the array substrate row driver region 30 (GOA region), and the Source signal is output via the Data signal line to the driver IC 40, allowing the display device 100 to operate normally.
[0080] In this embodiment, a detection module 20 and a comparison delay module 10 may be provided in the display device 100. When the display device 100 is in the power-on state and the Source signal begins to output the voltage of the inserted black screen, this embodiment can avoid a large voltage difference between the Vcom signal output to the array substrate row driving area 30 and the Source signal output to the driver chip 40, thereby avoiding a screen flicker during startup. This can effectively avoid the visual difference caused by the screen flicker during startup, thereby improving product quality and competitiveness.
[0081] Example 4
[0082] This embodiment provides a display device. Figure 3 As shown, the display device 100 may include: at least one processor 101, a memory 102, at least one network interface 104, and another user interface 103. The various components in the display device 100 are coupled together via a bus system 105. It will be understood that the bus system 105 is used to enable communication between these components. In addition to including a data bus, the bus system 105 also includes a power bus, a control bus, and a status signal bus. However, for the sake of clarity, all of these buses will be labeled as the bus system 105.
[0083] The user interface 103 may include a display, a keyboard, or a pointing display device (eg, a mouse, a trackball, a touch pad, or a touch screen).
[0084] It is understood that the memory 102 in the embodiment of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct RAM bus random access memory (DRRAM). The memory 102 described herein is intended to include, but is not limited to, these and any other suitable types of memory.
[0085] In some embodiments, the memory 102 stores the following elements, executable units, or data structures, or a subset thereof, or an extended set thereof: an operating system 1021 and application programs 1022 .
[0086] Among them, the operating system 1021 includes various system programs, such as the framework layer, the core library layer, and the driver layer, which are used to implement various basic services and process hardware-based tasks. The application 1022 includes various application programs, such as a media player (Media Player), a browser (Browser), etc., which are used to implement various application services. The program implementing the method of the embodiment of the application can be included in the application 1022.
[0087] In the embodiment of the present application, the processor 101 is used to execute the methods provided in each method embodiment by calling the program or instructions stored in the memory 102, specifically, the program or instructions stored in the application 1022.
[0088] The methods disclosed in the above embodiments of the present application can be applied to or implemented by processor 101. Processor 101 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by hardware integrated logic circuits in processor 101 or by software instructions. The above processor 101 can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The various methods, steps, and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of the present application can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software units in the decoding processor. The software units can be located in a storage medium mature in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, etc. The storage medium is located in the memory 102 , and the processor 101 reads the information in the memory 102 and implements the above method in combination with its hardware.
[0089] It is understood that the embodiments described herein may be implemented using hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit may be implemented in one or at least one application-specific integrated circuit (ASIC), digital signal processor (DSP), digital signal processing display device (DSPD), programmable logic display device (PLD), field-programmable gate array (FPGA), general-purpose processor, controller, microcontroller, microprocessor, other electronic units for performing the functions described herein, or a combination thereof.
[0090] For software implementation, the technology described herein can be implemented by a unit that performs the functions described herein. The software code can be stored in a memory and executed by a processor. The memory can be implemented in the processor or outside the processor.
[0091] Professionals should also be further aware that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0092] It should be noted that references in this specification to "one embodiment," "an embodiment," "an exemplary embodiment," "some embodiments," and the like indicate that the described embodiments may include a particular feature, structure, or characteristic, but not necessarily every embodiment includes that particular feature, structure, or characteristic. Furthermore, such phrases do not necessarily refer to the same embodiment. Furthermore, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, it is within the knowledge of those skilled in the art to implement such feature, structure, or characteristic in conjunction with other embodiments, whether explicitly described or not.
[0093] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more limitations, an element defined by the sentence "comprises a..." does not exclude the presence of other identical elements in the process, method, article or device that includes the element.
[0094] The above embodiments are only preferred embodiments for fully illustrating the present application, and the protection scope of the present application is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art based on the present application are within the protection scope of the present application.
Claims
1. A display control circuit for a display device, the display device comprising a chip-on-film and a glass substrate, the chip-on-film being used to transmit a common electrode voltage signal and a plurality of source drive signals to the glass substrate, characterized in that: The display control circuit includes an array substrate row drive region, a driver chip, and a comparison delay module disposed on the glass substrate. The chip-on-film is electrically connected to the comparison delay module, which is also electrically connected to the array substrate row drive region. The chip-on-film transmits the common electrode voltage signal to the array substrate row drive region via the comparison delay module. The comparison delay module is electrically connected to the driver chip, and the chip-on-film outputs the source drive signal to the driver chip via the comparison delay module. The comparison delay module is configured to determine whether a voltage difference between a maximum voltage of a plurality of source drive signals and a common electrode voltage signal is greater than or equal to a set threshold; if it is determined that the voltage difference is less than the set threshold, control the common electrode voltage signal to be output to the row drive region of the array substrate, and synchronously control the source drive signal to be output to the driver chip; The comparison delay module is configured as follows: If it is determined that the voltage difference is greater than or equal to the set threshold, then after a delay of a set period of time, the voltage difference between the delayed common electrode voltage signal and the maximum voltage is recalculated, and it is determined whether the voltage difference is greater than or equal to the set threshold until it is determined that the voltage difference is less than the set threshold.
2. The display control circuit according to claim 1, characterized in that: The display control circuit includes a detection module, which is electrically connected to the comparison delay module. The detection module is configured to control the comparison delay module to be in the start-up state when the display device is in the power-on state and the voltage of at least one of the source drive signals reaches a set voltage, so that the comparison delay module determines whether the voltage difference is greater than or equal to the set threshold; wherein the set voltage is the voltage of the source drive signal corresponding to a black screen.
3. The display control circuit according to claim 2, characterized in that: The detection module is configured to control the comparison delay module to be in a closed state when the display device is in a working state.
4. The display control circuit according to claim 3, characterized in that: The detection module is configured to: Determining the state of the display device by detecting the rising edge of the common electrode voltage signal; in, If a rising edge of the common electrode voltage signal is detected, determining that the display device is in the power-on state; and / or, If it is detected that the common electrode voltage signal is a constant voltage, it is determined that the display device is in the working state.
5. A display control method for a display device, characterized in that: The display control method is applied to the display control circuit according to any one of claims 1 to 4, and the display control method includes: Determine whether a voltage difference between a maximum voltage of a plurality of source driving signals and a common electrode voltage signal is greater than or equal to a set threshold; If it is determined that the voltage difference is less than the set threshold, the common electrode voltage signal is controlled to be output to the row driving area of the array substrate, and the source driving signal is synchronously controlled to be output to the driving chip; Whether the voltage difference between the maximum voltage of the plurality of source driving signals and the common electrode voltage signal is greater than or equal to a set threshold value includes: If it is determined that the voltage difference is greater than or equal to the set threshold, then after a delay of a set period of time, the voltage difference between the delayed common electrode voltage signal and the maximum voltage is recalculated, and it is determined whether the voltage difference is greater than or equal to the set threshold until it is determined that the voltage difference is less than the set threshold.
6. The display control method according to claim 5, characterized in that: The determining whether the voltage difference between the maximum voltage of the plurality of source driving signals and the common electrode voltage signal is greater than or equal to a set threshold comprises: When the display device is in a powered-on state and the voltage of at least one of the source driving signals reaches a set voltage, controlling the comparison delay module to be in an activated state so that the comparison delay module determines whether the voltage difference is greater than or equal to the set threshold; wherein the set voltage is the voltage of the source driving signal corresponding to a black screen; and / or, When the display device is in working state, the comparison delay module is controlled to be in closed state.
7. The display control method according to claim 6, characterized in that: The display control method includes: Determining the state of the display device by detecting the voltage state of the common electrode voltage signal; in, If a rising edge of the common electrode voltage signal is detected, determining that the display device is in the power-on state; and / or, If it is detected that the common electrode voltage signal is a constant voltage, it is determined that the display device is in the working state.
8. A display device, characterized in that: The display device includes a memory and a processor, the memory stores a computer program, and the processor implements the display control method according to any one of claims 5 to 7 when executing the computer program.
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