Use of MIMO in memory controller

Abstract

The invention relates to the use of MIMO in a memory controller and a memory controller and a memory device configured to communicate with each other using multiple-input multiple-output (MIMO) technology. The memory controller includes a precoder that precodes data for transmission. The precoding is based on channel state information, a neural network, or both. The memory device receives the pre-coded data and decodes the pre-coded data to retrieve raw data. In some cases, the precoder uses the channel state information to optimize a precoding matrix for a given channel condition. In some cases, a neural network is trained to predict an optimal precoding matrix for a current channel state. The data is then encoded using the precoding matrix, and then the data is transmitted to the memory device. The use of MIMO and precoding improves the reliability and efficiency of communication between the memory controller and memory devices.

Description

Technical Field

[0001] The present disclosure relates to the use of MIMO in a memory controller. Background Art

[0002] Multiple-input multiple-output (MIMO) communication is a technology used in wireless communication systems that employs multiple antennas at both the transmitter and the receiver to improve data throughput and signal quality. In a MIMO system, the transmitter sends multiple data streams through multiple antennas, which are then received by multiple antennas at the receiver. By using signal processing techniques, MIMO systems can achieve higher data rates and improved reliability compared to single-antenna systems. MIMO technology has been widely used in wireless communication standards such as Wi-Fi, LTE, and 5G. This technology has led to significant advances in wireless communication systems and has become an important research topic in the field of wireless communications.

[0003] In computer systems, memory devices (e.g., non-volatile or volatile) are often used to store and retrieve data. These memory devices typically communicate with a memory controller, which manages the flow of data between the memory devices and other components of the system. Communication between the memory devices and the memory controller is facilitated by one or more buses that provide communication paths for transmitting data and control signals. The memory controller is responsible for coordinating the transfer of data to and from the memory devices, as well as managing various aspects of the operation of the memory devices, such as addressing and refresh cycles. Efficient communication between the memory devices and the memory controller can be important for reliable and rapid access to data, especially in high-performance computing environments. Summary of the invention

[0004] In one aspect, the present disclosure relates to a system comprising: a memory controller circuit configured to transmit first data based on a multiple-input multiple-output (MIMO) protocol; and a memory device configured to receive the first data based on the MIMO protocol and configured to transmit second data to the memory controller circuit at least partially based on the MIMO protocol.

[0005] On the other hand, the present disclosure relates to a memory controller circuit, comprising: a precoder circuit, which is configured to precode first data based on a precoding matrix determined according to channel state information (CSI) and is configured to provide the precoded first data; and a transmitter circuit, which includes multiple antennas, the transmitter circuit is configured to receive the first data from the precoder circuit, and is configured to use the precoding matrix to transmit the first data using the multiple antennas based on a multiple-input multiple-output (MIMO) protocol.

[0006] In a further aspect, the present disclosure is directed to a memory controller circuit comprising: a precoder circuit configured to precode first data based at least in part on a precoding matrix determined from a neural network, and further configured to provide the precoded first data; and a transmitter circuit comprising a plurality of antennas, the transmitter circuit configured to receive the first data from the precoder circuit, and further configured to transmit the first data using the plurality of antennas based at least in part on a multiple-input multiple-output (MIMO) protocol using the precoding matrix. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram of a communication system arranged according to examples described herein.

[0008] Figure 2 is a block diagram of another communication system arranged according to the examples described herein.

[0009] Figure 3 is a block diagram of a memory controller arranged according to examples described herein.

[0010] Figure 4 is a block diagram of a processing unit arranged in a computing system according to examples described herein.

[0011] Figure 5 is a flow chart of a method arranged according to examples described herein.

[0012] Figure 6 is a flow chart of another method arranged according to the examples described herein.

[0013] Figure 7 is a flow chart of another method arranged according to the examples described herein. DETAILED DESCRIPTION

[0014] Certain details are set forth below to provide a full understanding of the embodiments of the present disclosure. However, it will be clear to those skilled in the art that the embodiments of the present disclosure may be practiced without various knowledge of these specific details. In some examples, well-known wireless communication components, circuits, control signals, timing protocols, computing system components, and software operations are not shown in detail in order to avoid unnecessarily obscuring the described embodiments of the present disclosure.

[0015] Examples described herein include the use of multiple-input multiple-output (MIMO) communications between a memory controller and a memory device. The memory device may include volatile memory, non-volatile memory, or both. Current solutions for communication between a memory controller and a memory device include a physical interface, such as a bus, for transmitting data between the memory controller and the memory device. However, MIMO has various advantages and features that may be useful when implemented in communications between a memory controller and a memory device. For example, MIMO may provide higher communication data rates, increased overall data throughput, improved communication reliability through the use of redundancy in the form of multiple channels, reduced power consumption due to power distribution across multiple antennas or multiple channels, and increased communication range between a memory controller and a memory device without signal degradation.

[0016] Prior to MIMO transmission, a precoder at a transmitting device may estimate a channel response to generate a precoder matrix that describes how the channel affects the transmitted signal (taking into account various factors such as attenuation, noise, and interference). The precoder matrix may be applied to the MIMO transmission so that the receiver device receives the original transmission (with some noise or interference). In some embodiments of the present disclosure, the precoder may utilize a pilot signal and received channel state information (CSI) to determine the precoder matrix or may utilize a neural network to determine the precoder matrix.

[0017] Figure 1 1 is a block diagram of a communication system 100 arranged according to the examples described herein. The communication system 100 includes a memory controller 105 including a transceiver 115 and a memory device 110 including a transceiver 120. In some cases, the transceiver 115 may be a transmitter, a receiver, or both. In some cases, the transceiver 120 may be a transmitter, a receiver, or both. The transceiver 115, the transceiver 120, or both may include one or more antennas 125 and 130, respectively. The transceiver 115, the transceiver 120, or both may be implemented on a reconfigurable fabric and may include one or more processing units and control instructions. The control instructions may be stored, for example, as encoded executable instructions on a non-transitory computer-readable medium (not shown), which, when executed by a processor (e.g., a reconfigurable fabric) (not shown), is configured to cause the transceiver 115, the transceiver 120, or both to perform certain operations described herein. In some examples, memory controller 105 and memory device 110 may be located on the same device (e.g., co-located), or may be located on different devices (e.g., user equipment, base station). In some examples, memory controller 105 may include one or more processing units 111. Figure 4The processing unit 111 is described in further detail in . Additionally or alternatively, an electronic device including the memory controller 105 may include one or more processing units 111 that are external to the memory controller 105 .

[0018] The electronic devices described herein (eg Figure 1 The memory controller 105 and / or memory device 110 shown in ) may generally be implemented using any electronic device that desires wireless communication capabilities. For example, the memory controller 105 and / or memory device 110 may be implemented using a mobile phone, a smart watch (or other wearable device), a computer (e.g., a server, a laptop, a tablet computer, a desktop computer), or a radio. In some examples, the memory controller 105 and / or memory device 110 may be incorporated into and / or communicate with other devices that desire communication capabilities, including devices associated with the Internet of Things (IoT), such as, but not limited to, cars, airplanes, helicopters, appliances, tags, cameras, or other devices. Although Figure 1 , but in some examples, memory controller 105 and / or memory device 110 may include any of a variety of components, including but not limited to memory, input / output devices, circuit systems, processing units (e.g., processing elements and / or processors), or combinations thereof.

[0019] Transceiver 115, transceiver 120, or both may each include multiple antennas. For example, transceiver 115, transceiver 120, or both may each have more than two antennas. Generally, any number of antennas may be used, including 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 32, 64, or 96 antennas, although other numbers of antennas may be used. In other examples, other numbers of antennas may be used. In some examples, transceiver 115, transceiver 120, or both may have the same number of antennas. In other examples, transceiver 115, transceiver 120, or both may have different numbers of antennas, such as Figure 1 In general, the systems described herein may comprise MIMO systems.

[0020] A MIMO system generally refers to a system that includes one or more electronic devices that transmit transmissions using multiple antennas and one or more electronic devices that receive transmissions using multiple antennas. In some examples, the electronic devices may both transmit and receive transmissions using multiple antennas. Some example systems described herein may be "massive MIMO" systems. Generally, a massive MIMO system refers to a system that employs greater than a certain number (e.g., 96) of antennas to transmit and / or receive transmissions. As the number of antennas increases, the complexity involved in accurately transmitting and / or receiving transmissions generally also increases. Although Figure 1Two electronic devices (eg, memory controller 105 and / or memory device 110) are shown in FIG. 1 , but in general system 100 may include any number of electronic devices.

[0021] MIMO may have various advantages and features that may be useful when implemented in communications between a memory controller and a memory device. For example, MIMO may provide higher communication data rates. By using multiple antennas or multiple channels, MIMO may increase total data throughput. Devices using MIMO communications may utilize spatial multiplexing, which involves using multiple antennas at both the transmitter and the receiver to simultaneously transmit multiple independent data streams within the same frequency band. In other examples, MIMO may provide improved communication reliability by using redundancy in the form of multiple channels. If one channel experiences interference or signal loss, data may still be transmitted and received through other channels. In some other examples, MIMO may provide lower power consumption due to power distribution across multiple antennas or multiple channels. In some other examples, MIMO may provide an increased communication range between a memory controller and a memory device without signal degradation.

[0022] Devices (e.g., memory controller 105 and / or memory device 110) that use MIMO communications utilizing multiple antennas 125 or 130 may utilize precoding to transform data to be transmitted so that it is optimized for transmission over a MIMO channel. This may be accomplished by applying a matrix operation to the data prior to transmission, which may map the data onto the MIMO channel in a manner that reduces interference and increases the signal-to-noise ratio (SNR).

[0023] One or more equations may be used to model MIMO communication between memory controller 105 and memory device 110. In some examples, the following equation may represent a received signal based on a transmitted signal:

[0024] Y=HX+n Equation 1

[0025] in:

[0026]

[0027] In Equation 1, X may represent data transmitted by antenna 125, Y may represent received data by antenna 130, n may represent noise or interference, and H may represent a channel response, which describes how the channel affects the transmitted signal (taking into account various factors, such as attenuation, noise, and interference). More specifically, H may describe how the channel affects the transmitted signal by introducing attenuation and phase shifts at different frequencies. The channel response H may be a complex-valued matrix that takes into account both the magnitude and phase of the signal. H may be estimated using various techniques, such as channel sounding, pilot signals, training sequences, or a combination thereof. The number of columns in H depends on N rOr the number of antennas at the receiving side of the transmission. The number of rows in H depends on N t Or the number of antennas at the transmit side of the transmission.

[0028] In some cases, Equation 1 may take the following form:

[0029] Y = HPX + n Equation 3 In such cases, if P is equal to the inverse of H, then Y = X + n. Precoding involves multiplying the transmitted signal X by a matrix called a precoding matrix (e.g., P) before transmitting the transmitted signal X through the transmit antennas (e.g., 125 or 130). The precoding matrix can be designed to improve system performance by considering the channel response matrix and system requirements. One way to design the precoding matrix is ​​to use a linear precoding scheme, where the precoding matrix is ​​selected to reduce interference caused by the channel response. In some cases, in linear precoding, the precoding matrix can be calculated by taking the inverse of the channel response matrix, P = H -1 , which can be used to pre-compensate the transmitted signal to account for the effects of the channel so that the received signal can be more accurately detected and decoded by the receiver. In some examples, a non-linear precoding scheme may additionally or alternatively be used.

[0030] Figure 2 2 is a block diagram of a communication system 200 using MIMO communication operating according to the examples described herein. The communication system 200 may include a modulation circuit 205 coupled to a linear precoder 210. The linear precoder 210 may receive channel state information (CSI) 215 (e.g., at a transmitter (e.g., CSIT)). The linear precoder 210 may be coupled to one or more antennas 220, which may be configured to transmit a signal 225 to an antenna 230. The antenna 230 may be coupled to a detection and decoding component 235. The detection and decoding component 235 may be configured to provide an output 240. In some examples, the device 201 may be a memory controller and the device 202 may be a memory device, or vice versa. In some examples, the device including the linear precoder 210 may include a transmitter coupled to the antenna 220, and the device including the detection and decoding component 235 may include a receiver coupled to the antenna 230.

[0031] Modulation circuitry 205 may convert received information into a format suitable for transmission over a communication channel (e.g., signal 225). This may involve encoding the information into a carrier signal that can be transmitted over the channel. Depending on the requirements of communication system 200, modulation circuitry 205 may use different modulation schemes, such as amplitude modulation, frequency modulation, phase modulation, or a combination thereof. In some cases, modulation circuitry 205 may include error correction coding to improve the reliability of the transmitted information. Modulation circuitry 205 may provide the converted information to linear precoder 210.

[0032] The linear precoder 210 may use CSI (e.g., CSIT) to determine an optimal precoding matrix to transform the data (e.g., from the modulation circuit 205) prior to transmission. The CSI may provide information about the channel response between the transmitter and the receiver, and may be obtained by transmitting a pilot signal from the transmitter and measuring the received pilot signal at the receiver.

[0033] The pilot signal may be used to estimate CSI between a transmitter and a receiver (e.g., between a device including the linear precoder 210 and a device including the detection and decoding circuit 235). The pilot signal may be transmitted by the transmitter to the receiver over the MIMO channel. The receiver may use the received pilot signal to estimate the channel response between the transmitter and the receiver (e.g., H from Equation 1). Once the channel response is estimated, the receiver may transmit the estimated CSI back to the transmitter, which may then use the estimated CSI to calculate the precoding matrix (e.g., P=H -1 ) (e.g., at linear precoder 210). Depending on the MIMO system and application, the pilot signal may be transmitted in different ways. For example, in a time division duplex (TDD) MIMO system, the pilot signal may be transmitted in the uplink direction during a dedicated time slot, while in a frequency division duplex (FDD) MIMO system, the pilot signal may be transmitted in a separate frequency band. The transmission of the pilot signal from the transmitter to the receiver may be performed using a channel separate from the data channel (e.g., signal 225 may be transmitted via the data channel). The pilot signal may be transmitted at a lower power level than the power level of the data signal to reduce interference and improve CSI estimation accuracy.

[0034] Once the transmitter / linear precoder 210 determines the CSI, the linear precoder 210 can calculate a matrix that transforms the data to be transmitted so that the resulting signal can be accurately received at the receiver. The precoding matrix can be calculated by taking the inverse of the channel matrix, P = H -1 Alternative methods for channel estimation at linear precoder 210 may be used, such as neural network based methods (eg, offline training). Antenna 220 may be based on transformed data transmission signal 225. In some examples, a non-linear precoding scheme may additionally or alternatively be used.

[0035] In some embodiments, the precoder 210 may utilize a neural network to determine the channel response between the transmitter and the receiver in a MIMO scenario. The neural network may include multiple layers (including an input layer, a hidden layer, and an output layer) and one or more sets of weights and activation functions.

[0036] To implement a neural network-based precoder, one or more data sets may be generated by simulating a MIMO channel (e.g., simulating channel conditions) under various conditions (e.g., different antenna configurations, signal-to-noise ratios (SNRs), and channel models). Depending on the application, the data set includes a range of input data types, such as images, audio, or other types of data.

[0037] To generate a large data set, analytical methods, empirical methods, or both may be used. For example, a Kronecker model may assume that the channel response can be represented as the Kronecker product of two smaller matrices representing the spatial and temporal components of the channel. The Kronecker model may be used to generate a large data set of channel responses by randomly changing the statistical properties of the spatial and temporal components, such as power delay profiles, spatial correlation matrices, and antenna geometry. Other example methods may include simulating MIMO channels using ray tracing or other simulation techniques. Ray tracing is a popular method for simulating the propagation of electromagnetic waves in complex environments, such as urban or indoor environments. The simulation involves tracking the path of electromagnetic waves as they interact with the environment, including reflection, diffraction, and scattering. The resulting channel responses may be used to generate a large data set of channel responses by changing environmental conditions, such as the location of the transmitter and receiver, the presence of obstacles, the operating frequency, or a combination thereof.

[0038] During the training phase, a neural network is trained using a large data set to generate (e.g., optimize) weights of the neural network, thereby enabling the neural network to learn complex nonlinear relationships between input data and channel responses. The generation of weights can be an iterative process, where the weights of the neurons in each layer can be generated to reduce the difference between the predicted output and the desired output.

[0039] During operation, input data is fed into a trained neural network, which computes a predicted output based on learned weights and activation functions. The predicted output may be a channel response (or inverse), which is used to generate a precoding matrix based on a set of criteria (e.g., increasing the SNR at the receiver).

[0040] The use of a neural network for channel estimation in a precoder has one or more advantages over the pilot signal and CSI approach. For example, a neural network can determine relationships in the channel response, which can lead to more accurate channel estimates. In addition, the use of a neural network reduces or eliminates the need to transmit pilot signals and CSI, which can simplify the implementation of MIMO systems. In some cases, neural network training can be performed offline.

[0041] Device 202 may receive transmitted signal 225 and may decode signal 225 at detection and decoding circuit 235. In some cases, device 202 may calculate a decoding matrix at detection and decoding circuit 235. Device 202 may use the decoding matrix to decode the received signal to recover the transmitted data. Device 202 may provide output 240 based on the transmitted data.

[0042] Figure 3 3 is a block diagram of a memory controller 300 according to various examples of the present disclosure. The memory controller 300 may include an error correction circuit system 305, a precoder 310, a controller 315, a physical layer (PHY) portion 317, and a memory 320. The memory 320 may be a non-volatile or volatile memory. The error correction circuit system 305 may be coupled to the precoder 310, and the precoder 310 may be coupled to the controller 315. The controller 315 and the PHY portion 317 may be referred to as a back end, and may be coupled to the memory 320, which may include one or more memory dies.

[0043] In some embodiments, the error correction circuit system 305 may implement low power chip delete (LPCK) error correction. The term "chip delete" as used herein refers to a form of error correction that protects the memory system from single memory chip failures and multi-bit errors from any portion of a single memory chip. A method for chip delete protection may be a run-time correction implementation that may form a number of codewords from four (4) bit symbols from each of a plurality of dies (e.g., memory chips). For example, if there are eleven (11) dies, each die contains four single bit symbols, and each bit symbol contains four bits, then the eleven dies may form four codewords, each codeword having eleven single bit symbols, each codeword including a total of forty-four (44) bits. The LPCK encoder 325 may add additional redundant bits to the received data to guard against single chip failures and multi-bit errors. When reading data from the memory 320, the LPCK decoder 330 may use the redundant bits added by the LPCK encoder 325 to detect and correct any errors that may have occurred during data transmission or storage. If the decoder detects an error, it can use the redundant bits to identify the location of the error and correct the error.

[0044] In addition to the redundant bits that have been added by the LPCK encoder 325, the LPCK encoder 325 may also provide the encoded bits to the ECC encoder 335 to add additional redundant bits to the data stored in the memory 320. In addition to the bits provided by the LPCK encoder 325, the ECC encoder may also provide an additional layer of error correction to the data. The ECC code used by the ECC encoder may include a Hamming code, a Reed-Solomon code, a Bose-Chaudhuri-Hocquenghem (BCH) code, or a combination thereof. Thus, the ECC decoder 340 may use the redundant bits added by the ECC encoder 335 to detect and correct any errors that may have occurred during data transmission or storage (e.g., storage in the memory 320).

[0045] Precoder 310 may be configured to precode data received from error correction module 305 before transmitting the data to controller 315. Controller 315 and PHY portion 317 may be referred to as a back end. Precoder 310 may utilize information such as Figure 2 310 may provide the precoded data to a backend (e.g., controller 315, PHY portion 317) for transmission to memory 320 (e.g., by a receiver (not shown)) via MIMO transmission via a transmitter (not shown) on memory controller 300. The transmitter may be connected to the memory controller 300 via a MIMO transmission. Figure 1 The transceiver 115 (or Figure 2 ) and the receiver may be similar to the transceiver 120 (or Figure 2 The memory controller 300 (and associated precoder 310) may use the Figure 2 One or more techniques and associated linear precoder 210 (including methods using pilot signals, CSI and / or neural networks) to determine the precoding matrix for transmission.

[0046] Figure 44 is a block diagram of a processing unit 405 arranged in a computing system 400 according to examples described herein. In some examples, one or more processing units 111 may include processing unit 405. In some other examples, processing unit 405 or other processing units 111 may be located elsewhere, such as outside memory controller 105. In some examples, memory device 110 may include memory 402. In some other examples, memory 402 may be a separate memory module, such as a cache. Processing unit 405 may receive input data (e.g., X(i,j)) 410a-c from the computing system. In some examples, input data 410a-c may be input data, such as data received from a sensor or data stored in memory 402. For example, the data stored in memory 402 may be output data generated by one or more processing units implementing another processing stage. The processing unit 405 may include multiplication units / accumulation units 412a-c, 416a-c and memory lookup units 414a-c, 418a-c, which when mixed with the weight data retrieved from the memory 402 may generate output data (e.g., B(u,v)) 420a-c. In some examples, the output data 420a-c may be used as input data for another processing stage or output data to be transmitted via an antenna.

[0047] When one or more processing units 405 are implemented, a computer-readable medium at an electronic device including the processing unit 405 may execute corresponding control instructions to perform operations through executable instructions within the processing unit 405. For example, the control instructions provide instructions to the processing unit 405, which, when executed, cause the processing unit 405 to configure the multiplication units 412a-c to multiply the input data 410a-c with the weight data and configure the accumulation units 416a-c to accumulate the processing results to generate the output data 420a-c.

[0048] The multiplication unit / accumulation unit 412a to c, 416a to c multiplies two operands from the input data 410a to c to produce a multiplication processing result, which is accumulated by the accumulation unit portion of the multiplication unit / accumulation unit 412a to c, 416a to c. The multiplication unit / accumulation unit 412a to c, 416a to c adds the multiplication processing result to update the processing result stored in the accumulation unit portion, thereby accumulating the multiplication processing result. For example, the multiplication unit / accumulation unit 412a to c, 416a to c can perform a multiplication-accumulation operation so that two operands M and N are multiplied and then added to P to produce a new version of P, which is stored in its corresponding multiplication unit / accumulation unit. The memory lookup unit 414a to c, 418a to c retrieves weight data stored in the memory 402. For example, the memory lookup unit can be a lookup table for retrieving a specific weight. The output of the memory lookup units 414a-c, 418a-c is provided to the multiplication units / accumulation units 412a-c, 416a-c, where it can be used as a multiplication operand in the multiplication unit portion of the multiplication units / accumulation units 412a-c, 416a-c. Using this circuit system arrangement, output data (e.g., B(u,v)) 420a-c can be generated from input data (e.g., X(i,j)) 410a-c.

[0049] In some examples, for example, weight data from memory 402 may be mixed with input data X(i, j) 410a to c to generate output data B(u, v) 420a to c. The relationship between the weight data based on the input data X(i, j) 410a to c and the output data B(u, v) 420a to c may be expressed as:

[0050]

[0052] in 414a to c, 418a to c. As described above, the memory lookup units 414a to c, 418a to c retrieve weights to mix with the input data. Therefore, the input data can be manipulated by using a set of weights associated with the desired wireless protocol stored in the memory using the multiplication / accumulation units to provide output data. The resulting mapped data can be manipulated by additional multiplication / accumulation units using several sets of additional weights associated with the desired wireless protocol stored in the memory. The several sets of weights multiplied at each stage of the processing unit 405 can represent or provide an estimate of the processing of the input data in specially designed hardware (e.g., FPGA).

[0053] Furthermore, it can be shown that, as represented by Equation 4, in some instances, system 400 can approximate

[0054] ”'

[0055] Any nonlinear mapping and the mapping of system 400 is determined by weights a k,l 、a m,n For example, if this weight data is specified, any mapping and processing between input data X(i,j) 410a to c and output data B(u,v) 420a to c can be implemented by system 400. This relationship as derived from the circuit arrangement depicted in system 400 can be used to train entities of computing system 400 to generate weight data. For example, using Equation 4, entities of computing system 400 can compare input data with output data to generate weight data.

[0056] In an example of system 400, processing unit 405 mixes weight data with input data X(i,j)410a to c using memory lookup units 414a to c, 418a to c. In some examples, memory lookup units 414a to c, 418a to c may be referred to as lookup table units. Weight data may be associated with a mapping relationship between input data X(i,j)410a to c and output data B(u,v)420a to c. For example, weight data may represent a nonlinear mapping of input data X(i,j)410a to c and output data B(u,v)420a to c. In some examples, the nonlinear mapping of weight data may represent a Gaussian function, a piecewise linear function, a sigmoid function, a thin plate spline function, a complex quadratic function, a cubic approximation, an inverse complex quadratic function, or a combination thereof. In some examples, some or all of memory lookup units 414a to c, 418a to c may be deactivated. For example, one or more of the memory lookup units 414a-c, 418a-c may operate as gain units with unity gain. In this case, instructions may be executed to facilitate selecting a unity gain processing mode for some or all of the memory lookup units 414a-c, 418a-c.

[0057] Each of the multiplication units / accumulation units 412a to c, 416a to c may include multiple multipliers, multiple accumulation units, and / or multiple adders. Any of the multiplication units / accumulation units 412a to c, 416a to c may be implemented using an ALU. In some examples, any of the multiplication units / accumulation units 412a to c, 416a to c may include one multiplier and one adder that each perform multiple multiplications and multiple additions, respectively. The input-output relationship of the multiplication / accumulation units 412a to c, 416a to c may be represented as:

[0058]

[0059] where “I” represents the number of multiplications performed in that unit, and C i represents a weight accessible from a memory (eg, memory 402), and B in (i) represents a factor from the input data X(i,j) 410a-c or from the output of the multiplication unit / accumulation unit 412a-c, 416a-c. In this example, the output B of a group of multiplication units / accumulation units out Equal to weight data C i Multiply by the output B of another set of multiplication unit / accumulation unit in The sum of (i). in (i) It is also possible to make the output B of a set of multiplication units / accumulation units out Equal to weight data C i Multiply the sum of the input data.

[0060] Figure 5 is a flow chart of a method 500 according to examples described herein. Example method 500 may use, for example, Figure 1 The communication system 100, Figure 2 The communication system 200, Figure 3 The memory controller 300 described herein Figures 1 to 3 The operations described in blocks 502-506 may also be stored as control instructions in a computer-readable medium at the memory controller 105 or the memory device 110. In some examples, the method 500 may be implemented in a non-transitory computer-readable medium including instructions executable to cause a wireless communication device to perform one or more of the operations of the method 500.

[0061] Method 500 may include, at 502, transmitting, at a memory controller, first data based on a MIMO protocol. In some examples, the memory controller may include Figure 1 The memory controller 105, Figure 2 Device 201, Figure 3 300 or any combination thereof. In some examples, the method 500 may include transmitting, by the memory controller, a pilot signal to the memory device, receiving CSI from the memory device based at least in part on the pilot signal, and determining a precoding matrix based at least in part on the CSI. In some examples, the memory device may include Figure 1 The memory device 110 and / or Figure 2 The precoding matrix may be provided by a precoder (eg Figure 2 The linear precoder 210 and / or Figure 3The CSI is determined by the precoder 310 of the memory controller circuit. In some examples, the CSI includes information associated with one or more channels between the memory controller circuit and the memory device. The precoding matrix can be designed to improve system performance by considering the channel response matrix and system requirements. One way to design the precoding matrix is ​​to use a linear precoding scheme, in which the precoding matrix is ​​selected to reduce interference caused by the channel response. In some cases, in linear precoding, the precoding matrix can be calculated by taking the inverse of the channel response matrix, P = H -1 , which can be used to pre-compensate the transmitted signal to account for the effects of the channel so that the received signal can be more accurately detected and decoded by the receiver.

[0062] In some examples, method 500 may include applying a precoding matrix to the first data, and transmitting the precoded first data. Precoding may involve multiplying the first data by the precoding matrix before transmitting the first data. In some examples, the precoding matrix is ​​the inverse of a matrix representing a channel response of one or more channels between the memory controller circuit and the memory device. In some examples, method 500 may include determining the precoding matrix using a neural network. In some instances, the neural network may be generated by a processing unit (e.g., Figure 4 In some examples, the method 500 may include applying a precoding matrix to the first data and transmitting the precoded first data. In some examples, the neural network is trained based on one or more data sets representing channel conditions of one or more channels between the memory controller circuit and the memory device.

[0063] The method 500 may include, at 504, receiving, at the memory device, first data based on a MIMO protocol. In some examples, the method 500 may include storing the first data in a plurality of memory cells of the memory device after receiving the first data.

[0064] The method 500 may include, at 506, transmitting, at the memory device, second data based on the MIMO protocol.

[0065] Steps 502, 504, and 506 of method 500 are used for illustrative purposes. In some examples, steps 502, 504, and 506 may be performed in a different order. In some other examples, individual steps 502, 504, and 506 may be omitted. In still other examples, individual steps 502, 504, and 506 may be split into additional steps, supplemented with other steps, or combined together into fewer steps. Other variations of these particular steps are contemplated, including changes in the order of the steps, changes in the content of the steps that are split or combined into other steps, etc.

[0066] Figure 6is a flow chart of a method 600 according to examples described herein. Example method 600 may use, for example, Figure 1 The communication system 100, Figure 2 The communication system 200, Figure 3 The memory controller 300 described herein Figures 1 to 3 The operations described in blocks 602-606 may also be stored as control instructions in a computer-readable medium at the memory controller 105 or the memory device 110. In some examples, the method 600 may be implemented in a non-transitory computer-readable medium including instructions executable to cause a wireless communication device to perform one or more of the operations of the method 600.

[0067] The method 600 may include, at 602, determining, at a precoder circuit, a precoder matrix based on the CSI. The precoder circuit may include Figure 2 The linear precoder 210 and / or Figure 3 The precoder 310 of FIG. 4 is a precoder of FIG. 4 . The precoding matrix can be designed to improve system performance by taking into account the channel response matrix and system requirements. One way to design the precoding matrix is ​​to use a linear precoding scheme, where the precoding matrix is ​​selected to reduce the interference caused by the channel response. In some cases, in linear precoding, the precoding matrix can be calculated by taking the inverse of the channel response matrix, P = H -1 , which can be used to pre-compensate the transmitted signal to account for the effects of the channel so that the received signal can be more accurately detected and decoded by the receiver. In some examples, method 600 may include generating an output stream having one or more redundant bits to provide the first data to a precoder circuit. In some examples, the CSI includes information associated with one or more channels between the memory controller circuit and the memory device. In some examples, the precoding matrix is ​​the inverse of a matrix representing a channel response of the memory controller circuit to the one or more channels between the memory device.

[0068] The method 600 may include, at 604, precoding the first data based on the precoder matrix at the precoder circuit. In some examples, the method 600 may include applying the precoding matrix to the first data. For example, the precoding may involve multiplying the first data by the precoding matrix before transmitting the first data.

[0069] The method 600 may include, at 606, using a precoder matrix to use multiple antennas (eg, Figure 1 Antenna 125 and / or Figure 2 antenna 220) to transmit the first data.

[0070] Steps 602, 604, and 606 of method 600 are used for illustrative purposes. In some examples, steps 602, 604, and 606 may be performed in a different order. In some other examples, individual steps 602, 604, and 606 may be omitted. In still other examples, individual steps 602, 604, and 606 may be split into additional steps, supplemented with other steps, or combined together into fewer steps. Other variations of these particular steps are contemplated, including changes in the order of the steps, changes in the content of the steps that are split or combined into other steps, etc.

[0071] Figure 7 is a flow chart of a method 700 according to examples described herein. Example method 700 may use, for example, Figure 1 The communication system 100, Figure 2 The communication system 200, Figure 3 The memory controller 300 described herein Figures 1 to 3 The operations described in blocks 702-706 may also be stored as control instructions in a computer-readable medium at the memory controller 105 or the memory device 110. In some examples, the method 700 may be implemented in a non-transitory computer-readable medium including instructions executable to cause a wireless communication device to perform one or more of the operations of the method 700.

[0072] The method 700 may include, at 702, determining a precoder matrix from a neural network. The precoder matrix may be obtained by a precoder (e.g. Figure 2 The linear precoder 210 and / or Figure 3 The precoding matrix can be designed to improve system performance by taking into account the channel response matrix and system requirements. One way to design the precoding matrix is ​​to use a linear precoding scheme, where the precoding matrix is ​​selected to reduce interference caused by the channel response. In some cases, in linear precoding, the precoding matrix can be calculated by taking the inverse of the channel response matrix, P = H -1 , which can be used to pre-compensate the transmitted signal to account for the effects of the channel so that the received signal can be more accurately detected and decoded by the receiver. In some examples, method 700 may include generating an output stream having one or more redundant bits to provide the first data to a precoder circuit. In some examples, the neural network is based on representing a memory controller circuit (e.g., Figure 1 The memory controller 105, Figure 2 Device 201, Figure 3 , or any combination thereof) and a memory device (e.g., Figure 1 The memory device 110 and / or Figure 2The device 202 may be trained using one or more data sets of channel conditions of one or more channels between the devices 202).

[0073] The method 700 may include, at 704, precoding the first data based on the precoder matrix. In some examples, the method 700 may include applying the precoding matrix to the first data. For example, the precoding may involve multiplying the first data by the precoding matrix before transmitting the first data.

[0074] The method 700 may include, at 706, using a precoder matrix to use multiple antennas (eg, Figure 1 Antenna 125 and / or Figure 2 antenna 220) to transmit the first data.

[0075] Steps 702, 704, and 706 of method 700 are used for illustrative purposes. In some examples, steps 702, 704, and 706 may be performed in a different order. In some other examples, individual steps 702, 704, and 706 may be omitted. In still other examples, individual steps 702, 704, and 706 may be split into additional steps, supplemented with other steps, or combined together into fewer steps. Other variations of these particular steps are contemplated, including changes in the order of the steps, changes in the content of the steps that are split or combined into other steps, etc.

[0076] Certain details are set forth above to provide a full understanding of the described examples. However, it will be apparent to those skilled in the art that the examples may be implemented without a variety of these specific details. The example configurations described herein in conjunction with the description of the accompanying drawings do not represent all examples that may be implemented or within the scope of the claims. The terms "exemplary" and "example" as used herein mean "used as an example, instance, or illustration," rather than "preferred" or "better than other examples." For the purpose of providing an understanding of the described techniques, the detailed description includes specific details. However, these techniques may be practiced without these specific details. In some examples, well-known structures and devices are shown in block diagram form in order to avoid confusing the concepts of the described examples.

[0077] The information and signals described herein may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltage, current, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0078] The techniques described herein may be used in various wireless communication systems, which may include multiple access cellular communication systems, and may employ code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal frequency division multiple access (OFDMA), or single carrier frequency division multiple access (SC-FDMA), or any combination of such techniques. Some of these techniques have been adopted in or are related to standardized wireless communication protocols by organizations such as the Third Generation Partnership Project (3GPP), the Third Generation Partnership Project 2 (3GPP2), and the IEEE. These wireless standards include Ultra Mobile Broadband (UMB), Universal Mobile Telecommunications System (UMTS), Long Term Evolution (LTE), Advanced LTE (LTE-A), LTE-A Pro, New Radio (NR), IEEE 802.11 (WiFi), and IEEE 802.16 (WiMAX), among others.

[0079] The term "5G" or "5G communication system" may refer to a system operating according to standardized protocols developed or discussed by their respective sponsoring organizations, such as LTE Release 13 or 14 or WiMAX 802.16e-2005. The features described herein may be employed in systems configured according to other generations of wireless communication systems, including systems configured according to the standards described above.

[0080] The various illustrative blocks and modules described in connection with the present disclosure may be implemented or performed using a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration).

[0081] The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions may be stored or transmitted as one or more instructions or codes on a computer-readable medium. Computer-readable media include both non-transitory computer storage media and communication media, and the communication media include any media that facilitates the transfer of computer programs from one place to another. Non-transitory storage media may be any available media that can be accessed by a general or special-purpose computer. By way of example and not limitation, non-transitory computer-readable media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), or optical disk storage devices, magnetic disk storage devices, or other magnetic storage devices, or may be used to carry or store desired program code components in the form of instructions or data structures and any other non-transitory media that can be accessed by a general or special-purpose computer or a general or special-purpose processor.

[0082] Moreover, any connection is properly referred to as a computer-readable medium. For example, if the software is transmitted from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared, radio and microwave), then the definition of medium includes coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared, radio and microwave). Combinations of the above are also included within the scope of computer-readable media.

[0083] Other examples and implementations are within the scope of the present disclosure and the appended claims. For example, due to the nature of software, the functions described above may be implemented using software executed by a processor, hardware, firmware, hardwiring, or any combination of these. Features that implement the functions may also be physically located at various locations, including being distributed so that portions of the functions are implemented at different physical locations.

[0084] Moreover, as used herein (including in the claims), "or" as used in a list of items (e.g., a list of items beginning with a phrase such as "at least one of..." or "one or more of...") indicates an inclusive list, so that a list of at least one of, for example, A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Moreover, as used herein, the phrase "based on" should not be interpreted as a reference to a closed set of conditions. For example, an exemplary step described as "based on condition A" may be based on both condition A and condition B without departing from the scope of the present disclosure. In other words, as used herein, the phrase "based on" should be interpreted in the same manner as the phrase "based at least in part on."

[0085] It will be apparent from the foregoing that, although specific examples are described herein for illustrative purposes, various modifications may be made while remaining within the scope of the claimed technology. The description herein is provided to enable a person skilled in the art to make or use the present disclosure. Various modifications to the present disclosure will be apparent to a person skilled in the art, and the general principles defined herein may be applied to other variations without departing from the scope of the present disclosure. Therefore, the present disclosure is not limited to the examples and designs described herein, but should conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A system comprising: a memory controller circuit configured to transmit first data based on a multiple-input multiple-output (MIMO) protocol; and A memory device is configured to receive the first data based on the MIMO protocol and is configured to transmit second data to the memory controller circuit based at least in part on the MIMO protocol.

2. The system of claim 1 , wherein the memory controller circuit is further configured to transmit a pilot signal to the memory device, receive channel state information (CSI) from the memory device based at least in part on the pilot signal, and determine a precoding matrix based at least in part on the CSI.

3. The system of claim 2, wherein the CSI includes information associated with one or more channels between the memory controller circuit and the memory device. 4 . The system of claim 2 , wherein the memory controller is further configured to apply the precoding matrix to the first data and transmit the precoded first data.

5. The system of claim 2, wherein the precoding matrix is ​​the inverse of a matrix representing a channel response of one or more channels between the memory controller circuit and the memory device.

6. The system of claim 1, wherein the memory controller is further configured to determine a precoding matrix using a neural network.

7. The system of claim 6, wherein the memory controller is further configured to apply the precoding matrix to the first data and transmit the precoded first data.

8. The system of claim 6, wherein the neural network is trained based on one or more data sets representing channel conditions of one or more channels between the memory controller circuit and the memory device.

9. The system of claim 1, wherein the memory device comprises a plurality of memory cells, and wherein the memory device is further configured to store the first data in the plurality of memory cells after receiving the first data.

10. The system of claim 1, wherein the memory controller and the memory device are located on the same device.

11. The system of claim 1, wherein the memory controller and the memory device are located on different devices.

12. A memory controller circuit comprising: a precoder circuit configured to precode the first data based on a precoding matrix determined according to channel state information CSI, and configured to provide precoded first data; and A transmitter circuit includes a plurality of antennas, the transmitter circuit being configured to receive the first data from the precoder circuit and being configured to transmit the first data using the plurality of antennas based on a multiple-input multiple-output (MIMO) protocol using the precoding matrix.

13. The memory controller circuit of claim 12, further comprising: An error correction circuit is coupled to the precoder circuit, wherein the error correction circuit is configured to generate an output stream having one or more redundant bits to provide the first data to the precoder circuit.

14. The memory controller circuit of claim 12, wherein the CSI includes information associated with one or more channels between the memory controller circuit and the memory device.

15. The memory controller circuit of claim 12, wherein the memory controller is further configured to apply the precoding matrix to the first data and transmit the precoded first data.

16. The memory controller circuit of claim 12, wherein the precoding matrix is ​​the inverse of a matrix representing a channel response of one or more channels between the memory controller circuit and the memory device.

17. A memory controller circuit comprising: a precoder circuit configured to precode the first data based at least in part on a precoding matrix determined from a neural network, and further configured to provide the precoded first data; and A transmitter circuit includes a plurality of antennas configured to receive the first data from the precoder circuit and further configured to transmit the first data using the plurality of antennas based at least in part on a multiple-input multiple-output (MIMO) protocol using the precoding matrix.

18. The memory controller circuit of claim 17, further comprising: An error correction circuit is coupled to the precoder circuit, wherein the error correction circuit is configured to generate an output stream having one or more redundant bits to provide the first data to the precoder circuit.

19. The memory controller circuit of claim 17, wherein the memory controller is further configured to apply the precoding matrix to the first data and transmit the precoded first data.

20. The memory controller circuit of claim 17, wherein the neural network is trained based on one or more data sets representing channel conditions of one or more channels between the memory controller circuit and the memory device.

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