A power management circuit with a wide operating voltage range
By combining a high-voltage startup circuit, a low-voltage reference generation circuit, a transimpedance amplifier, and a linear voltage regulator circuit, the problems of low reference voltage rejection ratio and high power consumption in traditional power management circuits over a wide operating voltage range are solved, achieving stable operation and cost savings.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG XINMAI TECH CO LTD
- Filing Date
- 2024-09-24
- Publication Date
- 2026-06-16
AI Technical Summary
Traditional motor drive and LED driver power management circuits suffer from low power rejection ratio, high power consumption, and complex structure over a wide operating voltage range, making it difficult to meet system requirements.
A simple circuit architecture is adopted, consisting of a high-voltage startup circuit, a low-voltage reference generation core circuit, a transimpedance amplifier, and a linear voltage regulator circuit. The startup current injected into the low-voltage core reference generation circuit through the high-voltage startup circuit forms a feedback system, thereby achieving stable operation.
It expands the application range of motor and LED driver chips, reduces system power consumption, and saves system costs.
Smart Images
Figure CN119126904B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power management integrated circuit technology, and in particular to a power management circuit with a wide operating voltage range. Background Technology
[0002] In recent years, power management circuits have become an important branch of analog integrated circuits, and power drive circuits are increasingly widely used. Chips for motor drives, LED drivers, and other applications face system requirements for wide operating voltage, high efficiency, and low cost. Traditional power management circuits for motor drives and LED drivers integrate reference voltage and reference current generation circuits into the driver chip to meet the system requirements of wide operating input voltages. However, this approach, which uses high-voltage bandgap reference generation circuits and closed-loop linear regulator generation circuits to meet the wide operating voltage requirements, suffers from problems such as low power supply rejection ratio, high power consumption, and complex structure. Summary of the Invention
[0003] This invention addresses the system requirements of motor and LED drivers, such as wide input voltage range, high power supply rejection ratio reference voltage and current, multiple reference voltage sources, and low-voltage linear regulated power supplies. It proposes a simple circuit architecture based on a high-voltage startup circuit, a low-voltage reference generation core circuit, a transimpedance amplifier, and a linear regulator circuit. This architecture fulfills the system requirements, greatly expands the application range of motor and LED driver chips, and reduces system power consumption and saves system costs.
[0004] To achieve the above objectives, the present invention provides the following technical solution:
[0005] This invention provides a power management circuit with a wide operating voltage range, comprising:
[0006] The high-voltage start-up circuit is used to generate a start-up signal for the low-voltage core reference generation circuit to begin operation.
[0007] A low-voltage core reference generation circuit is used to generate a reference voltage source and a reference current source with a high power supply rejection ratio; it includes a reference voltage branch.
[0008] The cross-group amplifier and linear regulator circuit are used to generate a cross-group amplifier and a linear regulated power supply. The cross-group amplifier constitutes the feedback control loop of the low-voltage core reference generation circuit to ensure the normal operation of the circuit.
[0009] When the high-voltage power supply is powered on, the high-voltage start-up circuit starts working. The current from the high-voltage start-up circuit flows into the low-voltage core reference generation circuit to complete the injection of start-up current. The input power of the low-voltage core reference generation circuit is a linearly regulated power supply generated by a cross-group amplifier and a linear voltage regulator circuit. The input current of the low-voltage core reference generation circuit comes from the output of the cross-group amplifier and the linear voltage regulator circuit. The voltage output of the low-voltage core reference generation circuit is sent to the cross-group amplifier and the linear voltage regulator circuit. Through the cross-group amplifier and the linear voltage regulator circuit, a feedback system is formed between the low-voltage core reference generation circuits to achieve stable operation of the system.
[0010] Furthermore, the high-voltage startup circuit includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a first resistor, and a second resistor. The first resistor is connected in series with the first PMOS transistor, the second PMOS transistor, the first NMOS transistor, and the second resistor in sequence. When the high-voltage power supply is powered on, this circuit branch generates a reference current source that changes very little with the power supply voltage.
[0011] Furthermore, the high-voltage startup circuit also includes a third PMOS transistor, a fourth PMOS transistor, a third resistor, a first transistor, a second transistor, and a third transistor; the first PMOS transistor / second PMOS transistor and the third PMOS transistor / fourth PMOS transistor form a current mirror; the drain of the fourth PMOS transistor is connected to the collector of the second transistor, the emitter of the second transistor is connected to the collector and base of the first transistor; the base of the emitter of the second transistor is connected to the base of the third transistor, and the collector of the third transistor is connected to the third resistor.
[0012] Furthermore, when the reference current source generates the base voltage of the third transistor through the first transistor and the second transistor, when the third transistor is turned on, the collector of the third transistor is connected to the first resistor terminal of the high voltage input through the third resistor, and the emitter input current of the third transistor flows into the low voltage core reference generation circuit to complete the injection of the start-up current.
[0013] Furthermore, the low-voltage core reference generation circuit includes a reference voltage branch, which includes a fourth transistor, a fifth transistor, a fourth resistor, and a fifth resistor. The fourth and fifth transistors generate a bandgap reference voltage. The base of the fourth transistor is connected to the emitter of the third transistor, the emitter of the fourth transistor is connected to one end of the fourth resistor, the base of the fifth transistor is connected to the base of the fourth transistor, the emitter of the fifth transistor is connected to the other end of the fourth resistor, and one end of the fifth resistor is connected to the emitter of the fifth transistor.
[0014] Furthermore, the low-voltage core reference generation circuit also includes a reference current mirror branch, which includes a fifth PMOS transistor, a sixth PMOS transistor, and a seventh PMOS transistor; the gates of the fifth PMOS transistor, the sixth PMOS transistor, and the seventh PMOS transistor are all connected to the collector of the fourth transistor, and the drain of the sixth PMOS transistor is connected to the collector of the fifth transistor.
[0015] Furthermore, the low-voltage core reference generation circuit also includes a resistor divider branch, which includes at least three sixth resistors. The sixth resistors are connected to the base of the fifth transistor, and a desired reference voltage source signal is generated between every two sixth resistors.
[0016] Furthermore, the transimpedance amplifier and linear regulator circuit include a transimpedance amplifier, which includes an eighth PMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor, an eleventh PMOS transistor, and a seventh resistor; the ninth PMOS transistor / tenth PMOS transistor / eleventh PMOS transistor form a current mirror to generate a high-voltage reference current source output, and the transimpedance amplifier generates a stable reference voltage signal at the gate of the third NMOS transistor / fourth NMOS transistor;
[0017] In this circuit, the gate of the eighth PMOS transistor serves as the input terminal of the transimpedance amplifier, and one end of the seventh resistor serves as the output terminal of the transimpedance amplifier.
[0018] Furthermore, the cross-group amplifier and linear regulator circuit also include a linear regulator branch, which includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, and a third capacitor; the sixth NMOS transistor, the seventh NMOS transistor, and the second NMOS transistor form a current mirror circuit, which generates a reference current signal through the seventh NMOS transistor.
[0019] The present invention has the following beneficial effects:
[0020] This invention is based on a simple circuit architecture consisting of a high-voltage startup circuit, a low-voltage reference generation core circuit, a transimpedance amplifier, and a linear regulator circuit. When the high-voltage power supply is powered on, the high-voltage startup circuit begins operation, and the current from the high-voltage startup circuit flows into the low-voltage reference generation circuit to inject startup current. The input power of the low-voltage reference generation circuit is a linearly regulated power supply generated by the transimpedance amplifier and the linear regulator circuit. The input current of the low-voltage reference generation circuit comes from the output of the transimpedance amplifier and the linear regulator circuit. The voltage output of the low-voltage reference generation circuit is fed to the transimpedance amplifier and the linear regulator circuit, forming a feedback system between the two circuits to achieve stable system operation. This invention fulfills system requirements, greatly expands the application range of motor and LED driver chips, meets the wide operating voltage requirements of motor and LED driver chips, and reduces system power consumption and saves system costs. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the structure of Example 1.
[0022] Figure 2 This is the overall circuit schematic diagram of the present invention.
[0023] Figure 3 This is the schematic diagram of the high-voltage starting circuit in Example 2.
[0024] Figure 4 This is the schematic diagram of the low-voltage core reference generation circuit in Example 3.
[0025] Figure 5 This is the schematic diagram of the cross-group amplifier and linear voltage regulator circuit in Example 4. Detailed Implementation
[0026] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments are only specific illustrations of the invention and should not be regarded as limitations on the invention. The purpose of the embodiments is to enable those skilled in the art to better understand and reproduce the technical solution of the present invention. The scope of protection of the present invention should still be determined by the scope defined in the claims. Example
[0027] like Figure 1-2 As shown, this embodiment provides a power management circuit with a wide operating voltage range, including:
[0028] High-voltage start-up circuit 1 is used to generate a start-up signal for the low-voltage core reference generation circuit to start working.
[0029] Low-voltage core reference generation circuit 2 is used to generate a reference voltage source and a reference current source with a high power supply rejection ratio; it includes a reference voltage branch;
[0030] The cross-group amplifier and linear regulator circuit 3 are used to generate a cross-group amplifier and a linear regulator. The cross-group amplifier constitutes the feedback control loop of the low-voltage core reference generation circuit to ensure the normal operation of the circuit.
[0031] When the high-voltage power supply is powered on, the high-voltage start-up circuit starts working. The current from the high-voltage start-up circuit flows into the low-voltage core reference generation circuit to complete the injection of start-up current. The input power of the low-voltage core reference generation circuit is a linearly regulated power supply generated by a cross-group amplifier and a linear voltage regulator circuit. The input current of the low-voltage core reference generation circuit comes from the output of the cross-group amplifier and the linear voltage regulator circuit. The voltage output of the low-voltage core reference generation circuit is sent to the cross-group amplifier and the linear voltage regulator circuit. Through the cross-group amplifier and the linear voltage regulator circuit, a feedback system is formed between the low-voltage core reference generation circuits to achieve stable operation of the system. Example
[0032] like Figure 3 As shown, this embodiment provides a high-voltage startup circuit 1. The high-voltage startup circuit includes a first PMOS transistor HP1, a second PMOS transistor HP2, a first NMOS transistor HN1, a first resistor HR1, and a second resistor R1. The first resistor HR1 is connected in series with the first PMOS transistor HP1, the second PMOS transistor HP2, the first NMOS transistor HN1, and the second resistor R1. At this time, the first NMOS transistor HN1 is in the on state. Specifically, one end of the second resistor R1 is connected to the high-voltage power supply, and the other end of the second resistor R1 is connected to the source of the first PMOS transistor HP1. The drain and gate of the first PMOS transistor HP1 are both connected to the source of the second PMOS transistor HP2. The drain and gate of the second PMOS transistor HP2 are both connected to the drain of the first NMOS transistor HN1. The source of the first NMOS transistor HN1 is connected to one end of the second resistor R1, and the other end of the second resistor R1 is grounded. The gate of the first NMOS transistor HN1 is also grounded. When the high-voltage power supply is powered on, this circuit branch generates a reference current source that changes very little with the power supply voltage.
[0033] The high-voltage start-up circuit also includes a third PMOS transistor HP3, a fourth PMOS transistor HP4, a third resistor HR2, a first transistor Q1, a second transistor Q2, and a third transistor Q3; the first PMOS transistor HP1 / the second PMOS transistor HP2 and the third PMOS transistor HP3 / the fourth PMOS transistor HP4 form a current mirror; specifically, the drain and gate of the first PMOS transistor HP1 are both connected to the gate of the third PMOS transistor HP3, and the drain and gate of the second PMOS transistor HP2 are both connected to the gate of the fourth PMOS transistor HP4. The drain of the third PMOS transistor HP3 is connected to the source of the fourth PMOS transistor HP4, and the source of the third PMOS transistor HP3 is connected to the first resistor HR1 at the high voltage input. The drain of the fourth PMOS transistor HP4 is connected to the collector of the second transistor Q2, and the emitter of the second transistor Q2 is connected to the collector and base of the first transistor Q1, and the emitter of the first transistor Q1 is grounded. The base of the emitter of the second transistor Q2 is connected to the base of the third transistor Q3, and the collector of the third transistor Q3 is connected to the third resistor HR2.
[0034] When the reference current source generates the base voltage of the third transistor Q3 through the first transistor Q1 and the second transistor Q2 connected to the third PMOS transistor HP3 and the fourth PMOS transistor HP4, the third transistor Q3 is turned on. The collector of the third transistor Q3 is connected to the first resistor HR1 of the high voltage input through the third resistor HR2. The emitter input current of the third transistor Q3 flows into the low voltage core reference generation circuit to complete the injection of the start-up current.
[0035] Among them, the first resistor HR1 is a current-limiting resistor, and the third resistor HR2 is a high-voltage current-limiting resistor.
[0036] When the reference voltage startup is complete, the emitter voltage of Q3 is higher than the base voltage, and the startup circuit branch current is shut off.
[0037] The first NMOS transistor, HN1, is a high-voltage depletion-type first NMOS transistor. Example
[0038] like Figure 4 As shown, this embodiment provides a low-voltage core reference generation circuit 2, which includes a reference voltage branch, a reference current mirror branch, and a resistor voltage divider branch.
[0039] The reference voltage branch includes a third transistor Q3, a fourth transistor Q4, a fourth resistor R2, and a fifth resistor R3. The third transistor Q3 and the fourth transistor Q4 generate a bandgap reference voltage. The base of the fourth transistor Q4 is connected to the emitter of the third transistor Q3, and the emitter of the fourth transistor Q4 is connected to one end of the fourth resistor R2. The base of the fifth transistor Q5 is connected to the base of the fourth transistor Q4, and the emitter of the fifth transistor Q5 is connected to the other end of the fourth resistor R2. One end of the fifth resistor R3 is connected to the emitter of the fifth transistor Q5, and the other end of the fifth resistor R3 is grounded. The base of the fifth transistor Q5 is also connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded.
[0040] The reference current mirror branch includes a fifth PMOS transistor M1, a sixth PMOS transistor M3, and a seventh PMOS transistor M2. The gates of the fifth PMOS transistor M1, the sixth PMOS transistor M3, and the seventh PMOS transistor M2 are all connected to the collector of the fourth transistor Q4. The drain of the sixth PMOS transistor M3 is connected to the collector of the fifth transistor Q5. The sources of the fifth PMOS transistor M1, the sixth PMOS transistor M3, and the seventh PMOS transistor M2 are all connected to the cross-group amplifier and the linear regulator circuit. The drain of the sixth PMOS transistor M3 is also connected to one end of the second capacitor C0, and the other end of the second capacitor C0 is grounded.
[0041] The resistor divider branch includes at least three sixth resistors, which are connected to the base of the fifth transistor Q5. A desired reference voltage source signal is generated between every two sixth resistors, such as... Figure 4 As shown, the sixth resistor has nine resistors: R4, R5, R6, R7, R8, R9, R10, and R11. The desired reference voltage source signals generated are VR1, VR2, VR3, VR4, VR5, VR6, VR7, and VR8, respectively. Example
[0042] like Figure 5 As shown, this embodiment provides a transimpedance amplifier and a linear regulator circuit 3, which includes a transimpedance amplifier and a linear regulator branch.
[0043] The transimpedance amplifier includes an eighth PMOS transistor M4, a second NMOS transistor M5, a third NMOS transistor NH2, a fourth NMOS transistor NH3, a ninth PMOS transistor HP7, a tenth PMOS transistor HP5, an eleventh PMOS transistor HP6, and a seventh resistor R0. The ninth PMOS transistor HP7, the tenth PMOS transistor HP5, and the eleventh PMOS transistor HP6 form a current mirror, generating a high-voltage reference current source output. The transimpedance amplifier generates a stable reference voltage signal at the gates of the third NMOS transistor NH2 and the fourth NMOS transistor NH3. Specifically, the gate of the eighth PMOS transistor M4 is connected to the drain of the sixth PMOS transistor M3, and the drain of the eighth PMOS transistor M4 is connected to the gate and drain of the second NMOS transistor M5. The source of the second NMOS transistor M5... Grounded; the source of the eighth PMOS transistor M4 is connected to the source of the third NMOS transistor NH2, the drain of the third NMOS transistor NH2 is connected to the drain of the tenth PMOS transistor HP5, and the drain and gate of the third NMOS transistor NH2 are also connected to the gate of the fourth NMOS transistor NH3; the source of the fourth NMOS transistor NH3 is connected to one end of the seventh resistor R0, the other end of the seventh resistor R0 is connected to the base of the fifth transistor Q5, and the drain of the fourth NMOS transistor NH3 is connected to the source of the ninth PMOS transistor HP7, the source of the tenth PMOS transistor HP5, and the source and drain of the eleventh PMOS transistor HP6; the sources of the ninth PMOS transistor HP7, the tenth PMOS transistor HP5, and the eleventh PMOS transistor HP6 are all connected to the first resistor HR1 of the high-voltage input;
[0044] The eighth PMOS transistor M4 and the second NMOS transistor M5 are low-voltage devices; the third NMOS transistor NH2, the fourth NMOS transistor NH3, the ninth PMOS transistor HP7, the tenth PMOS transistor HP5 and the eleventh PMOS transistor HP6 are high-voltage devices.
[0045] Among them, the gate of the eighth PMOS transistor M4 serves as the input terminal of the transimpedance amplifier, and one end of the seventh resistor R0 serves as the output terminal of the transimpedance amplifier.
[0046] The linear regulator branch includes the fifth NMOS transistor NH4, the sixth NMOS transistor M6, the seventh NMOS transistor M7, and the third capacitor C2. The sixth NMOS transistor M6, the seventh NMOS transistor NH7, and the second NMOS transistor M5 form a current mirror circuit. Specifically, the gate and drain of the second NMOS transistor M5 are connected to the gates of the sixth NMOS transistor M6 and the seventh NMOS transistor M7. The drain of the sixth NMOS transistor M6 is connected to the source of the fifth NMOS transistor NH4. The source of the sixth NMOS transistor M6 is grounded, and the source of the seventh NMOS transistor M7 is grounded. A reference current signal is generated through the drain of the seventh NMOS transistor M7.
[0047] The gate of the fifth NMOS transistor NH4 is connected to the gate of the third NMOS transistor NH2 / the fourth NMOS transistor NH3. The drain of the fifth NMOS transistor NH4 is connected to the first resistor HR1 of the high voltage input. The source of the fifth NMOS transistor NH4 is connected to the source of the fifth PMOS transistor M1. The source of the fifth NMOS transistor NH4 is also connected to one end of the third capacitor C2. The other end of the third capacitor C2 is grounded.
[0048] Among them, the sixth NMOS transistor M6 serves as the static load of the linear voltage regulator branch, and the third capacitor C2 is used for voltage regulation and filtering of the linear voltage regulator branch.
[0049] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.
[0050] It should be noted that any technical features not described in detail in this invention can be implemented using any existing technology.
Claims
1. A power management circuit with a wide operating voltage range, characterized in that, include: The high-voltage start-up circuit is used to generate a start-up signal for the low-voltage core reference generation circuit to begin operation. The low-voltage core reference generation circuit is used to generate a reference voltage source and a reference current source with a high power supply rejection ratio. Including the reference voltage branch; The transimpedance amplifier and linear regulator circuit are used to generate a transimpedance amplifier and a linear regulated power supply. The transimpedance amplifier constitutes the feedback control loop of the low-voltage core reference generation circuit to ensure the normal operation of the circuit. When the high-voltage power supply is powered on, the high-voltage start-up circuit starts working. The current from the high-voltage start-up circuit flows into the low-voltage core reference generation circuit to complete the injection of start-up current. The input power of the low-voltage core reference generation circuit is a linearly regulated power supply generated by a transimpedance amplifier and a linear voltage regulator circuit. The input current of the low-voltage core reference generation circuit comes from the output of the transimpedance amplifier and the linear voltage regulator circuit. The voltage output of the low-voltage core reference generation circuit is sent to the transimpedance amplifier and the linear voltage regulator circuit. Through the transimpedance amplifier and the linear voltage regulator circuit, a feedback system is formed between the low-voltage core reference generation circuits to achieve stable operation of the system. The high-voltage startup circuit includes a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a first resistor, and a second resistor. The first resistor is connected in series with the first PMOS transistor, the second PMOS transistor, the first NMOS transistor, and the second resistor to form a circuit branch. When the high-voltage power supply is powered on, this circuit branch generates a reference current source that changes very little with the power supply voltage. The low-voltage core reference generation circuit includes a reference voltage branch, which includes a fourth transistor and a fifth transistor, and the fourth transistor and the fifth transistor generate a bandgap reference voltage. The transimpedance amplifier and linear voltage regulator circuit include a transimpedance amplifier, which includes an eighth PMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a ninth PMOS transistor, a tenth PMOS transistor, an eleventh PMOS transistor, and a seventh resistor; the ninth PMOS transistor, the tenth PMOS transistor, and the eleventh PMOS transistor form a current mirror to generate a high-voltage reference current source output, and the transimpedance amplifier generates a stable reference voltage signal at the gates of the third NMOS transistor and the fourth NMOS transistor; In this configuration, the gate of the eighth PMOS transistor serves as the input terminal of the transimpedance amplifier, and one end of the seventh resistor serves as the output terminal of the transimpedance amplifier. The transimpedance amplifier and linear voltage regulator circuit also include a linear voltage regulator branch, which includes a fifth NMOS transistor, a sixth NMOS transistor, a seventh NMOS transistor, and a third capacitor; the sixth NMOS transistor, the seventh NMOS transistor, and the second NMOS transistor form a current mirror circuit, which generates a reference current signal through the seventh NMOS transistor.
2. The power management circuit with a wide operating voltage range according to claim 1, characterized in that, The high-voltage start-up circuit further includes a third PMOS transistor, a fourth PMOS transistor, a third resistor, a first transistor, a second transistor, and a third transistor; the first PMOS transistor, the second PMOS transistor, the third PMOS transistor, and the fourth PMOS transistor form a current mirror; the drain of the fourth PMOS transistor is connected to the collector of the second transistor, the emitter of the second transistor is connected to the collector and base of the first transistor; the base of the second transistor is connected to the base of the third transistor, and the collector of the third transistor is connected to the third resistor.
3. The power management circuit with a wide operating voltage range according to claim 2, characterized in that, When the reference current source generates the base voltage of the third transistor through the first transistor and the second transistor, when the third transistor is turned on, the collector of the third transistor is connected to the first resistor terminal of the high voltage input through the third resistor, and the emitter input current of the third transistor flows into the low voltage core reference generation circuit to complete the injection of the start-up current.
4. The power management circuit with a wide operating voltage range according to claim 1, characterized in that, The low-voltage core reference generation circuit also includes a reference current mirror branch, which includes a fifth PMOS transistor, a sixth PMOS transistor, and a seventh PMOS transistor. The gates of the fifth, sixth, and seventh PMOS transistors are all connected to the collector of the fourth transistor, and the drain of the sixth PMOS transistor is connected to the collector of the fifth transistor.
5. A power management circuit with a wide operating voltage range according to claim 1, characterized in that, The low-voltage core reference generation circuit also includes a resistor voltage divider branch, which includes at least three sixth resistors. The sixth resistors are connected to the base of the fifth transistor, and a desired reference voltage source signal is generated between every two sixth resistors.