Matrix calculation method, device and related equipment

By adjusting the target bit width area of ​​the target element to 0 in the matrix calculation, the problem of difficulty in reducing the power consumption of single data format matrix calculation in the existing technology is solved, and the power consumption is reduced and the efficiency is improved while meeting the accuracy requirements.

CN119128352BActive Publication Date: 2025-09-09NANJING ILUVATAR COREX TECH CO LTD (DBA ILUVATAR COREX INC NANJING)
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Patent Information

Application Number
CN202411075977.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-08-07
Publication Date
2025-09-09
Estimated Expiration
2044-08-07

AI Technical Summary

Technical Problem

When a processing unit performs matrix calculations in a single data format, existing technologies have difficulty in effectively reducing power consumption, especially when the data format is fixed and the computational complexity cannot be reduced by quantizing or reducing the element bit width.

Method used

The complexity of matrix calculation is reduced by obtaining a target bit-width region of a target element in a matrix calculation and adjusting the value of the region to 0. The specific method includes generating a mask and using the mask to adjust the value of the target bit-width region to 0.

Benefits of technology

On the premise of meeting the calculation accuracy requirements, the power consumption of matrix calculation is reduced and the calculation efficiency is improved.

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Abstract

The present application provides a matrix calculation method, device and related equipment, which relate to the field of digital circuits. The matrix calculation method is applied to a processing unit, and the matrix calculation method includes: obtaining a target bit width area of ​​a target element in a matrix calculation; the target element is an element that needs to undergo bit value adjustment in the matrix calculation; the target bit width area is a bit width area that can still enable the target element to meet the calculation accuracy requirements corresponding to the target element after the values ​​on each bit are modified; the value of the target bit width area of ​​the target element is adjusted to 0; and matrix calculation is performed based on the adjusted target element. Through the above method, the power consumption of the matrix calculation can be reduced while ensuring that the matrix calculation meets the accuracy requirements.
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