Chip module packaging structure and packaging method thereof

By using the structure of substrate and separator film in the acoustic meter filter chip package, a sealed cavity is formed and wrapped by a plastic sealing layer, the problem of water vapor intrusion is solved and the stability and performance of the chip in a high humidity environment is ensured.

CN119135114APending Publication Date: 2024-12-13VANCHIP TIANJIN TECH
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Patent Information

Application Number
CN202411186686.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-27
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Existing audio meter filter chip packages are susceptible to water vapor in high humidity environments, resulting in reduced performance or failure.

Method used

A package structure is adopted for substrate, filter chip and separator membrane, in which a first gap is formed between the front side of the filter chip and the substrate, and the separator membrane covers the side wall and the back side of the chip, forming a sealed first cavity, and at the edge of the separator membrane A second gap is provided between the edge of the substrate so that the separator film is wrapped with a plastic sealing layer to prevent water vapor from invading.

Benefits of technology

Effectively prevent water vapor from entering the cavity of the filter chip, ensuring its stable performance in high humidity environments and avoid failure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a packaging structure of a chip module and a packaging method thereof. The packaging structure comprises a substrate, at least one filter chip, a separation film and a plastic packaging layer. The filter chip is arranged on the substrate, the front surface of the filter chip faces the substrate, and a first gap is formed between the front surface of the filter chip and the substrate; the separation membrane covers the side wall and the back surface of the filter chip and part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and a second gap is formed between the edge of the separation membrane and the edge of the substrate; the plastic package layer covers the remaining surface of the substrate and the separation film. As the second gap is formed between the edge of the separation film and the edge of the substrate, the separation film can be wrapped by the plastic packaging layer and cannot be exposed in the air, when the packaging structure of the chip module works in a high-humidity environment, water vapor cannot intrude into the first cavity through the separation film, and the problem that the performance of the filter chip is reduced or even fails is avoided.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a packaging structure of a chip module and a packaging method thereof. Background Art

[0002] Surface Acoustic Wave Filter (SAW Filter) is one of the core devices in the field of radio frequency communication. It uses sound waves to transmit on the front side of the chip to achieve its function. Therefore, the packaging of the SAW filter chip must ensure that the surface of the interdigital transducer (the working sensor of the SAW filter) on the front side of the chip cannot contact other substances, that is, it must ensure that there is enough cavity on the front side of the chip, otherwise it will affect signal transmission.

[0003] The existing SAW filter module packaging mostly adopts the BDMP (Bare Die Module Package) packaging technology solution, that is, the filter chip is first mounted on the substrate, and then the separator is attached to the substrate surface, the side wall and the top surface of the filter chip to form a cavity, and then the plastic sealing material is filled on the substrate to form a plastic sealing layer, and finally cut to form a separate packaging structure. This method can effectively reduce costs. However, after cutting, the separator will be exposed from the side wall of the packaging structure. Since the water absorption rate of the separator is relatively high, when the product works in a high humidity environment, water vapor will penetrate into the cavity on the front of the filter chip through the separator, contaminating the interdigital transducer, resulting in product performance degradation or even failure. Summary of the invention

[0004] The object of the present invention is to provide a chip module packaging structure and a packaging method thereof, so as to solve the problem that the cavity on the front side of the existing filter chip is easily invaded by water vapor.

[0005] In order to achieve the above object, the present invention provides a chip module packaging structure, comprising:

[0006] substrate;

[0007] At least one filter chip is disposed on the substrate, the front side of the filter chip faces the substrate, and a first gap is formed between the filter chip and the substrate;

[0008] a separation film covering the sidewall and back side of the filter chip and a portion of the surface of the substrate to enclose the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and a second gap is provided between an edge of the separation film and an edge of the substrate; and

[0009] The plastic sealing layer covers the remaining surface of the substrate and the separation film.

[0010] Optionally, the separation film is a dry film or a photosensitive film.

[0011] Optionally, the width of the second gap is 50 microns to 100 microns.

[0012] Optionally, the packaging structure of the chip module further includes:

[0013] at least one non-filter chip is disposed on the substrate, wherein the electrode surface of the non-filter chip faces the substrate and a third gap is formed between the non-filter chip and the substrate; and

[0014] The separation film also covers the side wall and the non-electrode surface of the non-filter chip. The separation film has a break around the non-filter chip. The plastic encapsulation layer passes through the break to fill the third gap.

[0015] Optionally, the packaging structure of the chip module further includes:

[0016] The solder resist layer covers the non-soldering area of ​​the substrate, and the separation film is arranged on the solder resist layer.

[0017] Optionally, an edge of the solder resist layer is aligned with an edge of the substrate.

[0018] Optionally, a portion of the solder resist layer covered by the separation film is a first portion, a portion of the solder resist layer outside the first portion is a second portion, and a thickness of the first portion is greater than a thickness of the second portion.

[0019] Optionally, a fourth gap exists between an edge of the solder resist layer and an edge of the substrate.

[0020] Optionally, the width of the second gap is equal to that of the fourth gap, so that an edge of the separation film is aligned with an edge of the solder resist layer.

[0021] The present invention also provides a chip module packaging method, comprising:

[0022] providing a substrate;

[0023] Disposing at least one filter chip on the substrate, with the front side of the filter chip facing the substrate and a first gap between the filter chip and the substrate;

[0024] Attaching a separation film to the sidewall and back surface of the filter chip and the substrate, wherein the separation film encapsulates the first gap, so that a sealed first cavity is formed between the filter chip and the substrate;

[0025] Removing the separation film at the edge of each module area to form a separation groove;

[0026] forming a plastic encapsulation layer, the plastic encapsulation layer covering the separation film and filling the separation groove; and,

[0027] The plastic encapsulation layer and the substrate are cut along the separation groove to obtain a chip module packaging structure. In each chip module packaging structure, a second gap is provided between an edge of the separation film and an edge of the substrate.

[0028] Optionally, the separation film is a dry film, and a laser film removal process is used to remove the separation film at the edge of each module area; or, the separation film is a photosensitive film, and an exposure and development process is used to remove the separation film at the edge of each module area.

[0029] Optionally, when the filter chip is disposed on the substrate, at least one non-filter chip is also disposed on the substrate, wherein the electrode surface of the non-filter chip faces the substrate and a third gap is formed between the non-filter chip and the substrate;

[0030] When the separation film is attached to the side wall and the back surface of the filter chip and the substrate, the separation film is also attached to the side wall and the non-electrode surface of the non-filter chip, and the separation film also encapsulates the third gap; and

[0031] After the separation film is attached, the separation film is controlled to be broken around the non-filter chip to form a fracture, so that after the plastic encapsulation layer is formed, the plastic encapsulation layer passes through the fracture to fill the third gap.

[0032] Optionally, before the filter chip is disposed on the substrate, a solder resist layer is formed on a non-welding area of ​​the substrate.

[0033] Optionally, after the solder resist layer is formed, the solder resist layer covers the substrate at the edge of each module area.

[0034] Optionally, after removing the separation film at the edge of each module area, part of the thickness of the solder resist layer in the separation groove is also removed.

[0035] Optionally, after removing the separation film at the edge of each module area, at least part of the solder resist layer in the separation groove is also removed until the substrate is exposed, so that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

[0036] Optionally, after the solder resist layer is formed, the solder resist layer does not cover the substrate at the edge of each module area, so that in the packaging structure of each chip module, there is a fourth gap between the edge of the solder resist layer and the edge of the substrate.

[0037] Optionally, the width of the separation groove is greater than a cutting offset accuracy of cutting the plastic encapsulation layer and the substrate.

[0038] In the packaging structure of the chip module provided by the present invention and its packaging method, it includes a substrate, at least one filter chip, a separation film and a plastic sealing layer. The filter chip is arranged on the substrate, the front of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate; the separation film covers the side wall and the back of the filter chip and part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separation film and the edge of the substrate; the plastic sealing layer covers the remaining surface of the substrate and the separation film. Since there is the second gap between the edge of the separation film and the edge of the substrate, the separation film will be wrapped by the plastic sealing layer and will not be exposed to the air. When the packaging structure of the chip module works in a high humidity environment, water vapor will not penetrate into the first cavity through the separation film, thereby avoiding the problem of performance degradation or even failure of the filter chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A flowchart of a chip module packaging method provided in Embodiment 1 of the present invention;

[0040] Figure 2 to Figure 6 The schematic diagram of the structure corresponding to the corresponding steps of the chip module packaging method provided in the first embodiment of the present invention, wherein: Figure 6 A schematic diagram of the packaging structure of a chip module provided in the first embodiment of the present invention;

[0041] Figure 7-Figure 8 The schematic diagram of the structure corresponding to the corresponding steps of the chip module packaging method provided in the second embodiment of the present invention, wherein: Figure 8 A schematic diagram of the packaging structure of a chip module provided in the second embodiment of the present invention;

[0042] Figure 9-10 The schematic diagram of the structure corresponding to the corresponding steps of the chip module packaging method provided in the third embodiment of the present invention, wherein: Fig.10 A schematic diagram of the packaging structure of a chip module provided in Embodiment 3 of the present invention;

[0043] Figure 11 to Figure 13 A schematic structural diagram corresponding to corresponding steps of the chip module packaging method provided in the fourth embodiment of the present invention;

[0044] Wherein, the accompanying drawings are marked as follows:

[0045] 100-substrate; 200-solder resist layer; 301-filter chip; 302-non-filter chip; 300a-first cavity; 300b-second cavity; 300c-fracture; 400-bump; 500-separation membrane; 500a-separation groove; 600-plastic layer; H1-first gap; H2-second gap; H3-third gap; H4-fourth gap. DETAILED DESCRIPTION

[0046] The specific implementation of the present invention will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the present invention will become clearer based on the following description. It should be noted that the drawings are all in a very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in explaining the purpose of the embodiments of the present invention.

[0047] Embodiment 1

[0048] Figure 6 This is a schematic diagram of the packaging structure of the chip module provided in this embodiment. Figure 6 As shown, the packaging structure of the chip module includes:

[0049] substrate 100;

[0050] At least one filter chip 301 is disposed on the substrate 100 , with the front side of the filter chip 301 facing the substrate 100 and a first gap H1 being formed between the filter chip 301 and the substrate 100 ;

[0051] a separation film 500 covering the sidewall and back surface of the filter chip 301 and a portion of the surface of the substrate 100 to enclose the first gap H1, so that a sealed first cavity 300a is formed between the filter chip 301 and the substrate 100, and a second gap H2 is provided between the edge of the separation film 500 and the edge of the substrate 100; and

[0052] The plastic packaging layer 600 covers the remaining surface of the substrate 100 and the separation film 500 .

[0053] Continue reading Figure 6 Specifically, the substrate 100 has a circuit structure, and the substrate 100 is provided with a plurality of pads electrically connected to the circuit structure ( Figure 6 The number of the pads is preferably multiple, and the pads may be used to electrically connect to the filter chip 301, and may also be used to electrically connect to other components (such as non-filter chip 302, etc.). The substrate 100 may be a high temperature sintered ceramic substrate (HTCC), a printed circuit board, or a LTCC substrate.

[0054] In this embodiment, a solder resist layer 200 is further provided on the substrate 100, and the solder resist layer 200 covers the non-welding area of ​​the substrate 100, and the non-welding area is the area other than the pads on the substrate 100. The solder resist layer 200 can prevent soldering between the pads on the substrate 100 to avoid short circuit. Optionally, the material of the solder resist layer 200 can generally be green oil.

[0055] Furthermore, in this embodiment, the edge of the solder resist layer 200 is aligned with the edge of the substrate 100 .

[0056] The filter chip 301 can be a surface acoustic wave filter chip, which includes a relative front and back side and a side wall connecting the front and back side. The front side of the filter chip 301 is provided with other functional elements such as an interdigital transducer, and the front side of the filter chip 301 faces the substrate 100.

[0057] In this embodiment, the packaging structure of the chip module further includes a non-filter chip 302, which refers to other common chips other than the filter chip 301, such as a power amplifier, a low noise amplifier, etc. The non-filter chip 302 includes an electrode surface and a non-electrode surface relative to each other and a side wall connecting the electrode surface and the non-electrode surface. The electrode surface of the non-filter chip 302 is provided with an electrode, and the electrode surface of the non-filter chip 302 faces the substrate 100.

[0058] In some embodiments, the electrode surface of the non-filter chip 302 can be the front side of the non-filter chip 302 or the back side of the non-filter chip 302 , that is, the non-filter chip 302 can also face the substrate 100 with its front side or its back side.

[0059] It should be noted that Figure 6 Only one filter chip 301 and one non-filter chip 302 are schematically shown, but it should be understood that the number of the filter chip 301 and the non-filter chip 302 should not be limited to this, and the number of the filter chip and the non-filter chip 302 can be designed according to actual conditions, and no examples are given here. Of course, the packaging structure of the chip module may also have non-chip components, such as resistors, capacitors, etc.

[0060] Furthermore, the front surfaces of the filter chip 301 and the non-filter chip 302 are provided with a plurality of bumps 400, and the bumps 400 may be solder balls or metal pillars. The filter chip 301 and the non-filter chip 302 may be electrically connected to the corresponding pads on the substrate 100 by means of flip-chip die bond (FC die bond) or the like, so as to fix the filter chip 301 and the non-filter chip 302 on the substrate 100. Since the bumps 400 have a certain height, the first gap H1 is provided between the front surface of the filter chip 301 and the substrate 100, and the third gap H3 is provided between the electrode surface of the non-filter chip 302 and the substrate 100. The heights of the first gap H1 and the third gap H3 may be unequal.

[0061] Please continue reading Figure 6 The separation film 500 covers the sidewall and back of the filter chip 301 and part of the surface of the substrate 100 (in this embodiment, it specifically covers part of the surface of the solder resist layer 200) to enclose the first gap H1, forming a first cavity 300a for accommodating the interdigital transducer, and the first cavity 300a is a closed space. The separation film 500 can isolate the plastic layer 600 outside the first cavity 300a to prevent the injection material from entering the first cavity 300a when the plastic layer 600 is formed.

[0062] Of course, in this embodiment, the separation film 500 also covers the side wall and the back side of the non-filter chip 302 to encapsulate the third gap H3. The separation film 500 has a break 300c around the non-filter chip 302, and the break 300c can be arranged around the non-filter chip 302. The plastic encapsulation layer 600 passes through the break 300c to fill the third gap H3. The plastic encapsulation layer 600 in the third gap H3 can support the non-filter chip 302, realize the bottom filling of the non-filter chip 302, and thus ensure the reliability of the non-filter chip 302.

[0063] Furthermore, the separation film 500 does not completely cover the substrate 100, and a second gap H2 is provided between the edge of the separation film 500 and the edge of the substrate 100. The edge of the separation film 500 is not aligned with the edge of the substrate 100, so that the separation film 500 is wrapped by the plastic encapsulation layer 600 and is not exposed to the air. When the chip module packaging structure works in a high humidity environment, water vapor will not penetrate into the first cavity 300a through the separation film 500, thereby avoiding the problem of performance degradation or even failure of the chip module.

[0064] It should be noted that the edge of the separation film 500 refers to the edge of the entire separation film 500 , and the second gap H2 also refers to the gap between the edge of the projection of the entire separation film 500 on the substrate 100 and the edge of the substrate 100 .

[0065] It should be noted that, since the chip module is a BDMP module, it is necessary to ensure that the separation film 500 encapsulates the first gap H1 to form the first cavity 300a, so the width of the second gap H2 should not be too large; and in order to leave a processing margin during the packaging process, the width of the second gap H2 cannot be too small. Therefore, the width of the second gap H2 can preferably be 50 microns to 100 microns, but it should not be limited to this. The width of the second gap H2 can also refer to the cutting offset accuracy. The current cutting offset accuracy is usually 50 microns, so the width of the second gap H2 can be 100 microns.

[0066] In this embodiment, the separator film 500 may be a dry film or a photosensitive film, wherein the separator film 500 is low in cost and mature in process when the dry film is used, and the separator film 500 is a photosensitive film, and the process for forming the second gap H2 between the edge of the separator film 500 and the edge of the substrate 100 is more controllable. The material of the dry film is usually a polymer material, and the material of the photosensitive film may be a polymer material having photosensitive properties.

[0067] Furthermore, the plastic encapsulation layer 600 covers the remaining surface of the substrate 100 (in this embodiment, specifically covers the remaining surface of the solder resist layer 200) and the separation film 500. The separation film 500 isolates the plastic encapsulation layer 600 outside the first cavity 300a to prevent the IDT from being contaminated by the plastic encapsulation material; at the same time, the plastic encapsulation layer 600 enters the third gap H3 through the fracture 300c, thereby supporting the non-filter chip 302 and ensuring the stability of the non-filter chip 302.

[0068] Optionally, the material of the plastic packaging layer 600 is preferably epoxy plastic packaging material, and may also be other possible materials.

[0069] Based on this, this embodiment provides a chip module packaging method. Figure 1 Flow chart of the chip module packaging method provided in this embodiment. Figure 1 As shown, the packaging method of the chip module includes:

[0070] Step S100: providing a substrate;

[0071] Step S200: disposing at least one filter chip on the substrate, with the front side of the filter chip facing the substrate and a first gap between the filter chip and the substrate;

[0072] Step S300: attaching a separation film to the sidewall and back surface of the filter chip and the substrate, wherein the separation film encapsulates the first gap, so that a sealed first cavity is formed between the filter chip and the substrate;

[0073] Step S400: removing the separation film at the edge of each module area to form a separation groove;

[0074] Step S500: forming a plastic encapsulation layer, wherein the plastic encapsulation layer covers the separation film and fills the separation groove; and

[0075] Step S600: cutting the plastic encapsulation layer and the substrate along the separation groove to obtain a chip module packaging structure, wherein in each chip module packaging structure, a second gap is provided between an edge of the separation film and an edge of the substrate.

[0076] Figure 2 to Figure 6 The following is a schematic diagram of the structure corresponding to the corresponding steps of the chip module packaging method provided in this embodiment. Figure 2 to Figure 6 The packaging method of the chip module provided in this embodiment is described in detail.

[0077] like Figure 2 As shown, step S100 is performed to provide the substrate 100, wherein the substrate 100 is provided with a circuit structure, and the substrate 100 is provided with a plurality of pads ( Figure 2 The substrate 100 may be a wafer.

[0078] Please continue reading Figure 2 , forming the solder resist layer 200 in the non-welding area of ​​the substrate 100. The solder resist layer 200 can be formed in the non-welding area of ​​the substrate 100 by screen printing. At this time, the solder resist layer 200 covers the substrate 100 ( Figure 2 Only one module area is shown).

[0079] like Figure 3As shown, step S200 is performed to provide at least one filter chip 301, the front surface of the filter chip 301 has the bump 400, and the bump 400 on the front surface of the filter chip 301 is electrically connected to the corresponding pad on the substrate 100 by flip-chip bonding or the like, so that the filter chip 301 is disposed on the substrate 100. The front surface of the filter chip 301 faces the substrate 100, and the first gap H1 is formed between the filter chip 301 and the substrate 100.

[0080] Please continue reading Figure 3 At the same time, at least one non-filter chip 302 is provided, and the electrode surface of the filter chip 301 also has the bump 400. The bump 400 on the front of the non-filter chip 302 is electrically connected to the corresponding pad on the substrate 100 by flip-chip bonding or the like, so that the non-filter chip 302 is disposed on the substrate 100. The electrode surface of the non-filter chip 302 faces the substrate 100, and there is the third gap H3 between the electrode surface of the non-filter chip 302 and the substrate 100.

[0081] like Figure 4 As shown, step S300 is performed to attach the separation film 500 to the side wall and back of the filter chip 301 and the substrate 100, and the separation film 500 conformally covers the filter chip 301 and the solder resist layer 200. The separation film 500 will enclose the first gap H1, so that a sealed first cavity 300a is formed between the filter chip 301 and the substrate 100.

[0082] Please continue reading Figure 4 When the separation film 500 is attached to the side wall and back surface of the filter chip 301 and the substrate 100, the separation film 500 is also attached to the side wall and non-electrode surface of the non-filter chip 302. Similarly, the separation film 500 also encloses the third gap H3, so that a sealed second cavity 300b is formed between the non-filter chip 302 and the substrate 100.

[0083] In some embodiments, the separator film 500 is a dry film, and the separator film 500 can be attached by a dry film attachment process. The specific process flow of the dry film attachment process has been mature technology, and this embodiment will not be repeated here. In some embodiments, the separator film 500 is a photosensitive film, and the separator film 500 can also be attached by a process similar to the dry film attachment process.

[0084] like Figure 5As shown, step S400 is performed to remove the separation film 500 at the edge of each module area to form the separation groove 500a. For each module area, the separation groove 500a surrounds the module area, thereby separating the adjacent module areas. It can be understood that the module area is the area occupied by each chip module on the substrate 100. Figure 5 Since only one module area is shown, the separation groove 500a has only one side wall, but it should be understood that the separation groove 500a between two adjacent module areas should have two side walls, and at the edge of the substrate 100, the separation groove 500a may have only one side wall.

[0085] In some embodiments, the separator film 500 is a dry film, and the separator film 500 at the edge of each module area can be removed by a laser film removal process. In a specific implementation, the laser film removal process uses a laser device to generate a laser, and irradiates the laser to a specified position of the separator film 500 to remove the separator film 500 at that position. In some embodiments, the separator film 500 is a photosensitive film, and the separator film 500 at the edge of each module area can be removed by an exposure and development process. In a specific implementation, a mask can be used to cover the area of ​​the separator film 500 that is not desired to be removed, exposing the area of ​​the separator film 500 that is desired to be removed, and after exposure and development, the separator film 500 at the specified position can be removed.

[0086] like Figure 6 As shown, the separation film 500 is controlled to break around the non-filter chip 302, thereby forming a fracture 300c. For example, the height difference between the first gap H1 and the third gap H3 can be designed, for example, the height of the first gap H1 is less than 40 microns, and the height of the third gap H3 is greater than 50 microns. The separation film 500 is hot-pressed. Under a certain pressure, only the separation film 500 around the non-filter chip 302 will break, forming the fracture 300c, while the separation film 500 around the filter chip 301 will not break.

[0087] Next, step S500 is performed to fill the substrate 100 with a molding material, and the molding material is solidified to form the molding layer 600, and the molding layer 600 will cover the separation film 500 and fill the separation groove 500a. When the molding material is filled, the molding material will also enter the third gap H3 to fill the third gap H3, so the molding layer 600 will pass through the fracture 300c and fill the third gap H3.

[0088] Please continue reading Figure 6, execute step S600, cut the plastic encapsulation layer 600 and the substrate 100 along the separation groove 500a to separate each module area, and each module area can constitute a packaging structure of the chip module. After the cutting is completed, in the packaging structure of each chip module, there is a second gap H2 between the edge of the separation film 500 and the edge of the substrate 100, so that the separation film 500 will be wrapped by the plastic encapsulation layer 600 and will not be exposed to the air. When the packaging structure of the chip module works in a high humidity environment, water vapor will not penetrate into the first cavity 300a through the separation film 500, thereby avoiding the problem of performance degradation or even failure of the filter chip 301.

[0089] It should be noted that the width of the separation groove 500a needs to be greater than the cutting offset accuracy of cutting the plastic layer 600 and the substrate 100, so as to avoid the separation film 500 being exposed from the side wall of the plastic layer 600 after cutting the plastic layer 600 and the substrate 100.

[0090] Embodiment 2

[0091] Figure 8 The schematic diagram of the packaging structure of the chip module provided in this embodiment is shown in FIG. Figure 8 As shown, the difference from the first embodiment is that, in this embodiment, the solder resist layer 200 does not completely cover the substrate 100, and there is a fourth gap H4 between the edge of the solder resist layer 200 and the edge of the substrate 100. The solder resist layer 200 has a certain water absorption. In this embodiment, the solder resist layer 200 will be wrapped by the plastic sealing layer 600 and will not be exposed to the air. When the packaging structure of the chip module works in a high humidity environment, water vapor will not penetrate into the first cavity 300a through the separation film 500 and the solder resist layer 200, thereby avoiding the problem of performance degradation or even failure of the filter chip 301.

[0092] It should be noted that the edge of the solder resist layer 200 refers to the edge of the entire solder resist layer 200 , and the fourth gap H4 also refers to the gap between the edge of the projection of the entire solder resist layer 200 on the substrate 100 and the edge of the substrate 100 .

[0093] In this embodiment, the widths of the second gap H2 and the fourth gap H4 are equal, so that the edge of the separation film 500 is aligned with the edge of the solder resist layer 200. In some embodiments, the widths of the second gap H2 and the fourth gap H4 may not be equal. Considering the feasibility of manufacturing, the width of the second gap H2 may be greater than the width of the fourth gap H4, but it should not be limited thereto.

[0094] The packaging method of the chip module in this embodiment is similar to that in the first embodiment, except that Figure 7 As shown, after the separation film 500 at the edge of each module area is removed in the first embodiment to form the separation groove 500a, the separation groove 500a will expose the solder resist layer 200 at the edge of each module area. Next, in this embodiment, the solder resist layer 200 in the separation groove 500a is also removed, so that the separation groove 500a extends downward to expose the surface of the substrate 100. Then, as shown in FIG. Figure 8 As shown, the plastic encapsulation layer 600 is formed and the plastic encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a to obtain the packaging structure of the chip module. In each packaging structure of the chip module, the edge of the solder resist layer 200 and the edge of the substrate 100 have the fourth gap H4.

[0095] It is understandable that in some embodiments, part of the solder resist layer 200 in the separation groove 500a can be removed (the substrate 100 still needs to be exposed). In this case, after the packaging structure of the chip module is formed, the width of the second gap H2 can be greater than the width of the fourth gap H4.

[0096] In this embodiment, a laser stripping process may be used to remove the solder resist layer 200 in the separation groove 500a. In a specific implementation, the laser stripping process uses a laser device to generate a laser, and irradiates the laser to the solder resist layer 200 in the separation groove 500a to remove the solder resist layer 200 in the separation groove 500a. Of course, in some embodiments, the solder resist layer 200 may also be photosensitive, and in this case, an exposure and development process may be used to remove the solder resist layer 200 in the separation groove 500a.

[0097] Embodiment 3

[0098] Fig.10 The schematic diagram of the packaging structure of the chip module provided in this embodiment is shown in FIG. Fig.10 As shown, the difference from the first embodiment is that, in this embodiment, the portion of the solder resist layer 200 covered by the separation film 500 is the first portion (i.e., the portion directly below the separation film 500), the portion outside the first portion is the second portion (i.e., the portion located in the second gap H2), and the thickness of the first portion is greater than the thickness of the second portion. The solder resist layer 200 has a certain water absorption. In this embodiment, when the package structure of the chip module works in a high humidity environment, since the portion of the solder resist layer 200 exposed to the air is less, the water vapor intruding into the first cavity 300a through the solder resist layer 200 can be reduced, thereby reducing the possibility of performance degradation or even failure of the filter chip 301.

[0099] The packaging method of the chip module in this embodiment is similar to that in the first embodiment, except that Fig. 9 As shown, after the separation film 500 at the edge of each module area is removed in the first embodiment to form the separation groove 500a, the separation groove 500a will expose the solder resist layer 200 at the edge of each module area. Next, this embodiment further removes part of the thickness of the solder resist layer 200 in the separation groove 500a, so that the separation groove 500a extends downward but does not expose the surface of the substrate 100. Then, as shown in FIG. Fig.10 As shown, the plastic encapsulation layer 600 is formed and the plastic encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a. In the packaging structure of each chip module, the edge of the solder resist layer 200 is still aligned with the edge of the substrate 100. In this embodiment, the solder resist layer 200 will still be exposed from the edge of the substrate 100, but in the packaging structure of each chip module, the edge area of ​​the solder resist layer 200 is removed by a certain thickness, reducing the contact area with the air, thereby reducing the water vapor intruding into the first cavity 300a through the solder resist layer 200, thereby reducing the possibility of performance degradation or even failure of the filter chip 301; at the same time, the solder resist layer 200 in the separation groove 500a is not completely removed, which can avoid damaging the substrate 100 when removing the solder resist layer 200. After the packaging structure of the chip module is formed, the solder resist layer 200 can also continue to protect the substrate 100.

[0100] In this embodiment, a laser stripping process may be used to remove the solder resist layer 200 in the separation groove 500a. In a specific implementation, the laser stripping process generates laser light using a laser device, and irradiates the laser light to the solder resist layer 200 in the separation groove 500a, so as to remove part of the thickness of the solder resist layer 200 in the separation groove 500a.

[0101] Embodiment 4

[0102] Figure 11 to Figure 13 The schematic diagram of the structure corresponding to the corresponding steps of the chip module packaging method provided in this embodiment. The packaging structure of the chip module in this embodiment can be the same as that in the second embodiment, and the only difference is that the chip module packaging method in this embodiment is different from that in the second embodiment.

[0103] like Fig.11 As shown, in this embodiment, after the solder resist layer 200 is formed on the substrate 100 , the solder resist layer 200 does not cover the substrate 100 at the edge of each module area.

[0104] like Fig.12As shown, the filter chip 301 and the non-filter chip 302 are arranged on the substrate 100 .

[0105] like Fig.13 As shown, the separating film 500 is attached. At this time, the separating film 500 is not only attached to the top surface and side wall of the filter chip 301, the non-electrode surface and side wall of the non-filter chip 302 and the surface of the solder resist layer 200, but also attached to the exposed surface of the substrate 100 (that is, the edge area of ​​each module area).

[0106] Afterwards, if Figure 7 As shown, the separation film 500 at the edge of each module area is removed to form the separation groove 500a, and the separation groove 500a also exposes the surface of the substrate 100. Figure 8 As shown, the plastic encapsulation layer 600 is formed and the plastic encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a to obtain the packaging structure of the chip module. At this time, in each packaging structure of the chip module, the edge of the solder mask 200 and the edge of the substrate 100 also have the fourth gap H4.

[0107] Compared with the second embodiment, this embodiment can omit the step of removing the solder resist layer 200 in the separation groove 500a, simplifying the process and reducing the packaging cost; and this embodiment can also make the second gap H2 smaller than the fourth gap H4.

[0108] In summary, the packaging structure and packaging method of the chip module provided in the embodiment of the present invention include a substrate, at least one filter chip, a separator and a plastic sealing layer. The filter chip is arranged on the substrate, the front of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate; the separator covers the side wall and the back of the filter chip and part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separator and the edge of the substrate; the plastic sealing layer covers the remaining surface of the substrate and the separator. Since there is the second gap between the edge of the separator and the edge of the substrate, the separator will be wrapped by the plastic sealing layer and will not be exposed to the air. When the packaging structure of the chip module works in a high humidity environment, water vapor will not penetrate into the first cavity through the separator, thereby avoiding the problem of performance degradation or even failure of the filter chip.

[0109] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0110] It should also be noted that, although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any technician familiar with the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

[0111] It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are merely used to distinguish between the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0112] It should also be recognized that the terms described herein are only used to describe specific embodiments and are not intended to limit the scope of the invention. It should be noted that the singular forms "a" and "an" used herein and in the appended claims include plural references unless the context clearly indicates otherwise. For example, a reference to "a step" or "a device" means a reference to one or more steps or devices, and may include secondary steps and secondary devices. All conjunctions used should be understood in the broadest sense. And, the word "or" should be understood to have the definition of a logical "or", rather than a logical "exclusive or", unless the context clearly indicates otherwise. In addition, the implementation of the method and / or device in the embodiments of the present invention may include performing the selected task manually, automatically, or in combination.

Claims

1. A chip module packaging structure, characterized in that: include: substrate; At least one filter chip is disposed on the substrate, the front side of the filter chip faces the substrate, and a first gap is formed between the filter chip and the substrate; a separation film covering the sidewall and back side of the filter chip and a portion of the surface of the substrate to enclose the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and a second gap is provided between an edge of the separation film and an edge of the substrate; and The plastic sealing layer covers the remaining surface of the substrate and the separation film.

2. The chip module packaging structure according to claim 1, characterized in that: The separation film is a dry film or a photosensitive film.

3. The chip module packaging structure according to claim 1, wherein: The width of the second gap is 50 micrometers to 100 micrometers.

4. The chip module packaging structure according to claim 1, wherein: The packaging structure of the chip module also includes: at least one non-filter chip is disposed on the substrate, wherein the electrode surface of the non-filter chip faces the substrate and a third gap is formed between the non-filter chip and the substrate; and The separation film also covers the side wall and the non-electrode surface of the non-filter chip. The separation film has a break around the non-filter chip. The plastic encapsulation layer passes through the break to fill the third gap.

5. The chip module packaging structure according to any one of claims 1 to 4, characterized in that: The packaging structure of the chip module also includes: The solder resist layer covers the non-soldering area of ​​the substrate, and the separation film is arranged on the solder resist layer.

6. The chip module packaging structure according to claim 5, characterized in that: An edge of the solder resist layer is aligned with an edge of the substrate.

7. The chip module packaging structure according to claim 6, characterized in that: The portion of the solder resist layer covered by the separation film is a first portion, and the portion of the solder resist layer outside the first portion is a second portion. The thickness of the first portion is greater than that of the second portion.

8. The chip module packaging structure according to claim 5, characterized in that: An edge of the solder resist layer and an edge of the substrate have a fourth gap.

9. The chip module packaging structure according to claim 8, characterized in that: The second gap has the same width as the fourth gap so that an edge of the separation film is aligned with an edge of the solder resist layer.

10. A chip module packaging method, characterized in that: include: providing a substrate; Disposing at least one filter chip on the substrate, with the front side of the filter chip facing the substrate and a first gap between the filter chip and the substrate; Attaching a separation film to the sidewall and back surface of the filter chip and the substrate, wherein the separation film encapsulates the first gap, so that a sealed first cavity is formed between the filter chip and the substrate; Removing the separation film at the edge of each module area to form a separation groove; forming a plastic sealing layer, wherein the plastic sealing layer covers the separation film and fills the separation groove; as well as, The plastic encapsulation layer and the substrate are cut along the separation groove to obtain a chip module packaging structure. In each chip module packaging structure, a second gap is provided between an edge of the separation film and an edge of the substrate.

11. The chip module packaging method according to claim 10, characterized in that: The separation film is a dry film, and the separation film at the edge of each module area is removed by a laser film removal process; or, the separation film is a photosensitive film, and the separation film at the edge of each module area is removed by an exposure and development process.

12. The chip module packaging method according to claim 10, characterized in that: When the filter chip is disposed on the substrate, at least one non-filter chip is also disposed on the substrate, wherein the electrode surface of the non-filter chip faces the substrate and a third gap is formed between the non-filter chip and the substrate; When the separation film is attached to the side wall and the back surface of the filter chip and the substrate, the separation film is also attached to the side wall and the non-electrode surface of the non-filter chip, and the separation film also encapsulates the third gap; and After the separation film is attached, the separation film is controlled to be broken around the non-filter chip to form a fracture, so that after the plastic encapsulation layer is formed, the plastic encapsulation layer passes through the fracture to fill the third gap.

13. The chip module packaging method according to any one of claims 10 to 12, characterized in that: Before the filter chip is disposed on the substrate, a solder resist layer is formed on a non-soldering area of ​​the substrate.

14. The chip module packaging method according to claim 13, characterized in that: After the solder resist layer is formed, the solder resist layer covers the substrate at the edge of each module area.

15. The chip module packaging method according to claim 14, characterized in that: After removing the separation film at the edge of each module area, a portion of the thickness of the solder resist layer in the separation groove is also removed.

16. The chip module packaging method according to claim 14, characterized in that: After removing the separation film at the edge of each module area, at least part of the solder resist layer in the separation groove is also removed until the substrate is exposed, so that in the packaging structure of each chip module, the edge of the solder resist layer and the edge of the substrate have a fourth gap.

17. The chip module packaging method according to claim 13, characterized in that: After the solder resist layer is formed, the solder resist layer does not cover the substrate at the edge of each module region, so that in the packaging structure of each chip module, there is a fourth gap between the edge of the solder resist layer and the edge of the substrate.

18. The chip module packaging method according to claim 10, characterized in that: The width of the separation groove is greater than the cutting offset accuracy of cutting the plastic encapsulation layer and the substrate.

Citation Information

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