Three-dimensional pattern circuit board preparation method and three-dimensional pattern circuit board

Abstract

The invention provides a preparation method of a three-dimensional pattern circuit board and the three-dimensional pattern circuit board, and the method comprises the steps: obtaining a power-on carrier as a substrate, covering a layer of insulating material above a conductive surface of the substrate, so as to enable a pattern insulating layer to be formed above the conductive surface of the substrate; the method comprises the following steps of: firstly, carrying out full-board electroplating treatment on exposed patterns of a pattern insulating layer to obtain a first semi-finished circuit board, then, carrying out three-dimensional circuit layer preparation and multi-layer stacking treatment above a pattern bonding pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board, and finally, assembling a circuit protection layer above the second semi-finished circuit board to obtain the three-dimensional circuit board. And obtaining the three-dimensional pattern circuit board. And the pattern bonding pad layer is formed through full-board electroplating treatment, so that the copper thickness of the three-dimensional circuit layer formed through subsequent electroplating is more uniform, the copper thickness precision error of stacking among the multiple three-dimensional circuit layers is reduced, and the preparation fineness of the multi-layer three-dimensional stacked circuit board is improved.

Description

Technical Field

[0001] The present application relates to the field of electronic boards, and in particular to a method for preparing a three-dimensional patterned circuit board and a three-dimensional patterned circuit board. Background Art

[0002] In recent years, with the rapid development of electronic devices, the demand for circuit boards in electronic devices has become increasingly higher, and people have paid more and more attention to the precision of circuit boards.

[0003] In most of the current circuit board preparation processes, the circuit layer electroplating operation is often performed directly on the original conductive carrier, but this often causes the conductive carrier to have high and low current conditions during the electroplating process, which in turn causes the circuit layer formed by electroplating to have uneven copper thickness. At the same time, when multiple layers of circuit layers are stacked three-dimensionally on the circuit board, the copper thickness of each layer of the circuit layer is often uneven, resulting in a large deviation in the copper thickness of the stacked circuit board, which seriously affects the preparation precision of the multi-layer three-dimensional stacked circuit board. Summary of the invention

[0004] The main purpose of the embodiments of the present application is to propose a method for preparing a three-dimensional pattern circuit board and a three-dimensional pattern circuit board, and then form a pattern pad layer through full-board electroplating treatment, so that the copper thickness of the three-dimensional circuit layer formed by subsequent electroplating is more uniform, reducing the copper thickness accuracy error between multiple three-dimensional circuit layers, and improving the preparation precision of the multi-layer three-dimensional stacked circuit board.

[0005] In the first aspect, to achieve the above-mentioned purpose, the present application embodiment proposes a method for preparing a three-dimensional patterned circuit board, comprising the following steps: obtaining a powered carrier as a substrate, wherein the substrate is a single-sided conductive substrate; Covering a layer of insulating material above the conductive surface of the substrate to form a patterned insulating layer above the conductive surface of the substrate; Performing full-board electroplating treatment on exposed patterns of the pattern insulation layer to obtain a first semi-finished circuit board, the first semi-finished circuit board comprising a pattern pad layer and a substrate, the pattern pad layer comprising a pattern insulation layer and a multi-layer conductive metal pattern; Performing a three-dimensional circuit layer preparation and a multi-layer stacking process on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board, wherein the second semi-finished circuit board includes a plurality of stacked three-dimensional circuit layers, a pattern pad layer and a substrate; A circuit protection layer is assembled on the second semi-finished circuit board to obtain a three-dimensional pattern circuit board.

[0006] Furthermore, in some embodiments, preparing a three-dimensional circuit layer and performing a multi-layer stacking process on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board includes the following steps: Preparing a three-dimensional circuit layer above the pattern pad layer of the first semi-finished circuit board; The three-dimensional circuit layer on the first semi-finished circuit board is used as a base stacking structure, and multiple layers of three-dimensional circuit layers are sequentially prepared from bottom to top on the base stacking structure to obtain a second semi-finished circuit board.

[0007] Further, in some embodiments, the three-dimensional circuit layer includes a first circuit insulation layer, a circuit conductive layer and a main circuit layer, and preparing a three-dimensional circuit layer comprises the following steps; Preparing a first line insulation layer, and performing a drilling process on the first line insulation layer, wherein the first line insulation layer after the drilling process comprises a plurality of insulation through holes; Based on the insulating through-holes, a circuit conductive layer is prepared in the first circuit insulating layer, wherein the circuit conductive layer includes a plurality of conductive pins, each conductive pin corresponds to each insulating through-hole one by one, and the conductive pins penetrate the corresponding insulating through-holes; The main circuit layer is electroplated on the first circuit insulation layer to obtain a three-dimensional circuit layer, wherein the main circuit layer is electroplated in a three-dimensional circuit pattern, and the main circuit layer and the circuit conductive layer are conductively connected to each other.

[0008] Furthermore, in some embodiments, electroplating a main circuit layer on the first circuit insulation layer includes the following steps: When the stacked number of layers of the three-dimensional circuit layer is not the uppermost layer, a layer of insulating material is covered on the first circuit insulation layer, so that a second circuit insulation layer with a pattern is formed on the first circuit insulation layer; The exposed pattern of the second circuit insulation layer is subjected to full-board electroplating treatment to form a main circuit layer above the first circuit insulation layer. The main circuit layer includes a three-dimensional metal circuit and a second circuit insulation layer.

[0009] Furthermore, in some embodiments, electroplating a main circuit layer on the first circuit insulation layer further includes the following steps: When the stacked layers of the three-dimensional circuit layer are the uppermost layers, a layer of photoresist material is covered on the first circuit insulation layer, so that a circuit photoresist layer with a pattern is formed on the first circuit insulation layer; The entire board is electroplated at the exposed pattern of the circuit photoresist layer, and the circuit photoresist layer is removed, so that a main circuit layer is formed above the first circuit insulation layer, and the main circuit layer includes a three-dimensional metal circuit.

[0010] Further, in some embodiments, the circuit protection layer includes an insulating solder resist layer and a surface solder wire layer, and assembling the circuit protection layer on top of the second semi-finished circuit board includes the following steps: Disposing a layer of insulating solder resist material on the second semi-finished circuit board, so that an insulating solder resist layer is formed on the second semi-finished circuit board, wherein the insulating solder resist layer covers the area above the non-three-dimensional metal circuit; A layer of anti-oxidation soldering material is disposed on the second semi-finished circuit board to form a surface soldering wire layer on the second semi-finished circuit board, wherein the surface soldering wire layer covers the three-dimensional metal circuit in contact with the outside.

[0011] Further, in some embodiments, the pattern pad layer includes three layers of conductive metal patterns, and the whole board is electroplated at the exposed pattern of the pattern insulation layer, including: Perform the first layer of full-board electroplating treatment on the exposed pattern of the pattern insulation layer; Perform a second layer of full-board electroplating treatment on the exposed pattern of the pattern insulation layer; Perform the third layer of full-board electroplating treatment on the exposed pattern of the pattern insulation layer; The metal component of the first layer of the full-board electroplating treatment is gold, the metal component of the second layer of the full-board electroplating treatment is nickel, and the metal component of the third layer of the full-board electroplating treatment is copper.

[0012] In the second aspect, to achieve the above-mentioned purpose, the embodiment of the present application proposes a three-dimensional pattern circuit board, including: A substrate, the substrate is a single-sided conductive substrate; A pattern pad layer, the pattern pad layer covers the conductive surface of the substrate, and the pattern pad layer includes a pattern insulation layer and a multi-layer conductive metal pattern; A plurality of three-dimensional circuit layers, the three-dimensional circuit layers are arranged above the pattern pad layer, wherein the three-dimensional circuit layers are stacked, the three-dimensional circuit layers include a first circuit insulation layer, a circuit conduction layer and a main circuit layer, the first circuit insulation layer includes a plurality of insulating through holes, the circuit conduction layer is arranged in the insulating through holes, the main circuit layer is arranged above the circuit insulation layer, and the main circuit layer includes a three-dimensional metal circuit; The circuit protection layer is arranged above the three-dimensional circuit layer.

[0013] Furthermore, in some embodiments, the main circuit layer that is not stacked on the topmost three-dimensional circuit layer further includes a second circuit insulation layer.

[0014] Furthermore, in some embodiments, the circuit protection layer includes an insulating solder resist layer and a surface welding wire layer, the insulating solder resist layer covers the area above the non-three-dimensional metal circuit, and the surface welding wire layer covers the three-dimensional metal circuit in contact with the outside.

[0015] The embodiment of the present application has the following beneficial effects: the present application obtains a powered carrier as a substrate, wherein the substrate is a single-sided conductive substrate, and then covers a layer of insulating material on the conductive surface of the substrate to form a pattern insulating layer on the conductive surface of the substrate, and then performs full-board electroplating treatment on the exposed pattern of the pattern insulating layer to obtain a first semi-finished circuit board, the first semi-finished circuit board includes a pattern pad layer and a substrate, the pattern pad layer includes a pattern insulating layer and a multi-layer conductive metal pattern, and further, a three-dimensional circuit layer is prepared and multi-layer stacking treatment is performed on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board, the second semi-finished circuit board includes multiple stacked three-dimensional circuit layers, pattern pad layers and substrates, and finally, a circuit protection layer is assembled on the second semi-finished circuit board to obtain a three-dimensional pattern circuit board. Then, the pattern pad layer is formed by full-board electroplating treatment, so that the copper thickness of the three-dimensional circuit layer formed by subsequent electroplating is more uniform, the copper thickness precision error of the stacking between multiple three-dimensional circuit layers is reduced, and the preparation precision of the multi-layer three-dimensional stacked circuit board is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a flow chart of a method for preparing a three-dimensional patterned circuit board provided in some embodiments of the present application; Figure 2 is a structural diagram of a first semi-finished circuit board provided in some embodiments of the present application; Figure 3 is a structural diagram of a second semi-finished circuit board provided in some embodiments of the present application; Figure 4 is a structural diagram of a three-dimensional pattern circuit board provided in some embodiments of the present application; Figure 5 Some embodiments of the present application provide Figure 1 Flow chart of step S150; Figure 6 is a flow chart of preparing a three-dimensional circuit layer provided by some embodiments of the present application; Figure 7 Some embodiments of the present application provide Figure 6 Flowchart of step S630; Figure 8 Other embodiments of the present application provide Figure 6 Flowchart of step S630; Fig. 9 It is a structural diagram before and after removing the circuit photoresist layer provided by some embodiments of the present application; Fig.10 Some embodiments of the present application provide Figure 1 Flow chart of step S160; Fig.11It is a structural diagram of a three-dimensional pattern circuit board provided in other embodiments of the present application.

[0017] Figure markings: substrate 1100, pattern pad layer 1200, pattern insulation layer 1210, conductive metal pattern 1220, three-dimensional circuit layer 1300, first circuit insulation layer 1310, circuit conduction layer 1320, main circuit layer 1330, three-dimensional metal circuit 1331, second circuit insulation layer 1332, circuit protection layer 1400, insulating solder mask layer 1410, surface welding wire layer 1420, integrated circuit 1500, heat sink 1600. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0019] In the description of the present application, it should be understood that descriptions involving orientation, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0020] It should also be noted that in the description of this application, "several" means more than one, "more" means more than two, "greater than", "less than", "exceed", etc. are understood to exclude the number itself, and "above", "below", "within", etc. are understood to include the number itself. If there is a description of "first" or "second", it is only used to distinguish the technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0022] In the description of the present application, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0023] In recent years, with the rapid development of electronic devices, the demand for circuit boards in electronic devices has become increasingly higher, and people have paid more and more attention to the precision of circuit boards.

[0024] In most of the current circuit board preparation processes, the circuit layer electroplating operation is often performed directly on the original conductive carrier, but this often causes the conductive carrier to have high and low current conditions during the electroplating process, which in turn causes the circuit layer formed by electroplating to have uneven copper thickness. At the same time, when multiple layers of circuit layers are stacked three-dimensionally on the circuit board, the copper thickness of each layer of the circuit layer is often uneven, resulting in a large deviation in the copper thickness of the stacked circuit board, which seriously affects the preparation precision of the multi-layer three-dimensional stacked circuit board.

[0025] Based on this, the embodiment of the present application provides a method for preparing a three-dimensional pattern circuit board and a three-dimensional pattern circuit board, by obtaining a powered carrier as a substrate, wherein the substrate is a single-sided conductive substrate, then covering a layer of insulating material above the conductive surface of the substrate to form a pattern insulation layer above the conductive surface of the substrate, then performing full-board electroplating treatment on the exposed pattern of the pattern insulation layer to obtain a first semi-finished circuit board, the first semi-finished circuit board includes a pattern pad layer and a substrate, the pattern pad layer includes a pattern insulation layer and a multi-layer conductive metal pattern, further, performing three-dimensional circuit layer preparation and multi-layer stacking treatment on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board, the second semi-finished circuit board includes multiple stacked three-dimensional circuit layers, pattern pad layers and substrates, and finally, assembling a circuit protection layer on the second semi-finished circuit board to obtain a three-dimensional pattern circuit board. Then, the pattern pad layer is formed by full-board electroplating treatment, so that the copper thickness of the three-dimensional circuit layer formed by subsequent electroplating is more uniform, the copper thickness precision error of the stacking between multiple three-dimensional circuit layers is reduced, and the preparation precision of the multi-layer three-dimensional stacked circuit board is improved.

[0026] In a first aspect, a method for preparing a three-dimensional patterned circuit board provided in an embodiment of the present application is specifically described through the following embodiments.

[0027] Reference Figure 1 As shown, Figure 1 1 is a flow chart of a method for preparing a three-dimensional patterned circuit board provided in some embodiments of the present application. The method for preparing a three-dimensional patterned circuit board may include but is not limited to steps S110 to S150.

[0028] Step S110: obtaining a powered carrier as a substrate.

[0029] Among them, the substrate is a single-sided conductive substrate, and there is no need for double-sided electroplating and hole plating like a double-sided conductive substrate, which improves the stability of the subsequent electroplated three-dimensional circuit layer, makes the copper thickness of the three-dimensional circuit layer formed by subsequent electroplating more uniform, and improves the preparation precision of the multi-layer three-dimensional stacked circuit board.

[0030] Step S120: Covering the conductive surface of the substrate with a layer of insulating material to form a patterned insulating layer on the conductive surface of the substrate.

[0031] Specifically, the conductive surface of the substrate is first chemically cleaned or plasma cleaned, and then a layer of insulating film is evenly covered on the conductive surface of the substrate by chemical vapor deposition or physical vapor deposition. Next, the mask containing the circuit pattern is accurately aligned with the substrate covered with insulating material, and the substrate coated with the insulating material is exposed. Further, the exposed substrate is immersed in a solvent solution and the unexposed insulating material is dissolved and removed, leaving a pattern insulating layer that solidifies after exposure, so that a precise pattern insulating layer is formed above the conductive surface of the substrate. This pattern insulating layer not only realizes the precise layout of the circuit, but also provides the necessary electrical isolation, ensuring the normal operation and high efficiency of the circuit.

[0032] Among them, insulating materials include polyimide, epoxy resin, silicon dioxide, etc. These materials not only have excellent insulation properties, but also need to have good mechanical strength, heat resistance and chemical stability to ensure that they can remain stable during subsequent processing.

[0033] Step S130: performing full-board electroplating treatment on the exposed pattern of the pattern insulation layer to obtain a first semi-finished circuit board.

[0034] Among them, refer to Figure 2 As shown, Figure 2 It is a structural diagram of a first semi-finished circuit board provided in some embodiments of the present application. The first semi-finished circuit board includes a pattern pad layer 1200 and a substrate 1100 . The pattern pad layer 1200 includes a pattern insulation layer 1210 and a multi-layer conductive metal pattern 1220 .

[0035] Specifically, the above step S130 is explained as follows: before starting electroplating, the pattern insulation layer of the substrate is activated so that the pattern insulation layer of the substrate forms active points, which is helpful for the adhesion of the metal layer. Then, the substrate is placed in the electroplating solution in the electroplating tank. At this time, the substrate serves as the cathode and the metal ions in the electroplating solution serve as the anode. Then, the electroplating tank is energized so that the metal ions in the electroplating solution are deposited on the pattern insulation layer of the substrate to form a uniform metal layer. Finally, the substrate is taken out and cleaned with a cleaning agent to obtain the first semi-finished circuit board. This process not only realizes the precise layout of complex circuits, but also improves the electrical performance and mechanical strength of the substrate, and provides a uniform current environment for the subsequent electroplating of the three-dimensional circuit layer.

[0036] Step S140: preparing a three-dimensional circuit layer and performing multi-layer stacking processing on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board.

[0037] Among them, refer to Figure 3 As shown, Figure 3 It is a structural diagram of a second semi-finished circuit board provided in some embodiments of the present application. The second semi-finished circuit board includes a plurality of stacked three-dimensional circuit layers 1300 , a pattern pad layer 1200 and a substrate 1100 .

[0038] Specifically, the above step S140 is explained as follows: above the pattern pad layer of the first semi-finished circuit board, a conductive material is deposited on the pattern pad layer to form a three-dimensional circuit layer with a specific shape and layout, and then the three-dimensional circuit layer is stacked in multiple layers to obtain a second semi-finished circuit board, thereby achieving high-density integration of complex circuits and making the thickness of each three-dimensional circuit layer evenly distributed.

[0039] Step S150: Assembling a circuit protection layer on the second semi-finished circuit board to obtain a three-dimensional pattern circuit board.

[0040] in, Figure 4 It is a structural diagram of a three-dimensional pattern circuit board provided in some embodiments of the present application. The three-dimensional pattern circuit board includes a circuit protection layer 1400, a three-dimensional circuit layer 1300, a pattern pad layer 1200 and a substrate 1100. The circuit protection layer 1400 includes an insulating solder resist layer 1410 and a surface welding wire layer 1420.

[0041] Specifically, the above step S150 is described as follows: an insulating solder mask layer and a surface solder wire layer are assembled on top of the second semi-finished circuit board to obtain a three-dimensional pattern circuit board, thereby protecting the internal circuits from external environmental erosion and physical damage, while also improving the overall structural strength and stability of the circuit board.

[0042] Reference Figure 5 As shown, Figure 5 Some embodiments of the present application provide Figure 1 In the flowchart of step S150, the method for preparing a three-dimensional patterned circuit board may include but is not limited to steps S510 to S520.

[0043] Step S510: preparing a three-dimensional circuit layer above the pattern pad layer of the first semi-finished circuit board.

[0044] Specifically, a three-dimensional circuit layer is prepared above the pattern pad layer of the first semi-finished circuit board, and the thickness of the generated three-dimensional circuit layer can be made more uniform through the multi-layer conductive metal patterns in the pattern pad layer.

[0045] Step S520: using the three-dimensional circuit layer on the first semi-finished circuit board as a base stacking structure, and sequentially preparing multiple three-dimensional circuit layers from bottom to top on the base stacking structure to obtain a second semi-finished circuit board.

[0046] Specifically, the three-dimensional circuit layer on the first semi-finished circuit board is used as a base stacking structure, and multiple three-dimensional circuit layers are prepared and stacked in sequence from bottom to top on top of the base stacking structure to obtain a second semi-finished circuit board, thereby achieving high-density integration of complex circuits and making the thickness of each three-dimensional circuit layer evenly distributed.

[0047] Reference Figure 6 As shown, Figure 6 This is a flow chart of preparing a three-dimensional circuit layer provided by some embodiments of the present application. The method of preparing a three-dimensional circuit layer may include but is not limited to steps S610 to S630.

[0048] Step S610: preparing a first circuit insulation layer, and drilling the first circuit insulation layer.

[0049] Specifically, the insulating material is coated in the form of liquid or film (for example, spraying, rolling, silk-screening, etc.) on top of the pattern pad layer or on top of the stacked three-dimensional circuit layer, and then the insulating material is cured by heating or other methods to form a first circuit insulation layer. Finally, the first circuit insulation layer is drilled according to preset drilling parameters.

[0050] The first line insulation layer after drilling includes a plurality of insulation through holes.

[0051] Step S620: Based on the insulating through hole, a circuit conductive layer is prepared in the first circuit insulating layer.

[0052] Specifically, based on the various insulating through holes on the first line insulation layer, a conductive material (such as copper, aluminum, etc.) is deposited on the inner wall of the insulating through hole of the first line insulation layer by electroplating, chemical plating or other deposition techniques, so that the conductive material fills the insulating through hole to form a line conduction layer that can be electrically connected in the vertical direction. The circuit conduction layer includes a plurality of conduction pins, each of which corresponds to each of the insulating through holes one by one, and the conduction pins pass through the corresponding insulating through holes.

[0053] Step S630: electroplating a main circuit layer on the first circuit insulation layer to obtain a three-dimensional circuit layer.

[0054] The main circuit layer is electroplated in a three-dimensional circuit pattern, and the main circuit layer and the circuit conductive layer are conductively connected to each other.

[0055] Specifically, a main circuit layer is electroplated on the first circuit insulating layer in a three-dimensional circuit pattern electroplating manner, thereby obtaining a complete three-dimensional circuit layer.

[0056] Reference Figure 7 As shown, Figure 7 Some embodiments of the present application provide Figure 6 In the flowchart of step S630, the method for preparing a three-dimensional patterned circuit board may include but is not limited to steps S710 to S720.

[0057] Step S710: When the stacked number of layers of the three-dimensional circuit layer is not the uppermost layer, a layer of insulating material is covered on the first circuit insulation layer to form a second circuit insulation layer with a pattern on the first circuit insulation layer.

[0058] Specifically, when the stacked number of layers of the three-dimensional circuit layer is not the topmost layer, a layer of insulating film is uniformly covered on the top of the first circuit insulation layer by chemical vapor deposition or physical vapor deposition, and then, the mask plate containing the circuit pattern is accurately aligned with the first semi-finished circuit board covered with insulating material, and the first semi-finished circuit board coated with the insulating material is exposed, and finally, the exposed first semi-finished circuit board is immersed in a solvent solution and the unexposed insulating material is dissolved and removed, so that a second circuit insulation layer with a pattern is formed on the top of the first circuit insulation layer.

[0059] Step S720: performing full-board electroplating treatment on the exposed pattern of the second circuit insulation layer to form a main circuit layer above the first circuit insulation layer.

[0060] Among them, from Figure 4 It can be seen that the main circuit layer 1330 includes a three-dimensional metal circuit 1331 and a second circuit insulation layer 1332 .

[0061] Specifically, the first semi-finished circuit board is first cleaned, and then placed in the plating solution in the plating tank. At this time, the first semi-finished circuit board serves as the cathode and the metal ions in the plating solution serve as the anode. Then, the plating tank is energized so that the metal ions in the plating solution deposit three-dimensional metal circuits on the second circuit insulation layer with a pattern to form a main circuit layer.

[0062] Reference Figure 8 and Fig. 9 As shown, Figure 8 Other embodiments of the present application provide Figure 6 Flowchart of step S630, Fig. 9 It is a structural diagram before and after removing the circuit photoresist layer provided by some embodiments of the present application. The method for preparing the three-dimensional pattern circuit board may include but is not limited to steps S810 to S820.

[0063] Step S810: When the stacked number of layers of the three-dimensional circuit layer is the uppermost layer, a layer of photoresist material is covered on the first circuit insulation layer, so that a circuit photoresist layer with a pattern is formed on the first circuit insulation layer.

[0064] Specifically, when the stacked number of layers of the three-dimensional circuit layer is the top layer, a layer of photoresist film is evenly covered on the top of the first circuit insulating layer by a spin coater or a spray coater and other equipment, then, the mask plate containing the circuit pattern is accurately aligned with the first semi-finished circuit board covered with the photoresist material, and the first semi-finished circuit board coated with the photoresist material is exposed, and finally, the exposed first semi-finished circuit board is immersed in a solvent solution and the unexposed photoresist material is dissolved and removed, so that a circuit photoresist layer with a pattern is formed on the top of the first circuit insulating layer.

[0065] Step S820: performing full-board electroplating treatment in the circuit photoresist layer and removing the circuit photoresist layer to form a main circuit layer above the first circuit insulation layer.

[0066] The main circuit layer 1330 includes a three-dimensional metal circuit 1331 .

[0067] Specifically, the first semi-finished circuit board is first cleaned, and then the first semi-finished circuit board is placed in the plating solution in the plating tank. At this time, the first semi-finished circuit board serves as the cathode and the metal ions in the plating solution serve as the anode. Then, the plating tank is energized to allow the metal ions in the plating solution to deposit three-dimensional metal circuits on the patterned circuit photoresist layer. Finally, a specific degumming solution or plasma degumming technology is used to completely remove the circuit photoresist layer to form a main circuit layer.

[0068] Reference Fig.10 As shown, Fig.10 Some embodiments of the present application provide Figure 1 In the flowchart of step S160, the method for preparing a three-dimensional patterned circuit board may include but is not limited to steps S1010 to S1030.

[0069] Step S1010: performing a first layer of full-board electroplating treatment on the exposed pattern of the pattern insulation layer.

[0070] Among them, the metal component of the first layer of full-board electroplating treatment is gold.

[0071] Specifically, the substrate is placed in a plating solution containing gold elements in a plating tank, and the electroplating equipment is started so that the gold ions in the plating solution are deposited on the conductive layer on the surface of the substrate under the action of the electric current. At the same time, under the restriction of the pattern insulating layer, the gold ions will only be deposited in the designated pattern area to form the first layer of metal pattern.

[0072] Step S1020: performing a second layer of full-board electroplating treatment on the exposed pattern of the pattern insulation layer.

[0073] Among them, the metal component of the second layer of full-board electroplating treatment is nickel.

[0074] Specifically, the substrate is placed in a plating solution containing nickel elements in a plating tank, and the electroplating equipment is started so that the nickel ions in the plating solution are deposited on the conductive layer on the surface of the substrate under the action of the electric current. At the same time, under the restriction of the pattern insulating layer, the nickel ions will only be deposited in the designated pattern area to form a second layer of metal pattern.

[0075] Step S1030: performing a third-layer full-board electroplating process on the exposed pattern of the pattern insulation layer.

[0076] Among them, the metal component of the third layer of full-board electroplating treatment is copper.

[0077] Specifically, the substrate is placed in a plating solution containing copper elements in a plating tank, and the electroplating equipment is started so that the copper ions in the plating solution are deposited on the conductive layer on the surface of the substrate under the action of the electric current. At the same time, under the restriction of the pattern insulating layer, the copper ions will only be deposited in the designated pattern area to form a third layer of metal pattern.

[0078] In the second aspect, a three-dimensional pattern circuit board provided in an embodiment of the present application is specifically described through the following embodiments.

[0079] Reference Figure 4As shown, the three-dimensional pattern circuit board includes a substrate 1100, a pattern pad layer 1200, a plurality of three-dimensional circuit layers 1300 and a circuit protection layer 1400, wherein the substrate 1100 is a single-sided conductive substrate 1100, the pattern pad layer 1200 covers the conductive surface of the substrate 1100, and the pattern pad layer 1200 includes a pattern insulation layer 1210 and a multi-layer conductive metal pattern 1220; the three-dimensional circuit layer 1300 is arranged above the pattern pad layer 1200, and each three-dimensional The circuit layers 1300 are stacked together, and the three-dimensional circuit layer 1300 includes a first circuit insulation layer 1310, a circuit conduction layer 1320 and a main circuit layer 1330. The first circuit insulation layer 1310 includes a plurality of insulating through holes (not marked), the circuit conduction layer 1320 is arranged in the insulating through holes, the main circuit layer 1330 is arranged above the circuit insulation layer, the main circuit layer 1330 includes a three-dimensional metal circuit 1331, and the circuit protection layer 1400 is arranged above the three-dimensional circuit layer 1300.

[0080] Furthermore, the main circuit layer 1330 that is not stacked on the top three-dimensional circuit layer 1300 further includes a second circuit insulation layer 1332 .

[0081] Furthermore, the circuit protection layer 1400 includes an insulating solder resist layer 1410 and a surface welding wire layer 1420. The insulating solder resist layer 1410 covers the non-three-dimensional metal circuit area, and the surface welding wire layer 1420 covers the three-dimensional metal circuit in contact with the outside.

[0082] It should also be noted that, referring to Fig.11 As shown, Fig.11 It is a structural diagram of a three-dimensional pattern circuit board provided in some other embodiments of the present application. The three-dimensional pattern circuit board also includes an integrated circuit 1500 and a heat sink 1600, wherein the heat sink 1600 is embedded in the middle of the three-dimensional pattern circuit board and connected to the insulating solder resist layer 1410, and the integrated circuit 1500 is arranged above the heat sink 1600, and the integrated circuit 1500 is connected to each three-dimensional circuit layer 1300 by wire bonding.

[0083] The heat sink 1600 is connected based on the wire bonding of the integrated circuit 1500 , and the heat sink 1600 can also quickly dissipate heat for each three-dimensional circuit layer 1300 , thereby improving the heat dissipation efficiency of the three-dimensional pattern circuit board.

[0084] The embodiments described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of technology and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0085] Those skilled in the art will appreciate that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and may include more or fewer steps than shown in the figures, or a combination of certain steps, or different steps.

[0086] Those skilled in the art will appreciate that all or some of the steps in the methods disclosed above, and the functional modules / units in the systems and devices may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0087] The terms "first", "second", "third", "fourth", etc. (if any) in the specification of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0088] It should be understood that in the present application, "at least one (item)" means one or more, and "plurality" means two or more. "And / or" is used to describe the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, c can be single or multiple.

[0089] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. A method for preparing a three-dimensional pattern circuit board, It is characterized in that include: Obtaining a powered carrier as a substrate, wherein the substrate is a single-sided conductive substrate; Covering a layer of insulating material above the conductive surface of the substrate to form a patterned insulating layer above the conductive surface of the substrate; Performing full-board electroplating treatment at the exposed pattern of the pattern insulation layer to obtain a first semi-finished circuit board, wherein the first semi-finished circuit board comprises a pattern pad layer and the substrate, and the pattern pad layer comprises the pattern insulation layer and a multi-layer conductive metal pattern; Performing a three-dimensional circuit layer preparation and a multi-layer stacking process on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board, wherein the second semi-finished circuit board includes a plurality of stacked three-dimensional circuit layers, the pattern pad layer and the substrate; A circuit protection layer is assembled on the second semi-finished circuit board to obtain a three-dimensional pattern circuit board.

2. The method for preparing a three-dimensional patterned circuit board according to claim 1, It is characterized in that The method of preparing a three-dimensional circuit layer and performing multi-layer stacking on the pattern pad layer of the first semi-finished circuit board to obtain a second semi-finished circuit board includes: Preparing a three-dimensional circuit layer above the pattern pad layer of the first semi-finished circuit board; The three-dimensional circuit layer on the first semi-finished circuit board is used as a base stacking structure, and multiple layers of the three-dimensional circuit layer are sequentially prepared from bottom to top on top of the base stacking structure to obtain the second semi-finished circuit board.

3. The method for preparing a three-dimensional patterned circuit board according to claim 2, It is characterized in that The three-dimensional circuit layer includes a first circuit insulation layer, a circuit conduction layer and a main circuit layer. The preparation of a layer of the three-dimensional circuit layer includes: preparing the first line insulation layer, and performing drilling processing on the first line insulation layer, wherein the first line insulation layer after the drilling processing comprises a plurality of insulating through holes; Based on the insulating through-holes, the circuit conductive layer is prepared in the first circuit insulating layer, the circuit conductive layer includes a plurality of conductive pins, each conductive pin corresponds to each insulating through-hole, and the conductive pin passes through the corresponding insulating through-hole; The main circuit layer is electroplated on the first circuit insulation layer to obtain the three-dimensional circuit layer, wherein the main circuit layer is electroplated in a three-dimensional circuit pattern, and the main circuit layer and the circuit conductive layer are conductively connected to each other.

4. The method for preparing a three-dimensional patterned circuit board according to claim 3, It is characterized in that The step of electroplating a main circuit layer on the first circuit insulation layer comprises: When the stacked number of layers of the three-dimensional circuit layer is not the uppermost layer, a layer of insulating material is covered on the first circuit insulation layer to form a second circuit insulation layer with a pattern on the first circuit insulation layer; Full-board electroplating is performed on the exposed pattern of the second line insulation layer to form a main line layer above the first line insulation layer, and the main line layer includes a three-dimensional metal line and the second line insulation layer.

5. The method for preparing a three-dimensional patterned circuit board according to claim 3, It is characterized in that The step of electroplating a main circuit layer on the first circuit insulation layer further comprises: When the stacked number of layers of the three-dimensional circuit layer is the uppermost layer, a layer of photoresist material is covered on the first circuit insulation layer, so that a circuit photoresist layer with a pattern is formed on the first circuit insulation layer; Full-board electroplating is performed at the exposed pattern of the line photoresist layer, and the line photoresist layer is removed, so that a main line layer is formed above the first line insulation layer, and the main line layer includes a three-dimensional metal line.

6. The method for preparing a three-dimensional patterned circuit board according to claim 4 or 5, It is characterized in that The circuit protection layer includes an insulating solder resist layer and a surface solder wire layer, and the circuit protection layer is assembled on the second semi-finished circuit board, including: Disposing a layer of insulating solder resist material on the second semi-finished circuit board, so that the insulating solder resist layer is formed on the second semi-finished circuit board, wherein the insulating solder resist layer covers the area above the non-three-dimensional metal circuit; A layer of anti-oxidation soldering material is disposed on the second semi-finished circuit board to form the surface soldering wire layer on the second semi-finished circuit board, wherein the surface soldering wire layer covers the three-dimensional metal circuit in contact with the outside.

7. The method for preparing a three-dimensional patterned circuit board according to claim 1, It is characterized in that The pattern pad layer includes three layers of conductive metal patterns, and the whole board is electroplated at the exposed pattern of the pattern insulation layer, including: Performing a first layer of full-board electroplating treatment at the exposed pattern of the pattern insulation layer; Performing a second layer of full-board electroplating treatment at the exposed pattern of the pattern insulation layer; Performing a third-layer full-board electroplating process on the exposed pattern of the pattern insulation layer; Among them, the metal component of the first layer of full-plate electroplating treatment is gold, the metal component of the second layer of full-plate electroplating treatment is nickel, and the metal component of the third layer of full-plate electroplating treatment is copper.

8. A three-dimensional pattern circuit board, It is characterized in that The method for preparing a three-dimensional patterned circuit board according to any one of claims 1 to 7 is characterized by comprising: A substrate, wherein the substrate is a single-sided conductive substrate; A pattern pad layer, the pattern pad layer covers the conductive surface of the substrate, the pattern pad layer comprises a pattern insulation layer and a multi-layer conductive metal pattern; A plurality of three-dimensional circuit layers, wherein the three-dimensional circuit layers are arranged above the pattern pad layer, wherein the three-dimensional circuit layers are stacked, the three-dimensional circuit layers include a first circuit insulation layer, a circuit conduction layer and a main circuit layer, the first circuit insulation layer includes a plurality of insulating through holes, the circuit conduction layer is arranged in the insulating through holes, the main circuit layer is arranged above the circuit insulation layer, and the three-dimensional circuit layer includes a three-dimensional metal circuit; A circuit protection layer is arranged above the three-dimensional circuit layer.

9. The three-dimensional patterned circuit board according to claim 8, It is characterized in that The main circuit layer that is not stacked on the top of the three-dimensional circuit layer also includes a second circuit insulation layer.

10. The three-dimensional patterned circuit board according to claim 8, It is characterized in that The circuit protection layer includes an insulating solder resist layer and a surface welding wire layer, wherein the insulating solder resist layer covers the area not including the three-dimensional metal circuit, and the surface welding wire layer covers the three-dimensional metal circuit in contact with the outside.

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