Task processing method and device and terminal equipment

Abstract

The embodiment of the invention provides a task processing method and device and terminal equipment. The method comprises the following steps: acquiring a task processing request, wherein the task processing request is used for requesting to process at least one first task simulated by a chip; obtaining historical task processing information, wherein the historical task processing information comprises at least one second task; according to the at least one first task and the at least one second task, a target task set is determined, and the number of tasks included in the target task set is smaller than or equal to the number of the at least one first task; and processing the target task set according to the task processing request and the historical task processing information to obtain an analogue simulation result of the chip. And the simulation efficiency of the chip is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of chip technology, and in particular to a task processing method, apparatus and terminal device. Background Art

[0002] After the design of each module of the chip is completed, the functions of each module of the chip can be simulated to ensure that each module in the chip can operate normally.

[0003] In the actual application process, each module of the chip can execute at least one task corresponding to this case by pre-setting the stimulus and operating environment in the simulation application to obtain the execution result of each task. According to the execution result of each task, the result of the simulation is determined. In this way, it is determined whether each module in the chip can operate normally and realize the corresponding function. In the above process, when there are the same tasks in two cases, if the stimulus and operating environment set this time are different, this simulation needs to repeat the same task as the last case, and it is impossible to directly execute a task different from the last case based on the execution result of the same task last time, resulting in low efficiency of chip simulation. Summary of the invention

[0004] The embodiments of the present application provide a task processing method, apparatus and terminal device to solve the problem of low efficiency of chip simulation.

[0005] In a first aspect, an embodiment of the present application provides a task processing method, including:

[0006] Obtaining a task processing request, where the task processing request is used to request processing of at least one first task of chip simulation;

[0007] Acquire historical task processing information, where the historical task processing information includes at least one second task;

[0008] Determine a target task set according to the at least one first task and the at least one second task, wherein the number of tasks included in the target task set is less than or equal to the number of the at least one first task;

[0009] The target task set is processed according to the task processing request and the historical task processing information to obtain a simulation result of the chip.

[0010] In a possible implementation, determining a target task set according to the at least one first task and the at least one second task includes:

[0011] Determine at least one task to be selected from the at least one second task, the task to be selected matching the first task;

[0012] Determine a first associated task corresponding to each first task;

[0013] Determine a second associated task corresponding to each to-be-selected task;

[0014] The target task set is determined in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

[0015] In a possible implementation, determining the target task set in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task includes:

[0016] For any task to be selected, determine a first task corresponding to the task to be selected;

[0017] If the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task, determining that the task to be selected is an intermediate task, and obtaining at least one intermediate task;

[0018] It is determined that the target task set includes tasks in the at least one first task excluding the at least one intermediate task.

[0019] In a possible implementation manner, the historical task information further includes the execution time of each second task and the level information corresponding to each second task; and the target task set is processed according to the task processing request and the historical task processing information to obtain the simulation result of the chip, including:

[0020] Determine the execution time of each intermediate task according to the execution time of each second task;

[0021] Determine a target intermediate task among the at least one intermediate task, wherein the target intermediate task is the task with the latest execution time;

[0022] Determine the level information of the target intermediate task in the level information corresponding to each second task;

[0023] The target task set is processed according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip.

[0024] In a possible implementation manner, the task processing request further includes at least one operating parameter; and processing the target task set according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip includes:

[0025] Determining the execution time of each target task in the target task set;

[0026] According to the execution time of each target task, a target time and at least one non-target time are determined;

[0027] According to the level information of the target intermediate task, the target signal corresponding to the target moment is processed to obtain the target level information;

[0028] According to the at least one operating parameter and the target level information, the target task set is processed at the at least one non-target time to obtain a simulation result of the chip;

[0029] The target time is a preset time, and the non-target time is an execution time other than the target time among the at least one execution time.

[0030] In a possible implementation, processing the level signal corresponding to the target time according to the level information of the target intermediate task to obtain the target level information includes:

[0031] Determine, according to the level information of the target intermediate task, an intermediate signal corresponding to the target intermediate task and a target value corresponding to the intermediate signal at a first moment, wherein the first moment is a moment when the execution of the target intermediate task is completed;

[0032] If the intermediate signal matches the target signal, the first value of the target signal is updated according to the target value to obtain the target level information, where the target level information includes the target signal and the target value corresponding to the target time.

[0033] In a possible implementation, processing the target task set at the at least one non-target time according to the at least one operating parameter and the target level information to obtain the processing result includes:

[0034] For any non-target moment, determining a target task corresponding to the non-target moment;

[0035] Determine whether there is a historical task for the target task, where the historical task is the target task executed at the previous execution time of the current time;

[0036] If yes, determining the execution result of the historical task, and processing the target task according to the at least one operating parameter and the at least one execution result to obtain the processing result corresponding to the target task;

[0037] If not, processing the target task according to the at least one operating parameter and the target level information to obtain a processing result corresponding to the target task;

[0038] Determine that the simulation result of the chip includes the processing result corresponding to each target task in the target task set.

[0039] In a second aspect, an embodiment of the present application provides a task processing device, the device comprising:

[0040] A first acquisition module, used for acquiring a task processing request, wherein the task processing request is used for requesting processing of at least one first task of chip simulation;

[0041] A second acquisition module, used to acquire historical task processing information, wherein the historical task processing information includes at least one second task;

[0042] A determination module, configured to determine a target task set according to the at least one first task and the at least one second task, wherein the number of tasks included in the target task set is less than or equal to the number of the at least one first task;

[0043] The processing module is used to process the target task set according to the task processing request and the historical task processing information to obtain the simulation result of the chip.

[0044] In a possible implementation manner, the determining module is specifically configured to:

[0045] Determine at least one task to be selected from the at least one second task, the task to be selected matching the first task;

[0046] Determine a first associated task corresponding to each first task;

[0047] Determine a second associated task corresponding to each to-be-selected task;

[0048] The target task set is determined in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

[0049] In a possible implementation manner, the determining module is specifically configured to:

[0050] For any task to be selected, determine a first task corresponding to the task to be selected;

[0051] If the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task, determining that the task to be selected is an intermediate task, and obtaining at least one intermediate task;

[0052] It is determined that the target task set includes tasks in the at least one first task excluding the at least one intermediate task.

[0053] In a possible implementation manner, the processing module is specifically used to:

[0054] Determine the execution time of each intermediate task according to the execution time of each second task;

[0055] Determine a target intermediate task among the at least one intermediate task, wherein the target intermediate task is the task with the latest execution time;

[0056] Determine the level information of the target intermediate task in the level information corresponding to each second task;

[0057] The target task set is processed according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip.

[0058] In a possible implementation manner, the processing module is specifically used to:

[0059] Determining the execution time of each target task in the target task set;

[0060] According to the execution time of each target task, a target time and at least one non-target time are determined;

[0061] According to the level information of the target intermediate task, the target signal corresponding to the target moment is processed to obtain the target level information;

[0062] According to the at least one operating parameter and the target level information, the target task set is processed at the at least one non-target time to obtain a simulation result of the chip;

[0063] The target time is a preset time, and the non-target time is an execution time other than the target time among the at least one execution time.

[0064] In a possible implementation manner, the processing module is specifically used to:

[0065] Determine, according to the level information of the target intermediate task, an intermediate signal corresponding to the target intermediate task and a target value corresponding to the intermediate signal at a first moment, wherein the first moment is a moment when the execution of the target intermediate task is completed;

[0066] If the intermediate signal matches the target signal, the first value of the target signal is updated according to the target value to obtain the target level information, where the target level information includes the target signal and the target value corresponding to the target time.

[0067] In a possible implementation manner, the processing module is specifically used to:

[0068] For any non-target moment, determining a target task corresponding to the non-target moment;

[0069] Determine whether there is a historical task for the target task, where the historical task is the target task executed at the previous execution time of the current time;

[0070] If yes, determining the execution result of the historical task, and processing the target task according to the at least one operating parameter and the at least one execution result to obtain the processing result corresponding to the target task;

[0071] If not, processing the target task according to the at least one operating parameter and the target level information to obtain a processing result corresponding to the target task;

[0072] Determine that the simulation result of the chip includes the processing result corresponding to each target task in the target task set.

[0073] In a third aspect, the present application provides a chip having a computer program stored thereon, wherein when the computer program is executed by the chip, the method as described in any one of the first aspects is implemented.

[0074] In a fourth aspect, the present application provides a chip module having a computer program stored thereon, and when the computer program is executed by the chip module, the method as described in any one of the first aspects is implemented.

[0075] In a fifth aspect, an embodiment of the present application provides a terminal device, including:

[0076] at least one processor; and

[0077] a memory communicatively connected to the at least one processor; wherein,

[0078] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can perform any method described in the first aspect.

[0079] In a sixth aspect, an embodiment of the present application provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable the computer to execute any one of the methods in the first aspect.

[0080] In a seventh aspect, an embodiment of the present application provides a computer program product, including a computer program, which implements any method in the first aspect when executed by a processor.

[0081] The task processing method, apparatus, and terminal device provided in the embodiments of the present application can determine a target task set in at least one first task to be processed based on historical task processing information when the chip is simulating, and process each task in the target task set to obtain a simulation result of the chip. Since the number of tasks included in the target task set is less than or equal to the number of at least one first task, the chip can directly process at least one task in at least one first task that has not been processed in the historical period based on the historical task processing information. This avoids the situation where the current simulation needs to repeat the same task as the last case, and cannot directly execute a task different from the last case based on the execution result of the same task last time. This improves the efficiency of chip simulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] Figure 1 A schematic diagram of an application scenario provided by an embodiment of the present application;

[0083] Figure 2 A flowchart of a task processing method provided in an embodiment of the present application;

[0084] Figure 3 A schematic diagram of the process of obtaining a task processing request provided in an embodiment of the present application;

[0085] Figure 4 A flowchart of another task processing method provided in an embodiment of the present application;

[0086] Figure 5A A schematic diagram of a process for determining target level information provided in an embodiment of the present application;

[0087] Figure 5B A schematic diagram of another process for determining target level information provided by an embodiment of the present application;

[0088] Fig. 6A A schematic diagram of a process of task processing in an operating environment provided by an embodiment of the present application;

[0089] Figure 6B A schematic diagram of a process of task processing in another operating environment provided in an embodiment of the present application;

[0090] Figure 7 A schematic diagram of the task processing process provided in an embodiment of the present application;

[0091] Figure 8 A schematic diagram of the structure of a task processing device provided in an embodiment of the present application;

[0092] Fig. 9 A schematic diagram of the structure of a terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0093] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0094] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0095] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0096] For ease of understanding, below, combined Figure 1 , the application scenarios to which the embodiments of the present application are applicable are described.

[0097] Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of the present application. Figure 1 , including a terminal device 101. The terminal device 101 may be a computer. The terminal device 101 is provided with an application program, and the function of each module in the chip can be simulated by the application program to determine whether each module in the chip can operate normally.

[0098] In the actual application process, each module of the chip can execute at least one task corresponding to this case by pre-setting the stimulus and operating environment in the simulation application to obtain the execution result of each task. According to the execution result of each task, the result of the simulation is determined. In this way, it is determined whether each module in the chip can operate normally and realize the corresponding function. In the above process, when there are the same tasks in two cases, if the stimulus and operating environment set this time are different, this simulation needs to repeat the same task as the last case, and it is impossible to directly execute a task different from the last case based on the execution result of the same task last time, resulting in low efficiency of chip simulation.

[0099] In an embodiment of the present application, when the chip is simulating, a target task set can be determined in at least one first task to be processed based on historical task processing information, and each task in the target task set can be processed to obtain a simulation result of the chip. Since the number of tasks included in the target task set is less than or equal to the number of at least one first task, the chip can directly process at least one task in at least one first task that has not been processed in the historical period based on the historical task processing information. This avoids the situation where the current simulation needs to repeat the same task as the last case, and it is impossible to directly execute a task different from the last case based on the execution result of the same task last time. This improves the efficiency of chip simulation.

[0100] The method shown in the present application is described below through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be described repeatedly in different embodiments.

[0101] Figure 2 A flowchart of a task processing method provided in an embodiment of the present application. Figure 2 , the method may include:

[0102] S201: Obtain a task processing request.

[0103] The execution subject of the embodiment of the present application may be a terminal device, or a chip, a chip module or a task processing device set in the terminal device. The task processing device may be implemented by software, or by a combination of software and hardware. The terminal device may be a computer.

[0104] The task processing request is used to request processing of at least one first task of chip simulation.

[0105] The user can determine the chip to be tested and the test cases corresponding to each module in the chip in the application of the terminal device. The terminal device determines the test case in response to the user's input selection operation and obtains at least one first task corresponding to the test case. It is determined that the task processing request includes at least one first task.

[0106] Next, combine Figure 3 , describes the process of obtaining a task processing request. Figure 3 This is a schematic diagram of the process of obtaining a task processing request provided in an embodiment of the present application. Figure 3 , including interfaces 301 and 302. Interfaces 301 and 302 may be pages provided by the terminal device. Referring to interface 301, the user clicks the icon corresponding to the simulation application in the terminal device, and the terminal device displays the operation page of the simulation application in response to the user's click operation. The operation page includes a drop-down selection menu corresponding to the chip, a drop-down selection menu corresponding to at least one test case, and a text input box.

[0107] Referring to interface 302, the user determines that the chip to be tested is chip A in the drop-down selection menu corresponding to the chip, determines that the test case is case A2 in the drop-down selection menu corresponding to test case 1, and clicks the confirmation icon. In response to the user's input selection operation, the terminal device obtains at least one first task corresponding to test case A2, including task 1, task 2, task 3, task 6, and task 7. And it is determined that the task processing request includes at least one first task. The task processing request is used to request the processing of tasks 1, task 2, task 3, task 6, and task 7 simulated by chip A.

[0108] S202: Obtain historical task processing information.

[0109] The historical task processing information includes at least one second task. The historical task processing information may also include the execution time of each second task, the level information corresponding to each second task, and the execution result of each second task.

[0110] After the task is executed, the terminal device can generate historical task processing information and store the historical task processing information in a preset storage space of the terminal device. In this way, the historical task processing information can be obtained in the preset storage space when the chip simulation is performed next time.

[0111] S203: Determine a target task set according to at least one first task and at least one second task.

[0112] The number of tasks included in the target task set is less than or equal to the number of the at least one first task.

[0113] A target task set can be determined based on at least one first task and at least one second task in the following manner: in at least one second task, determine at least one to-be-selected task, which matches the first task; determine a first associated task corresponding to each first task; determine a second associated task corresponding to each to-be-selected task; and determine a target task set in at least one first task based on at least one first associated task, at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

[0114] The tasks in the target task set are tasks that have not been executed in the historical period.

[0115] For example, the historical task processing information may be specifically shown in Table 1:

[0116] Table 1

[0117]

[0118]

[0119] According to the above example, it is determined that at least one first task includes Task 1, Task 2, Task 3, Task 6, and Task 7. In at least one second task shown in Table 1, it is determined that Task 1, Task 2, and Task 3 match the first task, and then it can be determined that at least one to-be-selected task includes Task 1, Task 2, and Task 3. Since the second associated task corresponding to each to-be-selected task matches the first associated task corresponding to the first task, it can be determined that Task 1, Task 2, and Task 3 are not included in the target task set. Task 6 and Task 7 are included in the target task set.

[0120] S204: Process the target task set according to the task processing request and the historical task processing information to obtain the simulation result of the chip.

[0121] Before performing simulation, the operating environment of the simulation can be determined. In the operating environment, the target task set is processed through the simulation application to obtain the simulation result of the chip.

[0122] The operating environment may be an operating environment set by the user in real time, or an operating environment used in a historical period. This application does not impose any restrictions.

[0123] For example, according to the above example, it is determined that the target task set includes task 6 and task 7. When processing the target task set, first determine at least one operating parameter corresponding to the operating environment. According to the historical task information, determine the execution results of tasks 1 to 3. According to at least one operating parameter and the execution results of tasks 1 to 3, process the target task set to obtain the simulation result of the chip.

[0124] The task processing method provided in the embodiment of the present application obtains a task processing request. Obtains historical task processing information. Determines a target task set based on at least one first task and at least one second task. Processes the target task set based on the task processing request and the historical task processing information to obtain a simulation result of the chip. Since the number of tasks included in the target task set is less than or equal to the number of at least one first task, the chip can directly process at least one task in at least one first task that has not been processed in a historical period based on the historical task processing information. Avoids the situation where the current simulation needs to repeat the same task as the last case, and cannot directly execute a task different from the last case based on the execution result of the same task last time. Improves the efficiency of chip simulation.

[0125] Based on any of the above embodiments, Figure 4 , the detailed process of task processing is explained.

[0126] Figure 4 This is a flowchart of another task processing method provided in an embodiment of the present application. Figure 4 , the method comprising:

[0127] S401: Obtain a task processing request.

[0128] It should be noted that the execution process of S401 can refer to S201 and will not be repeated here.

[0129] S402: Obtain historical task processing information.

[0130] For example, the historical task processing information may be specifically shown in Table 2:

[0131] Table 2

[0132] Second Task Second related task Execution time Level information Task B1 Task B2 Time B1 Signal B; 0 Task B2 Task B1, Task B3 Time B2 Signal B; 1 Task B3 Task B2, Task B4 Time B3 Signal B; 1 Task B4 Task B3, Task B5 Moment B4 Signal B; 1 Task B5 Task B4 Time B5 Signal B; 0

[0133] The level information is used to indicate the level value corresponding to the signal during the execution of the task. The level information includes the signal and the level value corresponding to the signal.

[0134] S403: Determine at least one task to be selected from at least one second task.

[0135] The candidate task is matched with the first task.

[0136] For example, assume that the task processing request is for requesting to process tasks B1, B2, B3, B6 and B7 simulated by chip B. According to the historical task processing information shown in Table 2, it can be determined that among the at least one second task shown in Table 2, at least one candidate task includes tasks B1, B2 and B3.

[0137] S404: Determine a first associated task corresponding to each first task.

[0138] The associated tasks may be determined according to the execution order. The associated tasks may be the tasks corresponding to the previous execution time before the current execution time of the task, and / or the tasks corresponding to the next execution time before the current execution time of the task.

[0139] For example, according to the execution time of Table 2 above, the execution order can be determined to be Task B1 to Task B5. For Task B2, it is determined that the second associated task of Task B2 includes Task B1 and Task B3. According to the execution order, it can be determined that Task B1 is the task corresponding to the previous execution time of Task B2. Task B3 is the task corresponding to the next execution time of Task B2.

[0140] The execution order of the at least one first task may be determined according to a test case corresponding to the at least one first task.

[0141] For example, according to the above example, it is determined that at least one first task includes task B1, task B2, task B3, task B6, and task B7. According to the test case corresponding to at least one first task, the execution order of at least one first task is determined to be task B1, task B2, task B3, task B6, and task B7. According to the execution order, it can be determined that the first associated task corresponding to each first task can be specifically shown in Table 3:

[0142] Table 3

[0143] First Mission First related task Task B1 Task B2 Task B2 Task B1, Task B3 Task B3 Task B2, Task B6 Task B6 Task B3, Task B7 Task B7 Task B6

[0144] S405: Determine the second associated task corresponding to each task to be selected.

[0145] For example, according to Table 2 above, it can be determined that the second associated task corresponding to each to-be-selected task can be specifically as shown in Table 4:

[0146] Table 4

[0147] Tasks to be selected Second related task Task B1 Task B2 Task B2 Task B1, Task B3 Task B3 Task B2, Task B4

[0148] S406: Determine a target task set in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

[0149] A target task set can be determined in at least one first task based on at least one first associated task, at least one to-be-selected task, and a second associated task corresponding to each to-be-selected task in the following manner: for any to-be-selected task, determine the first task corresponding to the to-be-selected task; if the second associated task corresponding to the to-be-selected task matches the first associated task corresponding to the first task, determine that the to-be-selected task is an intermediate task, and obtain at least one intermediate task; determine that the target task set includes tasks in at least one first task excluding at least one intermediate task.

[0150] If among the first associated tasks corresponding to the first task, the first associated task corresponding to the first task is the same as the second associated task corresponding to the selected task, it can be determined that the second associated task corresponding to the selected task matches the first associated task corresponding to the first task.

[0151] For example, according to the above example, it is determined that at least one task to be selected includes task B1, task B2, and task B3. For task B1, it is determined that the first associated task of task B1 is task B2, and the second associated task is task B2. Therefore, it can be determined that the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task, and task B1 can be determined to be an intermediate task.

[0152] For task B2, the first associated tasks of task B2 are determined to be task B1 and task B3, and the second associated tasks are task B1 and task B3. Therefore, it can be determined that the second associated task corresponding to the selected task matches the first associated task corresponding to the first task, and task B2 can be determined to be an intermediate task.

[0153] For task B3, it is determined that the first associated task of task B3 is task B2 and task B4, and the second associated task of task B3 is task B2 and task B6. Since among the first associated tasks corresponding to the first task, the first associated task corresponding to the first task is the same as the second associated task corresponding to the task to be selected, it can be determined that the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task. Therefore, it can be determined that task B3 is an intermediate task.

[0154] In summary, it can be determined that at least one intermediate task includes task B1, task B2 and task B3. In at least one first task, it is determined that the first tasks other than the at least one intermediate task include task B6 and task B7. Therefore, it can be determined that the target task set is task B6 and task B7.

[0155] S407: Determine the execution time of each intermediate task according to the execution time of each second task.

[0156] For example, according to the historical task processing information shown in Table 2 above, the execution time of each intermediate task can be determined as shown in Table 5:

[0157] Table 5

[0158] Intermediate Tasks Execution time Task B1 Time B1 Task B2 Time B2 Task B3 Time B3

[0159] S408. Determine a target intermediate task in at least one intermediate task.

[0160] The target intermediate task is the task with the latest execution time.

[0161] For example, according to Table 5 above, it is determined that the latest execution time is time B3, and the target intermediate task can be determined to be task B3.

[0162] S409: Determine the level information of the target intermediate task in the level information corresponding to each second task.

[0163] For example, according to the above example, the target intermediate task is determined to be task B3. According to the above Table 2, it can be determined that the level information of the target intermediate task includes signal B;1.

[0164] S410 , processing the target task set according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip.

[0165] The task processing request also includes at least one operation parameter.

[0166] The target task set can be processed according to the task processing request and the level information of the target intermediate task to obtain the simulation result of the chip in the following manner: determine the execution time of each target task in the target task set; determine the target time and at least one non-target time according to the execution time of each target task; process the target signal corresponding to the target time according to the level information of the target intermediate task to obtain the target level information; process the target task set at at least one non-target time according to at least one operating parameter and the target level information to obtain the simulation result of the chip. Wherein, the target time is a preset time, and the non-target time is an execution time other than the target time in at least one execution time.

[0167] The preset time can be the start time of processing the target task set, or any time set by the user during the simulation process. This application does not limit it. The preset time can be set in advance and stored in the preset storage space of the terminal device.

[0168] The target signal can be processed according to the level information of the target intermediate task to obtain the target level information in the following manner: according to the level information of the target intermediate task, determine the intermediate signal corresponding to the target intermediate task and the target value corresponding to the intermediate signal at the first moment, the first moment being the moment when the execution of the target intermediate task is completed; if the intermediate signal matches the target signal, then according to the target value, update the first value of the target signal to obtain the target level information, the target level information including the target signal and the target value corresponding to the target moment.

[0169] The state value of the signal corresponding to the execution time can be obtained to determine the level information. For example, the state value can be a register value, an input signal value of the model, an output signal value of the model, etc.

[0170] For example, according to the above example, it is determined that the level information of the target intermediate task includes signal B; 1. Then it can be determined that the signal corresponding to the target intermediate task is signal B, and the level value corresponding to signal B during the execution of the target intermediate task is 1. Assuming that the execution completion moment of the target intermediate task is moment B31, the first moment can be determined to be moment B31. Therefore, according to the level information of the target intermediate task, it can be determined that the intermediate signal corresponding to the target intermediate task is signal B, and the target value corresponding to signal B at moment B31 is 1.

[0171] Next, combine Figure 5A-Figure 5B , the process of determining the target level information is described. Figure 5A A schematic diagram of a process for determining target level information provided by an embodiment of the present application. Please refer to Figure 5, which includes an intermediate signal 501 and a target signal 502. Assuming that the intermediate signal 501 is the signal A corresponding to task A3, the intermediate signal 501 can be a register signal. The target signal 502 is a signal generated when the target task set is processed. Determine that the completion time of task B3 is moment A3, then the first moment can be determined to be moment A3. According to the level information of the intermediate signal 501, determine that the level value corresponding to the intermediate signal 501 at moment A3 is 0, then the target value 0 can be determined. The terminal device determines that the intermediate signal 501 is a register signal and the target signal 502 is a register signal, then it can be determined that the intermediate signal 501 and the target signal 502 match. Therefore, the terminal device updates the level value corresponding to the target moment to the target value 0. That is, the level value of the target signal 501 at the target moment is 0, and the target level information includes the target signal 501 and the target value 0 corresponding to the target moment.

[0172] Figure 5AAnother process schematic diagram for determining target level information provided by an embodiment of the present application. Please refer to Figure 5, including an intermediate signal 503 and a target signal 504. Assuming that the intermediate signal 503 is the signal A corresponding to task A4, the intermediate signal 503 can be a register signal. The target signal 504 is a signal generated when the target task set is processed. Determine the completion time of task A4 as moment A4, then the first moment can be determined as moment A4. According to the level information of the intermediate signal 503, determine that the level value corresponding to the intermediate signal 503 at moment A4 is 1, then the target value 1 can be determined. The terminal device determines that the intermediate signal 503 is a register signal and the target signal 504 is a register signal, then it can be determined that the intermediate signal 503 and the target signal 504 match. Therefore, the terminal device updates the level value corresponding to the target moment to the target value 1. That is, the level value of the target signal 503 at the target moment is 1, and the target level information includes the target signal 504 and the target value 1 corresponding to the target moment.

[0173] Optionally, the target signal and the target intermediate task can be determined at any time, and the target signal can be processed according to the level information of the target intermediate task to obtain the target level information. For example, according to the above example, it can be determined that the target task set includes task B3, task B6 and task B7. At this time, the target intermediate task can be task B2. The level value of the signal corresponding to task B2 at time B2 can be obtained, and the target time is determined to be the start time of executing task B3. If the target signal matches the signal corresponding to task B2, the level value of the target signal corresponding to the target time can be updated to the level value of the signal corresponding to task B2 at time B2. Subsequently, the target task set is processed at at least one non-target time according to at least one operating parameter and the target level information to obtain the simulation result of the chip.

[0174] The target level information is obtained by updating the level value of the target signal. The target level information can be determined by matching the target signal with the intermediate signal. The same operating environment is not required, and it can be performed between test cases in different operating environments, thereby improving the efficiency of simulation. The level value of the updated source signal remains unchanged, and the intermediate logic is restored to the level value at the target moment under the influence of the source signal, which will not affect the verification quality. The test environment can freely perform any stimulus, and the simulation acceleration effect depends on the corresponding reduction of the configuration stimulus action when the target moment is updated to the target value of the intermediate signal, and there is a large space for user customization.

[0175] The target task set can be processed at at least one non-target moment according to at least one operating parameter and target level information to obtain the simulation result of the chip in the following manner: for any non-target moment, determine the target task corresponding to the non-target moment; determine whether there is a historical task for the target task, the historical task is the target task executed at the previous execution moment of the current moment; if so, determine the execution result of the historical task, and process the target task according to at least one operating parameter and at least one execution result to obtain the processing result corresponding to the target task; if not, process the target task according to at least one operating parameter and target level information to obtain the processing result corresponding to the target task; determine that the simulation result of the chip includes the processing result corresponding to each target task in the target task set.

[0176] For example, according to the above example, the target task set is determined to be task B6 and task B7. For task B6 corresponding to execution time B6, it is determined that there is no historical task for task B6, and then it is determined that the target level information includes a target signal and a target value corresponding to the target time. Task B6 is processed according to at least one operating parameter and the target level information, and the processing result corresponding to the target task is result B6. For task B7 corresponding to execution time B7, it is determined that the target task executed at the last execution time of task B7 is task B6. Therefore, it is determined that there is a historical task for task B7, which is task B6. The execution result of task B6 is determined to be result B6. Task B7 is processed according to at least one operating parameter and result B6, and the processing result corresponding to the target task is result B7. It is determined that the simulation results of the chip include result B6 and result B7.

[0177] The task processing method provided in the embodiment of the present application can be applied to test cases in the same operating environment and in different operating environments. Figure 6A-6B , explaining the process of task processing.

[0178] Fig. 6A This is a schematic diagram of a task processing process in an operating environment provided by an embodiment of the present application. Fig. 6A , including case 1 and case 2. Among them, case 1 includes tasks 1 to 5, and case 2 includes tasks 1 to 3, task 6, and task 7. The operating environment of case 1 and the operating environment of case 2 are both operating environment 1. When the operating environment of case 1 is the same as the operating environment of case 2, and the simulation of case 2 is performed after the simulation of case 1 is completed, the method provided in the embodiment of the present application does not need to repeat tasks 1 to 3, and tasks 6 and 7 can be directly executed to obtain the simulation results of the chip.

[0179] Figure 6BThis is a schematic diagram of the process of task processing in another operating environment provided by the embodiment of the present application. Figure 6B , including case 1 and case 2. Among them, case 1 includes tasks 1 to 5, and case 2 includes tasks 1 to 3, task 6, and task 7. The operating environment of case 1 is operating environment 1, and the operating environment of case 2 is operating environment 2. When the operating environment of case 1 is different from the operating environment of case 2, and when the simulation of case 2 is performed after the simulation of case 1 is completed, the method provided in the embodiment of the present application does not need to repeatedly execute tasks 1 to 3, and tasks 6 and 7 can be directly executed to obtain the simulation results of the chip.

[0180] After the simulation result of the chip is obtained, the simulation result of the chip is stored according to the preset storage path. The simulation result of the chip can also be displayed through a page of the terminal device, or the simulation result of the chip can be sent to a preset device.

[0181] It should be noted that the task processing method provided in the embodiment of the present application can be implemented through a script.

[0182] The task processing method provided in the embodiment of the present application obtains a task processing request. Obtains historical task processing information. Determines a target task set based on at least one first task and at least one second task. Determines the execution time of each intermediate task based on the execution time of each second task. Determines the target intermediate task in at least one intermediate task. Determines the level information of the target intermediate task in the level information corresponding to each second task. Processes the target task set based on the task processing request and the level information of the target intermediate task to obtain the simulation result of the chip. In the above process, since the number of tasks included in the target task set is less than or equal to the number of at least one first task, the chip can directly process at least one task in at least one first task that has not been processed in the historical period based on the historical task processing information. Avoids the situation where the current simulation needs to repeat the same task as the last case, and cannot directly execute a task different from the last case based on the execution result of the same task last time. Improves the efficiency of chip simulation.

[0183] Based on any of the above embodiments, Figure 7 , the process of task processing is illustrated with examples.

[0184] Figure 7 This is a schematic diagram of the task processing process provided by the embodiment of this application. Figure 7, including a terminal device 701. The terminal device 701 may be a computer, and an application is provided in the terminal device 701. The chip may be simulated through the application of the terminal device 701 to obtain the simulation result of the chip. In the application of the terminal device 701, the user may determine that the chip to be tested is chip C, and determine that the test case corresponding to each module in chip C is case C. In response to the user's input selection operation, the application of the terminal device 701 obtains at least one first task corresponding to case C, including task C1, task C2, and task C4. And a task processing request is generated, and the task processing request is used to request the processing of tasks C1, task C2, and task C4 of the simulation of chip C.

[0185] The application of the terminal device 701 obtains the historical task processing information in the preset storage space as shown in Table 6:

[0186] Table 6

[0187] Second Task Second related task Execution time Level information Task C1 Task C2 Moment C1 Signal C; 0 Task C2 Task C1, Task C3 Time C2 Signal C; 1

[0188] The application of the terminal device 701 determines that at least one to-be-selected task includes task C1 and task C2 in at least one second task shown in Table 6. The application of the terminal device 701 determines that the target task set includes task C4 among tasks C1, C2, and C4 based on the historical task processing information shown in Table 6. The application of the terminal device 701 determines that the target intermediate task is task C2 based on the historical task processing information shown in Table 6, and determines that the level information corresponding to task C2 includes signal C; 1. The application of the terminal device 701 determines that the signal corresponding to task C2 is signal C, and the level value corresponding to signal C during the execution of task C2 is 1. The application of the terminal device 701 determines that the execution completion moment of task C2 is moment C21, and then the first moment can be determined to be moment C21. Therefore, based on the level information of task C2, it can be determined that the intermediate signal corresponding to task C2 is signal C, and the target value corresponding to signal C at moment C21 is determined to be 1.

[0189] The application of the terminal device 701 determines the target moment as the start moment of executing task C4, and determines the non-target moment as the moment of executing task C4. The application of the terminal device 701 determines that the target signal corresponding to the target moment is signal C, and it can be determined that the intermediate signal matches the target signal. At the target moment, the level value corresponding to signal C is updated to the target value 1, and it is determined that the target level information includes the level value 1 corresponding to signal C and moment C4. The application of the terminal device 701 obtains at least one operating parameter corresponding to case C. The application of the terminal device 701 determines that there is no historical task for task C4, then according to at least one operating parameter and the target level information, task C4 is processed, and the processing result corresponding to the target task is obtained as result C4. The application of the terminal device 701 determines that the simulation result of chip C includes result C4.

[0190] The task processing process provided in the embodiment of the present application obtains a task processing request. Obtain historical task processing information. Determine a target task set based on at least one first task and at least one second task. Determine the execution time of each intermediate task based on the execution time of each second task. Determine the target intermediate task in at least one intermediate task. Determine the level information of the target intermediate task in the level information corresponding to each second task. Process the target task set based on the task processing request and the level information of the target intermediate task to obtain the simulation result of the chip. In the above process, since the number of tasks included in the target task set is less than or equal to the number of at least one first task, the chip can directly process at least one task in at least one first task that has not been processed in the historical period according to the historical task processing information. Avoid the situation where the current simulation needs to repeat the same task as the last case, and cannot directly execute a task different from the last case based on the execution result of the same task last time. Improve the efficiency of chip simulation.

[0191] Figure 8 This is a schematic diagram of the structure of the task processing device provided in the embodiment of the present application. Figure 8 , the task processing device 10 may include:

[0192] A first acquisition module 11 is used to acquire a task processing request, where the task processing request is used to request processing of at least one first task of chip simulation;

[0193] A second acquisition module 12, used to acquire historical task processing information, wherein the historical task processing information includes at least one second task;

[0194] A determination module 13, configured to determine a target task set according to the at least one first task and the at least one second task, wherein the number of tasks included in the target task set is less than or equal to the number of the at least one first task;

[0195] The processing module 14 is used to process the target task set according to the task processing request and the historical task processing information to obtain the simulation result of the chip.

[0196] In a possible implementation manner, the determining module 13 is specifically configured to:

[0197] Determine at least one task to be selected from the at least one second task, the task to be selected matching the first task;

[0198] Determine a first associated task corresponding to each first task;

[0199] Determine a second associated task corresponding to each to-be-selected task;

[0200] The target task set is determined in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

[0201] In a possible implementation manner, the determining module 13 is specifically configured to:

[0202] For any task to be selected, determine a first task corresponding to the task to be selected;

[0203] If the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task, determining that the task to be selected is an intermediate task, and obtaining at least one intermediate task;

[0204] It is determined that the target task set includes tasks in the at least one first task excluding the at least one intermediate task.

[0205] In a possible implementation manner, the processing module 14 is specifically used to:

[0206] Determine the execution time of each intermediate task according to the execution time of each second task;

[0207] Determine a target intermediate task among the at least one intermediate task, wherein the target intermediate task is the task with the latest execution time;

[0208] Determine the level information of the target intermediate task in the level information corresponding to each second task;

[0209] The target task set is processed according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip.

[0210] In a possible implementation manner, the processing module 14 is specifically used to:

[0211] Determining the execution time of each target task in the target task set;

[0212] According to the execution time of each target task, a target time and at least one non-target time are determined;

[0213] According to the level information of the target intermediate task, the target signal corresponding to the target moment is processed to obtain the target level information;

[0214] According to the at least one operating parameter and the target level information, the target task set is processed at the at least one non-target time to obtain a simulation result of the chip;

[0215] The target time is a preset time, and the non-target time is an execution time other than the target time among the at least one execution time.

[0216] In a possible implementation manner, the processing module 14 is specifically used to:

[0217] Determine, according to the level information of the target intermediate task, an intermediate signal corresponding to the target intermediate task and a target value corresponding to the intermediate signal at a first moment, wherein the first moment is a moment when the execution of the target intermediate task is completed;

[0218] If the intermediate signal matches the target signal, the first value of the target signal is updated according to the target value to obtain the target level information, where the target level information includes the target signal and the target value corresponding to the target time.

[0219] In a possible implementation manner, the processing module 14 is specifically used to:

[0220] For any non-target moment, determining a target task corresponding to the non-target moment;

[0221] Determine whether there is a historical task for the target task, where the historical task is the target task executed at the previous execution time of the current time;

[0222] If yes, determining the execution result of the historical task, and processing the target task according to the at least one operating parameter and the at least one execution result to obtain the processing result corresponding to the target task;

[0223] If not, processing the target task according to the at least one operating parameter and the target level information to obtain a processing result corresponding to the target task;

[0224] Determine that the simulation result of the chip includes the processing result corresponding to each target task in the target task set.

[0225] The task processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0226] Fig. 9 This is a schematic diagram of the structure of the terminal device provided in the embodiment of the present application. Fig. 9 The terminal device 20 may include: a memory 21 and a processor 22. Exemplarily, the memory 21 and the processor 22 are interconnected via a bus 23.

[0227] The memory 21 is used to store program instructions;

[0228] The processor 22 is used to execute the program instructions stored in the memory, so as to enable the terminal device 20 to execute the method shown in the above method embodiment.

[0229] The terminal device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment, and its implementation principle and beneficial effects are similar, which will not be repeated here.

[0230] An embodiment of the present application provides a computer-readable storage medium, in which computer-executable instructions are stored. When the computer-executable instructions are executed by a processor, they are used to implement the above method.

[0231] The embodiment of the present application may also provide a computer program product, including a computer program, which can implement the above method when executed by a processor.

[0232] All or part of the steps of the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned memory (storage medium) includes: read-only memory (ROM), random access memory (RAM), flash memory, hard disk, solid state drive, magnetic tape, floppy disk, optical disc and any combination thereof.

[0233] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0234] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0235] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0236] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

[0237] In the present application, the term "include" and its variations may refer to non-restrictive inclusion; the term "or" and its variations may refer to "and / or". The terms "first", "second", etc. in the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In the present application, "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previously associated objects are in an "or" relationship.

Claims

1. A task processing method, characterized in that: include: Obtaining a task processing request, where the task processing request is used to request processing of at least one first task of chip simulation; Acquire historical task processing information, where the historical task processing information includes at least one second task; Determine a target task set according to the at least one first task and the at least one second task, wherein the number of tasks included in the target task set is less than or equal to the number of the at least one first task; The target task set is processed according to the task processing request and the historical task processing information to obtain a simulation result of the chip.

2. The method according to claim 1, characterized in that Determining a target task set according to the at least one first task and the at least one second task includes: Determine at least one task to be selected from the at least one second task, the task to be selected matching the first task; Determine a first associated task corresponding to each first task; Determine a second associated task corresponding to each to-be-selected task; The target task set is determined in the at least one first associated task according to the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task.

3. The method according to claim 2, characterized in that Determining the target task set in the at least one first associated task, the at least one to-be-selected task, and the second associated task corresponding to each to-be-selected task, includes: For any task to be selected, determine a first task corresponding to the task to be selected; If the second associated task corresponding to the task to be selected matches the first associated task corresponding to the first task, determining that the task to be selected is an intermediate task, and obtaining at least one intermediate task; It is determined that the target task set includes tasks in the at least one first task excluding the at least one intermediate task.

4. The method according to any one of claims 1 to 3, characterized in that: The historical task information also includes the execution time of each second task and the level information corresponding to each second task; Processing the target task set according to the task processing request and the historical task processing information to obtain a simulation result of the chip includes: Determine the execution time of each intermediate task according to the execution time of each second task; Determine a target intermediate task among the at least one intermediate task, wherein the target intermediate task is the task with the latest execution time; Determine the level information of the target intermediate task in the level information corresponding to each second task; The target task set is processed according to the task processing request and the level information of the target intermediate task to obtain a simulation result of the chip.

5. The method according to claim 4, characterized in that The task processing request also includes at least one operating parameter; processing the target task set according to the task processing request and the level information of the target intermediate task to obtain the simulation result of the chip, including: Determining the execution time of each target task in the target task set; According to the execution time of each target task, a target time and at least one non-target time are determined; According to the level information of the target intermediate task, the target signal corresponding to the target moment is processed to obtain the target level information; According to the at least one operating parameter and the target level information, the target task set is processed at the at least one non-target time to obtain a simulation result of the chip; The target time is a preset time, and the non-target time is an execution time other than the target time among the at least one execution time.

6. The method according to claim 5, characterized in that According to the level information of the target intermediate task, the level signal corresponding to the target time is processed to obtain the target level information, including: Determine, according to the level information of the target intermediate task, an intermediate signal corresponding to the target intermediate task and a target value corresponding to the intermediate signal at a first moment, wherein the first moment is a moment when the execution of the target intermediate task is completed; If the intermediate signal matches the target signal, the first value of the target signal is updated according to the target value to obtain the target level information, where the target level information includes the target signal and the target value corresponding to the target time.

7. The method according to claim 5 or 6, characterized in that: Processing the target task set at the at least one non-target time according to the at least one operating parameter and the target level information to obtain the processing result includes: For any non-target moment, determining a target task corresponding to the non-target moment; Determine whether there is a historical task for the target task, where the historical task is the target task executed at the previous execution time of the current time; If yes, determining the execution result of the historical task, and processing the target task according to the at least one operating parameter and the at least one execution result to obtain the processing result corresponding to the target task; If not, processing the target task according to the at least one operating parameter and the target level information to obtain a processing result corresponding to the target task; Determine that the simulation result of the chip includes the processing result corresponding to each target task in the target task set.

8. A task processing device, characterized in that: The device comprises: A first acquisition module, used for acquiring a task processing request, wherein the task processing request is used for requesting processing of at least one first task of chip simulation; A second acquisition module, used to acquire historical task processing information, wherein the historical task processing information includes at least one second task; A determination module, configured to determine a target task set according to the at least one first task and the at least one second task, wherein the number of tasks included in the target task set is less than or equal to the number of the at least one first task; The processing module is used to process the target task set according to the task processing request and the historical task processing information to obtain the simulation result of the chip.

9. A terminal device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: in, The computer instructions are used to make a computer execute the method according to any one of claims 1 to 7.

11. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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