Artificial neural network system for detecting Alzheimer's disease

Abstract

The invention discloses an artificial neural network system for detecting Alzheimer's disease. Comprising a read-only memory, a storage sub-module, a control sub-module, a calculation sub-module, a classification sub-module, a clock circuit and a reset button, wherein the reset button is used for enabling the read-only memory, the storage sub-module, the control sub-module, the calculation sub-module and the classification sub-module to recover initial states after being pressed down; the electroencephalogram data of a testee is identified based on stored weight data and bias data of four layers of a four-layer artificial neural network obtained through pre-training, and then whether the Alzheimer's disease is diagnosed or not is judged. A testee only needs to additionally equip a conventional electroencephalogram electrode in the current industry to be matched with the artificial neural network system to realize detection; the method has the advantages that a testee can realize high-precision detection of the Alzheimer's disease without going to a hospital, the detection is convenient, and the Alzheimer's disease can be quickly diagnosed.

Description

Technical Field

[0001] The invention relates to an artificial neural network system, in particular to an artificial neural network system for detecting Alzheimer's disease. Background Art

[0002] According to the World Health Organization (WHO), approximately 50 million people worldwide suffer from Alzheimer's Disease (AD), a number that is expected to triple by 2050. Alzheimer's disease is a progressive neurodegenerative disease that causes irreversible changes in brain structure and function.

[0003] Although there are many studies devoted to finding a cure for Alzheimer's disease, no drug or treatment has yet been found that can completely cure Alzheimer's disease. However, various studies have shown that the earlier Alzheimer's disease is detected, the greater the hope that it can be controlled and not worsen.

[0004] The existing scheme for detecting Alzheimer's disease mainly involves taking an MRI image of the subject's brain, and then the doctor draws a conclusion based on experience after observing the MRI image or uses software algorithms to analyze and process the MRI image to obtain a conclusion. Since this detection method requires taking an MRI image, the subject must go to the hospital for the test, and due to the shortage of medical resources, the subject often needs to register at the hospital first, and then wait in line for several days before going to the hospital again to take an MRI image. As a result, the existing method for detecting Alzheimer's disease causes great inconvenience to the subject and is not conducive to the rapid diagnosis of the disease. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide an artificial neural network system for detecting Alzheimer's disease, which can detect Alzheimer's disease without the subject having to go to the hospital, is convenient for detection, and can quickly diagnose Alzheimer's disease.

[0006] The technical solution adopted by the present invention to solve the above technical problems is: an artificial neural network system for detecting Alzheimer's disease, comprising a read-only memory, a storage submodule, a control submodule, a calculation submodule, a classification submodule, a clock circuit, and a reset button that restores the read-only memory, the storage submodule, the control submodule, the calculation submodule and the classification submodule to their initial states after being pressed, wherein the clock circuit is used to generate a clock signal to control the working sequence of the storage submodule, the control submodule, the calculation submodule and the classification submodule, so that the storage submodule, the control submodule The block, the calculation submodule and the classification submodule work in coordination, the read-only memory stores 14 weight data and 1 bias data of the first layer, 1 weight data and 1 bias data of the second layer, 1 weight data and 1 bias data of the third layer, and 1 weight data and 1 bias data of the fourth layer of the four-layer artificial neural network, and these weight data and bias data are first trained on the computer by calling the tensorflow library using the python language to obtain the 14 weight data and 1 bias data of the first layer, 1 weight data and 1 bias data of the second layer of the four-layer artificial neural network. The bias data, 1 weight data and 1 bias data of the third layer, and 1 weight data and 1 bias data of the fourth layer are obtained, and then all the weight data and bias data of the four-layer artificial neural network are converted into 32-bit floating point numbers through the IEEE754 single-precision standard. The classification submodule is provided with two lights for displaying the test results; when the subject needs to be tested for Alzheimer's disease, the additional 14 EEG electrodes are connected to the storage submodule, and the 14 EEG electrodes are in contact with the subject's brain, and the 14 EEG electrodes and the artificial neural network system are turned on. At this time, each EEG electrode is synchronized. Start periodically collecting the EEG data of the subject, and generate one channel of EEG data in each sampling cycle and output it to the storage submodule, until the sampling of 1000 sampling cycles is completed, then disconnect the 14 EEG electrodes from the artificial neural network, and the storage submodule saves the 14 channel EEG data outputted thereto by the 14 EEG electrodes in each sampling cycle as a group of EEG data, that is, each group of EEG data includes 14 channel EEG data, and when the storage submodule completes the storage of 1000 groups of EEG data, the artificial neural network system starts to work periodically, and the current working cycle of the artificial neural network system is recorded as t;When the artificial neural network system enters the tth working cycle and the current value of t is less than or equal to 1000, the classification submodule is in a standby state. The storage submodule, under the control of the control submodule, outputs the 14 channel EEG data in the tth group of EEG data stored therein to the calculation submodule in 14 times in sequence. The EEG data of a channel outputted for the i-th time is called the i-th channel EEG data, where i=1,2,...,14. When the i-th channel EEG data is outputted to the calculation submodule, the storage submodule obtains the i-th weight data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule synchronously. Moreover, when the 14th channel EEG data is outputted to the calculation submodule, the storage submodule also obtains the bias data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule. When the calculation submodule receives the i-th weight data and the i-th channel EEG data of the first layer of the four-layer neural network, the calculation submodule, under the control of the control submodule, outputs the i-th weight data of the first layer of the four-layer neural network to the calculation submodule. The i-channel EEG data is multiplied with the i-th weight data of the first layer of the four-layer neural network to obtain a product. If i=1, the product is directly used as the i-th calculation result of the current working cycle of the calculation submodule. If i≠1, the product obtained at this time is added to the i-1-th calculation result of the current working cycle of the calculation submodule to serve as the i-th calculation result of the current working cycle of the calculation submodule. When the 14th calculation result of the current working cycle of the calculation submodule is obtained, the calculation submodule adds the 14th calculation result to a bias data received in its current working cycle to obtain the sum of the two. The sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle. After that, the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 1000th working cycle of the artificial neural network system ends and enters its 1001st working cycle.When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 1001 and less than or equal to 2000, the classification submodule maintains a standby state, the storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the second layer of the four-layer neural network from the read-only memory and outputs them to the calculation submodule synchronously, the calculation submodule first receives the EEG data of the t-1000th working cycle and the bias data of the second layer of the four-layer neural network, and then outputs the received EEG data to the calculation submodule. 1 weight data is multiplied to obtain a product, and then the product is added to the bias data of the second layer of the four-layer neural network to obtain the sum of the two, and the sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle it receives. After that, the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 2000th working cycle of the artificial neural network system ends and enters its 2001st working cycle. cycle; when the artificial neural network system enters the tth working cycle, and the current value of t is greater than or equal to 2001 and less than or equal to 3000, the classification submodule remains in a standby state, the storage submodule outputs the stored EEG data of the t-1000th working cycle to the calculation submodule, and obtains 1 weight data and 1 bias data of the third layer of the four-layer neural network from the read-only memory and outputs them to the calculation submodule synchronously, the calculation submodule first receives the received EEG data of the t-1000th working cycle and the third layer of the four-layer neural network. The t-th working cycle of the artificial neural network system is terminated, and the artificial neural network system enters the next working cycle, and the cycle repeats until the 3000th working cycle of the artificial neural network system ends and enters its 3001st working cycle.When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 3001 and less than or equal to 4000, the classification submodule enters the working state, and has an initial count value of 0. The storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the fourth layer of the four-layer neural network from the read-only memory and synchronously outputs them to the calculation submodule. The calculation submodule multiplies the EEG data of the t-1000th working cycle received by it and the weight data of the fourth layer of the four-layer neural network to obtain a product, and adds the product to 1 bias data of the fourth layer of the four-layer neural network to obtain the sum of the two, and transmits the sum of the two obtained at this time as the calculation result of the t-th working cycle to the classification submodule, and the classification submodule determines the received Whether the calculation result of the t-th working cycle is a positive number, if it is a positive number, the current count value at that location is used to add 1 to update the count value at that location, otherwise, the current count value at that location is kept unchanged, and then the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 4000th working cycle of the artificial neural network system ends. At this time, if the current count value at the classification submodule is greater than 950, the two lights at the classification submodule are both on, otherwise only one of the two lights is on. When the two lights at the classification submodule are both on, it indicates that the test result is confirmed Alzheimer's disease, and when only one of the two lights at the classification submodule is on, it indicates that the test result is undiagnosed Alzheimer's disease, and the work of the artificial neural network system ends. After pressing the reset button, the artificial neural network system is turned off. ;

[0007] The read-only memory has a weight data output channel with a bit width of 32 bits, a bias data output channel with a bit width of 32 bits, and a reset terminal. The control submodule has a clock terminal, a reset terminal, a channel output channel with a bit width of 12 bits, and a group output channel with a bit width of 5 bits. The storage submodule has 17 input channels with a bit width of 32 bits, a weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits, a group input channel with a bit width of 5 bits, a reset terminal, a clock terminal, a weight data output channel with a bit width of 32 bits, and a bias data output channel with a bit width of 32 bits. The 17 input channels of the storage submodule are respectively called input channel one, input channel two, input channel three, input channel four, input channel five, input channel six, input channel seven, input channel eight, input channel nine, input channel ten, input channel eleven, input channel twelve, input channel thirteen, input channel fourteen, input channel fifteen, input channel sixteen and input channel seventeen. The calculation submodule has a reset terminal, a clock terminal, a weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a EEG data input channel with a bit width of 32 bits, and a channel input with a bit width of 12 bits. The computing submodule has an input channel, a group input channel with a bit width of 5 bits, a result output channel with a bit width of 32 bits, and three output channels with a bit width of 32 bits. The three output channels of the computing submodule are respectively referred to as output channel one, output channel two, and output channel three. The classification submodule has a result input channel with a bit width of 32 bits, a reset terminal, a clock terminal, a channel input channel with a bit width of 12 bits, and a diagnosis result output channel with a bit width of 2 bits. The clock circuit has a clock signal output terminal. The weight data output channel of the read-only memory is connected to the weight data input channel of the storage submodule, and the bias data output channel of the read-only memory is connected to the storage submodule. The bias data input channel of the submodule is connected, the clock end of the control submodule is connected to the clock signal output end of the clock circuit, the reset end of the control submodule is connected to the reset button, the channel output channel of the control submodule, the channel input channel of the storage submodule, the channel input channel of the calculation submodule and the channel input channel of the classification submodule are connected, the group output channel of the control submodule, the group input channel of the storage submodule and the group input channel of the calculation submodule are connected, the clock end of the storage submodule is connected to the clock signal output end of the clock circuit, and the reset end of the storage submodule is connected to the reset button,The input channel 1, input channel 2, input channel 3, input channel 4, input channel 5, input channel 6, input channel 7, input channel 8, input channel 9, input channel 10, input channel 11, input channel 12, input channel 13 and input channel 14 of the storage submodule are connected to the 14 EEG electrodes in a one-to-one correspondence, the input channel 15 of the storage submodule is connected to the output channel 1 of the computing submodule, the input channel 16 of the storage submodule is connected to the output channel 2 of the computing submodule, the input channel 17 of the storage submodule is connected to the output channel 3 of the computing submodule, and the storage The weight data output channel of the submodule is connected to the weight data input channel of the calculation submodule, the bias data output channel of the storage submodule is connected to the bias data input channel of the calculation submodule, the EEG data output channel of the storage submodule is connected to the EEG data input channel of the calculation submodule, the result output channel of the calculation submodule is connected to the result input channel of the classification submodule, the reset end of the classification submodule is connected to the reset button, the clock end of the classification submodule is connected to the clock signal output end of the clock circuit, and the diagnosis result output channel of the classification submodule is connected to two lamps.

[0008] The control submodule includes a group counter and a channel counter. The group counter has a 1-bit enable input channel, a 1-bit enable output channel, a 5-bit group output channel, a clock terminal and a reset terminal. The channel counter has a 1-bit enable input channel, a 1-bit enable output channel, a 12-bit channel output channel, a clock terminal and a reset terminal. The enable input channel of the group counter is connected to the enable output channel of the channel counter. The enable output channel of the individual counter is connected to the enable input channel of the channel counter, the clock end of the group counter is connected to the clock end of the channel counter, and its connection end is the clock end of the control submodule, the reset end of the group counter is connected to the reset end of the channel counter, and its connection end is the reset end of the control submodule, the group output channel of the group counter is the group output channel of the control submodule, and the channel output channel of the channel counter is the channel output channel of the control submodule.

[0009] The storage submodule includes a data arbitrator and SRAM, the SRAM is used to store EEG data, weight data and bias data, the data arbitrator has 1 EEG data output channel with a bit width of 32 bits, 1 weight data output channel with a bit width of 32 bits, 17 input channels with a bit width of 32 bits, 1 weight data input channel with a bit width of 32 bits and 1 bias data input channel with a bit width of 32 bits; the SRAM has 1 EEG data input channel with a bit width of 32 bits, 1 A weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits, a group input channel with a bit width of 5 bits, a EEG data output channel with a bit width of 32 bits, a weight data output channel with a bit width of 32 bits, a bias data output channel with a bit width of 32 bits, a reset terminal and a clock terminal; the EEG data output channel of the data arbitrator is connected to the EEG data input channel of the SRAM, and the weight data output channel of the data arbitrator is connected to the weight data output channel of the SRAM. The data arbitrator is connected to the input channel, the bias data output channel of the data arbitrator is connected to the bias data input channel of the SRAM, the channel input channel of the data arbitrator is connected to the channel input channel of the SRAM, and its connection end is the channel input channel of the storage submodule, the weight data input channel of the data arbitrator is the weight data input channel of the storage submodule, the bias data input channel of the data arbitrator is the bias data input channel of the storage submodule, the 17 input channels of the data arbitrator are the 17 input channels of the storage submodule, the reset end of the SRAM is the reset end of the storage submodule, the clock end of the SRAM is the clock end of the storage submodule, the EEG data output channel of the SRAM is the EEG data output channel of the storage submodule, the weight data output channel of the SRAM is the weight data output channel of the storage submodule, the bias data output channel of the SRAM is the bias data output channel of the storage submodule, and the group input channel of the SRAM is the group input channel of the storage submodule.

[0010] The computing submodule includes a floating-point multiplier, a register, a first floating-point adder, a second floating-point adder and an output arbitrator. The floating-point multiplier has a clock terminal, a reset terminal, a multiplication result output channel with a bit width of 32 bits, a weight data input channel with a bit width of 32 bits and a brain wave data input channel with a bit width of 32 bits; the first floating-point adder has a clock terminal, a reset terminal, a first 32-bit multiplier input channel, a second 32-bit multiplier input channel, a first addition result output channel with a bit width of 32 bits, a second addition result output channel with a bit width of 32 bits, and a channel input channel with a bit width of 12 bits. and a group input channel with a bit width of 5 bits; the register has a data output channel with a bit width of 32 bits and a data input channel with a bit width of 32 bits; the second floating-point adder has a clock terminal, a reset terminal, an addition result input channel with a bit width of 32 bits, a bias result output channel with a bit width of 32 bits and a bias data input channel with a bit width of 32 bits; the output arbitrator has a clock terminal, a reset terminal, a bias result input channel with a bit width of 32 bits, a result output channel with a bit width of 32, three output channels with a bit width of 32 and a channel input channel with a bit width of 12; the multiplication result output channel of the floating-point multiplier The first floating-point adder is connected to the first multiplier input channel of the first floating-point adder; the second multiplier input channel of the first floating-point adder is connected to the data output channel of the register; the first addition result output channel of the first floating-point adder is connected to the data input channel of the register; the second addition result output channel of the first floating-point adder is connected to the addition result input channel of the second floating-point adder; the bias result output channel of the second floating-point adder is connected to the bias result input channel of the output arbitrator; the channel input channel of the first floating-point adder is connected to the channel input channel of the output arbitrator, and the connection terminals thereof are connected to the first floating-point adder and ... It is the channel input channel of the calculation submodule; the weight data input channel of the floating-point multiplier is the weight data input channel of the calculation submodule, and the EEG data input channel of the floating-point multiplier is the EEG data input channel of the calculation submodule; the group input channel of the first floating-point adder is the group input channel of the calculation submodule; the bias data input channel of the second floating-point adder is the bias data input channel of the calculation submodule; the three output channels of the output arbitrator are the three output channels of the calculation submodule; and the result output channel of the output arbitrator is the result output channel of the calculation submodule.

[0011] Compared with the prior art, the advantages of the present invention are that an artificial neural network system for detecting Alzheimer's disease is constructed through a read-only memory, a storage submodule, a control submodule, a calculation submodule, a classification submodule, a clock circuit and the read-only memory that is activated when pressed, and the EEG data of the subject is identified based on the weight data and bias data of the four layers of the four-layer artificial neural network that have been stored and obtained in advance, so as to determine whether Alzheimer's disease is confirmed. Since the training of the four-layer artificial neural network has met the required detection accuracy requirements, when the weight data and bias data of the four layers of the four-layer artificial neural network are used to identify the EEG data of the subject, higher recognition accuracy can be achieved. In addition, the subject only needs to be additionally equipped with the conventional EEG electrodes in the current industry to cooperate with the artificial neural network system to realize detection. Therefore, the subject does not need to go to the hospital to realize high-precision detection of Alzheimer's disease, the detection is convenient, and Alzheimer's disease can be diagnosed quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 The structure principle block diagram of the artificial neural network system for detecting Alzheimer's disease of the present invention;

[0013] Figure 2 It is a structural principle block diagram of a control submodule of an artificial neural network system for detecting Alzheimer's disease of the present invention;

[0014] Figure 3 It is a structural principle block diagram of a storage submodule of an artificial neural network system for detecting Alzheimer's disease of the present invention;

[0015] Figure 4 It is a structural principle block diagram of a computing submodule of an artificial neural network system for detecting Alzheimer's disease of the present invention;

[0016] Figure 5 This is a performance simulation result diagram of the artificial neural network system for detecting Alzheimer's disease of the present invention;

[0017] Figure 6 A comprehensive result map of the artificial neural network system for detecting Alzheimer's disease of the present invention;

[0018] Figure 7 A power consumption distribution diagram of the comprehensive results of the artificial neural network system for detecting Alzheimer's disease of the present invention;

[0019] Figure 8 This is an area distribution diagram of the comprehensive results of the artificial neural network system for detecting Alzheimer's disease of the present invention. DETAILED DESCRIPTION

[0020] The present invention is further described in detail below with reference to the accompanying drawings.

[0021] Embodiment 1: An artificial neural network system for detecting Alzheimer's disease, comprising a read-only memory, a storage submodule, a control submodule, a calculation submodule, a classification submodule, a clock circuit, and a reset button that restores the read-only memory, the storage submodule, the control submodule, the calculation submodule, and the classification submodule to their initial states when pressed, the clock circuit being used to generate a clock signal to control the working sequence of the storage submodule, the control submodule, the calculation submodule, and the classification submodule, so that the storage submodule, the control submodule, the calculation submodule, and the classification submodule work in coordination, and the read-only memory storing 14 weight data and 1 bias data of the first layer of a four-layer artificial neural network, 1 weight data and 1 bias data of the second layer, and 1 weight data of the third layer Data and 1 bias data and 1 weight data and 1 bias data of the fourth layer, these weight data and bias data are firstly trained on the four-layer artificial neural network by calling the tensorflow library using the python language at the computer, so as to obtain 14 weight data and 1 bias data of the first layer of the four-layer artificial neural network, 1 weight data and 1 bias data of the second layer, 1 weight data and 1 bias data of the third layer, and 1 weight data and 1 bias data of the fourth layer, and then all the weight data and bias data of the four-layer artificial neural network are respectively converted into 32-bit floating point numbers through the IEEE754 single-precision standard, and two lights for displaying the detection results are arranged at the classification submodule;

[0022] When the subject needs to be tested for Alzheimer's disease, the 14 additional EEG electrodes are connected to the storage submodule, and the 14 EEG electrodes are brought into contact with the subject's brain, and the 14 EEG electrodes and the artificial neural network system are turned on. At this time, each EEG electrode synchronously starts to periodically collect the subject's EEG data, and generates one channel of EEG data in each sampling cycle and outputs it to the storage submodule until 1000 sampling cycles of sampling are completed. Then, the 14 EEG electrodes and the artificial neural network are disconnected, and the storage submodule saves the 14 channel EEG data outputted thereto by the 14 EEG electrodes in each sampling cycle as a group of EEG data, that is, each group of EEG data includes 14 channel EEG data. When the storage submodule completes the storage of 1000 groups of EEG data, the artificial neural network system starts to work periodically, and the current working cycle of the artificial neural network system is recorded as t;

[0023] When the artificial neural network system enters the tth working cycle and the current value of t is less than or equal to 1000, the classification submodule is in standby state. The storage submodule, under the control of the control submodule, outputs the 14 channel EEG data of the tth group of EEG data stored in it to the calculation submodule in 14 times in sequence. The EEG data of a channel output for the i-th time is called the i-th channel EEG data, where i = 1, 2, ..., 14. When the i-th channel EEG data is output to the calculation submodule, the storage submodule obtains the i-th weight data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule synchronously. Moreover, when the 14th channel EEG data is output to the calculation submodule, the storage submodule also obtains the bias data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule. When the calculation submodule receives the i-th weight data of the first layer of the four-layer neural network and the i-th channel EEG data, the calculation submodule, under the control of the control submodule, combines the i-th channel EEG data with the The i-th weight data of the first layer of the four-layer neural network is multiplied to obtain a product. If i=1 at this time, the product is directly used as the i-th calculation result of the current working cycle of the calculation submodule. If i≠1, the product obtained at this time is added to the i-1-th calculation result of the current working cycle of the calculation submodule as the i-th calculation result of the current working cycle of the calculation submodule. When the 14th calculation result of the current working cycle of the calculation submodule is obtained, the calculation submodule adds the 14th calculation result to a bias data received in its current working cycle to obtain the sum of the two. The sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle; thereafter, the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 1000th working cycle of the artificial neural network system ends and enters its 1001st working cycle;

[0024] When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 1001 and less than or equal to 2000, the classification submodule remains in a standby state, the storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the second layer of the four-layer neural network from the read-only memory and synchronously outputs them to the calculation submodule, the calculation submodule first multiplies the EEG data of the t-1000th working cycle it receives and 1 weight data of the second layer of the four-layer neural network to obtain a product, and then adds the product to the bias data of the second layer of the four-layer neural network to obtain the sum of the two, and transmits the sum of the two obtained at this time as the EEG data of the t-th working cycle to the storage submodule, the storage submodule saves the EEG data of the t-th working cycle it receives, and then the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 2000th working cycle of the artificial neural network system ends and enters its 2001st working cycle;

[0025] When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 2001 and less than or equal to 3000, the classification submodule remains in a standby state, the storage submodule outputs the EEG data of the t-1000th working cycle stored in it to the calculation submodule, and obtains 1 weight data and 1 bias data of the third layer of the four-layer neural network from the read-only memory and synchronously outputs them to the calculation submodule, the calculation submodule first multiplies the EEG data of the t-1000th working cycle received by it and 1 weight data of the third layer of the four-layer neural network to obtain a product, and then adds the product to 1 bias data of the third layer of the four-layer neural network to obtain the sum of the two, and transmits the sum of the two obtained at this time as the EEG data of the t-th working cycle to the storage submodule, the storage submodule saves the EEG data of the t-th working cycle, and then the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 3000th working cycle of the artificial neural network system ends and enters its 3001st working cycle;

[0026] When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 3001 and less than or equal to 4000, the classification submodule enters the working state, and has an initial count value of 0. The storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the fourth layer of the four-layer neural network from the read-only memory and synchronously outputs them to the calculation submodule. The calculation submodule multiplies the EEG data of the t-1000th working cycle received by it and the weight data of the fourth layer of the four-layer neural network to obtain a product, and adds the product to 1 bias data of the fourth layer of the four-layer neural network to obtain the sum of the two. The sum of the two obtained at this time is transmitted to the classification submodule as the calculation result of the t-th working cycle, and the classification submodule determines the received Whether the calculation result of the tth working cycle is a positive number, if it is a positive number, the sum of the current count value plus 1 is used to update the count value at that location, otherwise, the current count value is kept unchanged. After that, the tth working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats itself until the 4000th working cycle of the artificial neural network system ends. At this time, if the current count value at the classification submodule is greater than 950, both lights at the classification submodule are on, otherwise only one of the two lights is on. When both lights at the classification submodule are on, it indicates that the test result is confirmed Alzheimer's disease. When only one of the two lights at the classification submodule is on, it indicates that the test result is undiagnosed Alzheimer's disease. The artificial neural network system ends its work, and the reset button is pressed to turn off the artificial neural network system.

[0027] In this embodiment, an artificial neural network system for detecting Alzheimer's disease is constructed by a read-only memory, a storage submodule, a control submodule, a calculation submodule, a classification submodule, a clock circuit, and a read-only memory that is activated when pressed. The EEG data of the subject is identified based on the weight data and bias data of the four layers of the four-layer artificial neural network that have been stored and obtained through pre-training, and then it is determined whether Alzheimer's disease is confirmed. Since the training of the four-layer artificial neural network has met the required detection accuracy requirements, when the weight data and bias data of the four layers of the four-layer artificial neural network are used to identify the EEG data of the subject, a higher recognition accuracy can be achieved. In addition, the subject only needs to be additionally equipped with the current industry conventional EEG electrodes to cooperate with the artificial neural network system to realize detection. High-precision detection of Alzheimer's disease can be achieved without going to the hospital. The detection is convenient and Alzheimer's disease can be diagnosed quickly.

[0028] Embodiment 2: This embodiment is basically the same as Embodiment 1, except that: in this embodiment, Figure 1As shown, the read-only memory has 1 weight data output channel with a bit width of 32 bits, 1 bias data output channel with a bit width of 32 bits and a reset terminal, the control submodule has a clock terminal, a reset terminal, 1 channel output channel with a bit width of 12 bits and 1 group output channel with a bit width of 5 bits, and the storage submodule has 17 input channels with a bit width of 32 bits, 1 weight data input channel with a bit width of 32 bits, 1 bias data input channel with a bit width of 32 bits, 1 channel input channel with a bit width of 12 bits, 1 group input channel with a bit width of 5 bits, a reset terminal, a clock terminal, 1 weight data output channel with a bit width of 32 bits, 1 bias data output channel with a bit width of 32 bits and 1 EEG data output channel with a bit width of 32 bits;The 17 input channels of the storage submodule are respectively called input channel one, input channel two, input channel three, input channel four, input channel five, input channel six, input channel seven, input channel eight, input channel nine, input channel ten, input channel eleven, input channel twelve, input channel thirteen, input channel fourteen, input channel fifteen, input channel sixteen and input channel seventeen. The calculation submodule has a reset terminal, a clock terminal, a weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a brain wave data input channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits, a group input channel with a bit width of 5 bits, a result output channel with a bit width of 32 bits, and a result output channel with a bit width of 32 bits. The three output channels of the calculation submodule are respectively called output channel one, output channel two and output channel three. The classification submodule has a result input channel with a bit width of 32 bits, a reset terminal, a clock terminal, a channel input channel with a bit width of 12 bits and a diagnosis result output channel with a bit width of 2 bits. The clock circuit has a clock signal output terminal. The weight data output channel of the read-only memory is connected to the weight data input channel of the storage submodule. The bias data output channel of the read-only memory is connected to the bias data input channel of the storage submodule. The clock terminal of the control submodule is connected to the clock signal output terminal of the clock circuit. The reset terminal of the control submodule is connected to the reset button. The channel output channel of the control submodule and the storage submodule The channel input channel of the computing submodule, the channel input channel of the classification submodule are connected, the group output channel of the control submodule, the group input channel of the storage submodule and the group input channel of the computing submodule are connected, the clock end of the storage submodule is connected to the clock signal output end of the clock circuit, the reset end of the storage submodule is connected to the reset button, the input channel one, input channel two, input channel three, input channel four, input channel five, input channel six, input channel seven, input channel eight, input channel nine, input channel ten, input channel eleven, input channel twelve, input channel thirteen and input channel 14 of the storage submodule are connected one by one with the 14 EEG electrodes, the input channel fifteen of the storage submodule is connected to the The output channel 1 is connected, the input channel 16 of the storage submodule is connected to the output channel 2 of the calculation submodule, the input channel 17 of the storage submodule is connected to the output channel 3 of the calculation submodule, the weight data output channel of the storage submodule is connected to the weight data input channel of the calculation submodule, the bias data output channel of the storage submodule is connected to the bias data input channel of the calculation submodule, the EEG data output channel of the storage submodule is connected to the EEG data input channel of the calculation submodule, the result output channel of the calculation submodule is connected to the result input channel of the classification submodule, the reset end of the classification submodule is connected to the reset button, the clock end of the classification submodule is connected to the clock signal output end of the clock circuit, and the diagnosis result output channel of the classification submodule is connected to two lamps. ;

[0029] In the artificial neural network system of this embodiment, the clock signal output end of the clock circuit is used to output the clock signal. When the neural network system enters the tth working cycle, if t is greater than or equal to 1 and less than or equal to 1000, the channel output channel of the control submodule is used to output the control signal that controls the storage submodule to output the 14-channel EEG data of the tth group of EEG data stored in it to the calculation submodule in sequence through its EEG data output channel; if t is greater than or equal to 1001 and less than or equal to 3000, the channel output channel of the control submodule is used to output the control signal that controls the storage submodule to output the EEG data of the t-1000th working cycle stored in it to the calculation submodule through its EEG data output channel. ; if t is greater than or equal to 3001 and less than or equal to 4000, the channel output channel of the control submodule is used to output the control signal that controls the storage submodule to output the EEG data of the t-1000th working cycle stored in it to the calculation submodule through its EEG data output channel, and the calculation submodule outputs the calculation result of its current working cycle to the classification submodule through its result output channel; the group output channel of the control submodule is used to control the storage submodule to output the 14-channel EEG data connected to its current working cycle to the calculation submodule through its EEG data output channel in each working cycle from the 1st working cycle to the 1000th working cycle of the neural network system in turn;The input channel 1, input channel 2, input channel 3, input channel 4, input channel 5, input channel 6, input channel 7, input channel 8, input channel 9, input channel 10, input channel 11, input channel 12, input channel 13 and input channel 14 of the storage submodule are connected to the 14 EEG electrodes, one by one correspondingly to the EEG data of one channel, the input channel 15 of the storage submodule is used to access the EEG data of the 1st working cycle to the EEG data of the 1000th working cycle, the input channel 16 of the storage submodule is used to access the EEG data of the 1001st working cycle to the EEG data of the 2000th working cycle, the input channel 17 of the storage submodule is used to access the EEG data of the 2001st working cycle to the EEG data of the 3000th working cycle, and the weight data input channel of the storage submodule is used to obtain the EEG data of the 2001st working cycle to the EEG data of the 3000th working cycle. The bias data input channel of the storage submodule is used to obtain each weight data from the read-only memory, the bias data output channel of the storage submodule is used to output each weight data obtained to the calculation submodule, the bias data output channel of the storage submodule is used to output each bias data obtained to the calculation submodule, the EEG data output channel of the storage submodule is used to transmit the EEG data of each channel transmitted to it by the EEG electrode and the EEG data of each working cycle stored therein to the calculation submodule, the result output channel of the calculation submodule is used to output the EEG data of the 3001st working cycle to the 4000th working cycle to the classification submodule, and the diagnosis result output channel of the classification submodule is used to output the control signal for controlling two lights to light up at the same time or only one light to light up. ;

[0030] Embodiment 3: This embodiment is basically the same as Embodiment 2, except that: in this embodiment, Figure 2 As shown, the control submodule includes a group counter and a channel counter, the group counter has 1 enable input channel with a bit width of 1 bit, 1 enable output channel with a bit width of 1 bit, 1 group output channel with a bit width of 5 bits, a clock end and a reset end; the channel counter has 1 enable input channel with a bit width of 1 bit, 1 enable output channel with a bit width of 1 bit, 1 channel output channel with a bit width of 12 bits, a clock end and a reset end; the enable input channel of the group counter is connected to the enable output channel of the channel counter, the enable output channel of the group counter is connected to the enable input channel of the channel counter, the clock end of the group counter is connected to the clock end of the channel counter, and its connection end is the clock end of the control submodule, the reset end of the group counter is connected to the reset end of the channel counter, and its connection end is the reset end of the control submodule, the group output channel of the group counter is the group output channel of the control submodule, and the channel output channel of the channel counter is the channel output channel of the control submodule.

[0031] In this embodiment, the working principle of the control submodule is as follows: the initial count values ​​of the group counter and the channel counter are both 0. When the artificial neural network system enters the tth working cycle, if t is greater than or equal to 1 and less than or equal to 1000, the enable output channel of the channel counter outputs a high level to the enable input channel of the group counter to control the group counter to enter the working state. When the group counter enters the working state, the group counter starts counting from 0. If the current count value of the group counter is not equal to 13, the sum of the current count value plus 1 is used to update the count value at that location, and the count value is output through its group output channel. The current count value is used as the control signal, and a low level is output through its enable output channel. If the current count value of the group counter is equal to 13, the count value of the group counter is updated to 0, and the current count value is output as the control signal through its group output channel, and a high level is output through its enable output channel; if the enable input channel of the channel counter receives a high level, the sum of the current count value plus 1 is used to update the count value at that location, and the current count value is output as the control signal through its channel output channel, and a high level is output through its enable output channel. If the enable input channel of the channel counter receives a high level, To a low level, the current count value is kept unchanged, and the current count value is output as a control signal through its channel output channel, and a high level is output through its enable output channel; if t is greater than or equal to 1001 and less than or equal to 4000, the enable output channel of the channel counter outputs a low level to the enable input channel of the group counter, and the group counter enters a dormant state, and the current count value of the group counter is locked to be equal to 13, and the enable output channel of the group counter outputs a high level to the enable output channel of the channel counter, and the current count value of the group counter is output as a control signal through the group counter. The enable output channel of the channel counter outputs a low level; at this time, the enable input channel of the channel counter must receive a high level, and the channel counter uses the sum of its current count value plus 1 to update its count value, and outputs its current count value as a control signal through the channel output channel, and the enable output channel of the channel counter outputs a low level; when the 4000th working cycle of the artificial neural network system ends, the enable output channel of the channel counter outputs a low level to the enable input channel of the group counter, and the enable output channel of the group counter outputs a low level to the enable input channel of the channel counter. At this time, both the channel counter and the group counter are dormant.

[0032] Embodiment 3: This embodiment is basically the same as Embodiment 2, except that: in this embodiment, Figure 3As shown, the storage submodule includes a data arbitrator and SRAM. The SRAM is used to store EEG data, weight data and bias data. The data arbitrator has 1 EEG data output channel with a bit width of 32 bits, 1 weight data output channel with a bit width of 32 bits, 1 bias data output channel with a bit width of 32 bits, 17 input channels with a bit width of 32 bits, 1 weight data input channel with a bit width of 32 bits and 1 bias data input channel with a bit width of 32 bits; the SRAM has 1 bit width of 3 2-bit EEG data input channel, 1 32-bit weight data input channel, 1 32-bit bias data input channel, 1 12-bit channel input channel, 1 5-bit group input channel, 1 32-bit EEG data output channel, 1 32-bit weight data output channel, 1 32-bit bias data output channel, reset terminal and clock terminal; the EEG data output channel of the data arbitrator is connected to the EEG data input channel of the SRAM, and the data The weight data output channel of the data arbitrator is connected to the weight data input channel of the SRAM, the bias data output channel of the data arbitrator is connected to the bias data input channel of the SRAM, the channel input channel of the data arbitrator is connected to the channel input channel of the SRAM, and its connection end is the channel input channel of the storage sub-module, the weight data input channel of the data arbitrator is the weight data input channel of the storage sub-module, the bias data input channel of the data arbitrator is the bias data input channel of the storage sub-module, the 17 input channels of the data arbitrator are the 17 input channels of the storage sub-module, the reset end of the SRAM is the reset end of the storage sub-module, the clock end of the SRAM is the clock end of the storage sub-module, the EEG data output channel of the SRAM is the EEG data output channel of the storage sub-module, the weight data output channel of the SRAM is the weight data output channel of the storage sub-module, the bias data output channel of the SRAM is the bias data output channel of the storage sub-module, and the group input channel of the SRAM is the group input channel of the storage sub-module.

[0033] In this embodiment, the working process of the storage submodule is as follows: when the artificial neural network system enters the tth working cycle, if t is greater than or equal to 1 and less than or equal to 1000, the data arbitrator is in a standby state; under the control of the control signal connected to its channel input channel and group input channel, the SRAM outputs the EEG data stored in it through its EEG data output channel, the weight data through its weight data output channel, and the bias data through its bias data output channel; if t is greater than or equal to 1001 and less than or equal to 2000, the data arbitrator outputs the EEG data received by the input channel 15 of the storage submodule in the current working cycle to the EEG data input channel of the SRAM through the EEG data output channel, outputs the weight data received by the weight data input channel of the storage submodule in the current working cycle to the weight data input channel of the SRAM through its weight data output channel, and outputs the bias data received by the bias data input channel of the storage submodule in the current working cycle to the bias data input channel of the SRAM through its bias data output channel, and the SRAM outputs the bias data received by the bias data input channel of the storage submodule in the current working cycle to the bias data input channel of the SRAM through its bias data output channel. Under the control of the control signal connected to the channel and group input channels, the EEG data currently received is output through its EEG data output channel, the weight data is output through its weight data output channel, and the bias data is output through its bias data output channel; if t is greater than or equal to 2001 and less than or equal to 3000, the data arbitrator outputs the EEG data received by the input channel sixteen of the current working cycle storage submodule to the EEG data input channel of the SRAM through its EEG data output channel, outputs the weight data received by the weight data input channel of the current working cycle storage submodule to the weight data input channel of the SRAM through its weight data output channel, and outputs the bias data received by the bias data input channel of the current working cycle storage submodule to the bias data input channel of the SRAM through its bias data output channel. Under the control of the control signal connected to its channel input channel and group input channel, the SRAM outputs the EEG data currently received through the EEG data output channel, the weight data is output through the weight data output channel, and the bias data is output through the bias data output channel;If t is greater than or equal to 3001 and less than or equal to 4000, the data arbitrator outputs the EEG data received by the input channel 17 of the storage submodule in the current working cycle to the EEG data input channel of the SRAM through its EEG data output channel, outputs the weight data received by the weight data input channel of the storage submodule in the current working cycle to the weight data input channel of the SRAM through the weight data output channel, and outputs the bias data received by the bias data input channel of the storage submodule in the current working cycle to the bias data input channel of the SRAM through its bias data output channel. Under the control of the control signal connected to its channel input channel and group input channel, the SRAM outputs the EEG data received in the current working cycle through the EEG data output channel, the weight data through the weight data output channel, and the bias data through the bias data output channel. ;

[0034] Embodiment 4: This embodiment is basically the same as Embodiment 2, except that: in this embodiment, Figure 4As shown, the calculation submodule includes a floating-point multiplier, a register, a first floating-point adder, a second floating-point adder and an output arbitrator. The floating-point multiplier has a clock terminal, a reset terminal, a multiplication result output channel with a bit width of 32 bits, a weight data input channel with a bit width of 32 bits and a brain wave data input channel with a bit width of 32 bits; the first floating-point adder has a clock terminal, a reset terminal, a first 32-bit multiplier input channel, a second 32-bit multiplier input channel, a first addition result output channel with a bit width of 32 bits, and a second addition result output channel with a bit width of 32 bits. The register has a data output channel with a bit width of 32 bits and a data input channel with a bit width of 32 bits; the second floating-point adder has a clock terminal, a reset terminal, a 32-bit addition result input channel, a 32-bit bias result output channel and a 32-bit bias data input channel; the output arbiter has a clock terminal, a reset terminal, a 32-bit bias result input channel, a 32-bit result output channel, 3 output channels with a bit width of 32 bits and a bit width of 12 bits. The multiplication result output channel of the floating-point number multiplier is connected to the first multiplier input channel of the first floating-point number adder; the second multiplier input channel of the first floating-point number adder is connected to the data output channel of the register; the first addition result output channel of the first floating-point number adder is connected to the data input channel of the register; the second addition result output channel of the first floating-point number adder is connected to the addition result input channel of the second floating-point number adder; the bias result output channel of the second floating-point number adder is connected to the bias result input channel of the output arbitrator; the channel input channel of the first floating-point number adder is connected to the output arbitrator The channel input channel of the output arbitrator is connected, and its connection end is the channel input channel of the computing submodule; the weight data input channel of the floating-point multiplier is the weight data input channel of the computing submodule, and the EEG data input channel of the floating-point multiplier is the EEG data input channel of the computing submodule; the group input channel of the first floating-point adder is the group input channel of the computing submodule; the bias data input channel of the second floating-point adder is the bias data input channel of the computing submodule; the three output channels of the output arbitrator are the three output channels of the computing submodule; and the result output channel of the output arbitrator is the result output channel of the computing submodule.

[0035] In this embodiment, the working process of the calculation submodule is as follows: when the artificial neural network system enters the tth working cycle, if t is greater than or equal to 1 and less than or equal to 1000, the floating-point multiplier outputs the current calculation result to the first multiplier input channel of the first floating-point adder through its multiplication result output channel. If the control signal connected to the group input channel of the first floating-point adder is not equal to 13 at this time, then under the control of the control signal connected to its channel input channel, the current calculation result is output to the register through the first addition result output channel. If the control signal connected to the group input channel of the first floating-point adder is equal to 1 at this time, 3, then under the control of its channel input channel control signal, its current calculation result is output to the addition result input channel of the second floating-point adder through the second addition result output channel; the output arbitrator is controlled by the control signal of its channel input channel access, and its calculation result is output through output channel 1; if t is greater than or equal to 1001 and less than or equal to 2000, the floating-point multiplier outputs its current calculation result to the first multiplier input channel of the first floating-point adder, and the first floating-point adder is controlled by the control signal of the channel input channel access, and its current calculation result is output to the first multiplier input channel of the first floating-point adder through the second addition result output channel. The output arbiter outputs its current calculation result through output channel 2 under the control of the control signal connected to the channel input channel of the floating-point adder; if t is greater than or equal to 2001 and less than or equal to 3000, the floating-point multiplier outputs its current calculation result to the first multiplier input channel of the first floating-point adder through its multiplication result output channel, and the first floating-point adder outputs its current calculation result to the addition result input channel of the second floating-point adder through the second addition result output channel under the control of the control signal connected to its channel input channel; the output arbiter outputs its current calculation result through the second addition result output channel at its channel input channel. Under the control of the control signal connected, its current calculation result is output through output channel three; if t is greater than or equal to 3001 and less than or equal to 4000, the floating-point multiplier outputs its current calculation result to the first multiplier input channel of the first floating-point adder through its multiplication result output channel, and the first floating-point adder, under the control of the control signal connected to its channel input channel, outputs its current calculation result to the addition result input channel of the second floating-point adder through the second addition result output channel; the output arbitrator, under the control of the control signal connected to its channel input channel, outputs its current calculation result through the result output channel.

[0036] To verify the performance of the artificial neural network system for detecting Alzheimer's disease of the present invention, the artificial neural network system for detecting Alzheimer's disease of the present invention was simulated, wherein the four-layer artificial neural network was trained on a desktop computer equipped with a 2.3GHz IntelCore i5-12400 CPU processor, and the training of the four-layer artificial neural network followed the environment settings of Anaconda3, TensorFlow 2.1 and Python 3.9 (CPU version). The hardware design process involves the use of EDA tools such as VCS and Modelsim for simulation, DC tools for logic synthesis, IC compiler for layout and routing, and Virtuoso layout editor IC5141.

[0037] The accuracy, specificity, positive prediction ratio and sensitivity of the artificial neural network system for detecting Alzheimer's disease of the present invention were tested under the simulation of the EDA tool VCS. The test results are as follows: Figure 5 As shown, analysis Figure 5 It can be seen that the final accuracy of the artificial neural network system for detecting Alzheimer's disease of the present invention reaches 98.53%, while the specificity reaches 98.47%, the positive prediction ratio reaches 98.42%, and the sensitivity reaches 98.12%, which is higher than the accuracy of ordinary expert diagnosis. The artificial neural network system for detecting Alzheimer's disease of the present invention has high accuracy.

[0038] Under the standard voltage of 1V of TSMC 65nm process, IC tools are used to perform layout synthesis on the artificial neural network system for detecting Alzheimer's disease of the present invention. The layout synthesis result is as follows: Figure 6 As shown, analysis Figure 6 It can be seen that the artificial neural network system for detecting Alzheimer's disease of the present invention consumes only 0.1238mW of power and only 0.0704mm of area while achieving its functions. 2 , which is very suitable for embedded devices and portable devices. The power consumption of the artificial neural network system for detecting Alzheimer's disease of the present invention is as follows Figure 7 As shown, analysis Figure 7 It can be seen that the computing submodule accounts for 19.3% of the power consumption, the storage submodule accounts for 44.8%, the control submodule accounts for 8.1%, the read-only memory module accounts for 8.4%, the classification submodule accounts for 4.3%, and the clock circuit accounts for 13.6%. The area overhead of the artificial neural network system for detecting Alzheimer's disease of the present invention is as follows Figure 8 Analysis Figure 8 It can be seen that in terms of the area distribution diagram of the artificial neural network system for detecting Alzheimer's disease of the present invention, the computing submodule accounts for 21.7% of the area, the storage submodule accounts for 50.6%, the control submodule accounts for 6.8%, the read-only memory accounts for 2.3%, the classification submodule accounts for 0.47%, and the clock circuit accounts for 18.1%.

[0039] In summary, the artificial neural network system for detecting Alzheimer's disease of the present invention not only realizes efficient and high-precision Alzheimer's disease detection, but also has the performance of small area overhead and low power consumption.

Claims

1. An artificial neural network system for detecting Alzheimer's disease, characterized in that The invention comprises a read-only memory, a storage submodule, a control submodule, a calculation submodule, a classification submodule, a clock circuit and a reset button which restores the read-only memory, the storage submodule, the control submodule, the calculation submodule and the classification submodule to their initial states after being pressed. The clock circuit is used to generate a clock signal to control the working sequence of the storage submodule, the control submodule, the calculation submodule and the classification submodule, so that the storage submodule, the control submodule, the calculation submodule and the classification submodule work in coordination. The read-only memory stores 14 weight data and 1 bias data of the first layer, 1 weight data and 1 bias data of the second layer of a four-layer artificial neural network. 1 weight data and 1 bias data of the third layer and 1 weight data and 1 bias data of the fourth layer, these weight data and bias data are firstly trained on a four-layer artificial neural network by calling the tensorflow library using the python language at a computer, so as to obtain 14 weight data and 1 bias data of the first layer of the four-layer artificial neural network, 1 weight data and 1 bias data of the second layer, 1 weight data and 1 bias data of the third layer and 1 weight data and 1 bias data of the fourth layer, and then all the weight data and bias data of the four-layer artificial neural network are respectively converted into 32-bit floating point numbers through the IEEE754 single-precision standard, and two lights for displaying the detection results are provided at the classification submodule; When the subject needs to be tested for Alzheimer's disease, the 14 additional EEG electrodes are connected to the storage submodule, and the 14 EEG electrodes are brought into contact with the subject's brain, and the 14 EEG electrodes and the artificial neural network system are turned on. At this time, each EEG electrode synchronously starts to periodically collect the subject's EEG data, and generates one channel of EEG data in each sampling cycle and outputs it to the storage submodule until 1000 sampling cycles of sampling are completed. Then, the 14 EEG electrodes and the artificial neural network are disconnected, and the storage submodule saves the 14 channel EEG data outputted thereto by the 14 EEG electrodes in each sampling cycle as a group of EEG data, that is, each group of EEG data includes 14 channel EEG data. When the storage submodule completes the storage of 1000 groups of EEG data, the artificial neural network system starts to work periodically, and the current working cycle of the artificial neural network system is recorded as t; When the artificial neural network system enters the tth working cycle and the current value of t is less than or equal to 1000, the classification submodule is in a standby state. The storage submodule, under the control of the control submodule, outputs the 14 channel EEG data in the tth group of EEG data stored therein to the calculation submodule in 14 times in sequence. The EEG data of a channel outputted for the i-th time is called the i-th channel EEG data, where i=1,2,...,14. When the i-th channel EEG data is outputted to the calculation submodule, the storage submodule obtains the i-th weight data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule synchronously. Moreover, when the 14th channel EEG data is outputted to the calculation submodule, the storage submodule also obtains the bias data of the first layer of the four-layer neural network from the read-only memory and outputs it to the calculation submodule. When the calculation submodule receives the i-th weight data and the i-th channel EEG data of the first layer of the four-layer neural network, the calculation submodule, under the control of the control submodule, outputs the i-th weight data of the first layer of the four-layer neural network to the calculation submodule. The i-channel EEG data is multiplied with the i-th weight data of the first layer of the four-layer neural network to obtain a product. If i=1, the product is directly used as the i-th calculation result of the current working cycle of the calculation submodule. If i≠1, the product obtained at this time is added to the i-1-th calculation result of the current working cycle of the calculation submodule to serve as the i-th calculation result of the current working cycle of the calculation submodule. When the 14th calculation result of the current working cycle of the calculation submodule is obtained, the calculation submodule adds the 14th calculation result to a bias data received in its current working cycle to obtain the sum of the two. The sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle. After that, the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 1000th working cycle of the artificial neural network system ends and enters its 1001st working cycle. When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 1001 and less than or equal to 2000, the classification submodule maintains a standby state, the storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the second layer of the four-layer neural network from the read-only memory and outputs them to the calculation submodule synchronously, the calculation submodule first receives the EEG data of the t-1000th working cycle and 1 bias data of the second layer of the four-layer neural network, and then outputs them to the calculation submodule. weight data are multiplied to obtain a product, and then the product is added to the bias data of the second layer of the four-layer neural network to obtain the sum of the two, and the sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle it receives, and then the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 2000th working cycle of the artificial neural network system ends and enters its 2001st working cycle; When the artificial neural network system enters the tth working cycle, and the current value of t is greater than or equal to 2001 and less than or equal to 3000, the classification submodule maintains a standby state, the storage submodule outputs the stored EEG data of the t-1000th working cycle to the calculation submodule, and obtains 1 weight data and 1 bias data of the third layer of the four-layer neural network from the read-only memory and outputs them to the calculation submodule synchronously, the calculation submodule first receives the received EEG data of the t-1000th working cycle and the third layer of the four-layer neural network. 1 weight data is multiplied to obtain a product, and then the product is added to 1 bias data of the third layer of the four-layer neural network to obtain the sum of the two, and the sum of the two obtained at this time is transmitted to the storage submodule as the EEG data of the t-th working cycle, and the storage submodule saves the EEG data of the t-th working cycle. After that, the t-th working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats until the 3000th working cycle of the artificial neural network system ends and enters its 3001st working cycle; When the artificial neural network system enters the t-th working cycle, and the current value of t is greater than or equal to 3001 and less than or equal to 4000, the classification submodule enters the working state, and has an initial count value of 0. The storage submodule outputs the EEG data of the t-1000th working cycle stored therein to the calculation submodule, and obtains 1 weight data and 1 bias data of the fourth layer of the four-layer neural network from the read-only memory and synchronously outputs them to the calculation submodule. The calculation submodule multiplies the EEG data of the t-1000th working cycle received by it and the weight data of the fourth layer of the four-layer neural network to obtain a product, and adds the product to 1 bias data of the fourth layer of the four-layer neural network to obtain the sum of the two, and transmits the sum of the two obtained at this time as the calculation result of the t-th working cycle to the classification submodule, and the classification submodule determines the received Whether the calculation result of the tth working cycle is a positive number, if it is a positive number, the sum of the current count value plus 1 is used to update the count value there, otherwise, the current count value is kept unchanged. After that, the tth working cycle of the artificial neural network system ends, and the artificial neural network system enters the next working cycle, and repeats over and over again until the 4000th working cycle of the artificial neural network system ends. At this time, if the current count value at the classification submodule is greater than 950, both lights at the classification submodule are on, otherwise only one of the two lights is on. When both lights at the classification submodule are on, it indicates that the test result is confirmed Alzheimer's disease. When only one of the two lights at the classification submodule is on, it indicates that the test result is undiagnosed Alzheimer's disease, and the artificial neural network system ends its work. After pressing the reset button, the artificial neural network system is turned off.

2. An artificial neural network system for detecting Alzheimer's disease according to claim 1, characterized in that The read-only memory has a weight data output channel with a bit width of 32 bits, a bias data output channel with a bit width of 32 bits, and a reset terminal. The control submodule has a clock terminal, a reset terminal, a channel output channel with a bit width of 12 bits, and a group output channel with a bit width of 5 bits. The storage submodule has 17 input channels with a bit width of 32 bits, a weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits, a group input channel with a bit width of 5 bits, a reset terminal, a clock terminal, a weight data output channel with a bit width of 32 bits, and a bias data output channel with a bit width of 32 bits. The 17 input channels of the storage submodule are respectively called input channel one, input channel two, input channel three, input channel four, input channel five, input channel six, input channel seven, input channel eight, input channel nine, input channel ten, input channel eleven, input channel twelve, input channel thirteen, input channel fourteen, input channel fifteen, input channel sixteen and input channel seventeen. The calculation submodule has a reset terminal, a clock terminal, a weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a EEG data input channel with a bit width of 32 bits, and a channel input with a bit width of 12 bits. The computing submodule has an input channel, a group input channel with a bit width of 5 bits, a result output channel with a bit width of 32 bits, and three output channels with a bit width of 32 bits. The three output channels of the computing submodule are respectively referred to as output channel one, output channel two, and output channel three. The classification submodule has a result input channel with a bit width of 32 bits, a reset terminal, a clock terminal, a channel input channel with a bit width of 12 bits, and a diagnosis result output channel with a bit width of 2 bits. The clock circuit has a clock signal output terminal. The weight data output channel of the read-only memory is connected to the weight data input channel of the storage submodule, and the bias data output channel of the read-only memory is connected to the storage submodule. The bias data input channel of the submodule is connected, the clock end of the control submodule is connected to the clock signal output end of the clock circuit, the reset end of the control submodule is connected to the reset button, the channel output channel of the control submodule, the channel input channel of the storage submodule, the channel input channel of the calculation submodule and the channel input channel of the classification submodule are connected, the group output channel of the control submodule, the group input channel of the storage submodule and the group input channel of the calculation submodule are connected, the clock end of the storage submodule is connected to the clock signal output end of the clock circuit, and the reset end of the storage submodule is connected to the reset button,The input channel 1, input channel 2, input channel 3, input channel 4, input channel 5, input channel 6, input channel 7, input channel 8, input channel 9, input channel 10, input channel 11, input channel 12, input channel 13 and input channel 14 of the storage submodule are connected to the 14 EEG electrodes in a one-to-one correspondence, the input channel 15 of the storage submodule is connected to the output channel 1 of the computing submodule, the input channel 16 of the storage submodule is connected to the output channel 2 of the computing submodule, the input channel 17 of the storage submodule is connected to the output channel 3 of the computing submodule, and the storage The weight data output channel of the submodule is connected to the weight data input channel of the calculation submodule, the bias data output channel of the storage submodule is connected to the bias data input channel of the calculation submodule, the EEG data output channel of the storage submodule is connected to the EEG data input channel of the calculation submodule, the result output channel of the calculation submodule is connected to the result input channel of the classification submodule, the reset end of the classification submodule is connected to the reset button, the clock end of the classification submodule is connected to the clock signal output end of the clock circuit, and the diagnosis result output channel of the classification submodule is connected to two lamps.

3. An artificial neural network system for detecting Alzheimer's disease according to claim 2, characterized in that The control submodule includes a group counter and a channel counter. The group counter has a 1-bit enable input channel, a 1-bit enable output channel, a 5-bit group output channel, a clock terminal and a reset terminal. The channel counter has a 1-bit enable input channel, a 1-bit enable output channel, a 12-bit channel output channel, a clock terminal and a reset terminal. The enable input channel of the group counter is connected to the enable output channel of the channel counter. The enable output channel of the individual counter is connected to the enable input channel of the channel counter, the clock end of the group counter is connected to the clock end of the channel counter, and its connection end is the clock end of the control submodule, the reset end of the group counter is connected to the reset end of the channel counter, and its connection end is the reset end of the control submodule, the group output channel of the group counter is the group output channel of the control submodule, and the channel output channel of the channel counter is the channel output channel of the control submodule.

4. The artificial neural network system for detecting Alzheimer's disease according to claim 2, characterized in that The storage submodule includes a data arbitrator and SRAM, the SRAM is used to store EEG data, weight data and bias data, the data arbitrator has 1 EEG data output channel with a bit width of 32 bits, 1 weight data output channel with a bit width of 32 bits, 17 input channels with a bit width of 32 bits, 1 weight data input channel with a bit width of 32 bits and 1 bias data input channel with a bit width of 32 bits; the SRAM has 1 EEG data input channel with a bit width of 32 bits, 1 A weight data input channel with a bit width of 32 bits, a bias data input channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits, a group input channel with a bit width of 5 bits, a EEG data output channel with a bit width of 32 bits, a weight data output channel with a bit width of 32 bits, a bias data output channel with a bit width of 32 bits, a reset terminal and a clock terminal; the EEG data output channel of the data arbitrator is connected to the EEG data input channel of the SRAM, and the weight data output channel of the data arbitrator is connected to the weight data output channel of the SRAM. The data arbitrator is connected to the input channel, the bias data output channel of the data arbitrator is connected to the bias data input channel of the SRAM, the channel input channel of the data arbitrator is connected to the channel input channel of the SRAM, and its connection end is the channel input channel of the storage submodule, the weight data input channel of the data arbitrator is the weight data input channel of the storage submodule, the bias data input channel of the data arbitrator is the bias data input channel of the storage submodule, the 17 input channels of the data arbitrator are the 17 input channels of the storage submodule, the reset end of the SRAM is the reset end of the storage submodule, the clock end of the SRAM is the clock end of the storage submodule, the EEG data output channel of the SRAM is the EEG data output channel of the storage submodule, the weight data output channel of the SRAM is the weight data output channel of the storage submodule, the bias data output channel of the SRAM is the bias data output channel of the storage submodule, and the group input channel of the SRAM is the group input channel of the storage submodule.

5. The artificial neural network system for detecting Alzheimer's disease according to claim 2, characterized in that The calculation submodule includes a floating-point multiplier, a register, a first floating-point adder, a second floating-point adder and an output arbitrator. The floating-point multiplier has a clock terminal, a reset terminal, a multiplication result output channel with a bit width of 32 bits, a weight data input channel with a bit width of 32 bits and a brain wave data input channel with a bit width of 32 bits; the first floating-point adder has a clock terminal, a reset terminal, a first 32-bit multiplier input channel, a second 32-bit multiplier input channel, and a The first addition result output channel with a bit width of 32 bits, a second addition result output channel with a bit width of 32 bits, a channel input channel with a bit width of 12 bits and a group input channel with a bit width of 5 bits; the register has a data output channel with a bit width of 32 bits and a data input channel with a bit width of 32 bits; the second floating point adder has a clock terminal, a reset terminal, an addition result input channel with a bit width of 32 bits, a bias result output channel with a bit width of 32 bits and a bias result output channel with a bit width of 32 bits. The output arbitrator has a clock terminal, a reset terminal, a bias result input channel with a bit width of 32 bits, a result output channel with a bit width of 32, three output channels with a bit width of 32, and a channel input channel with a bit width of 12; the multiplication result output channel of the floating-point multiplier is connected to the first multiplier input channel of the first floating-point adder; the second multiplier input channel of the first floating-point adder is connected to the data output channel of the register; the first addition result output channel of the first floating-point adder is connected to the data input channel of the register; the second addition result output channel of the first floating-point adder is connected to the addition result input channel of the second floating-point adder; the bias result output channel of the second floating-point adder is connected to the bias result input channel of the output arbitrator; the channel input channel of the first floating-point adder is connected to the channel input channel of the output arbitrator, and its connection end is the channel input channel of the calculation submodule; The weight data input channel of the floating-point multiplier is the weight data input channel of the calculation submodule, and the EEG data input channel of the floating-point multiplier is the EEG data input channel of the calculation submodule; The group input channel of the first floating-point adder is the group input channel of the computing submodule; The bias data input channel of the second floating-point adder is the bias data input channel of the calculation submodule; The three output channels of the output arbitrator are the three output channels of the computing submodule; The result output channel of the output arbitrator is the result output channel of the calculation submodule.

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