Optimization method and device of memory test algorithm based on machine learning
Through the combination of decision tree model and genetic algorithm, the search progress results of the memory test algorithm are optimized, fault coverage is improved, the problem of low fault coverage in the existing technology is solved, and more efficient memory testing is achieved.
Patent Information
- Application Number
- CN202411119889.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2025-01-10
AI Technical Summary
Existing memory testing algorithms have limitations in fault coverage, which is difficult to effectively improve test fault coverage.
Using a machine learning-based method, combining decision tree model and genetic algorithm, decision generation and screening of the forward results of the memory test algorithm to be optimized, and through cross-genetic and random mutations, the search element sequence is optimized to improve the fault coverage rate.
Through the dual screening optimization of decision tree model and genetic algorithm, the fault coverage in memory tests is significantly improved, and the defect of low fault coverage in the prior art is overcome.
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Figure CN119294483A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of memory testing technology, and in particular to a method and device for optimizing a memory testing algorithm based on machine learning. Background Art
[0002] In recent years, the demand for large-capacity memory has continued to grow. As the integration of memory continues to increase and the manufacturing process becomes increasingly complex, the failure rate is also gradually increasing, so the coverage requirements for memory testing are constantly increasing. The March algorithm is generally used in the memory testing process. The March algorithm has high fault coverage and linear test complexity, and occupies an important position in the memory test algorithm. However, the test fault coverage of the March algorithm still has limitations.
[0003] Some methods have been proposed in the prior art to improve the test fault coverage of the March algorithm. For example, the adjacent data background (DB) management scheme, the March SD algorithm that covers all static and dynamic faults, the improved March LR test algorithm, the March FM test algorithm that can quickly detect common faults in memory, etc. These methods optimize the March algorithm by taking test time, fault coverage, and fault coverage range as optimization targets. However, when the currently optimized March algorithm is used for testing, the test fault coverage still needs to be improved. Summary of the invention
[0004] The present invention provides a method and device for optimizing a memory test algorithm based on machine learning, so as to solve the technical problem in the prior art that when a memory test algorithm is used to perform memory test, the test fault coverage still needs to be improved.
[0005] The present invention provides a method for optimizing a memory test algorithm based on machine learning, and the method specifically comprises the following steps: Obtaining the forward search result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; The search element sequence is screened according to a preset sequence screening rule to obtain a screening element sequence; Taking the screening element sequence as an initial population, determining the fault coverage rate of each sequence individual in the initial population, and determining the sequence individual to be inherited from the initial population according to the fault coverage rate; Randomly selecting two of the sequence individuals to be inherited for cross inheritance to obtain offspring sequence individuals, and randomly mutating the offspring sequence individuals to obtain mutant sequence individuals; Screening the mutant sequence individuals according to the sequence screening rules to obtain target sequence individuals; When the preset crossover inheritance times are reached, the target sequence individual with the maximum fault coverage is used as the optimized search forward result of the memory test algorithm.
[0006] In some embodiments, the calling decision tree model to make a decision on the forward search result to be optimized to obtain a search operation sequence includes: Determine each search advancement element in the search advancement result to be optimized, wherein the search advancement element includes an operation direction and an operation type during a memory test, and the operation type includes a write operation type and a read operation type; Calling a decision tree model to make a decision on each of the search advancing elements to obtain a decision search element, wherein the operation direction of the decision search element is the same as the operation direction of the search advancing element, and the number of search advancing elements belonging to the write operation type is the same as the number of decision search elements belonging to the write operation type; The decision search elements are traversed to obtain a search element sequence.
[0007] In some embodiments, the sequence screening rule includes: when the search element sequence satisfies any one of the following screening conditions, the search element sequence is screened out: The search element sequence does not satisfy that the operation direction of the first operation element is not limited, the operation type is a write operation type, and the operation value of the write operation type is 0; There are three consecutive operation elements of the read operation type in the search element sequence, or there are three consecutive operation elements of the write operation type; There are no two consecutive operation elements of the read operation type, or there are no two consecutive operation elements of the write operation type in the search element sequence, wherein the operation values of the two consecutive read operation types are the same, and the operation values of the two consecutive write operation types are the same; There is no operation transformation element in the search element sequence, and the operation transformation element is any two adjacent operation elements with different operation types and the same operation value; There are operation value changing elements in the search element sequence, and the operation value changing elements are any two adjacent operation elements with different operation values.
[0008] In some embodiments, determining the fault coverage of each sequence individual in the initial population includes: For each sequence individual in the initial population, determining the number of detection faults of the sequence individual during the memory test process; Get the total number of faults of the memory fault type; The ratio of the number of detected faults to the total number of faults is taken as the fault coverage of the individual sequence.
[0009] In some embodiments, determining a set of individual sequences to be inherited from the initial population according to the fault coverage rate includes: Determining the candidate individual inheritance probability of each sequence individual in the initial population being inherited to the next generation according to the fault coverage rate; Determining the cumulative inheritance probability of the sequence individuals; Randomly select a probability value within the maximum cumulative probability range of the cumulative genetic probability, and determine the target individual genetic probability corresponding to the cumulative probability interval according to the cumulative probability interval in which the probability value is within the maximum cumulative probability range; The sequence individuals corresponding to the target individual's genetic probability are used as the sequence individuals to be inherited.
[0010] In some embodiments, the step of arbitrarily selecting two of the sequence individuals to be inherited for cross inheritance to obtain an offspring sequence individual comprises: A first genetic sequence segment is intercepted from a first individual to be sequenced, and a second genetic sequence segment is intercepted from a second individual to be sequenced, wherein the first individual to be sequenced is any one of the two individuals to be sequenced, and the second individual to be sequenced is another individual to be sequenced; The first genetic sequence fragment is spliced to the position of the second genetic sequence fragment of the second sequence individual to be inherited to obtain one of the offspring sequence individuals, and the second genetic sequence fragment is spliced to the position of the first genetic sequence fragment of the first sequence individual to be inherited to obtain another offspring sequence individual.
[0011] In some embodiments, the step of arbitrarily selecting two individuals of the sequence to be inherited for cross inheritance to obtain an individual of the sequence of an offspring comprises: Extracting a first genetic sequence sub-segment and a second genetic sequence sub-segment from a first sequence individual to be inherited, and extracting a third genetic sequence sub-segment and a fourth genetic sequence sub-segment from a second sequence individual to be inherited, wherein the first sequence individual to be inherited is any one of the two sequence individuals to be inherited, and the second sequence individual to be inherited is the other sequence individual to be inherited; splicing the first genetic sequence sub-fragment to the position of the third genetic sequence sub-fragment of the second sequence individual to be inherited, and splicing the second genetic sequence sub-fragment to the position of the fourth genetic sequence sub-fragment of the second sequence individual to be inherited, to obtain one of the offspring sequence individuals; The third genetic sequence sub-fragment is spliced into the first genetic sequence sub-fragment position of the first sequence individual to be inherited, and the fourth genetic sequence sub-fragment is spliced into the second genetic sequence sub-fragment position of the first sequence individual to be inherited to obtain another offspring sequence individual.
[0012] In some embodiments, the randomly mutating the progeny sequence individuals to obtain mutant sequence individuals comprises: Randomly select a target operation element from the offspring sequence individual, change the operation type of the target operation element or change the operation value to obtain a mutant sequence individual; Alternatively, two target operation elements are randomly selected from the offspring sequence individuals, and the element positions of the two target operation elements in the offspring sequence individuals are exchanged to obtain a mutant sequence individual.
[0013] The present invention also provides an optimization device for a memory test algorithm based on machine learning, and the device specifically includes the following modules: A decision module, used for obtaining the forward search result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; A screening module, used to screen the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; A determination module, used to use the screening element sequence as an initial population, determine the fault coverage rate of each sequence individual in the initial population, and determine the sequence individual to be inherited from the initial population according to the fault coverage rate; A genetic module is used to arbitrarily select two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and to randomly mutate the offspring sequence individuals to obtain mutant sequence individuals; The screening module is further used to screen the mutant sequence individuals according to the sequence screening rules to obtain target sequence individuals; The optimization module is used to use the target sequence individual with the maximum fault coverage as the optimized search forward result of the memory test algorithm when the preset crossover inheritance times are reached.
[0014] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, an optimization method for a memory testing algorithm based on machine learning as described in any one of the above is implemented.
[0015] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a method for optimizing a memory testing algorithm based on machine learning as described in any one of the above.
[0016] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the computer program implements any one of the above-mentioned methods for optimizing a memory testing algorithm based on machine learning.
[0017] The optimization method and device of the memory test algorithm based on machine learning provided by the present invention make decisions on the search forward results to be optimized of the memory test algorithm by using the decision tree model in machine learning, obtain the search element sequence, and screen out the screening element sequence. Next, the screening element sequence is further optimized by using a genetic algorithm, and finally the target sequence individual with the maximum fault coverage is selected as the optimized search forward result of the memory test algorithm. Therefore, when the maximum fault coverage is taken as the optimization target, the search forward results to be optimized are screened and optimized twice by using a decision tree model and a genetic algorithm, which can ensure that the optimized target sequence individual achieves the maximum fault coverage during the memory test process. This overcomes the defect that the test fault coverage still needs to be improved when the memory test algorithm is used to perform memory testing in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced one by one below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0019] Figure 1 It is a flow chart of the optimization method of the memory testing algorithm based on machine learning provided by the present invention.
[0020] Figure 2 It is one of the schematic diagrams of the decision tree model generation process provided by the present invention.
[0021] Figure 3 This is the second schematic diagram of the decision tree model generation process provided by the present invention.
[0022] Figure 4 It is a schematic diagram of the principle of the roulette strategy provided by the present invention.
[0023] Figure 5 It is a schematic diagram of the single-point crossover inheritance of the individual sequence to be inherited provided by the present invention.
[0024] Figure 6 It is a schematic diagram of the double-point crossover inheritance of the individual sequence to be inherited provided by the present invention.
[0025] Figure 7 It is a schematic diagram of the basic position variation of individual offspring sequences provided by the present invention.
[0026] Figure 8 It is a schematic diagram of the reversal variation of individual offspring sequences provided by the present invention.
[0027] Fig. 9 It is a structural schematic diagram of an optimization device for a memory testing algorithm based on machine learning provided by the present invention.
[0028] Fig.10 It is a schematic diagram of the physical structure of an electronic device provided by the present invention. DETAILED DESCRIPTION
[0029] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0030] Combine the following Figure 1 Describe the optimization method of the memory test algorithm based on machine learning of the present invention, Figure 1 is one of the flow charts of the optimization method of the memory test algorithm based on machine learning provided by the present invention, such as Figure 1 As shown, the method includes the following steps.
[0031] In step 101, the search result to be optimized of the memory test algorithm is obtained, and a decision tree model is called to make a decision on the search result to be optimized to obtain a search element sequence.
[0032] First, the search forward result to be optimized of the memory test algorithm is obtained. Here, the memory test algorithm can be a March algorithm. The processing process of the March algorithm is to detect whether the memory cell has a fault by reading and writing 0 and reading and writing 1 for each memory cell in the memory. For the convenience of description, the change of the state value of the two memory cells (represented by two digits, such as 00), each read and write operation (called operation type, read or write) and operation data (operation value, 0 or 1) are recorded as a search forward element. Therefore, the search forward result to be optimized of the March algorithm includes multiple search forward elements. In addition, the search forward element also records the detection direction during the memory test, that is, the search forward direction of the March algorithm on the memory cell. In the search forward direction, the state values of the two memory cells will be changed by executing the operation type and the operation value. In the embodiment of the present invention, for the search forward element of the March algorithm, in the test operation, the change of the state value from left to right is defined as the "↑" direction, and the corresponding detection direction is from bottom to top, and the change of the state value from right to left is defined as the "↓" direction, and the corresponding detection direction is from top to bottom. For the operation type, the write operation type is write, represented by w, and the read operation type is read, represented by r. The operation value is the value input during the test, specifically a pair of opposite values, that is, 0 and 1. Therefore, a test operation sample can be represented as "↑w1", which means that two storage cells are written with 1 from bottom to top.
[0033] Next, the decision tree model is called to make decisions on the search forward results to be optimized, and a search element sequence is obtained. Specifically, each search forward element in the search forward results to be optimized is determined here, wherein the search forward element includes the operation direction and operation type during the memory test, and the operation type includes the write operation type w and the read operation type r. Then a decision is made for each search forward element to obtain a decision search element. Here, the decision tree algorithm in machine learning is used, and each search forward element is used as the root node in the decision tree. Then, possible test operations are performed according to the nodes to change the state value in the search forward element, thereby obtaining different nodes, which are the leaf nodes of the decision tree.
[0034] For example, see Figure 2 , Figure 2 It is one of the schematic diagrams of the decision tree model generation process provided by the present invention, such as Figure 2 As shown in the figure, from left to right (i.e., the "↑" direction), the root nodes (i.e., the state values in the search forward element) are divided into four categories: "00, 01, 10, and 11". After the decision tree is generated, they are as follows: Figure 2 As shown in (a), (b), (c) and (d).
[0035] exist Figure 2In (a), after the ↑w0 operation is performed on the state "00", the state remains "00", after the ↑w1 operation is performed, the state changes to "10", and after the ↑r0 operation is performed, the state remains "00". Figure 2 In (b), the state "01" changes to "00" after the ↑w0 operation, changes to "10" after the ↑w1 operation, and changes to "00" after the ↑r0 operation. Figure 2 In (c), the state "10" changes to "01" after the ↑w0 operation, changes to "11" after the ↑w1 operation, and remains "10" after the ↑r1 operation. Figure 2 In (d), the state "11" remains "11" after the ↑w1 operation, changes to "01" after the ↑w0 operation, and changes to "11" after the ↑r1 operation.
[0036] See also Figure 3 , Figure 3 This is the second schematic diagram of the decision tree model generation process provided by the present invention. Figure 3 As shown in the figure, in the right-to-left direction (i.e., the "↓" direction), the root node (i.e., the state value in the search forward element) is also divided into four categories: "00, 01, 10, 11". After the decision tree is generated, they are as follows: Figure 3 As shown in (e), (f), (g) and (h).
[0037] exist Figure 3 In (e), after the ↓w0 operation is performed on the state "00", the state remains "00", after the ↓w1 operation is performed, the state changes to "01", and after the ↓r0 operation is performed, the state remains "00". Figure 3 In (f), the state "01" changes to "11" after the ↓w1 operation, changes to "10" after the ↓w0 operation, and remains "01" after the ↓r1 operation. Figure 3 In (g), the state "10" changes to "00" after the ↓w0 operation, changes to "01" after the ↓w1 operation, and remains "10" after the ↓r0 operation. Figure 3 In (h), after the ↓w1 operation is performed on the state "11", the state remains "11", after the ↓w0 operation is performed, the state changes to "10", and after the ↓r1 operation is performed, the state remains "11".
[0038] The main purpose of the decision tree model is to regenerate the search forward elements (also known as March elements), but during the generation process, the algorithm length is kept unchanged, that is, the total number of search forward elements remains unchanged. In addition, the operation direction of each search forward element for the test operation remains unchanged, and the number of write operation types for each search forward element remains unchanged. In other words, the operation direction of the decision search element is the same as the operation direction of the search forward element, and the number of search forward elements belonging to the write operation type is the same as the number of decision search elements belonging to the write operation type.
[0039] After the decision tree is generated, the decision search elements in the decision tree can be traversed to obtain a search element sequence. Since the present invention is to optimize the forward search results to be optimized, the purpose of the optimization is to improve the fault coverage of the March elements, and the test coverage is affected by all test operations. Therefore, in an embodiment of the present invention, the generated results (i.e., leaf nodes) of the decision tree can be traversed to generate a test operation sequence. In the traversal process, the root node to the leaf node of the decision tree (i.e., a storage unit from one state value to another state value during the test process) is traversed, and the test operations from the root node to the leaf node are recorded as operation elements, and then the recorded operation elements are merged to obtain a search element sequence.
[0040] In step 102, the search element sequence is screened according to a preset sequence screening rule to obtain a screening element sequence.
[0041] Next, a preliminary screening is performed on the search element sequence generated by traversing the decision tree model. Because the number of decision trees may be huge, resulting in a very large number of search element sequences generated, this method embodiment presets several sequence screening rules according to the actual situation of the memory test, and screens the search element sequence according to the preset sequence screening rules to obtain a screening element sequence.
[0042] The sequence screening rules are formulated according to the fault types of memory tests, and mainly screen out some search element sequences that are obviously unable to detect the memory fault types, that is, search element sequences whose test fault coverage is obviously not up to standard. The specific sequence screening rules include five screening conditions. When the search element sequence meets any one of the five screening conditions, the search element sequence is screened out. The five screening conditions will be described one by one below.
[0043] (1) The search element sequence does not satisfy the first operation element whose operation direction is not limited, whose operation type is a write operation type, and whose operation value is 0.
[0044] This means that in the search element sequence, the first operation element (i.e., test operation) is not "↕(w0,...)", where "↕" indicates that the test operation has no limit on the detection direction, which can be from bottom to top or from top to bottom, and w0 means writing 0. In other words, in the search element sequence, the first operation element must be "↕(w0,...)", if not satisfied, the search element sequence is filtered out.
[0045] (2) There are three consecutive operation elements of the read operation type or three consecutive operation elements of the write operation type in the search element sequence.
[0046] According to the analysis of the detection sequence of each fault type in the memory, it can be found that there is no fault type that requires three consecutive write or read operations to detect, so the results containing three consecutive write or read operations are not retained. Therefore, if there are three consecutive read operation type operation elements (such as w / w / w) or three consecutive write operation type operation elements (r / r / r) in a search element sequence, this search element sequence is filtered out.
[0047] (3) There do not exist two consecutive operation elements of the read operation type, or there do not exist two consecutive operation elements of the write operation type in the search element sequence, where the operation values of the two consecutive read operation types are the same, and the operation values of the two consecutive write operation types are the same.
[0048] Similarly, according to the analysis of the detection sequence of each fault type in the memory, it can be found that there are fault types that require two consecutive write or read operations with the same operation value to detect, so the results that do not contain two consecutive write or read operations with the same operation value are not retained. Therefore, if there are no consecutive two read operation type operation elements (such as w1 / w1 or w0 / w0) or no consecutive two write operation type operation elements (r1 / r1 or r0 / r0) in a certain search element sequence, then this search element sequence is screened out.
[0049] (4) There is no operation transformation element in the search element sequence. An operation transformation element is any two adjacent operation elements with different operation types and the same operation value.
[0050] Similarly, based on the analysis of the detection sequence of each fault type in the memory, it can be found that the operation sequence must include two test operations that have been transformed by write or read operations. That is, there will not be any two adjacent test operations in the operation sequence with the same operation type, and there must be read-write operation transformations with the same operation value. For example, the operation sequence (i.e., the search element sequence) must have a "w0" operation transformed into "r0", a "w1" operation transformed into "r1", or a "w1" operation transformed into "r1", and a "w0" operation transformed into "r0".
[0051] (5) There are operation value changing elements in the search element sequence. Operation value changing elements are any two adjacent operation elements with different operation values.
[0052] Here, according to the analysis of the detection sequence of each fault type in the memory, it can be found that the operation values of two adjacent operation elements in the operation sequence are the same, and there will not be an operation of a certain operation value followed by an operation of the opposite value of the operation value. Specifically, there will not be two test operations of writing a certain operation value and then reading or writing the opposite value of a certain operation value in the operation sequence, that is, in any two adjacent operation elements containing a write operation in the detection sequence, it is necessary to ensure that the operation values are the same. As mentioned above, the operation value is a pair of opposite values, that is, 0 or 1. Therefore, there is no "w0" operation followed by "w1" or "r1" operation, or "r1" operation followed by "w0" or "r0" operation in the sequence. In addition, there will not be two test operations of reading a certain operation value followed by reading the opposite value of a certain operation value in the operation sequence, that is, there is no "r0" operation followed by "r1" operation, or "r1" operation followed by "r0" operation in the sequence.
[0053] Through the above screening, the search element sequences that obviously do not meet the test fault coverage can be screened out, which not only preliminarily optimizes the forward search results to be optimized of the memory test algorithm, but also simplifies the calculation process of subsequent continued screening.
[0054] In step 103, the screening element sequence is used as an initial population, the fault coverage rate of each sequence individual in the initial population is determined, and a set of sequence individuals to be inherited is determined from the initial population according to the fault coverage rate.
[0055] After the preliminary optimization and screening in step 102, the obtained screening element sequences are still numerous. In the embodiment of the present invention, a genetic algorithm is used to further optimize these screening element sequences, that is, to further screen these screening element sequences. In the embodiment of the present invention, the genetic algorithm uses the screening element sequence as the initial population, and each chromosome (screening element sequence) in the initial population as an individual, calculates the number of faults that the chromosome can detect, and obtains the fault coverage rate. Next, the fault coverage rate is used as the fitness of the individual, and the individual is selected according to the fitness size to be inherited to the next generation population. In the inheritance process, the selected individuals are crossover and mutation operations are performed to generate new offspring individuals to be inherited to the next generation population, and the offspring individuals obtained by the crossover and mutation operations that do not meet the constraints are removed, and then the feasible solution population is selected from the next generation population according to the constraints, and this cycle is repeated until the set genetic generation is reached, and finally the chromosome with the maximum fitness is selected, that is, the element sequence with the largest fault coverage rate is selected.
[0056] The specific screening process of the genetic algorithm is introduced below. First, the screening element sequence is taken as an initial population, and each chromosome in the initial population is taken as an individual, that is, each screening element sequence is taken as a sequence individual.
[0057] Next, determine the fault coverage of each sequence individual in the initial population, that is, detect the number of faults that each screening element sequence can detect, and then calculate the fault coverage. Specifically, for each sequence individual in the initial population, determine the number of faults detected by the sequence individual during the memory test process. Here, calculate the number of faults that each screening element sequence can detect in the memory, denoted as , and then obtain the total number of memory fault types. Here, we can determine the total number of memory fault types based on the storage fault information statistically recorded in historical experience, recorded as , and finally the number of detected faults Total number of failures The ratio of is taken as the fault coverage of the individual sequence (i.e., the ratio multiplied by 100%), denoted as , expressed as the following formula (1): (1)
[0058] The above formula (1) can be used to calculate the fault coverage rate of each sequence individual in the initial population as the individual fitness, and then determine which individuals can be used for reproduction and generation of offspring according to the individual fitness, that is, determine the set of sequence individuals to be inherited from the initial population according to the fault coverage rate. The embodiment of the present invention adopts a roulette strategy here, calculates the candidate individual inheritance probability according to the fault coverage rate of each sequence individual, and judges whether the sequence individual can be used as the sequence individual to be inherited according to the candidate individual inheritance probability. According to the roulette strategy, the greater the candidate individual inheritance probability of the sequence individual, the more likely it is to be used as the sequence individual to be inherited. The calculation process of the roulette strategy is described below.
[0059] First, according to the fault coverage rate of each sequence individual in the initial population, the probability of each sequence individual in the initial population being inherited to the next generation is determined. The fault coverage rate here is also the individual fitness in the genetic algorithm, denoted as , where i=1, 2, 3, …, M, where M is the total number of sequence individuals. Thus, the genetic probability of the candidate individuals (denoted as ) is as follows: Formula (2): = (2)
[0060] Next, determine the cumulative inheritance probability of the sequence individuals , the calculation method is as follows formula (3): (3)
[0061] In the above formula (3), i is the total number of sequence individuals, and j is the sequence number, which represents the jth sequence individual. Figure 4 , Figure 4 It is a schematic diagram of the principle of the roulette strategy provided by the present invention, such as Figure 4 As shown, assuming that there are four sequence individuals, the genetic probabilities of the candidate individuals corresponding to the four sequence individuals are 0.15, 0.45, 0.25, and 0.15 respectively, and the cumulative genetic probability is expressed as , , , , specifically 0.15, 0.6, 0.85, and 1. These cumulative genetic probabilities form a maximum cumulative probability range [0, 1], and then a probability value is randomly selected within the maximum cumulative probability range, denoted as r, and the cumulative probability interval in which the probability value r is within the maximum cumulative probability range [0, 1] is determined. Finally, the genetic probability of the target individual corresponding to the cumulative probability interval is determined, and the sequence individual corresponding to the genetic probability of the target individual is used as the sequence individual to be inherited.
[0062] For example, Figure 4 As shown, the genetic probabilities of the candidate individuals corresponding to the four sequence individuals are 0.15, 0.45, 0.25, and 0.15, respectively, and the calculated cumulative genetic probabilities are 0.15, 0.6, 0.85, and 1, respectively. These cumulative genetic probabilities constitute three cumulative probability intervals, namely (0, 0.15), (0.15, 0.6), (0.6, 0.85), and (0.85, 1), so that the maximum cumulative probability range is [0, 1]. Then, a probability value r of 0.56 is randomly selected within the maximum cumulative probability range, and the cumulative probability interval in which the probability value 0.56 is located within the maximum cumulative probability range [0, 1] is determined to be (0.15, 0.6). Finally, the genetic probability of the target individual corresponding to the cumulative probability interval (0.15, 0.6) is determined to be 0.45, and the sequence individual corresponding to the genetic probability of the target individual 0.45 (that is, the second sequence individual) is used as the sequence individual to be inherited.
[0063] Therefore, by randomly selecting a probability value r, a roulette wheel strategy can be used to determine a sequence individual to be inherited from the initial population. If there are M sequence individuals in the initial population, the probability value r can be randomly selected M times, and the above roulette wheel strategy can be repeated, and finally M sequence individuals to be inherited can be obtained to form a set of genetic sequence individuals.
[0064] In step 104, two sequence individuals to be inherited are randomly selected for cross inheritance to obtain offspring sequence individuals, and the offspring sequence individuals are randomly mutated to obtain mutant sequence individuals.
[0065] After determining the set of genetic sequence individuals that can reproduce offspring from the initial population, two genetic sequence individuals to be inherited are randomly selected from the genetic sequence individual set for crossover inheritance to obtain offspring sequence individuals. Here, the process of crossover inheritance is similar to the process of chromosome crossover exchange, and one or more gene fragments of two chromosomes are crossover exchanged to obtain new chromosomes and form offspring individuals. In the embodiment of the present invention, one or more operation element subsequences (including one or more operation elements) in the two sequence individuals to be inherited are crossover inherited (i.e., crossover exchanged). There are two types of crossover exchange: single-point crossover and double-point crossover. Single-point crossover is to crossover exchange one genetic sequence fragment (including one or more operation elements) in the two sequence individuals to be inherited, and double-point crossover is to crossover exchange two genetic sequence fragments (including one or more operation elements) in the two sequence individuals to be inherited, which are described below.
[0066] For single-point crossover, a first genetic sequence fragment is cut from the first individual to be inherited, and a second genetic sequence fragment is cut from the second individual to be inherited, wherein the first individual to be inherited is any one of the two individuals to be inherited, and the second individual to be inherited is the other individual to be inherited. Then the first genetic sequence fragment is spliced to the position of the second genetic sequence fragment of the second individual to be inherited to obtain one of the offspring sequence individuals, and the second genetic sequence fragment is spliced to the position of the first genetic sequence fragment of the first individual to be inherited to obtain another offspring sequence individual.
[0067] It should be noted that the two splicing processes of splicing the first genetic sequence fragment and the second genetic sequence fragment are executed in parallel, and there is no distinction between the order of execution. For the convenience of description, the embodiments of the present invention have a distinction between the order of execution, but this should not be limited in actual implementation.
[0068] For example Figure 5 As shown, Figure 5It is a schematic diagram of single-point crossover inheritance of the sequence individuals to be inherited provided by the present invention, firstly, the first genetic sequence fragment (w0 r0 r0) is intercepted from the sequence individual to be inherited 1 (w1 r1 w0 w0 r0 r0), and then the second genetic sequence fragment (w1 r1 r1) is intercepted from the sequence individual to be inherited 2 (w0 r0 w1 w1 r1 r1). Then, the first genetic sequence fragment (w0 r0 r0) is spliced to the position of the second genetic sequence fragment (w1 r1 r1) in the sequence individual to be inherited 2 to obtain one of the offspring sequence individuals 2 (w0 r0 w1 w0 r0 r0), and the second genetic sequence fragment (w1 r1 r1) is spliced to the position of the first genetic sequence fragment (w0 r0 r0) in the sequence individual to be inherited 1 to obtain another offspring sequence individual 1 (w1 r1 w0 w1 r1 r1).
[0069] For double-point crossover, the first genetic sequence sub-fragment and the second genetic sequence sub-fragment are intercepted from the first individual to be inherited, and the third genetic sequence sub-fragment and the fourth genetic sequence sub-fragment are intercepted from the second individual to be inherited, wherein the first individual to be inherited is any one of the two individuals to be inherited, and the second individual to be inherited is the other individual to be inherited. Then the first genetic sequence sub-fragment is spliced to the position of the third genetic sequence sub-fragment of the second individual to be inherited, and the second genetic sequence sub-fragment is spliced to the position of the fourth genetic sequence sub-fragment of the second individual to be inherited, to obtain one of the offspring sequence individuals, and then the third genetic sequence sub-fragment is spliced to the position of the first genetic sequence sub-fragment of the first individual to be inherited, and the fourth genetic sequence sub-fragment is spliced to the position of the second genetic sequence sub-fragment of the first individual to be inherited, to obtain another offspring sequence individual.
[0070] It should also be noted that the four splicing processes of splicing the first genetic sequence fragment, the second genetic sequence fragment, the third genetic sequence fragment, and the fourth genetic sequence fragment are executed in parallel, and there is no distinction between the order of execution. For the convenience of description, the embodiments of the present invention have a distinction between the order of execution, but this should not be limited in actual implementation.
[0071] For example Figure 6 As shown, Figure 6It is a schematic diagram of the double-point crossover inheritance of the sequence individuals to be inherited provided by the present invention. First, the first genetic sequence fragment (r1) and the second genetic sequence sub-fragment (r0 r0) are cut from the sequence individual to be inherited 1 (w1 r1 w0 w0 r0 r0), and then the third genetic sequence fragment (r0) and the fourth genetic sequence fragment (r1 r1) are cut from the sequence individual to be inherited 2 (w0 r0 w1 w1 r1 r1). Then, the first genetic sequence fragment (r1) is spliced to the position of the third genetic sequence fragment (r0) in the sequence individual to be inherited 2, and the second genetic sequence fragment (r0 r0) is spliced to the position of the fourth genetic sequence fragment (r1 r1) in the sequence individual to be inherited 2, to obtain one of the offspring sequence individuals 2 (w0 r1 w1 w1r0 r0). Then the third genetic sequence fragment (r0) is spliced into the position of the first genetic sequence fragment (r1) in the individual 1 to be inherited, and the fourth genetic sequence fragment (r1 r1) is spliced into the position of the second genetic sequence fragment (r0 r0) in the individual 1 to be inherited, to obtain another offspring sequence individual 1 (w1 r0 w0 w0 r1 r1).
[0072] Therefore, according to cross-inheritance, every two sequence individuals to be inherited can inherit two offspring sequence individuals to form the next generation population of the initial population. In order to encourage the March algorithm to explore and obtain unknown and more test operations. The embodiment of the present invention performs mutations on the offspring sequence individuals. Mutation is to appropriately mutate one or more random operation elements in the offspring sequence individuals, so as to produce better individuals. The mutation in inheritance is random and can regularly update the population randomly, so that the search process for the optimal solution is no longer limited to the sequence individuals of the limited initial population.
[0073] Therefore, after the embodiment of the present invention obtains the offspring sequence individuals by cross-inheritance, the offspring sequence individuals are randomly mutated to obtain mutant sequence individuals. There are two ways of mutation, which can be basic position mutation or reversal mutation, which are respectively described below.
[0074] If the mutation is a basic bit mutation, a target operation element is randomly selected from the offspring sequence individual, the operation type of the target operation element is changed, or the operation value of the operation type is changed to obtain the mutation sequence individual. Here, an operation element can be randomly selected from the offspring sequence individual, and the operation type of the operation element can be changed, such as changing the read operation type r to the write operation type w, or changing the write operation type w to the read operation type r. Alternatively, the operation value of the operation element can be changed, such as changing the read 0 (r0) to the read 1 (r1).
[0075] For example, Figure 7 As shown, Figure 7It is a schematic diagram of the basic bit variation of an offspring sequence individual provided by the present invention. A certain offspring sequence individual is "w1 r1 w0 w0 r0 r0", a target operation element "w0" is randomly selected therefrom, and the operation value of the operation element is changed to "w1", and the mutant sequence individual is "w1 r1 w1 w0 r0 r0".
[0076] If the mutation is a reversal mutation, two target operation elements are randomly selected from the offspring sequence individuals, and the element positions of the two target operation elements in the offspring sequence individuals are exchanged to obtain a mutant sequence individual. Here, two operation elements can be randomly selected from the offspring sequence individuals, and the element positions of the two operation elements in the offspring sequence individuals are exchanged.
[0077] For example Figure 8 As shown, Figure 8 It is a schematic diagram of the reversal mutation of an offspring sequence individual provided by the present invention. A certain offspring sequence individual is "w1 r1 w0 w0 r0 r0", two target operation elements "w0" and "r0" are randomly selected, and then the element positions of "w0" and "r0" are changed, and the mutant sequence individual obtained is "w1 r1 r0 w0 r0 w0".
[0078] In a specific implementation, which mutation method to use to mutate the offspring sequence individuals can be selected according to actual needs, or two mutation methods can be used at the same time, which is not limited in the embodiment of the present invention.
[0079] In step 105, the mutant sequence individuals are screened according to the sequence screening rules to obtain the target sequence individuals.
[0080] After the genetic sequence individuals undergo cross-inheritance and random mutation, multiple mutant sequence individuals are still obtained. The operation types and operation values of the operation elements in these mutant sequence individuals are more or less changed, which will cause some mutant sequence individuals to no longer meet the preset sequence screening rules (i.e., the five screening conditions mentioned above). Therefore, in the embodiment of the present invention, the mutant sequence individuals are screened according to the sequence screening rules to obtain the target sequence individuals. Here, the mutant sequence individuals are screened for the second time according to the five screening conditions mentioned above, and this screening is to screen out the mutant sequence individuals whose test fault coverage rate obviously does not meet the standard.
[0081] The target sequence individuals obtained after screening can form the next generation population of the initial population, and then crossover inheritance and mutation are continued for the next generation population, that is, step 103 to step 105 are continued to be performed, and the target sequence individuals are obtained to continue as the next generation population. In this way, population inheritance iteration is performed, and the above steps 103 to step 105 are repeated until the termination criterion is met, that is, the preset number of crossover inheritance is reached, and the iteration ends.
[0082] In step 106, when the preset crossover inheritance times are reached, the target sequence individual with the maximum fault coverage is used as the optimized search forward result of the memory test algorithm.
[0083] By continuously performing population genetic iterations, the March algorithm will continuously explore the sequence individuals with the maximum fault coverage, that is, find the optimal result of the search forward result to be optimized of the memory test algorithm. When the preset number of cross-inheritance is reached, the population genetic iteration is terminated, and then the target sequence individuals are traversed to calculate the fault coverage of each target sequence individual. The target sequence individual with the maximum fault coverage is selected, and the operation elements in this sequence individual can be used as the optimal result of the search forward result after optimization of the memory test algorithm. Therefore, the target sequence individual with the maximum fault coverage is used as the search forward result after optimization of the memory test algorithm. When the memory is tested by the March algorithm, the search test is performed according to the search forward result after optimization, and the maximum test fault coverage of the memory test can be achieved.
[0084] Through the embodiment of the present application, the decision tree model of machine learning is called to make decisions on the forward search results to be optimized of the memory test algorithm, obtain a search element sequence, and screen out a screening element sequence. Next, a genetic algorithm is used to further optimize the screening element sequence, and finally the target sequence individual with the maximum fault coverage is selected as the optimized forward search result of the memory test algorithm. Therefore, when the maximum fault coverage is used as the optimization target, the forward search results to be optimized are screened and optimized twice by a decision tree model and a genetic algorithm, which can ensure that the optimized target sequence individuals achieve the maximum fault coverage during the memory test process. This overcomes the defect that the test fault coverage still needs to be improved when the memory test algorithm is used to perform memory testing in the prior art.
[0085] The following is a description of the optimization device for the memory test algorithm based on machine learning provided by the present invention. The optimization device for the memory test algorithm based on machine learning described below and the optimization method for the memory test algorithm based on machine learning described above can refer to each other.
[0086] Fig. 9 is a schematic diagram of the structure of the optimization device of the memory test algorithm based on machine learning provided by the present invention, such as Fig. 9As shown, the present invention provides an optimization device for a memory test algorithm based on machine learning, and the device specifically includes: a decision module 901, a screening module 902, a determination module 903, a genetic module 904, and an optimization module 905. Among them, the decision module 901 is used to obtain the forward search result to be optimized of the memory test algorithm, and call the decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; the screening module 902 is used to screen the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; the determination module 903 is used to use the screening element sequence as an initial population, determine the fault coverage rate of each sequence individual in the initial population, and determine the sequence individuals to be inherited from the initial population according to the fault coverage rate; the inheritance module 904 is used to arbitrarily select two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and randomly mutate the offspring sequence individuals to obtain mutant sequence individuals; the screening module 902 is also used to screen the mutant sequence individuals according to the sequence screening rule to obtain the target sequence individuals; the optimization module 905 is used to use the target sequence individual with the maximum fault coverage rate as the optimized forward search result of the memory test algorithm when the preset number of cross-inheritance times is reached.
[0087] Specifically, the optimization device for the memory testing algorithm based on machine learning provided by the present invention can implement all the method steps implemented by the optimization method embodiment of the memory testing algorithm based on machine learning, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.
[0088] Fig.10 is a schematic diagram of the physical structure of an electronic device provided by the present invention, such as Fig.10As shown, the electronic device may include: a processor (processor) 910 , a communication interface (Communications Interface) 920 , a memory (memory) 930 and a communication bus 940 , wherein the processor 910 , the communication interface 920 , and the memory 930 communicate with each other through the communication bus 940 . The processor 910 can call the logic instructions in the memory 930 to execute the optimization method of the memory test algorithm based on machine learning, which method includes: obtaining the search forward result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the search forward result to be optimized to obtain a search element sequence; screening the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; using the screening element sequence as an initial population, determining the fault coverage rate of each sequence individual in the initial population, and determining the sequence individuals to be inherited from the initial population according to the fault coverage rate; arbitrarily selecting two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and randomly mutating the offspring sequence individuals to obtain mutant sequence individuals; screening the mutant sequence individuals according to the sequence screening rule to obtain a target sequence individual; when the preset number of cross-inheritance times is reached, using the target sequence individual with the maximum fault coverage rate as the optimized search forward result of the memory test algorithm.
[0089] In addition, the logic instructions in the above-mentioned memory 930 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.
[0090] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the optimization method of the memory test algorithm based on machine learning provided by the above methods, the method including: obtaining the search forward result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the search forward result to be optimized to obtain a search element sequence; screening the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; using the screening element sequence as an initial population, determining the fault coverage rate of each sequence individual in the initial population, and determining the sequence individuals to be inherited from the initial population according to the fault coverage rate; arbitrarily selecting two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and randomly mutating the offspring sequence individuals to obtain mutant sequence individuals; screening the mutant sequence individuals according to the sequence screening rule to obtain a target sequence individual; when the preset number of cross-inheritances is reached, using the target sequence individual with the maximum fault coverage rate as the optimized search forward result of the memory test algorithm.
[0091] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the optimization method of the memory test algorithm based on machine learning provided by the above-mentioned methods, the method comprising: obtaining the forward search result to be optimized of the memory test algorithm, and calling a decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; screening the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; using the screening element sequence as an initial population, determining the fault coverage rate of each sequence individual in the initial population, and determining the sequence individuals to be inherited from the initial population according to the fault coverage rate; arbitrarily selecting two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and randomly mutating the offspring sequence individuals to obtain mutant sequence individuals; screening the mutant sequence individuals according to the sequence screening rule to obtain a target sequence individual; when the preset number of cross-inheritances is reached, using the target sequence individual with the maximum fault coverage rate as the optimized forward search result of the memory test algorithm.
[0092] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.
[0093] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A method for optimizing a memory test algorithm based on machine learning, characterized in that: The method comprises: Obtaining the forward search result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; The search element sequence is screened according to a preset sequence screening rule to obtain a screening element sequence; Taking the screening element sequence as an initial population, determining the fault coverage rate of each sequence individual in the initial population, and determining the sequence individual to be inherited from the initial population according to the fault coverage rate; Randomly selecting two of the sequence individuals to be inherited for cross inheritance to obtain offspring sequence individuals, and randomly mutating the offspring sequence individuals to obtain mutant sequence individuals; Screening the mutant sequence individuals according to the sequence screening rules to obtain target sequence individuals; When the preset crossover inheritance times are reached, the target sequence individual with the maximum fault coverage is used as the optimized search forward result of the memory test algorithm.
2. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The calling decision tree model makes a decision on the forward search result to be optimized to obtain a search operation sequence, including: Determine each search advancement element in the search advancement result to be optimized, wherein the search advancement element includes an operation direction and an operation type during a memory test, and the operation type includes a write operation type and a read operation type; Calling a decision tree model to make a decision on each of the search advancing elements to obtain a decision search element, wherein the operation direction of the decision search element is the same as the operation direction of the search advancing element, and the number of search advancing elements belonging to the write operation type is the same as the number of decision search elements belonging to the write operation type; The decision search elements are traversed to obtain a search element sequence.
3. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The sequence screening rule includes: when the search element sequence meets any one of the following screening conditions, the search element sequence is screened out: The search element sequence does not satisfy that the operation direction of the first operation element is not limited, the operation type is a write operation type, and the operation value of the write operation type is 0; There are three consecutive operation elements of the read operation type in the search element sequence, or there are three consecutive operation elements of the write operation type; There are no two consecutive operation elements of the read operation type, or there are no two consecutive operation elements of the write operation type in the search element sequence, wherein the operation values of the two consecutive read operation types are the same, and the operation values of the two consecutive write operation types are the same; There is no operation transformation element in the search element sequence, and the operation transformation element is any two adjacent operation elements with different operation types and the same operation value; There are operation value changing elements in the search element sequence, and the operation value changing elements are any two adjacent operation elements with different operation values.
4. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The determining of the fault coverage of each sequence individual in the initial population comprises: For each sequence individual in the initial population, determining the number of detection faults of the sequence individual during the memory test process; Get the total number of faults of the memory fault type; The ratio of the number of detected faults to the total number of faults is taken as the fault coverage of the individual sequence.
5. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: Determining a set of individuals of sequences to be inherited from the initial population according to the fault coverage rate includes: Determining the candidate individual inheritance probability of each sequence individual in the initial population being inherited to the next generation according to the fault coverage rate; Determining the cumulative inheritance probability of the sequence individuals; Randomly select a probability value within the maximum cumulative probability range of the cumulative genetic probability, and determine the target individual genetic probability corresponding to the cumulative probability interval according to the cumulative probability interval in which the probability value is within the maximum cumulative probability range; The sequence individuals corresponding to the target individual's genetic probability are used as the sequence individuals to be inherited.
6. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The step of arbitrarily selecting two of the sequence individuals to be inherited for cross inheritance to obtain offspring sequence individuals comprises: A first genetic sequence segment is intercepted from a first individual to be sequenced, and a second genetic sequence segment is intercepted from a second individual to be sequenced, wherein the first individual to be sequenced is any one of the two individuals to be sequenced, and the second individual to be sequenced is another individual to be sequenced; The first genetic sequence fragment is spliced to the position of the second genetic sequence fragment of the second sequence individual to be inherited to obtain one of the offspring sequence individuals, and the second genetic sequence fragment is spliced to the position of the first genetic sequence fragment of the first sequence individual to be inherited to obtain another offspring sequence individual.
7. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The method of arbitrarily selecting two sequence individuals to be inherited for cross inheritance to obtain offspring sequence individuals comprises: Extracting a first genetic sequence sub-segment and a second genetic sequence sub-segment from a first sequence individual to be inherited, and extracting a third genetic sequence sub-segment and a fourth genetic sequence sub-segment from a second sequence individual to be inherited, wherein the first sequence individual to be inherited is any one of the two sequence individuals to be inherited, and the second sequence individual to be inherited is the other sequence individual to be inherited; splicing the first genetic sequence sub-fragment to the position of the third genetic sequence sub-fragment of the second sequence individual to be inherited, and splicing the second genetic sequence sub-fragment to the position of the fourth genetic sequence sub-fragment of the second sequence individual to be inherited, to obtain one of the offspring sequence individuals; The third genetic sequence sub-fragment is spliced into the first genetic sequence sub-fragment position of the first sequence individual to be inherited, and the fourth genetic sequence sub-fragment is spliced into the second genetic sequence sub-fragment position of the first sequence individual to be inherited to obtain another offspring sequence individual.
8. The method for optimizing a memory test algorithm based on machine learning according to claim 1, characterized in that: The step of randomly mutating the offspring sequence individuals to obtain mutant sequence individuals comprises: Randomly select a target operation element from the offspring sequence individual, change the operation type of the target operation element or change the operation value to obtain a mutant sequence individual; Alternatively, two target operation elements are randomly selected from the offspring sequence individuals, and the element positions of the two target operation elements in the offspring sequence individuals are exchanged to obtain a mutant sequence individual.
9. An optimization device for a memory test algorithm based on machine learning, characterized in that: The device comprises: A decision module, used for obtaining the forward search result to be optimized of the memory test algorithm, and calling the decision tree model to make a decision on the forward search result to be optimized to obtain a search element sequence; A screening module, used to screen the search element sequence according to a preset sequence screening rule to obtain a screening element sequence; A determination module, used to use the screening element sequence as an initial population, determine the fault coverage rate of each sequence individual in the initial population, and determine the sequence individual to be inherited from the initial population according to the fault coverage rate; A genetic module is used to arbitrarily select two of the sequence individuals to be inherited for cross-inheritance to obtain offspring sequence individuals, and to randomly mutate the offspring sequence individuals to obtain mutant sequence individuals; The screening module is further used to screen the mutant sequence individuals according to the sequence screening rules to obtain target sequence individuals; The optimization module is used to use the target sequence individual with the maximum fault coverage as the optimized search forward result of the memory test algorithm when the preset crossover inheritance times are reached.
10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the optimization method of the memory testing algorithm based on machine learning as described in any one of claims 1 to 8 is implemented.