Switch resistor circuit and electric equipment

Abstract

The invention relates to a switch resistor circuit and electric equipment. The switch resistance circuit comprises a bias current supply circuit and at least one switch resistance unit. The switch resistor unit comprises a first resistor assembly, a second resistor assembly, an MOS tube, a bias voltage generation circuit and a transmission switch circuit. The first pole of the MOS tube is connected with the first end of the first resistor assembly and is also used for accessing a current inflow port; the second electrode of the first MOS tube is connected with the second end of the first resistor assembly and the current outflow port through the second resistor assembly. The bias voltage generation circuit is arranged between the grid electrode and the first electrode of the MOS tube and is connected with the bias current supply circuit through the transmission switch circuit. When the transmission switch circuit is in a conducting state, the bias voltage generating circuit receives bias current and generates bias voltage between the grid electrode and the first electrode of the MOS tube to conduct the MOS tube. Therefore, the on-off of the MOS tube can be controlled through the bias current so as to adjust the resistance value of the switch resistor unit.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a switch resistor circuit and an electrical device. Background Art

[0002] With the rapid development of electronic circuit technology, the demand for high-speed data transmission is increasing, and the performance of high-speed circuits is receiving more and more attention, especially the performance impact caused by impedance mismatch is becoming more and more prominent.

[0003] Take the directly modulated laser (DML) as an example. As a key component in optical communication systems, when the output impedance of the DML does not match the impedance of the subsequent circuit, it will cause problems such as signal reflection, energy loss and signal distortion. These problems will not only reduce the communication quality, but may also cause damage to the DML laser driver and the entire communication system.

[0004] Therefore, the impedance matching problem of high-speed circuits has become an issue that needs to be solved urgently. Summary of the invention

[0005] Based on this, it is necessary to provide a switch resistor circuit and electrical equipment suitable for impedance matching in high-speed circuits.

[0006] A switch resistor circuit comprises: a bias current providing circuit and at least one switch resistor unit;

[0007] Wherein, the switch resistor unit comprises: a first resistor component, a second resistor component, a MOS tube, a bias voltage generating circuit and a transmission switch circuit; the first electrode of the MOS tube is connected to the first end of the first resistor component, and the common end connected to the first electrode and the first resistor component is also used to access the current inflow port; the second electrode of the MOS tube is connected to the second end of the first resistor component through the second resistor component, and the common end connected to the second resistor component and the first resistor component is also used to access the current outflow port; the bias voltage generating circuit is arranged between the gate and the first electrode of the MOS tube, and the bias voltage generating circuit is also connected to the bias current providing circuit through the transmission switch circuit;

[0008] When the transmission switch circuit is in the on state, the bias voltage generating circuit receives the bias current output by the bias current providing circuit and generates a bias voltage between the gate and the first electrode of the MOS tube to turn on the MOS tube.

[0009] In one embodiment, the bias current providing circuit includes:

[0010] A bias current generating unit, used for generating and outputting a bias current;

[0011] The current transmission unit is respectively connected to the bias current generating unit and the transmission switch circuit, and is used to transmit the bias current to the transmission switch circuit.

[0012] In one of the embodiments, the bias current generating unit includes an operational amplifier, a third resistor component, a fourth resistor component, a first reference end transistor, and a second reference end transistor;

[0013] The inverting input terminal of the operational amplifier is used to access the reference voltage, the non-inverting input terminal of the operational amplifier is respectively connected to the first end of the third resistance component, the first end of the fourth resistance component and the gate of the first reference end transistor, the second end of the third resistance component is grounded, the first electrode of the first reference end transistor is connected to the second electrode of the second reference end transistor, and the second electrode of the first reference end transistor is connected to the second end of the fourth resistance component; the first electrode of the second reference end transistor is used to access the current inflow port, and the gate of the second reference end transistor is connected to the output terminal of the operational amplifier.

[0014] In one embodiment, the current transmission unit includes: a first output-end transistor, a second output-end transistor and a transmission circuit; the first output-end transistor, the second output-end transistor and the fourth resistor component, the first reference-end transistor, and the second reference-end transistor form a first current mirror circuit;

[0015] The gate of the first output-end transistor is connected to the gate of the first reference-end transistor, the first electrode of the first output-end transistor is connected to the second electrode of the second output-end transistor, and the second electrode of the first output-end transistor is connected to the transmission switch circuit through the transmission circuit; the first electrode of the second output-end transistor is connected to the first electrode of the second reference-end transistor, and the gate of the second output-end transistor is connected to the gate of the second reference-end transistor.

[0016] In one embodiment, the transmission circuit is a reference side circuit of a second current mirror circuit; the transmission switch circuit includes an output side circuit of the second current mirror circuit and a switch unit, and the output side circuit of the second current mirror circuit is connected to the bias voltage generating circuit;

[0017] The switch unit is connected between the reference side circuit of the second current mirror circuit and the output side circuit of the second current mirror circuit;

[0018] When the switch unit connects the output side circuit of the second current mirror circuit to the reference side circuit of the second current mirror circuit, the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit constitute a second current mirror circuit.

[0019] In one embodiment, the reference side circuit of the second current mirror circuit comprises a fifth resistor component, a third reference end transistor and a fourth reference end transistor, the first end of the fifth resistor component is respectively connected to the second electrode of the first output end transistor and the gate of the third reference end transistor, the second end of the fifth resistor component is respectively connected to the first electrode of the third reference end transistor and the gate of the fourth reference end transistor, the second electrode of the third reference end transistor is connected to the first electrode of the fourth reference end transistor, and the second electrode of the fourth reference end transistor is grounded;

[0020] The output side circuit of the second current mirror circuit includes a third output-end transistor and a fourth output-end transistor, wherein the first electrode of the third output-end transistor is connected to the bias voltage generating circuit, the second electrode of the third output-end transistor is connected to the first electrode of the fourth output-end transistor, and the second electrode of the fourth output-end transistor is grounded; the gate of the third output-end transistor is connected to the gate of the third reference-end transistor, and the gate of the fourth output-end transistor is connected to the gate of the fourth reference-end transistor through the switch unit.

[0021] In one embodiment, the switch unit includes: a first switch and a second switch, the first switch is connected between the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit; the first end of the second switch is connected to the output side circuit of the second current mirror circuit, and the second end of the second switch is grounded.

[0022] In one embodiment, the switch resistance unit further includes a capacitor, and the capacitor is connected between the first electrode and the gate of the MOS tube.

[0023] In one embodiment, the bias voltage generating circuit includes a bias resistor, and the bias resistor is connected between the first electrode and the gate of the MOS tube.

[0024] An electrical device comprises the switch resistance circuit as described above.

[0025] The above-mentioned switch resistor circuit and electrical equipment, the switch resistor circuit includes a bias current providing circuit and at least one switch resistor unit. Wherein, the switch resistor unit includes a first resistor component, a second resistor component, a MOS tube, a bias voltage generating circuit and a transmission switch circuit; the first pole of the MOS tube is connected to the first end of the first resistor component, and the common end connected to the first pole and the first resistor component is also used to access the current inflow port; the second pole of the first MOS tube is connected to the second end of the first resistor component through the second resistor component, and the common end connected to the second resistor component and the first resistor component is also used to access the current outflow port; the bias voltage generating circuit is arranged between the gate and the first pole of the MOS tube, and the bias voltage generating circuit is also connected to the bias current providing circuit through the transmission switch circuit. When the transmission switch circuit is in the on state, the bias voltage generating circuit receives the bias current output by the bias current providing circuit, and generates a bias voltage between the gate and the first pole of the MOS tube, so that the MOS tube is turned on. The switch resistor unit in the switch resistor circuit can control the on and off of the MOS tube as a switch through the bias current, so that by accurately controlling the switch state of the MOS tube, the resistance value of the switch resistor unit can be adjusted, thereby realizing accurate adjustment of the resistance value of the switch resistor circuit. When the switch resistor circuit is used for DML, the output impedance matching of the DML can be realized by accurately controlling the resistance value of the switch resistor circuit, so as to improve the transmission quality of the signal and thus enhance the performance of the DML. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0027] FIG1 is a schematic diagram of a switch resistor circuit module according to an embodiment;

[0028] FIG2 is a schematic diagram of a switch resistor circuit according to an embodiment;

[0029] FIG3 is a schematic diagram of a switch resistor circuit according to another embodiment;

[0030] FIG. 4 is a schematic diagram of a circuit structure of a switch resistor circuit according to a specific embodiment. DETAILED DESCRIPTION

[0031] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0033] It is understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0034] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if the connected circuits, modules, units, etc. have electrical signals or data transmission between each other.

[0035] It can be understood that “at least one” means one or more, “plurality” means two or more, and “at least a portion of an element” means a part or all of an element.

[0036] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0037] In one embodiment, a switch resistor circuit is provided. As shown in FIG1 , the switch resistor circuit of one embodiment includes a bias current providing circuit 100 and at least one switch resistor unit 200 .

[0038] Among them, the number of switch resistance units 200 can be set according to the specific situation, and the minimum number can be one. When the number of switch resistance units 200 is two or more, each switch resistance unit 200 can be connected in parallel between the PIN+ terminal and the PIN- terminal. The PIN+ terminal serves as a current inflow port, and the PIN- terminal serves as a current outflow port. In actual implementation, the PIN+ terminal and the PIN- terminal can be used to connect specific circuits of the application, such as connecting the interface circuit of the DML. The PIN+ terminal can also be directly or indirectly connected to the power supply voltage VDD, and the PIN- terminal can be indirectly grounded through other circuits.

[0039] The more switch resistor units 200 there are, the finer the resistance adjustment range that the switch resistor circuit can provide. For example, if one switch resistor unit 200 can provide resistance values ​​of 200 ohms and 100 ohms, then the resistance value that can be provided by two switch resistor units 200 in parallel can reach 50 ohms, and the adjustable resistance value is finer than that of one switch resistor unit 200. However, the more switch resistor units 200 there are, the higher the cost of the switch resistor circuit. Therefore, the number of switch resistor units 200 is not the more the better, and needs to be specifically set in combination with other requirements.

[0040] Specifically, as shown in FIG2 , the switch resistor unit 200 includes a first resistor component 210, a second resistor component 220, a MOS transistor M0, a bias voltage generating circuit 230, and a transmission switch circuit 240. The first electrode of the MOS transistor M0 is connected to the first end of the first resistor component 210, and the common end connected to the first resistor component 210 is also used to access the current inflow port PIN+; the second electrode of the MOS transistor M0 is connected to the second end of the first resistor component 210 via the second resistor component 220, and the common end connected to the second resistor component 220 and the first resistor component 210 is also used to access the current outflow port PIN-.

[0041] The type of the MOS tube M0 can be selected according to the specific situation. Optionally, the MOS tube M0 is a PMOS tube, with its source as the first electrode and its drain as the second electrode. It can be understood that in specific implementation, the MOS tube M0 can also be an NMOS.

[0042] The bias voltage generating circuit 230 is arranged between the gate and the first pole of the MOS tube M0, and the bias voltage generating circuit 230 is also connected to the bias current providing circuit 100 through the transmission switch circuit 240. When the transmission switch circuit 240 is in the on state, the bias voltage generating circuit 230 receives the bias current output by the bias current providing circuit 100, and generates a bias voltage between the gate and the first pole of the MOS tube M0, so that the MOS tube M0 is turned on.

[0043] The bias current providing circuit 100 is used to provide a stable bias current, and the bias current is used to control the working state of the MOS tube M0 in the switch resistor unit 200. The bias current providing circuit 100 can be a circuit that can generate and output a bias current based on a given voltage, or it can be a current source that can directly output a current.

[0044] The transmission switch circuit 240 has an on state and an off state. In a specific implementation, the on state and the off state of the transmission switch circuit 240 can be controlled by a device that can provide a control signal, such as a controller. Exemplarily, the controller outputs a corresponding control signal to the transmission switch circuit 240 according to the resistance adjustment requirement, so that the transmission switch circuit 240 is in an on state or an off state.

[0045] When the transmission switch circuit 240 is in the on state, current is allowed to pass through, and the bias voltage generating circuit 230 generates a bias voltage between the gate and the first pole of the MOS tube M0 based on the bias current. This bias voltage causes the MOS tube M0 to enter the on state, thereby allowing current to pass through the path composed of the first resistance component 210, the MOS tube M0 and the second resistance component 220. At this time, the equivalent resistance value of the switch resistance unit 200 is mainly determined by the on resistance of the MOS tube M0 and the parallel resistance value of the first resistance component 210 and the second resistance component 220.

[0046] In this stage, the on-resistance of the MOS tube M0 is very small, the voltage drop caused by the load current flowing through the MOS tube M0 is very small, and the VDS (the voltage between the drain and the source) of the MOS tube M0 is usually not over-voltage, so the circuit can also be applied to large current circuits.

[0047] When the transmission switch circuit 240 is in the off state, the transmission path of the bias current is disconnected. No bias current passes through the bias voltage generating circuit 230. At this time, there is no bias voltage between the gate and the first pole of the MOS tube M0, and the MOS tube M0 enters the cut-off state. Because the load current can only flow from the current inflow port to the current outflow port through the first resistance component 210, the resistance value of the switch resistance unit 200 is mainly determined by the first resistance component 210.

[0048] In this stage, since no current flows through the bias voltage generating circuit 230 , the gate-source voltage VGS of the MOS transistor M0 is equal to 0, so that the VGS of the MOS transistor M0 is not over-voltaged.

[0049] This circuit is applicable to any PIN+ terminal voltage (VPIN+). For different VPIN+, this circuit can generate a suitable gate control voltage of the MOS tube M0, so that the on-resistance of the MOS tube M0 is small enough and the gate-source voltage is not over-voltage.

[0050] The switch resistor circuit can control the on and off of the MOS transistor M0 as a switch through the bias current, so that by accurately controlling the switch state of the MOS transistor M0, the resistance of the switch resistor unit 200 can be adjusted in real time, thereby realizing accurate adjustment of the resistance of the switch resistor circuit. When the switch resistor circuit is used for DML, the output impedance matching of the DML can be realized by accurately controlling the resistance value of the switch resistor circuit, so as to improve the transmission quality of the signal and thus enhance the performance of the DML.

[0051] It should be noted that when the switch resistor circuit is used in a low-speed circuit, the MOS tube M0 can be a high-voltage MOS tube. However, the MOS switch circuit is a circuit that controls the on-off of the current. It controls the on-off of the source and drain of the MOS tube by controlling the gate-source voltage VGS of the MOS tube. As the current flowing through increases, the size of the MOS tube and the parasitic capacitance also increase. The parasitic capacitance will cause problems such as signal delay, attenuation and reflection, thereby affecting the stability and transmission performance of the circuit.

[0052] Therefore, when used in high-speed circuits, the MOS tube M0 used as a switch in the switch resistor circuit can use a low-voltage MOS tube. Since the parasitic capacitance of the low-voltage MOS tube is relatively small, it can significantly reduce the impact of the parasitic capacitance on high-speed signal transmission, thereby improving the performance of the high-speed circuit. Moreover, for different PIN+ terminal voltages, the circuit can generate a suitable low-voltage MOS tube M0 gate control voltage, so that the on-resistance of the low-voltage MOS tube M0 is small enough and the gate-source voltage is not over-voltage. Therefore, the circuit is less restricted by the power supply voltage VDD and is suitable for high power supply voltage scenarios.

[0053] In one embodiment, the first resistance component 210 includes a resistor R1 , a first end of the resistor R1 is connected to a first electrode of the MOS transistor M0 , and a second end of the resistor R1 is connected to the second resistance component 220 .

[0054] The second resistor component 220 includes a resistor R2 , a first end of the resistor R2 is connected to the second electrode of the MOS transistor M0 , and a second end of the resistor R2 is connected to the second end of the resistor R1 .

[0055] In other embodiments, the first resistance component 210 and the second resistance component 220 may also be obtained by connecting a plurality of resistors in series or in parallel, or may be implemented by other equivalent circuits.

[0056] In one embodiment, the bias voltage generating circuit 230 may include a bias resistor R0, wherein the first end of the bias resistor R0 is respectively connected to the gate of the MOS transistor M0 and the transmission switch circuit 240, and the second end of the bias resistor R0 is connected to the first electrode of the MOS transistor M0. When the transmission switch circuit 240 is turned on, the bias resistor R0 generates a suitable voltage drop between the gate and the source of the MOS transistor M0 according to the bias current, and the MOS transistor M0 is turned on. When the transmission switch circuit 240 is turned off, the current flowing through the bias resistor R0 is 0, the voltage difference across the bias resistor R0 is 0, and the MOS transistor M0 is turned off.

[0057] In one embodiment, as shown in FIG. 3 , the bias current providing circuit 100 includes a bias current generating unit 110 and a current transmitting unit 120 .

[0058] The bias current generating unit 110 is used to generate and output a bias current.

[0059] The magnitude and direction of the bias current generated by the bias current generating unit 110 need to be designed according to the parameters of the MOS tube M0 and the bias voltage generating circuit 230. Taking the embodiment shown in FIG3 as an example, the bias current needs to flow from the PIN+ terminal through the bias resistor R0 to generate a voltage drop on the bias resistor R0. The magnitude of the bias current needs to make the voltage drop generated by the bias resistor R0 less than or equal to the device withstand voltage value of the MOS tube M0.

[0060] The current transmission unit 120 is connected to the bias current generating unit 110 and the transmission switch circuit 240 , respectively. The current transmission unit 120 is used to transmit the bias current to the transmission switch circuit 240 .

[0061] The current transmission unit 120 is used to stably transmit the bias current output by the bias current generation unit 110 to the transmission switch circuit 240 , so that the voltage drop generated by the bias resistor R0 is reliable and stable.

[0062] In this embodiment, the bias current generating unit 110 and the current transmission unit 120 work together to provide a stable bias current for the transmission switch circuit 240, so that the bias voltage generated by the bias voltage generating circuit 230 is more stable and reliable, thereby improving the reliability of the state of the MOS tube M0, and further improving the reliability of the switch resistance unit 200 in adjusting the resistance value.

[0063] In one embodiment, as shown in FIG. 4 , the bias current generating unit 110 includes an operational amplifier A0 , a third resistance component 111 , a fourth resistance component 112 , a first reference end transistor M1 , and a second reference end transistor M2 .

[0064] The inverting input terminal of the operational amplifier A0 is used to access the reference voltage Vref, and the non-inverting input terminal of the operational amplifier A0 is respectively connected to the first end of the third resistance component 111, the first end of the fourth resistance component 112 and the gate of the first reference end transistor M1, the first electrode of the first reference end transistor M1 is connected to the second electrode of the second reference end transistor M2, and the second electrode of the first reference end transistor M1 is connected to the second end of the fourth resistance component 112; the first electrode of the second reference end transistor M2 is used to access the power supply voltage VDD, and the gate of the second reference end transistor M2 is connected to the output terminal of the operational amplifier A0; the second end of the third resistance component 111 is grounded.

[0065] The types of the first reference end transistor M1 and the second reference end transistor M2 can be selected according to specific circumstances. For example, the first reference end transistor M1 and the second reference end transistor M2 can be PMOS transistors, with the source of the PMOS transistor serving as the first electrode and the drain serving as the second electrode.

[0066] Exemplarily, the third resistor component 111 may include a resistor R3, a first end of the resistor R3 is connected to the non-inverting input terminal of the operational amplifier A0, and a second end of the resistor R3 is grounded. The fourth resistor component 112 may include a resistor R4, a first end of the resistor R4 is connected to the non-inverting input terminal of the operational amplifier A0, and a second end of the resistor R4 is connected to the drain of the first reference end transistor M1. In other embodiments, the third resistor component 111 and the fourth resistor component 112 may also be obtained by connecting a plurality of resistors in series or in parallel, or may be implemented by other equivalent circuits.

[0067] The reference voltage Vref may be provided by an external voltage source, or a reference voltage generating circuit may be separately provided to generate the reference voltage Vref, which is not limited in this embodiment.

[0068] In this embodiment, the first reference end transistor M1, the second reference end transistor M2 and the resistor R4 form a negative feedback loop 1, and the function of the negative feedback loop 1 is to make the voltage difference across the resistor R3 stably equal to the reference voltage Vref. Since the temperature characteristics of the PMOS tube are relatively good, it helps to improve the temperature stability of the entire current source. By reasonably setting the resistance value of the resistor R3 or adjusting the value of the reference voltage Vref, the magnitude of the generated bias current can be flexibly adjusted. The structural design of the bias current generating unit 110 not only improves the accuracy and stability of the current source, but also provides a flexible current regulation function, with a simple circuit structure and low cost.

[0069] In one embodiment, the current transfer unit 120 includes a transfer circuit 121 , a first output-end transistor M3 , and a second output-end transistor M4 .

[0070] The gate of the first output-end transistor M3 is connected to the gate of the first reference-end transistor M1, the first electrode of the first output-end transistor M3 is connected to the second electrode of the second output-end transistor M4, and the second electrode of the first output-end transistor M3 is used to connect to the transmission switch circuit 240 through the transmission circuit 121. The first electrode of the second output-end transistor M4 is connected to the first electrode of the second reference-end transistor M2, and the gate of the second output-end transistor M4 is connected to the gate of the second reference-end transistor M2.

[0071] The first output transistor M3 and the second output transistor M4 can be PMOS transistors, and the first output transistor M3, the second output transistor M4, the fourth resistor component 112, the first reference transistor M1, and the second reference transistor M2 form a first current mirror circuit.

[0072] The current mirror circuit is a current control circuit, including a reference side circuit and an output side circuit. The output side circuit can generate the required output current by copying the reference current of the reference side circuit. By properly setting the transistors in the reference side circuit and the output side circuit, such as having the same size and process conditions, the current matching between the two can be improved, so that the current ratio at both ends is close to 1:1.

[0073] Specifically, in the first current mirror circuit, the first reference end transistor M1, the second reference end transistor M2 and the resistor R4 constitute a reference side circuit of the first current mirror circuit, which plays a role in providing a reference current (i.e., a bias current). The first output end transistor M3 and the second output end transistor M4 constitute an output side circuit, which is used to generate an output current of equal magnitude according to the reference current.

[0074] In this embodiment, by setting the first output-end transistor M3 and the second output-end transistor M4, a first current mirror circuit is formed with the resistor R4, the first reference-end transistor M1, and the second reference-end transistor M2 in the bias current generating unit 110, so that the bias current generated by the bias current generating unit 110 can be accurately transmitted to the transmission switch circuit 240 through the transmission circuit 121, so that the accuracy and stability of the current transmission are higher, and the current transmission efficiency can be improved.

[0075] In one embodiment, the transmission circuit 121 is a reference side circuit of the second current mirror circuit; the transmission switch circuit 240 includes an output side circuit 241 of the second current mirror circuit and a switch unit 242 , and the output side circuit 241 of the second current mirror circuit is connected to the bias voltage generating circuit 230 .

[0076] The switch unit 242 is connected between the reference side circuit 121 of the second current mirror circuit and the output side circuit 241 of the second current mirror circuit.

[0077] When the switch unit 242 connects the output side circuit 241 of the second current mirror circuit to the reference side circuit 121 of the second current mirror circuit, the output side circuit 241 of the second current mirror circuit and the reference side circuit 121 of the second current mirror circuit constitute a second current mirror circuit.

[0078] The transmission switch circuit 240 is in the on state, which means that the switch unit 242 connects the output side circuit 241 of the second current mirror circuit to the reference side circuit 121 of the second current mirror circuit. The transmission switch circuit 240 is in the off state, which means that the switch unit 242 disconnects the output side circuit 241 of the second current mirror circuit from the reference side circuit 121 of the second current mirror circuit.

[0079] When the switch unit 242 connects the reference side circuit 121 of the second current mirror circuit and the output side circuit 241 of the second current mirror circuit, the reference side circuit 121 of the second current mirror circuit and the output side circuit 241 of the second current mirror circuit form a complete second current mirror circuit. In this state, the bias current received by the output side circuit of the first current mirror circuit from the reference side circuit 121 of the second current mirror circuit can be copied to the output side circuit, that is, the output side circuit 241 of the second current mirror circuit outputs an output current proportional to the bias current (such as 1:1). This output current is then received by the bias voltage generating circuit 230, and the required bias voltage is generated between the gate source of the MOS tube M0, and the MOS tube M0 is turned on.

[0080] When the switch unit 242 disconnects the connection between the reference side circuit 121 of the second current mirror circuit and the output side circuit 241 of the second current mirror circuit, the second current mirror circuit is disconnected, its output side circuit no longer generates output current, the bias voltage generating circuit 230 can no longer receive current to generate bias voltage, and the MOS tube M0 is turned off.

[0081] In this embodiment, the transmission circuit 121 is not only responsible for the transmission of current, but also serves as a reference side circuit of the second current mirror circuit. When the switch unit 242 turns on the reference side circuit 121 and the output side circuit of the second current mirror circuit, a second current mirror circuit is formed to accurately transmit the bias current. At the same time, the switch unit 242 can control the on and off of the MOS tube M0, thereby realizing the resistance value adjustment of the switch resistance unit 200.

[0082] In one embodiment, the reference side circuit 121 of the second current mirror circuit includes a fifth resistor component 1211, a third reference end transistor M5, and a fourth reference end transistor M6. A first end of the fifth resistor component 1211 is respectively connected to a first electrode of the first output end transistor M3 and a gate of the third reference end transistor M5, a second end of the fifth resistor component 1211 is respectively connected to a first electrode of the third reference end transistor M5 and a gate of the fourth reference end transistor M6, a second electrode of the third reference end transistor M5 is connected to a first electrode of the fourth reference end transistor M6, and a second electrode of the fourth reference end transistor M6 is grounded.

[0083] The output side circuit 241 of the second current mirror circuit includes a third output-end transistor M7 and a fourth output-end transistor M8, wherein a first electrode of the third output-end transistor M7 is connected to the bias voltage generating circuit 230, a second electrode of the third output-end transistor M7 is connected to a first electrode of the fourth output-end transistor M8, and a second electrode of the fourth output-end transistor M8 is grounded; a gate of the third output-end transistor M7 is connected to a gate of the third reference-end transistor M5, and a gate of the fourth output-end transistor M8 is connected to a gate of the fourth reference-end transistor M6 via a switch unit 242.

[0084] The third reference end transistor M5, the fourth reference end transistor M6, the third output end transistor M7 and the fourth output end transistor M8 may be NMOS transistors, the drain of the NMOS transistor serves as the first electrode and the source serves as the second electrode.

[0085] The fifth resistor component 1211 may include a resistor R5, a first end of the resistor R5 serves as a first end of the fifth resistor component 1211, and a second end of the resistor R5 serves as a second end of the fifth resistor component 1211. In other embodiments, the fifth resistor component 1211 may also be obtained by connecting a plurality of resistors in series or in parallel, or may be implemented by other equivalent circuits.

[0086] In this embodiment, the second current mirror circuit is a common-source common-gate current mirror, which can ensure a higher current copy accuracy, so that the bias current transmitted to the bias voltage generating circuit 230 is more accurate, thereby improving the accuracy of MOS tube state control.

[0087] It can be understood that the second current mirror circuit can also adopt other forms, not limited to the forms mentioned in the above embodiments, as long as it can achieve the function of completing the mirror transmission of the bias current.

[0088] In one embodiment, the switch unit 242 includes a first switch SW1 and a second switch SW2, the first switch SW1 is connected between the output side circuit 241 of the second current mirror and the reference side circuit 121 of the second current mirror; the first end of the second switch SW2 is connected to the output side circuit 241 of the second current mirror, and the second end of the second switch SW2 is grounded.

[0089] The output ends of the first switch SW1 and the second switch SW2 may be connected to a control device capable of outputting a control signal, and there is no need to limit the specifics, and those skilled in the art may set the control device according to actual conditions.

[0090] Specifically, the first switch SW1 can be connected between the gate of the fourth output terminal transistor M8 and the gate of the fourth reference terminal transistor M6. When the first switch SW1 is closed, it allows signal transmission between the output side circuit and the reference side circuit of the second current mirror circuit, thereby maintaining the proportional relationship of the current mirror.

[0091] The first end of the second switch SW2 is connected to the gate of the fourth output transistor M8, and the second end is grounded. When the second switch SW2 is closed, the gate of the fourth output transistor M8 is pulled to the ground potential to turn it off, so that the current flowing through the bias voltage generating circuit 230 is zero.

[0092] In this embodiment, when the first switch SW1 is closed and the second switch SW2 is opened, the output side circuit 241 of the second current mirror circuit and the reference side circuit 121 of the second current mirror circuit form a current mirror, so that a bias current flows through the bias resistor R0, and a voltage difference is generated across the bias resistor R0 to turn on the MOS tube MO.

[0093] When the first switch SW1 is opened and the second switch SW2 is closed, the current flowing through the bias resistor R0 is 0, the voltage difference across the bias resistor R0 is 0, and the MOS tube MO is turned off.

[0094] In this embodiment, by setting the first switch SW1 and the second switch SW2, the working state of the second current mirror circuit can be accurately controlled. When the MOS tube M0 does not need to be turned on, the current mirror function can be turned off to reduce power consumption.

[0095] In one embodiment, the switch resistor unit 200 further includes a capacitor C0 , which is connected between the first electrode and the gate of the MOS transistor M0 .

[0096] In this embodiment, the capacitor C0 can prevent the gate-source voltage VGS of the MOS tube M0 from fluctuating too much when there is a large signal fluctuation at the PIN+ terminal and the PIN- terminal, thereby improving the working stability of the MOS tube M0 and further improving the stability and anti-interference ability of the circuit.

[0097] In order to better understand the above embodiment, a detailed explanation is given below in conjunction with a specific embodiment. In one embodiment, the switch resistor circuit is configured with reference to FIG. 4 .

[0098] Among them, the MOS tube M0 is a low-voltage MOS, which serves as a switch. The transistors M1-M8 are high-voltage MOS. In order to prevent the gate-source voltage VGS of the low-voltage MOS tube M0 from being over-voltage, the transistors M1-M8, the bias resistor R0, the resistor R3, the resistor R4, the resistor R5, the operational amplifier A0, the first switch SW1 and the second switch SW2 are introduced to generate the VGS of the low-voltage MOS tube M0.

[0099] Transistors M5-M8 and resistor R5 form a second current mirror circuit. When the first switch SW1 is disconnected and the second switch SW2 is closed, the mirror current flows through the bias resistor R0 to generate a voltage difference, and the low-voltage MOS tube M0 is turned on; when the first switch SW1 is closed and the second switch SW2 is disconnected, the current flowing through the bias resistor R0 is 0, the voltage difference across the bias resistor R0 is 0, and the low-voltage MOS tube M0 is disconnected.

[0100] Transistors M1-M4 and resistor R4 form a first current mirror circuit. The reference voltage Vref can be lower than the withstand voltage of the low-voltage MOS tube M0. In the bias current generating unit 110, loop 1 can make the voltage difference of resistor R3 equal to the reference voltage Vref. Assuming that the current flowing through resistor R3 is I1, Vref=R3*I1 (where R3 represents the resistance value of resistor R3). The replication ratios of the first current mirror circuit and the second current mirror circuit are both 1:1, so the current flowing through the bias resistor R0 is also I1. The resistance value of resistor R3 is set to be equal to the bias resistor R0, so when the low-voltage MOS tube M0 is turned on, the voltage difference of the bias resistor R0 (ie, VGS) is equal to Vref; when the low-voltage MOS tube M0 is turned off, the voltage difference of the bias resistor R0 (ie, VGS) is equal to 0, so that the VGS of the low-voltage MOS tube M0 is not over-voltage.

[0101] The circuit is applicable to any PIN+ terminal voltage (VPIN+). For different VPIN+, the circuit can generate a suitable low-voltage MOS tube M0 gate control voltage to ensure that the on-resistance of the low-voltage MOS tube M0 is small enough and the gate-source voltage is not over-voltage. At the same time, the branch formed by the bias resistor R0, the third output terminal transistor M7 and the fourth output terminal transistor M8 is a high-resistance path, and the influence on the resistance value of the switch resistance unit 200 can be ignored.

[0102] When the low-voltage MOS tube M0 is turned on, its on-resistance is very small, and the voltage drop caused by the load current flowing through the low-voltage MOS tube M0 is very small, and the drain-source voltage VDS of the low-voltage MOS tube M0 is usually not over-voltage. When the low-voltage MOS tube M0 is disconnected, the voltage drop of the resistor R1 is VR1. The value of the resistor R1 needs to make VR1 less than the source-drain overvoltage breakdown voltage of the low-voltage MOS tube M0. At the same time, the resistor R1 limits the maximum value of the resistance of this path. The resistor R2 limits the minimum adjustable value of the resistance between the PIN+ terminal and the PIN- terminal.

[0103] The switch resistor circuit adopts a low-voltage MOS tube, which occupies a small area, and the structure can be applied to resistance switching scenarios with high power supply voltage (such as 2.5V or 3.3V) and large current, and has a wide range of applications.

[0104] In one embodiment, an electrical device is further provided, comprising any one of the switch resistance circuits provided in the above embodiments.

[0105] The electrical device may be a directly modulated laser or other devices including high-speed signal interface circuits, high-speed data transmission circuits, and the like.

[0106] Since the electrical device includes the switch resistor circuit provided by the embodiment of the present invention, the electrical device also has the beneficial effects of the switch resistor circuit in the above-mentioned implementation mode. The similarities can be understood by referring to the above explanation of the switch resistor circuit, which will not be repeated below.

[0107] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

[0108] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0109] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A switch resistor circuit, characterized in that: include: A bias current providing circuit and at least one switch resistor unit; Wherein, the switch resistor unit comprises: a first resistor component, a second resistor component, a MOS tube, a bias voltage generating circuit and a transmission switch circuit; the first electrode of the MOS tube is connected to the first end of the first resistor component, and the common end connected to the first electrode and the first resistor component is also used to access the current inflow port; the second electrode of the MOS tube is connected to the second end of the first resistor component through the second resistor component, and the common end connected to the second resistor component and the first resistor component is also used to access the current outflow port; the bias voltage generating circuit is arranged between the gate and the first electrode of the MOS tube, and the bias voltage generating circuit is also connected to the bias current providing circuit through the transmission switch circuit; When the transmission switch circuit is in the on state, the bias voltage generating circuit receives the bias current output by the bias current providing circuit and generates a bias voltage between the gate and the first electrode of the MOS tube to turn on the MOS tube.

2. The switch resistor circuit according to claim 1, characterized in that: The bias current providing circuit comprises: A bias current generating unit, used for generating and outputting a bias current; The current transmission unit is respectively connected to the bias current generating unit and the transmission switch circuit, and is used to transmit the bias current to the transmission switch circuit.

3. The switch resistor circuit according to claim 2, characterized in that: The bias current generating unit includes an operational amplifier, a third resistance component, a fourth resistance component, a first reference end transistor and a second reference end transistor; The inverting input terminal of the operational amplifier is used to access the reference voltage, the non-inverting input terminal of the operational amplifier is respectively connected to the first end of the third resistance component, the first end of the fourth resistance component and the gate of the first reference end transistor, the second end of the third resistance component is grounded, the first electrode of the first reference end transistor is connected to the second electrode of the second reference end transistor, and the second electrode of the first reference end transistor is connected to the second end of the fourth resistance component; the first electrode of the second reference end transistor is used to access the power supply voltage, and the gate of the second reference end transistor is connected to the output terminal of the operational amplifier.

4. The switch resistor circuit according to claim 3, characterized in that: The current transmission unit comprises: a first output-end transistor, a second output-end transistor and a transmission circuit; the first output-end transistor, the second output-end transistor and the fourth resistor component, the first reference-end transistor and the second reference-end transistor form a first current mirror circuit; The gate of the first output-end transistor is connected to the gate of the first reference-end transistor, the first electrode of the first output-end transistor is connected to the second electrode of the second output-end transistor, and the second electrode of the first output-end transistor is connected to the transmission switch circuit through the transmission circuit; the first electrode of the second output-end transistor is connected to the first electrode of the second reference-end transistor, and the gate of the second output-end transistor is connected to the gate of the second reference-end transistor.

5. The switch resistor circuit according to claim 4, characterized in that: The transmission circuit is a reference side circuit of the second current mirror circuit; the transmission switch circuit comprises an output side circuit of the second current mirror circuit and a switch unit, and the output side circuit of the second current mirror circuit is connected to the bias voltage generating circuit; The switch unit is connected between the reference side circuit of the second current mirror circuit and the output side circuit of the second current mirror circuit; When the switch unit connects the output side circuit of the second current mirror circuit to the reference side circuit of the second current mirror circuit, the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit constitute a second current mirror circuit.

6. The switch resistor circuit according to claim 5, characterized in that: The reference side circuit of the second current mirror circuit comprises a fifth resistance component, a third reference end transistor and a fourth reference end transistor, wherein the first end of the fifth resistance component is respectively connected to the second electrode of the first output end transistor and the gate of the third reference end transistor, the second end of the fifth resistance component is respectively connected to the first electrode of the third reference end transistor and the gate of the fourth reference end transistor, the second electrode of the third reference end transistor is connected to the first electrode of the fourth reference end transistor, and the second electrode of the fourth reference end transistor is grounded; The output side circuit of the second current mirror circuit includes a third output-end transistor and a fourth output-end transistor, wherein the first electrode of the third output-end transistor is connected to the bias voltage generating circuit, the second electrode of the third output-end transistor is connected to the first electrode of the fourth output-end transistor, and the second electrode of the fourth output-end transistor is grounded; the gate of the third output-end transistor is connected to the gate of the third reference-end transistor, and the gate of the fourth output-end transistor is connected to the gate of the fourth reference-end transistor through the switch unit.

7. The switch resistor circuit according to claim 5, characterized in that: The switch unit includes: a first switch and a second switch, the first switch is connected between the output side circuit of the second current mirror circuit and the reference side circuit of the second current mirror circuit; the first end of the second switch is connected to the output side circuit of the second current mirror circuit, and the second end of the second switch is grounded.

8. The switch resistor circuit according to any one of claims 1 to 7, characterized in that: The switch resistance unit further includes a capacitor, which is connected between the first electrode and the gate of the MOS tube.

9. The switch resistor circuit according to claim 8, characterized in that: The bias voltage generating circuit comprises a bias resistor, and the bias resistor is connected between the first electrode and the gate of the MOS tube.

10. An electrical device, characterized in that: The invention comprises a switch resistor circuit as claimed in any one of claims 1 to 9.

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