Pulse wireless ultra-wideband transmitter

Abstract

The invention relates to a pulse wireless ultra-wideband transmitter chip, which comprises a narrow pulse generator, a voltage-controlled ring oscillator, an output driver, a power amplifier and an off-chip matching network which are connected in sequence, and is characterized in that the narrow pulse generator is used for generating a narrow pulse according to a received signal; the voltage-controlled ring oscillator is a switch working mode oscillator and is used for providing frequency calibration when being activated and outputting a narrow pulse oscillation signal; the output driver is used for realizing isolation between the voltage-controlled ring oscillator and the power amplifier and sharpening a narrow pulse oscillation signal; the power amplifier is used for amplifying the narrow pulse oscillation signal; and the off-chip matching network is used for matching the output signal of the power amplifier with the antenna. Compared with the prior art, the invention has the advantages of ultra-low power consumption, compact area, short distance, high energy efficiency application and the like.

Description

Technical Field

[0001] The present invention relates to the technical field of brain-computer interface, and in particular to a pulse wireless ultra-wideband transmitter. Background Art

[0002] Brain-machine interfaces (BMIs) represent the forefront of technological advancement, enabling direct communication between external devices and the human brain. This breakthrough technology has great potential to provide new solutions for patients with severe movement disorders and neurological diseases. Figure 1 The block diagram of the existing multi-channel open-loop wireless BMI system is shown. The neural implant includes components such as low noise amplifier LNA, multiplexer MUX, analog-to-digital converter ADC, transmitter TX, etc. Among these components, the conventional wireless data transmission stage consumes more than 80% of the total power consumption, which ultimately limits the life of the system when using batteries. In addition, for widely used neural signal acquisition methods such as electrocorticography (ECoG) and local field potential (LFP), a data rate of 10Mbps is required to meet the acquisition requirements of up to 500 channels, as shown in Table 1. For these applications, ultra-low power consumption and high energy efficiency wireless transmitters are crucial because they can significantly extend the life of the system.

[0003] Table 1 Neural signal parameters

[0004] Neural Signals ECoG LFP Bandwidth(Hz) 0.01-200 0.01-500 Sampling rate (kS / s) 2 2 Number of channels 500 500 ADC Bits 10 10 Data rate (Mb / s) 10 10

[0005] Impulse radio ultra-wideband (IR-UWB) is seen as a promising technology for advancing wireless communication applications due to its ability to achieve broadband and high data rates while maintaining very low power consumption and relatively low architectural complexity. This is achieved by generating short pulses and ensuring a low duty cycle. Due to its ability to support large channel capacity while strictly adhering to power consumption constraints, low power spectral density (PSD), and minimal damage to tissue, IR-UWB technology has become a popular choice in biomedical applications, especially in power-constrained and ultra-compact short-range telemetry systems such as BMI, where creating energy-efficient neural interfaces with real-time recording capabilities is a major challenge.

[0006] The choice of modulation scheme also significantly affects the performance indicators of brain-computer interfaces, such as data rate, communication distance, noise immunity, power consumption, and architectural complexity. Due to its simplicity and low implementation cost, on-off keying (OOK) modulation is considered to be the first choice for UWB transmitters. It allows the transmitter to remain silent when transmitting data "0", thereby significantly reducing power consumption. Larger pulse amplitudes are essential for extending the communication distance. In addition, the transmitter should comply with regulations in terms of output power spectral density (PSD) and operating frequency. Therefore, it is crucial to make the structure adjustable to compensate for undesirable process, voltage, and temperature (PVT) variations. Although spectral tunability has been reported in the literature, the bandwidth and center frequency are not independently controlled, which makes it inconvenient for practical needs. Summary of the invention

[0007] The purpose of the present invention is to overcome the defects of the above-mentioned prior art and provide an ultra-low power consumption and high energy efficiency pulse wireless ultra-wideband transmitter chip with spectrum adjustability.

[0008] The purpose of the present invention can be achieved by the following technical solutions:

[0009] A pulse wireless ultra-wideband transmitter chip includes a narrow pulse generator, a voltage-controlled ring oscillator, an output driver, a power amplifier and an off-chip matching network connected in sequence, wherein:

[0010] The narrow pulse generator is used to generate a narrow pulse according to the received signal, and the continuous adjustment of the duration or delay time of the narrow pulse is achieved by connecting the control voltage Vctd of the PMOS transistor;

[0011] The voltage-controlled ring oscillator is a switch-mode oscillator, used to provide frequency calibration when activated, controlled by an external control voltage Vcont, and output a narrow pulse oscillation signal;

[0012] The output driver is used to achieve isolation between the voltage-controlled ring oscillator and the power amplifier, and sharpen the narrow pulse oscillation signal;

[0013] The power amplifier is used to amplify the narrow pulse oscillation signal;

[0014] The off-chip matching network is used to match the output signal of the power amplifier with the antenna.

[0015] Furthermore, the narrow pulse generator includes an input inverting unit, a delayed signal generating unit, a NAND gate and an output inverting unit, the input inverting unit is connected to the delayed signal generating unit, and the NAND gate is respectively connected to the input inverting unit, the delayed signal generating unit and the output inverting unit.

[0016] Furthermore, in the PMOS transistor, the source, the drain and the substrate serve as one terminal, which is controlled by the control voltage Vctd, and the gate serves as another terminal.

[0017] Furthermore, the voltage-controlled ring oscillator includes a plurality of oscillation modules, each of which includes an activation unit, an inverter, a calibration unit, a constant resistance unit and a discharge unit.

[0018] Furthermore, the calibration unit is controlled by an external control voltage Vcont, and when the activation unit receives the narrow pulse, the voltage-controlled ring oscillator is activated.

[0019] Furthermore, the output driver includes a plurality of inverters with gradually increasing driving capabilities.

[0020] Furthermore, the power amplifier is a two-stage parallel switching class D amplifier.

[0021] Furthermore, each level of the switching class D amplifier is connected in series with a capacitor for isolating a DC component.

[0022] Furthermore, the off-chip matching network shapes the output signal and matches it with the antenna.

[0023] Furthermore, the transmitter is performance tested using performance parameters including a quality factor, wherein the quality factor is defined as a ratio of normalized energy efficiency to peak voltage amplitude.

[0024] Compared with the prior art, the present invention has the following beneficial effects:

[0025] 1. The transmitter of the present invention is provided with control voltages Vctd and Vcont, wherein Vctd can adjust the capacitance of the PMOS, change the duration of the narrow pulse, and thus change the -10dB bandwidth of the spectrum; Vcont can control the current of the voltage-controlled ring oscillator, thereby adjusting the oscillation frequency, i.e., the center frequency of the spectrum, thereby realizing the effective spectrum adjustability of the transmitter.

[0026] 2. The present invention is designed with an off-chip matching network for shaping the output spectrum and suppressing signal components outside the center frequency and -10dB bandwidth.

[0027] 3. Simulation shows that the average power consumption of the transmitter of the present invention is only 34μW, providing an energy efficiency of 3.4pJ per bit at a data transmission rate of 10Mbps, and low energy consumption; the peak-to-peak voltage amplitude of the RF signal on a 50Ω output load is 450mV, which meets certain communication distance requirements.

[0028] 4. The chip area of ​​the transmitter designed based on the present invention is small.

[0029] 5. In addition to parameters such as power consumption, peak voltage amplitude and energy efficiency, a quality factor (FOM) is introduced, which is defined as the ratio of normalized energy efficiency to peak voltage amplitude. Compared with other transmitter chips, the proposed IR-UWB transmitter significantly reduces the overall power consumption and improves energy efficiency, and its FOM is also better than similar transmitter chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a block diagram of an existing wireless brain-computer interface (BMI) system and a schematic diagram of the structure of the transmitter chip of the present invention;

[0031] Figure 2 is a detailed circuit schematic diagram of the transmitter chip of the present invention;

[0032] Figure 3 1 is a pulse curve of the IR-UWB radio frequency signal at the output end under the conditions of Vctd=0V and Vcont=0.5V in an embodiment of the present invention;

[0033] Figure 4 : is the power spectral density (PSD) of the transmitter chip under the conditions of Vctd=0V and Vcont=0.5V in the embodiment of the present invention;

[0034] Figure 5 : is a curve showing the change of the center frequency of the PSD with the control voltage Vcont under the condition of Vctd=0V in the embodiment of the present invention;

[0035] Figure 6 : is a curve showing a change in -10dB bandwidth of PSD with control voltage Vctd under the condition of Vcont=0.5V in an embodiment of the present invention;

[0036] Figure 7 FIG. 4 is a layout of a transmitter chip in an embodiment of the present invention. DETAILED DESCRIPTION

[0037] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0038] This embodiment provides an ultra-low power consumption, low architecture complexity impulse wireless ultra-wideband (IR-UWB) transmitter with spectrum adjustability and fully compliant with FCC regulations. Figure 1As shown, it includes a narrow pulse generator (Narrow Pulse Generator), a voltage-controlled ring oscillator (VCRO), an output driver (Driver), a power amplifier (Power Amplifier, PA) and an off-chip matching network (Matching Network) connected in sequence, wherein the narrow pulse generator is used to generate a narrow pulse according to a received signal, and the continuous adjustment of the duration or delay time of the narrow pulse is achieved by a control voltage Vctd connected to a PMOS transistor; the voltage-controlled ring oscillator is a switch operating mode oscillator (On-Off VCRO), which is used to provide frequency calibration when activated, is controlled by an external control voltage Vcont, and outputs a narrow pulse oscillation signal; the output driver is used to achieve isolation between the voltage-controlled ring oscillator and the power amplifier, and sharpen the narrow pulse oscillation signal; the power amplifier is used to amplify the narrow pulse oscillation signal; the off-chip matching network is used to match the output signal of the power amplifier with an antenna (Antenna). The above transmitter is provided with control voltages Vctd and Vcont, wherein Vctd can adjust the capacitance of the PMOS, change the duration of the narrow pulse, and thus change the -10dB bandwidth of the spectrum; Vcont can control the current of the voltage-controlled ring oscillator, and thus adjust the oscillation frequency, i.e., the center frequency of the spectrum, thereby realizing the effective spectrum adjustability of the transmitter.

[0039] Figure 2 The figure is a specific circuit schematic diagram of the above transmitter.

[0040] The narrow pulse generator includes an input inverting unit, a delay signal generating unit, a NAND gate and an output inverting unit. The input inverting unit is connected to the delay signal generating unit, and the NAND gate is respectively connected to the input inverting unit, the delay signal generating unit and the output inverting unit.

[0041] In this embodiment, the input inversion unit is two inverters (transistors M1-M4) to solve the problem that limited signal rise and fall time may significantly affect the output power spectrum density (PSD). These inverters speed up the data signal on node A and the delayed signal on node B (transistors M5-M6). 16 These signals are then fed into a NAND gate (transistor M 17 -M 20 ) to generate a narrow pulse signal. In order to further sharpen the narrow pulse and isolate the narrow pulse generator from the switch VCRO circuit, this embodiment adds an additional output inverting unit, which is composed of transistor M 21 -M 22 The inverter stage is composed of.

[0042] The continuous adjustment of the duration or delay time of the narrow pulse of the narrow pulse generator is realized by PMOS transistors and controlled by the control voltage Vctd. 12 In the PMOS transistor, the source, drain and substrate serve as one terminal, which is controlled by the control voltage Vctd, and the gate serves as another terminal. ctd Equal to the depletion region capacitance C dep and gate oxide capacitance C g series combination.

[0043] C ctd =C dep C g / (C dep +C g )

[0044] Typically, LC oscillators are used as local oscillators (LOs), but they result in higher silicon area costs and power consumption due to the need for large inductors and larger drive currents. On the other hand, although ring oscillators are a potential alternative to LC oscillators, they are susceptible to process, voltage, and temperature (PVT) variations, resulting in frequency instability. In order to avoid the above technical issues, this embodiment uses a voltage-controlled ring oscillator operating in a switch mode.

[0045] The voltage-controlled ring oscillator includes a plurality of oscillation modules, each of which includes an activation unit (transistor M 35 -M 37 ), inverter (transistor M 23 -M 28 ), calibration unit (transistor M 29 -M 31 ), constant resistance unit (transistor M 32 -M 34 ) and the discharge unit (transistor M 38 -M 40 ).

[0046] Specifically, the switch VCRO is adjusted by the transistor M 29 -M 31 The controlled current provides frequency calibration. These transistors are controlled by an external voltage Vcont. When Vcont drops below the NMOS threshold voltage, the M 29 -M 31 The on-resistance of the MOSFET increases dramatically, causing the tuning characteristics to be highly nonlinear and possibly even stopping the oscillation completely. 29 -M 31 Transistors M in parallel 32 -M 34Acting as a constant resistor, it ensures the lowest oscillation frequency and enhances the linearity of the tuning characteristics.

[0047] When a narrow pulse signal is applied to transistor M 35 -M 37 When the VCRO is on, the switch is activated, while it is off most of the time, saving power. The propagation delay of the output of each inverter stage of the switch VCRO is determined by parasitic resistance, capacitance and DC current. Transistor M 38 -M 40 Contributes to parasitic capacitance and resistance, and more importantly, their role is to discharge and return the voltage at the output of each inverter stage to zero after switching off.

[0048] The output driver includes a plurality of inverters (transistors M) with gradually increasing driving capabilities. 41 -M 46 ). This output driver provides effective isolation between the switch VCRO and the PA while sharpening the oscillation signal. Transistor M 41 、M 42 A small W / L ratio is used to minimize the large parasitic capacitance introduced at the output of the switch VCRO. 45 、M 46 It has a large W / L ratio to ensure sufficient driving capability for the PA.

[0049] The power amplifier PA is a two-stage parallel switching class D amplifier with a large W / L ratio to amplify narrow pulse oscillation signals. A capacitor is connected in series at each stage to isolate the DC component.

[0050] An off-chip matching network is used to match the output impedance to a 50Ω antenna. In addition, it shapes the output spectrum and suppresses signal components outside the center frequency and -10dB bandwidth.

[0051] In a specific embodiment, the proposed IR-UWB transmitter operates at a supply voltage of 1.0 V and is designed and implemented by TSMC 40 nm CMOS process technology. It operates in a burst mode with a low duty cycle and works at a data rate of 10 Mbps.

[0052] Figure 3 The output pulse waveform shown is generated under the conditions of Vctd = 0V and Vcont = 0.5V. The peak-to-peak voltage (Vpp) of the IR-UWB RF signal on a 50Ω output load is 450mV, and the pulse width is 1.7ns. A larger Vpp helps to extend the communication distance. Figure 4The power spectral density (PSD) of the proposed IR-UWB transmitter under the conditions of Vctd = 0V and Vcont = 0.5V is shown, and its frequency range is from 1GHz to 8GHz, which complies with the FCC indoor mask regulations. The -10dB bandwidth of the PSD is 750MHz, and its maximum value is -57.78dBm / MHz, which occurs at the center frequency of 4.3GHz. Although the PSD at the center frequency is far enough from the lower limit of the FCC mask to ensure that the regulations will not be violated even if the data rate and Vpp are increased to improve the PSD, this will inevitably increase the overall power consumption of the transmitter. In addition, a Vpp of 450mV is still sufficient for short-distance transmission.

[0053] The control voltage Vcont is swept from 0V to 1.0V while maintaining Vctd = 0V. Its effect on the center frequency of the power spectral density (PSD) is as follows: Figure 5 As shown. The increase of Vcont enhances the 26 、M 32 、M 38 The center frequency can be tuned from 3.7GHz to 6.0GHz, showing a good linear tuning range of Vcont between 0.4V and 0.7V. Figure 6 The -10dB bandwidth of PSD is shown when Vctd is swept from 0V to 2.0V while the control voltage Vcont is kept at 0.5V. As Vctd increases, the -10dB bandwidth expands to a maximum value of 1.1GHz and then gradually decreases, with a bandwidth tuning range of approximately 600MHz. These results verify the effective spectral tunability of the proposed IR-UWB transmitter architecture. Figure 7 The chip area of ​​the proposed IR-UWB transmitter is shown to be 430 × 430 μm 2 , and the core area is 38×28μm 2 . Notably, it achieves an average power consumption of only 34μW and an energy efficiency of 3.4pJ / b at 10Mbps data stream. Table 2 summarizes the performance of the implemented IR-UWB transmitter and compares it with the current state-of-the-art IR-UWB transmitters. In addition to parameters such as power consumption, peak voltage amplitude, and energy efficiency, a figure of merit (FOM) is introduced, which is defined as the ratio of normalized energy efficiency to peak voltage amplitude. Compared with other transmitters, the proposed IR-UWB transmitter significantly reduces the overall power consumption and improves energy efficiency, and its FOM is also better than similar transmitters.

[0054] Table 2 Transmitter performance comparison

[0055] parameter The present invention CICC'24 ISSCC'22 IET'20 JSSC'19 TCAS-H'18 JSSC'17 Process (nm) 40 65 28 180 65 180 28 modulation OOK OOK 4PPM+8PSK+4PAM OOK D-MPPM OOK OOK Bandwidth (GHz) 3.1-6 3.1-6 6-9 3.0-7.5 3.1-5 3.1-6 3.5-4.5 Data rate (Mbps) 10 100-800 1660 200 500 200 27.24 <![CDATA[Peak voltage, V pp (mv)]]> 450 400 300 320 400 260 350 TX power consumption (mw) 0.034 13.2 9.69 1.0 7.0 4.0 0.38 Energy efficiency (pJ / b) 3.4 165 5.8 5.0 14 20 14 <![CDATA[Area (mm 2 )]]> <![CDATA[0.185,0.001 c ]]> 2.0 <![CDATA[0.155 c ]]> 0.63 <![CDATA[2.88 b ]]> <![CDATA[0.021 c ]]> <![CDATA[0.095 c ]]> <![CDATA[FoM a ]]> 7.56 41.25 25.22 15.63 35.0 76.92 40.0

[0056] a FOM = Normalized efficiency / V pp [pJ / (b·V)] b Transceiver c Core areas only

[0057] The preferred specific embodiments of the present invention are described in detail above. It should be understood that a person skilled in the art can make many modifications and changes based on the concept of the present invention without creative work. Therefore, any technical solution that can be obtained by a person skilled in the art through logical analysis, reasoning or limited experiments based on the concept of the present invention on the basis of the prior art should be within the scope of protection determined by the claims.

Claims

1. A pulse wireless ultra-wideband transmitter chip, characterized in that: The invention comprises a narrow pulse generator, a voltage-controlled ring oscillator, an output driver, a power amplifier and an off-chip matching network connected in sequence, wherein: The narrow pulse generator is used to generate a narrow pulse according to the received signal, and the continuous adjustment of the duration or delay time of the narrow pulse is achieved by connecting the control voltage Vctd of the PMOS transistor; The voltage-controlled ring oscillator is a switch-mode oscillator, used to provide frequency calibration when activated, controlled by an external control voltage Vcont, and output a narrow pulse oscillation signal; The output driver is used to achieve isolation between the voltage-controlled ring oscillator and the power amplifier, and sharpen the narrow pulse oscillation signal; The power amplifier is used to amplify the narrow pulse oscillation signal; The off-chip matching network is used to match the output signal of the power amplifier with the antenna.

2. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The narrow pulse generator includes an input inverting unit, a delayed signal generating unit, a NAND gate and an output inverting unit. The input inverting unit is connected to the delayed signal generating unit, and the NAND gate is respectively connected to the input inverting unit, the delayed signal generating unit and the output inverting unit.

3. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: In the PMOS transistor, the source, drain and substrate serve as one terminal, which is controlled by the control voltage Vctd, and the gate serves as another terminal.

4. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The voltage-controlled ring oscillator includes a plurality of oscillation modules, each of which includes an activation unit, an inverter, a calibration unit, a constant resistance unit and a discharge unit.

5. The pulse wireless ultra-wideband transmitter according to claim 4, characterized in that: The calibration unit is controlled by an external control voltage Vcont, and when the activation unit receives the narrow pulse, the voltage-controlled ring oscillator is activated.

6. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The output driver includes a plurality of inverters with gradually increasing driving capabilities.

7. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The power amplifier is a two-stage parallel-connected switching class D amplifier.

8. The pulse wireless ultra-wideband transmitter according to claim 7, characterized in that: Each level of the switch class D amplifier is connected in series with a capacitor for isolating a DC component.

9. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The off-chip matching network shapes the output signal and matches it with the antenna.

10. The pulse wireless ultra-wideband transmitter according to claim 1, characterized in that: The transmitter is performance tested using performance parameters including a figure of merit, which is defined as the ratio of normalized efficiency to peak voltage amplitude.

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