Array substrate, display panel and display device

Abstract

The invention provides an array substrate, a display panel and a display device. The array substrate comprises a substrate; the plurality of sub-pixel groups are arranged on the substrate along a first direction, each sub-pixel group comprises a plurality of sub-pixels arranged along a second direction, each sub-pixel comprises a pixel driving circuit, and each pixel driving circuit comprises a driving module and a power supply signal line; the first direction intersects with the second direction; the driving module is connected between the power supply signal line and the light-emitting device and is used for controlling the light-emitting device to emit light according to a control signal of a self control end in a light-emitting stage; the power signal lines extend in the second direction, and in the first direction, every two adjacent sub-pixel groups share one power signal line. According to the array substrate provided by the invention, the two adjacent sub-pixel groups share one power supply signal line, so that the pixel size can be effectively reduced, the design space is saved, the pixel density is improved, and the display performance is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate, a display panel and a display device. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more extensive, and correspondingly, the requirements for display panels are becoming higher and higher.

[0003] However, the performance of related display panels needs to be improved. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide an array substrate with reduced pixel size and improved pixel density.

[0005] Based on the above purpose, the present application provides an array substrate, which includes:

[0006] substrate;

[0007] A plurality of sub-pixel groups are arranged along a first direction on the substrate, the sub-pixel groups include a plurality of sub-pixels arranged along a second direction, the sub-pixels include a pixel driving circuit, the pixel driving circuit includes a driving module and a power signal line; the first direction and the second direction intersect;

[0008] The driving module is connected between the power signal line and the light emitting device, and is used to control the light emitting device to emit light according to the control signal of the control end of the driving module during the light emitting stage;

[0009] The power signal line extends along the second direction. In the first direction, two adjacent sub-pixel groups share one power signal line.

[0010] In one embodiment, the pixel driving circuit further includes a first initialization module for initializing the driving module, and a second initialization module for initializing the anode of the light-emitting device;

[0011] The pixel driving circuit further includes a first scanning signal line and a reference signal line, the first scanning signal line extends along the first direction, and the reference signal line extends along the first direction;

[0012] The control end of the first initialization module and the control end of the second initialization module are both connected to the first scanning signal line, the first end of the first initialization module is connected to the control end of the driving module, the second end of the first initialization module is connected to the second end of the second initialization module, the first end of the second initialization module is connected to the reference signal line, and the second end of the second initialization module is connected to the anode of the light-emitting device.

[0013] In one embodiment, the pixel driving circuit further includes a storage module, which is connected to the control end of the driving module and is used to store a control signal of the control end of the driving module;

[0014] Preferably, the storage module includes a storage capacitor, the storage capacitor includes a first plate, a second plate and a third plate, the second plate is located between the first plate and the third plate, the first plate and the third plate form a capacitor with the second plate respectively, and the second plate is connected to the power signal line.

[0015] In one embodiment, the array substrate further includes:

[0016] An active layer, a first conductor layer, a second conductor layer, and a third conductor layer are stacked on the substrate, the first electrode plate is located on the first conductor layer, the second electrode plate is located on the second conductor layer, the third electrode plate is located on the third conductor layer, and the control end of the driving module is located on the first conductor layer;

[0017] Preferably, the array substrate further comprises a fourth conductor layer, the fourth conductor layer is located on a side of the third conductor layer away from the substrate, and the power signal line is located on the fourth conductor layer.

[0018] In one implementation manner, the pixel driving circuit further includes:

[0019] a data writing module, wherein a control end of the data writing module is connected to the second scanning signal line, a first end of the data writing module is connected to the data line, and a second end of the data writing module is connected to the first end of the driving module, and the data writing module is used to respond to a signal on the second scanning signal line and write a voltage related to the data voltage on the data line to the control end of the driving module during a data writing phase;

[0020] Preferably, the data line extends along the second direction; and the second scanning signal line extends along the first direction.

[0021] In one implementation manner, the pixel driving circuit further includes:

[0022] a first light-emitting control module, wherein the second end of the first light-emitting control module is connected to the first end of the driving module, the control end of the first light-emitting control module is connected to a light-emitting control signal line, and the first light-emitting control module is used to respond to a signal on the light-emitting control signal line to be turned on during the light-emitting stage;

[0023] Preferably, it also includes:

[0024] A second light-emitting control module, wherein the first end of the second light-emitting control module is connected to the second end of the driving module, the control end of the second light-emitting control module is connected to a light-emitting control signal line, the second end of the light-emitting control module is connected to the anode of the light-emitting device, and the second light-emitting control module is used to respond to the signal on the light-emitting control signal line to turn on during the light-emitting stage.

[0025] In one implementation manner, the pixel driving circuit further includes:

[0026] A compensation module, wherein the control end of the compensation module is connected to the second scanning signal line, the first end of the compensation module is connected to the control end of the driving module, the second end of the compensation module is connected to the second end of the driving module, and the compensation module is used to compensate for the threshold voltage of the driving module.

[0027] In one implementation manner, in the first direction, two adjacent sub-pixel groups are mirror-arranged.

[0028] Based on the same inventive concept, the present application also discloses a display panel, which includes the array substrate described in any of the above embodiments.

[0029] Based on the same inventive concept, the present application also discloses a display module, which includes the above-mentioned display panel.

[0030] Compared with the related art, the array substrate provided in the present application can effectively reduce the pixel size and save design space by allowing two adjacent sub-pixel groups to share a power signal line, thereby increasing pixel density and improving display performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 is a schematic diagram of a pixel driving circuit in a related array substrate;

[0033] Figure 2 for Figure 1 The layout of the pixel driving circuit;

[0034] Figure 3 A schematic diagram of a pixel driving circuit in an array substrate provided in an embodiment of the present application;

[0035] Figure 4A circuit diagram of a pixel driving circuit in an array substrate provided in an embodiment of the present application;

[0036] Figure 5 for Figure 4 The layout of the pixel driving circuit;

[0037] Figure 6 A schematic diagram of the layer structure of an array substrate provided in another embodiment of the present application;

[0038] Figure 7 A layout of an active layer, a first conductor layer, and a second conductor layer of an array substrate provided in another embodiment of the present application;

[0039] Figure 8 A layout of an active layer, a first conductor layer, a second conductor layer and a third conductor layer of an array substrate provided in another embodiment of the present application;

[0040] Fig. 9 A layout of an active layer, a first conductor layer, a second conductor layer, a third conductor layer and a fourth conductor layer of an array substrate provided in another embodiment of the present application.

[0041] Marking Description:

[0042] 100, pixel driving circuit; 110, pixel unit; 1, substrate; 2, sub-pixel; 11, active layer; 21, anode. DETAILED DESCRIPTION

[0043] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0044] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0045] In recent years, VR (Virtual Reality) technology has made great progress. VR technology has attracted the attention of many people with its realistic and immersive experience. Its high resolution combined with high-precision tracking technology allows users to have a real experience. It has been widely used in education, tourism, medical care, games, movies and other fields.

[0046] OLED (Organic Light-Emitting Diode) display screens are colorful and can be made into ultra-thin and flexible displays. Their light emission is close to natural light and is less harmful to the human eye. Therefore, OLED display screens have broad application prospects in fields such as VR.

[0047] like Figure 1-2 As shown, in a related array substrate, its pixel driving circuit 100 adopts a 7T1C circuit, including a transistor T1, a transistor T2, a transistor T3, a transistor T4, a transistor T5, a transistor T6, a transistor T7 and a storage capacitor Cst. Each pixel unit 110 includes a power signal line VDD and a data line Data extending in the same direction, resulting in a large space occupied by the pixel unit 110 and a low pixel density. At the same time, in order to improve the display effect, the transistor T4 usually adopts a dual-gate design, and the dual-gate design further leads to a large space occupied and a low pixel density.

[0048] Based on this, the present application provides an array substrate solution to solve the above technical problems.

[0049] Reference Figure 3-5 As shown, an embodiment of the present application discloses an array substrate, which includes: a substrate 1; wherein the substrate 1 can be a rigid substrate made of materials such as glass, silicon, sapphire, etc., or a flexible substrate made of polyimide PI, etc.

[0050] The array substrate also includes a plurality of sub-pixel groups, which are arranged along a first direction (such as the X direction in the figure) on the substrate 1. The sub-pixel group includes a plurality of sub-pixels 2 arranged along a second direction (such as the Y direction in the figure). The sub-pixel 2 includes a pixel driving circuit 100, and the pixel driving circuit 100 includes a driving module and a power signal line VDD. The first direction intersects with the second direction.

[0051] The driving module is connected between the power signal line VDD and the light emitting device, and is used to control the light emitting device to emit light according to a control signal from a control end of the driving module during the light emitting stage.

[0052] The power signal line VDD extends along the second direction. In the first direction, two adjacent sub-pixel groups share one power signal line VDD.

[0053] Specifically, refer to Figure 5 As shown, due to space limitations, Figure 5 Only two sub-pixels 2 are shown in the figure, and the two sub-pixels 2 are arranged along the first direction. In fact, in the array substrate, a plurality of sub-pixels 2 are arranged in both the first direction and the second direction.

[0054] The array substrate provided in this embodiment can effectively reduce the pixel size and save design space by allowing two adjacent sub-pixel groups to share a power signal line VDD, thereby increasing pixel density (Pixels Per Inch, pixel density unit) and improving display performance.

[0055] Furthermore, the driving module and the light emitting device are connected in series between the power signal line VDD and the power signal line VSS. Specifically, the power signal line VDD is connected to a first power voltage, and the power signal line VSS is connected to a second power voltage, the first power voltage is positive, and the second power voltage is negative or 0V.

[0056] Please continue to refer to Figure 3-5 As shown, in one embodiment, the pixel driving circuit 100 further includes a first initialization module for initializing the driving module, and a second initialization module for initializing the anode 21 of the light emitting device.

[0057] The pixel driving circuit 100 further includes a first scanning signal line Scan1 and a reference signal line Vref. The first scanning signal line Scan1 extends along a first direction, and the reference signal line Vref extends along the first direction.

[0058] The control end of the first initialization module and the control end of the second initialization module are both connected to the first scanning signal line Scan1, the first end of the first initialization module is connected to the control end of the driving module, the second end of the first initialization module is connected to the second end of the second initialization module, the first end of the second initialization module is connected to the reference signal line Vref, and the second end of the second initialization module is connected to the anode 21 of the light-emitting device.

[0059] Specifically, the driving module includes a transistor T1, the light emitting device includes an OLED or an AMOLED, the first initialization module includes a transistor T4, and the second initialization module includes a transistor T7. In the layout, the transistor T4 is a single-gate design; in terms of function, the transistor T4 shares a transistor T7 to form a double-gate design, thereby further reducing the pixel size, reducing space occupation, and improving pixel density.

[0060] Please continue to refer to Figure 3-5As shown, in one embodiment, the pixel driving circuit 100 further includes a storage module, which is connected to the control end of the driving module and is used to store the control signal of the control end of the driving module. Further, the storage module includes a storage capacitor Cst, and the storage capacitor Cst includes a first plate, a second plate, and a third plate. The second plate is located between the first plate and the third plate. The first plate and the third plate form a capacitor with the second plate respectively, and the second plate is connected to the power signal line VDD.

[0061] Among them, the storage capacitor Cst forms a three-electrode structure, which is beneficial to reducing the volume of the storage capacitor Cst, further reducing the pixel size, and improving the pixel density.

[0062] Please refer to Figure 6-9 As shown, in one embodiment, the array substrate further includes an active layer 11, a first conductor layer M1, a second conductor layer M2, and a third conductor layer M3 stacked on the substrate 1, the first electrode plate is located on the first conductor layer M1, the second electrode plate is located on the second conductor layer M2, the third electrode plate is located on the third conductor layer M3, and the control end (gate) of the driving module is located on the first conductor layer M1. A first capacitor is formed between the first electrode plate and the second electrode plate, a second capacitor is formed between the second electrode plate and the third electrode plate, the first capacitor and the second capacitor form a dual capacitor structure, and the third conductor layer M3 is used to form the source and drain of the transistor.

[0063] Among them, the active layer 11 can be made of semiconductor materials such as polysilicon. And the part of the active layer pattern covered by the scan line (including the first scan signal line Scan1, the second scan signal line Scan2 and the light-emitting control signal line EM) includes the channel area, which is the high resistance area in the active layer pattern; the part not covered by the scan line includes the source area and the drain area, which are the low resistance areas doped with impurities in the active layer pattern and are located on both sides of the channel area. The channel area corresponds to the channel of the transistor, the source area and the drain area correspond to the source and drain of the transistor, and the metal wiring corresponds to the gate of the transistor.

[0064] Please continue to refer to Fig. 9 As shown, in one embodiment, the array substrate further includes a fourth conductor layer M4, which is located on a side of the third conductor layer M3 away from the substrate 1, and the power signal line VDD is located on the fourth conductor layer M4. The power signal line VDD passes through a via hole on the third conductor layer M3 and is connected to the second electrode in the second conductor layer M2. The anode 21 is located on a side of the fourth conductor layer M4 away from the substrate 1.

[0065] Furthermore, an insulating layer is provided between any two conductor layers, and an insulating layer is also provided between the active layer 11 and the first conductor layer M1. The material of the insulating layer may be silicon nitride and / or silicon oxide.

[0066] Furthermore, the first conductor layer M1 , the second conductor layer M2 , the third conductor layer M3 and the fourth conductor layer M4 may be made of metal and / or indium tin oxide (ITO) and other materials.

[0067] Please continue to refer to Figure 3-4 As shown, in one embodiment, the pixel driving circuit 100 further includes a data writing module, the control end of the data writing module is connected to the second scanning signal line Scan2, the first end of the data writing module is connected to the data line Data, the second end of the data writing module is connected to the first end of the driving module, and the data writing module is used to respond to the signal on the second scanning signal line Scan2, and write a voltage related to the data voltage on the data line Data to the control end of the driving module in the data writing phase. Specifically, the data writing module includes a transistor T2.

[0068] Furthermore, the data line Data extends along the second direction, and the second scan signal line Scan2 extends along the first direction. The data line Data is located in the fourth conductor layer M4, and the first scan signal line Scan1 and the second scan signal line Scan2 are located in the first conductor layer M1.

[0069] Please continue to refer to Figure 3-4 As shown, in one embodiment, the pixel driving circuit 100 further includes a first light-emitting control module, the second end of the first light-emitting control module is connected to the first end of the driving module, the control end of the first light-emitting control module is connected to the light-emitting control signal line EM, and the first light-emitting control module is used to respond to the signal on the light-emitting control signal line EM and turn on during the light-emitting phase, so as to prevent the light-emitting device from emitting light during the data writing phase. Specifically, the first light-emitting control module includes a transistor T5.

[0070] Please continue to refer to Figure 3-4 As shown, in one embodiment, the pixel driving circuit 100 further includes a second light-emitting control module, a first end of the second light-emitting control module is connected to a second end of the driving module, a control end of the second light-emitting control module is connected to a light-emitting control signal line EM, a second end of the light-emitting control module is connected to an anode 21 of the light-emitting device, and the second light-emitting control module is used to respond to a signal on the light-emitting control signal line EM and turn on during the light-emitting phase, further preventing the light-emitting device from emitting light during the data writing phase. Specifically, the second light-emitting control module includes a transistor T6, the light-emitting control signal line EM extends along a first direction, and the light-emitting control signal line EM is located in the first conductor layer.

[0071] Please continue to refer to Figure 3-4As shown, in one embodiment, the pixel driving circuit 100 further includes a compensation module, the control end of the compensation module is connected to the second scanning signal line Scan2, the first end of the compensation module is connected to the control end of the driving module, the second end of the compensation module is connected to the second end of the driving module, and the compensation module is used to compensate for the threshold voltage of the driving module. Specifically, the compensation module includes a transistor T3. Preferably, the compensation module is a dual-gate threshold compensation transistor. Compared with a single-gate transistor, a dual-gate transistor has a lower leakage current, which is beneficial to reducing the potential fluctuation of the gate of the driving module.

[0072] In one embodiment, in the first direction, two adjacent sub-pixel groups are mirror-disposed, which is beneficial to improving display uniformity.

[0073] Based on the same inventive concept, another embodiment of the present application discloses a display panel, which includes the array substrate in the above embodiment.

[0074] The display panel provided in this embodiment has an array substrate in which two adjacent sub-pixel groups share a power signal line VDD, which can effectively reduce the pixel size and save design space, thereby improving pixel density, display performance, and display effect of the display panel.

[0075] Based on the same inventive concept, another embodiment of the present application discloses a display device, which includes the display panel in the above embodiment. The display device can be mounted on a smart device (such as a mobile phone, VR device, computer, TV, car display, etc.).

[0076] The display device provided in this embodiment has an array substrate in which two adjacent sub-pixel groups share a power signal line VDD, which can effectively reduce the pixel size and save design space, thereby improving pixel density, display performance, and display effect of the display device.

[0077] Although the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.

[0078] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0079] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. An array substrate, characterized in that: include: substrate; A plurality of sub-pixel groups are arranged along a first direction on the substrate, the sub-pixel groups include a plurality of sub-pixels arranged along a second direction, the sub-pixels include a pixel driving circuit, the pixel driving circuit includes a driving module and a power signal line; the first direction and the second direction intersect; The driving module is connected between the power signal line and the light emitting device, and is used to control the light emitting device to emit light according to the control signal of the control end of the driving module during the light emitting stage; The power signal line extends along the second direction. In the first direction, two adjacent sub-pixel groups share one power signal line.

2. The array substrate according to claim 1, characterized in that: The pixel driving circuit further comprises a first initialization module for initializing the driving module, and a second initialization module for initializing the anode of the light emitting device; The pixel driving circuit further includes a first scanning signal line and a reference signal line, the first scanning signal line extends along the first direction, and the reference signal line extends along the first direction; The control end of the first initialization module and the control end of the second initialization module are both connected to the first scanning signal line, the first end of the first initialization module is connected to the control end of the driving module, the second end of the first initialization module is connected to the second end of the second initialization module, the first end of the second initialization module is connected to the reference signal line, and the second end of the second initialization module is connected to the anode of the light-emitting device.

3. The array substrate according to claim 1, characterized in that: The pixel driving circuit further includes a storage module, which is connected to the control end of the driving module and is used to store a control signal of the control end of the driving module; Preferably, the storage module includes a storage capacitor, the storage capacitor includes a first plate, a second plate and a third plate, the second plate is located between the first plate and the third plate, the first plate and the third plate form a capacitor with the second plate respectively, and the second plate is connected to the power signal line.

4. The array substrate according to claim 3, characterized in that: The array substrate further includes: An active layer, a first conductor layer, a second conductor layer, and a third conductor layer are stacked on the substrate, the first electrode plate is located on the first conductor layer, the second electrode plate is located on the second conductor layer, the third electrode plate is located on the third conductor layer, and the control end of the driving module is located on the first conductor layer; Preferably, the array substrate further comprises a fourth conductor layer, the fourth conductor layer is located on a side of the third conductor layer away from the substrate, and the power signal line is located on the fourth conductor layer.

5. The array substrate according to claim 1, wherein: The pixel driving circuit further includes: a data writing module, wherein a control end of the data writing module is connected to the second scanning signal line, a first end of the data writing module is connected to the data line, and a second end of the data writing module is connected to the first end of the driving module, and the data writing module is used to respond to a signal on the second scanning signal line and write a voltage related to the data voltage on the data line to the control end of the driving module during a data writing phase; Preferably, the data line extends along the second direction; and the second scanning signal line extends along the first direction.

6. The array substrate according to claim 1, characterized in that: The pixel driving circuit further includes: a first light-emitting control module, wherein the second end of the first light-emitting control module is connected to the first end of the driving module, the control end of the first light-emitting control module is connected to a light-emitting control signal line, and the first light-emitting control module is used to respond to a signal on the light-emitting control signal line to be turned on during the light-emitting stage; Preferably, it also includes: A second light-emitting control module, wherein the first end of the second light-emitting control module is connected to the second end of the driving module, the control end of the second light-emitting control module is connected to a light-emitting control signal line, the second end of the light-emitting control module is connected to the anode of the light-emitting device, and the second light-emitting control module is used to respond to the signal on the light-emitting control signal line to turn on during the light-emitting stage.

7. The array substrate according to claim 1, wherein: The pixel driving circuit further includes: A compensation module, wherein the control end of the compensation module is connected to the second scanning signal line, the first end of the compensation module is connected to the control end of the driving module, the second end of the compensation module is connected to the second end of the driving module, and the compensation module is used to compensate for the threshold voltage of the driving module.

8. The array substrate according to claim 1, wherein: In the first direction, two adjacent sub-pixel groups are arranged in a mirror image.

9. A display panel, characterized in that: include: An array substrate as described in any one of claims 1 to 8.

10. A display device, characterized in that: include: The display panel as claimed in claim 9.

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