Avalanche photodiode and detector

Abstract

The invention discloses an avalanche photodiode and a detector. The avalanche photodiode comprises an epitaxial layer with a first doping type, a third semiconductor region, a fourth semiconductor region, a first semiconductor region with a second doping type, a second semiconductor region and a gettering region, the first semiconductor region is a cathode and is arranged on the first surface, the second semiconductor region wraps the periphery of the first semiconductor region, and the third semiconductor region and the first semiconductor region are at least partially overlapped in the direction from the first surface to the second surface to form a main junction; the gettering region is arranged on the epitaxial layer and is close to the second surface, the gettering region and the main junction are at least partially overlapped in the direction from the first surface to the second surface, and the gettering region and the third semiconductor region are arranged at intervals in the direction from the first surface to the second surface; a gap is formed between the fourth semiconductor region and the gettering region in the direction parallel to the first surface. The avalanche photodiode provided by the technical scheme of the invention can improve the sufficiency of gettering.

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric detectors, and in particular to an avalanche photodiode and a detector. Background Art

[0002] Single Photon Avalanche Diode (SPAD) is a semiconductor photodetector with single photon detection sensitivity. It uses the avalanche effect of the PN junction when it works above the reverse breakdown voltage to multiply the carriers generated by the absorbed light, generating a large current that is detected by the external circuit, thereby realizing the photoelectric detection process. Since metal equipment and devices are inevitably used in the wafer processing process, photodiodes are prone to metal contamination, so metal contamination is generally reduced by gettering.

[0003] However, in current photodiodes, due to the unreasonable location of the gettering region, the gettering is insufficient. The presence of metal impurities will cause the dark count rate (DCR) of the avalanche photodiode to be high, affecting product performance. Summary of the invention

[0004] The main purpose of the present invention is to provide an avalanche photodiode, aiming to improve the sufficiency of metal gettering and reduce the dark count rate.

[0005] To achieve the above object, the avalanche photodiode proposed in the present invention comprises:

[0006] an epitaxial layer having a first doping type, the epitaxial layer being formed with a first surface and a second surface opposite to each other;

[0007] a first semiconductor region having a second doping type, the first semiconductor region being disposed on the first surface and extending from the first surface to the second surface, the first semiconductor region being a cathode;

[0008] a second semiconductor region having the second doping type, the second semiconductor region extending from the first surface to the second surface and wrapping around the periphery of the first semiconductor region, the doping concentration of the second semiconductor region being less than the doping concentration of the first semiconductor region;

[0009] a third semiconductor region having the first doping type, the third semiconductor region extending from a side of the second semiconductor region away from the first surface toward the second surface, the third semiconductor region at least partially overlapping with the first semiconductor region in a direction from the first surface to the second surface, and forming a main junction with the second semiconductor region;

[0010] a gettering region, the gettering region being disposed in the epitaxial layer and close to the second surface, the gettering region at least partially overlapping with the main junction in the direction from the first surface to the second surface, and being spaced apart from the third semiconductor region in the direction from the first surface to the second surface; and

[0011] The fourth semiconductor region has the first doping type, the doping concentration of the fourth semiconductor region is greater than the doping concentration of the third semiconductor region, and is an anode. The fourth semiconductor region is arranged on the second surface, and there is a gap between the fourth semiconductor region and the doping region in a direction parallel to the first surface.

[0012] In a possible embodiment of the present application, a distance between a side of the gettering region facing away from the second surface and a side of the third semiconductor region facing the second surface is D1, wherein D1 is less than 10 μm;

[0013] And / or, in a direction parallel to the first surface, a distance between an edge of the gettering region and an edge of the fourth semiconductor region is D2, wherein D2 is less than 15 μm.

[0014] In a possible embodiment of the present application, the avalanche photodiode also includes a fifth semiconductor region, the fifth semiconductor region has a second doping type, the doping concentration of the fifth semiconductor region is less than the doping concentration of the first semiconductor region, and the fifth semiconductor region is wrapped around the periphery of the doping region.

[0015] In a possible embodiment of the present application, the avalanche photodiode also includes an isolation region and a sixth semiconductor region, the sixth semiconductor region has a first doping type and is extended from the first surface to the second surface, the sixth semiconductor region is arranged around the edge of the second semiconductor region and is spaced apart from the second semiconductor region, and the isolation region is arranged around the outer periphery of the sixth semiconductor region and is arranged adjacent to the sixth semiconductor region.

[0016] In a possible embodiment of the present application, the isolation region extends from the first surface to the second surface, the fourth semiconductor region is located on the inner peripheral side of the isolation region, and the depth of the sixth semiconductor region on a side away from the first surface is greater than the depth of the third semiconductor region on a side away from the first surface;

[0017] And / or, in a direction parallel to the first surface, a distance between the second semiconductor region and the sixth semiconductor region is D3, wherein D3 ≥ 0.3 μm.

[0018] In a possible embodiment of the present application, the avalanche photodiode also includes a seventh semiconductor region, the seventh semiconductor region has a first doping type and a doping concentration less than a doping concentration of the fourth semiconductor region, the seventh semiconductor region extends from the second surface to the first surface and covers the periphery of the fourth semiconductor region.

[0019] In a possible embodiment of the present application, the implanted element of the gettering region is oxygen.

[0020] In a possible embodiment of the present application, the implantation concentration range of the oxygen element in the epitaxial layer is less than 10 17 cm -3 .

[0021] In a possible embodiment of the present application, the second surface is a light incident surface.

[0022] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type.

[0023] In a possible embodiment of the present application, in a direction parallel to the first surface, a distance between an edge of the second semiconductor region and an edge of the first semiconductor region is D4, wherein D4 ≥ 0.2 μm.

[0024] The present invention further discloses a detector, which comprises a plurality of avalanche photodiode devices as described above, and the plurality of avalanche photodiode devices are arranged in an array.

[0025] The avalanche photodiode of the technical solution of the present invention comprises an epitaxial layer, a first semiconductor region, a second semiconductor region, a third semiconductor region and a fourth semiconductor region, wherein the epitaxial layer is formed with a first surface and a second surface opposite to each other, the second semiconductor region and the first semiconductor region have the same doping type, the third semiconductor region and the fourth semiconductor region have the same doping type, the second semiconductor region and the third semiconductor region cooperate to form a main junction, the first semiconductor region and the fourth semiconductor region are respectively a cathode and an anode, and are used to play the role of ohmic contact. By providing the second semiconductor region around the periphery of the first semiconductor region, since the doping concentration of the second semiconductor region is less than the doping concentration of the first semiconductor region, a protective effect can be formed on the periphery of the first semiconductor region to avoid edge breakdown.

[0026] At the same time, the gettering region and the main junction are both located in the same epitaxial layer, and the physical distance between the two is much smaller than that in different stacked epitaxial layers, which can improve the sufficiency of gettering and reduce the dark count rate. The interval between the gettering region and the main junction can effectively reduce the probability of carriers in the gettering region entering the main junction, further reducing the dark count rate. Under a lower thermal budget, the gettering of metal contamination can also be effectively achieved due to the significant reduction in distance, reducing the dark count rate of the avalanche photodiode. In addition, the fourth semiconductor region close to the second surface of the gettering region can simultaneously adsorb metal impurities in the fourth semiconductor region, further improving the sufficiency of gettering. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.

[0028] Figure 1 A cross-sectional view of an embodiment of an avalanche photodiode of the present invention;

[0029] Figure 2 is a cross-sectional view of another embodiment of an avalanche photodiode of the present invention;

[0030] Figure 3 FIG. 4 is a cross-sectional view of another embodiment of an avalanche photodiode according to the present invention.

[0031] Description of Figure Numbers:

[0032] Label name Label name 1 Avalanche Photodiode 15 Fourth semiconductor region 11 Epitaxial layer 16 Gettering Area 111 First surface 17 Fifth semiconductor region 113 Second surface 18 Quarantine 12 The first semiconductor region 19 The sixth semiconductor region 13 The second semiconductor region 20 Semiconductor Region 7 14 The third semiconductor region

[0033] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0036] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0037] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0038] The sites prepared by a certain process for getting rid of metal impurities are called gettering sites. They are usually lattice defect sites such as dislocations, stacking faults, and defect clusters. The potential energy of metal impurities at these sites is lower than that in the active region, so they can automatically diffuse to the gettering sites driven by the potential energy and form a stable complex without electrical activity. The area where the gettering sites are located is called the gettering region.

[0039] Since the existing avalanche photodiodes usually place the gettering region close to the substrate, and the main junction is located at the top of multiple epitaxial layers, the distance between the gettering region and the main junction is large, and the absorption effect on metal impurities is poor, especially for impurities with small diffusion coefficients. With the miniaturization of products, low thermal budget (referring to reducing the temperature and constant temperature time of each processing step of the wafer) is an inevitable choice. When the thermal budget is low, the diffusion length of metal impurities will be reduced, which further aggravates the difficulty of absorbing metal impurities. There are also other photodetectors that place the gettering region at the edge of the active region, but only for photodiodes with an operating voltage less than the breakdown voltage (Breakdown Voltage), but not suitable for avalanche photodiodes, because the noise effect caused by lattice damage cannot be ignored.

[0040] Therefore, the present invention proposes an avalanche photodiode, which aims to reduce the distance between the gettering region and the main junction without affecting the main junction performance, improve the sufficiency of the gettering metal, and reduce the dark count rate.

[0041] Please refer to Figure 1 In one embodiment of the present invention, the avalanche photodiode 1 comprises:

[0042] An epitaxial layer 11 has a first doping type, and the epitaxial layer 11 is formed with a first surface 111 and a second surface 113 opposite to each other;

[0043] A first semiconductor region 12 having a second doping type, the first semiconductor region 12 being disposed on the first surface 111 and extending from the first surface 111 to the second surface 113, the first semiconductor region 12 being a cathode;

[0044] a second semiconductor region 13 having the second doping type, the second semiconductor region 13 extending from the first surface 111 to the second surface 113 and wrapping around the periphery of the first semiconductor region 12, and the doping concentration of the second semiconductor region 13 is less than the doping concentration of the first semiconductor region 12;

[0045] a third semiconductor region 14 having the first doping type, the third semiconductor region 14 extending from a side of the second semiconductor region 13 away from the first surface 111 toward the second surface 113, the third semiconductor region 14 at least partially overlapping with the first semiconductor region 12 in a direction from the first surface 111 to the second surface 113, and forming a main junction with the second semiconductor region 13;

[0046] a gettering region 16, wherein the gettering region 16 is disposed in the epitaxial layer 11 and is disposed close to the second surface 113, the gettering region 16 at least partially overlaps with the main junction in the direction from the first surface 111 to the second surface 113, and is spaced apart from the third semiconductor region 14 in the direction from the first surface 111 to the second surface 113; and

[0047] The fourth semiconductor region 15 has the first doping type, the doping concentration of the fourth semiconductor region 15 is greater than the doping concentration of the third semiconductor region 14, and is an anode. The fourth semiconductor region 15 is arranged on the second surface 113, and there is a gap between the fourth semiconductor region 15 and the doping region 16 in a direction parallel to the first surface 111.

[0048] In this embodiment, the epitaxial layer 11 is the basic structure for manufacturing the avalanche photodiode 1. The epitaxial layer 11 is grown on the basis of the substrate. Compared with manufacturing the avalanche photodiode 1 directly on the substrate, it can have a higher resistivity and better material performance and purity. The material of the substrate can be a silicon wafer, of course, it can also be a silicon substrate, a germanium substrate, a germanium silicon substrate, a silicon-on-insulator substrate, an indium gallium arsenide substrate, a gallium arsenide substrate, a silicon carbide substrate or other suitable semiconductor materials, etc., which are not limited here. The epitaxial layer 11 can be the same material as the substrate, or a different material.

[0049] The epitaxial layer 11 has a first surface 111 and a second surface 113 that are arranged opposite to each other. The two surfaces may be substantially parallel, that is, they may be arranged in parallel, and may include two surfaces that are partially non-parallel due to processing errors. The first surface 111 may be the front side of the epitaxial layer 11, and the second surface 113 may be the back side of the epitaxial layer 11. The second surface 113 may be in direct contact with the substrate, or may have other epitaxial structures between the second surface 113 and the substrate, which is not limited here.

[0050] The depth direction of the avalanche photodiode 1 is defined as the direction from the first surface 111 to the second surface 113, and the direction parallel to the first surface 111 is the lateral direction of the avalanche photodiode 1. The epitaxial layer 11 has a first doping type, that is, it is formed by doping impurity elements into the epitaxial layer 11, for example, the conductivity type of the doped elements is N-type or P-type. The doping concentrations at various locations of the epitaxial layer 11 can be the same, or a gradient design can be performed, which is not limited here. The first semiconductor region 12 has a second doping type, which is different from the doping type of the epitaxial layer 11.

[0051] Here, the epitaxial layer 11 is taken as an example of a P-type epitaxial layer 11, that is, a P-type epitaxial layer 11 is formed on the surface of a P-type silicon wafer by chemical vapor deposition or molecular beam epitaxy, and the doping concentration of the P-type epitaxial layer 11 is not limited. Then, at a certain depth of the P-type epitaxial layer 11, a group III element, such as a non-metallic boron (B) element or a metal gallium (Ga), can be lightly doped to form a third semiconductor region 14, which is a P-type well (P-Well, referred to as PW1). The doping method can be ion implantation or thermal diffusion, etc., which is not limited here. Above the third semiconductor region 14, a group V element, such as a non-metallic phosphorus (P) or a metal arsenic (As) or Sb, is doped to form a second semiconductor region 13, which is an N-type well (NW). Then, above the second semiconductor region 13, a group V element with a higher concentration, such as a non-metallic phosphorus (P) or a metal arsenic (As), is doped to form a heavily doped first semiconductor region 12 (N+), forming a cathode ohmic contact. The first semiconductor region 12 and the second semiconductor region 13 cooperate with the third semiconductor region 14 to form a main junction, and an avalanche region can be formed at the junction with the third semiconductor region 14 .

[0052] The first semiconductor region 12 extends from the first surface 111 to the second surface 113, which means that the first semiconductor region 12 has a certain thickness in the direction from the first surface 111 to the second surface 113, and one surface thereof is coplanar with the first surface 111. Of course, the first semiconductor region 12 is also extended in a direction parallel to the first surface 111, that is, it has a surface area parallel to the first surface 111. The second semiconductor region 13 wraps around the periphery of the first semiconductor region 12 and extends from the first surface 111 to the second surface 113, which means that the second semiconductor region 13 has a surface coplanar with the first surface 111, and is arranged around the periphery of the first semiconductor region 12, has a certain thickness in the depth direction, and abuts against the side of the first semiconductor region 12 away from the first surface 111, so that the lateral size is larger than the lateral size of the first semiconductor region 12, forming a protection ring, and effectively avoiding premature breakdown. The third semiconductor region 14 starts from the side of the second semiconductor region 13 away from the first surface 111 and has a certain thickness in depth, and at least partially overlaps with the first semiconductor region 12 in a direction perpendicular to the first surface 111 , ie, partially overlaps or completely overlaps.

[0053] The fourth semiconductor region 15 (P+) is formed at the second surface 113 of the P-type epitaxial layer 11 by heavily doping with group III elements, such as non-metallic boron (B) atoms or metal gallium (Ga), as an anode, so that a low potential is applied to the epitaxial layer 11, and the structure realizes a double-side lead-out structure. The fourth semiconductor region 15 is spaced from the second semiconductor region 13 in the lateral direction, reducing the electric field effect on the main junction and reducing edge breakdown. In addition, silicon metallization can also be performed on the surface of the first semiconductor region 12 and the surface of the fourth semiconductor, so as to reduce the contact resistance.

[0054] Below the main junction, i.e., on the side close to the second surface 113, the epitaxial layer 11 forms a gettering region 16 by injecting elements. The injected elements are not limited and can be group VI elements such as oxygen, carbon or germanium. Here, a P-type epitaxial layer 11 structure with a low doping concentration can be selected, so as to increase the potential energy difference between the epitaxial layer 11 and the gettering region 16 and increase the movement rate of metal impurities. Figure 1 As shown in , the direction of the arrow indicates the transport direction of the metal contamination impurities. In order to prevent the carriers in the gettering region 16 from entering the avalanche region of the main junction, a certain distance needs to be maintained between the gettering region 16 and the third semiconductor region 14 in the depth direction. The distance can be determined according to the processing technology of the main junction and is not limited here. In addition, the gettering region 16 is also spaced apart from the fourth semiconductor region 15 in the lateral direction, thereby also reducing the probability of the carriers in the gettering region 16 entering the fourth semiconductor region 15. The relative position of the gettering region 16 and the fourth semiconductor region 15 in the depth direction is not limited, and the two may partially overlap in the lateral direction or may not overlap.

[0055] The avalanche photodiode 1 of the technical solution of the present invention comprises an epitaxial layer 11, a first semiconductor region 12, a second semiconductor region 13, a third semiconductor region 14 and a fourth semiconductor region 15, the epitaxial layer 11 is formed with a first surface 111 and a second surface 113 opposite to each other, the second semiconductor region 13 and the first semiconductor region 12 have the same doping type, the third semiconductor region 14 and the fourth semiconductor region 15 have the same doping type, the second semiconductor region 13 and the third semiconductor region 14 cooperate to form a main junction, the first semiconductor region 12 and the fourth semiconductor region 15 are respectively a cathode and an anode, and are used to play the role of ohmic contact. By providing the second semiconductor region 13 around the periphery of the first semiconductor region 12, since the doping concentration of the second semiconductor region 13 is less than the doping concentration of the first semiconductor region 12, a protective effect can be formed on the periphery of the first semiconductor region 12 to avoid edge breakdown.

[0056] At the same time, the gettering region 16 and the main junction are both located in the same epitaxial layer 11, and the physical distance between the two is much smaller than that in different stacked epitaxial layers 11, which can improve the sufficiency of gettering and reduce the dark count rate. The interval between the gettering region 16 and the main junction can effectively reduce the probability of carriers in the gettering region 16 entering the main junction, further reducing the dark count rate. Under a lower thermal budget, the gettering of metal contamination can also be effectively achieved due to the significant reduction in distance, reducing the dark count rate of the avalanche photodiode 1. In addition, the gettering region 16 is close to the fourth semiconductor region 15 of the second surface 113, and can simultaneously adsorb metal impurities in the fourth semiconductor region 15, further improving the sufficiency of gettering.

[0057] Please continue to refer to Figure 1 In a possible embodiment of the present application, a distance between a side of the gettering region 16 facing away from the second surface 113 and a side of the third semiconductor region 14 facing the second surface 113 is D1, wherein D1 is less than 10 μm;

[0058] And / or, in a direction parallel to the first surface 111 , a distance between an edge of the gettering region 16 and an edge of the fourth semiconductor region 15 is D2 , wherein D2 is less than 15 μm.

[0059] In this embodiment, the distance between the gettering region 16 and the main junction cannot be too small or too large. It is necessary to keep a certain distance between the gettering region 16 and the second semiconductor region 13 to effectively reduce the carriers in the gettering region 16 from entering the avalanche region. The minimum distance here needs to be greater than zero, and it needs to be determined according to the processing technology of the main junction. The maximum value cannot exceed 10μm, that is, the value of D1 is less than 10μm, for example, 9μm, 8μm, 7μm, etc., which can ensure a sufficient gettering effect.

[0060] On the basis of limiting or not limiting the range of D1, in order to enhance the absorption effect of the gettering region 16 on the metal impurities introduced during the electrode metallization process of the fourth semiconductor region 15, the distance between the gettering region 16 and the edge of the fourth semiconductor cannot be too large. Here, the distance D2 between the edges of the two is set to be less than 15μm, for example, 14μm, 13μm, 12μm, 11μm, 10μm, 9μm, etc., so as to meet the demand for sufficient gettering. Here, the edge of the gettering region 16 and the edge of the fourth semiconductor region 15 are spaced apart. Even if there are carriers flowing from the gettering region 16 to the fourth semiconductor region 15, they will be directly led out of the device, and no avalanche will be generated to cause counting.

[0061] Please refer to Figure 2 In a possible embodiment of the present application, the avalanche photodiode 1 also includes a fifth semiconductor region 17, the fifth semiconductor region 17 has a second doping type, the doping concentration of the fifth semiconductor region 17 is less than the doping concentration of the first semiconductor region 12, and the fifth semiconductor region 17 is wrapped around the periphery of the doping region 16.

[0062] In this embodiment, a fifth semiconductor region 17 (NW2) wrapping the gettering region 16 is formed by doping a V group element (such as P, As, Sb) in the surrounding area of ​​the gettering region 16. The fifth semiconductor region 17 can protect the gettering region 16 by injecting an element of the opposite type to the epitaxial layer 11, so that the gettering region 16 is electrically isolated from the main junction, effectively reducing the carriers entering the avalanche region of the main junction, and further reducing the dark count rate. Here, the doping concentration of the fifth semiconductor region 17 is higher than the doping concentration of the epitaxial layer 11, but lower than the concentration of the first semiconductor region 12, so that the gettering region 16 can be electrically isolated from the main junction without hindering the diffusion of metal impurities to the gettering region 16. Optionally, one surface of the fifth semiconductor region 17 is flush with the second surface 113, which is more convenient for processing.

[0063] In a possible embodiment of the present application, the avalanche photodiode 1 also includes an isolation region 18 and a sixth semiconductor region 19, the sixth semiconductor region 19 has a first doping type and is extended from the first surface 111 to the second surface 113, the sixth semiconductor region 19 is arranged around the edge of the second semiconductor region 13 and is spaced apart from the second semiconductor region 13, and the isolation region 18 is arranged around the outer periphery of the sixth semiconductor region 19 and is arranged adjacent to the sixth semiconductor region 19.

[0064] In this embodiment, the isolation region 18 can be formed by trench etching and filling the trench with polysilicon or metal tungsten, etc. The isolation region 18 is used to separate pixels. Optionally, the isolation region 18 can be a deep trench or a shallow trench.

[0065] On the basis of the epitaxial layer 11, the first doping type is lightly doped to form a sixth semiconductor region 19, whose doping concentration is lower than the doping concentration of the fourth semiconductor region 15. For example, when the substrate is a P-type substrate, the fourth semiconductor region 15 is P+, and the sixth semiconductor region 19 is a P-type well (PW2 for short). The doping concentration of the sixth semiconductor region 19 can be the same as the doping element and doping concentration of the third semiconductor region 14, or it can be different from it, which is not limited here. The sixth semiconductor region 19 is extended in the direction from the first surface 111 to the second surface 113. Optionally, the sixth semiconductor region 19 is a deep P-well type, and is spaced apart from the second semiconductor region 13115 in the lateral direction, and is adjacent to the isolation region 18 in the lateral direction, which can play a role in isolating the carriers introduced by the surface defects of the isolation region 18 from entering the avalanche region, thereby combining with the setting of the gettering region 16 to further effectively reduce the dark count rate (DCR).

[0066] Please refer to Figure 1 In a possible embodiment of the present application, the isolation region 18 extends from the first surface 111 to the second surface 113, the fourth semiconductor region 15 is located on the inner peripheral side of the isolation region 18, and the depth of the sixth semiconductor region 19 on the side away from the first surface 111 is greater than the depth of the third semiconductor region 14 on the side away from the first surface 111;

[0067] And / or, in a direction parallel to the first surface 111 , a distance between the second semiconductor region 13 and the sixth semiconductor region 19 is D3 , wherein D3 ≥ 0.3 μm.

[0068] In this embodiment, the isolation region 18 is set to a deep trench type, so that the two pixels can be completely isolated from each other, further improving the detection performance of the avalanche photodiode 1. At the same time, the extension depth of the sixth semiconductor region 19 is greater than the extension depth of the third semiconductor region 14, so that the influence of non-photogenerated carriers on avalanche breakdown can be effectively reduced, further reducing the dark count rate (DCR) of the device. Optionally, the fourth semiconductor region 15 is arranged in a ring shape inside the isolation region 18, which is also convenient for ohmic contact connection.

[0069] On the basis of limiting or not limiting the extension depth of the isolation region 18 and the sixth semiconductor region 19, since the distance between the first semiconductor region 12 and the fourth semiconductor region 15 is significantly increased due to being on different surfaces, in order to further reduce the influence of defect carriers in the isolation region 18 on the main junction, the distance between the sixth semiconductor region 19 and the second semiconductor region 13 should not be too small. Optionally, the value range of the distance D3 between the sixth semiconductor region 19 and the second semiconductor region 13 is set to be greater than or equal to 0.3μm, for example, 0.35μm, 0.4μm, 0.45μm, etc., and the maximum value needs to be designed according to the size of the avalanche photodiode 1. In this way, the probability of edge breakdown can be effectively reduced on the basis of reducing the lateral size of the avalanche photodiode 1 and facilitating its miniaturization.

[0070] In one example, the doping concentration of the epitaxial layer 11 may show a gradient decreasing trend in the direction from the second surface 113 to the first surface 111, that is, the doping concentration is high near the second surface 113, and the doping concentration is low at a certain distance from the second surface 113, thereby making it easier to form a fourth semiconductor region 15 with a heavy doping concentration on the second surface 113, having a certain transition effect, and improving the structural stability of the avalanche photodiode 1.

[0071] Please refer to Figure 3 In a possible embodiment of the present application, the avalanche photodiode 1 also includes a seventh semiconductor region 20, the seventh semiconductor region 20 has a first doping type, and the doping concentration is less than the doping concentration of the fourth semiconductor region 15, the seventh semiconductor region 20 extends from the second surface 113 to the first surface 111, and is covered on the periphery of the fourth semiconductor region 15.

[0072] In this embodiment, the seventh semiconductor region 20 (PW3) is formed by injecting B element at the position and surrounding position of the fourth semiconductor region 15. The doping concentration of the seventh semiconductor region 20 is less than that of the fourth semiconductor region 15, and can be the same or similar to the doping concentration of the third semiconductor region 14, or different, which is not limited here. The seventh semiconductor region 20 can not only prevent the defect carriers of the isolation region 18 from entering the avalanche region of the main junction, further reducing the DCR; it also regulates the electric field distribution of the gettering region 16, further reducing the probability of defect carriers of the gettering region 16 entering the avalanche region of the main junction, and further reducing the DCR. At the same time, the concentration of the fourth semiconductor region 15 is relatively high, and the setting of the seventh semiconductor region 20 can also provide a transition effect between the fourth semiconductor region 15 and the epitaxial layer 11, which can conveniently guide the anode potential to the bottom of the P-type epitaxial layer 11. The seventh semiconductor region 20 can be set based on the setting of the fifth semiconductor, or it can be set without setting the fifth semiconductor.

[0073] When the sixth semiconductor region 19 is arranged around the periphery of the second semiconductor region 13 and the isolation region 18 is arranged around the outer periphery of the sixth semiconductor region 19, the distance between the seventh semiconductor region 20 and the sixth semiconductor region 19 in the depth direction can be adjusted. On the basis of satisfying the process, the distance between the two can be made small enough, so that the sixth semiconductor region 19 and the seventh semiconductor region 20 can not only achieve complete isolation of the isolation region 18, but also expand the avalanche region of the main junction to both sides of the third semiconductor region 14 of the main junction, thereby further improving the detection efficiency of the avalanche photodiode 1.

[0074] In a possible embodiment of the present application, the implanted element of the gettering region 16 is oxygen.

[0075] In this embodiment, the gettering region 16 is formed by injecting oxygen, and compared with the gettering sites formed by carbon, germanium and other elements, the gettering sites formed by oxygen injection have higher metal gettering ability, thereby further improving the gettering sufficiency of the gettering region 16. The concentration of the oxygen element here is not limited, and should not be too low or too high, so as to improve the gettering effect while reducing the impact on the incident light.

[0076] In a possible embodiment of the present application, the implantation concentration range of the oxygen element in the epitaxial layer 11 is less than 10 17 cm -3 .

[0077] In this embodiment, the implantation concentration of oxygen element can be 1*10 16 cm -3 , 3*10 16 cm -3 , 5*10 16 cm -3 ,7*10 16 cm -3 、9*10 16 cm -3 The gettering region 16 formed by the oxygen element in this concentration range has almost no effect on the incident light of long wavelength, that is, it will not affect the incident light entering the main junction and its vicinity, which can improve the light utilization rate. The setting of the gettering region 16 can enable the avalanche photodiode 1 to select the second surface as the light incident surface, thereby improving the detection efficiency due to the improvement of the geometric filling factor.

[0078] In a possible embodiment of the present application, the second surface 113 is a light incident surface.

[0079] In this embodiment, the second surface 113 is selected as the light incident surface, and the avalanche photodiode 1 is a back-illuminated structure. The fourth semiconductor that does not fully cover the second surface 113 can increase the contact area with light, thereby improving the geometric filling factor of the avalanche photodiode 1 and absorbing more photons, thereby improving the elastic efficiency.

[0080] In other examples, the first surface 111 may also be selected as the light incident surface.

[0081] In a possible embodiment of the present application, the first doping type is P type, and the second doping type is N type.

[0082] In this embodiment, the first doping type is set to P type, then the epitaxial layer 11 is a P type epitaxial layer 11, the third semiconductor region 14 is a P type well, the second semiconductor region 13 is an N type well, the first semiconductor region 12 is N+, the fourth semiconductor region 15 is P+, and the sixth semiconductor region 19 is also a P type well, so that when the avalanche photodiode 1 is above the avalanche breakdown voltage, the photogenerated carriers drift to the main junction position under the action of the electric field, and since the collision ionization rate and mobility of electrons are higher than those of holes, a higher photon detection efficiency can be obtained. In other embodiments, the first doping type is N type and the second doping type is P type.

[0083] Please refer to Figure 1 In a possible embodiment of the present application, in a direction parallel to the first surface 111 , a distance between an edge of the second semiconductor region 13 and an edge of the first semiconductor region 12 is D4 , wherein D4 ≥ 0.2 μm.

[0084] In this embodiment, in the lateral direction, the cross-sectional area of ​​the second semiconductor region 13 is greater than the cross-sectional area of ​​the first semiconductor region 12, that is, a spacing is formed between the edge of the second semiconductor region 13 and the edge of the first semiconductor region 12, and the spacing should not be too small. Therefore, the range value of the spacing D4 is set to be greater than or equal to 0.2μm, for example, 0.25μm, 0.3μm or 0.35μm, etc., so as to enhance the effect of suppressing edge breakdown. Of course, the upper limit of the range value of the spacing D4 can be adjusted according to the overall size of the avalanche photodiode 1. On the basis of ensuring the position between the various components and the setting of the overall minimum size, the value of the spacing D4 can be increased as much as possible.

[0085] In the horizontal direction, the cross-sectional area of ​​the third semiconductor region 14 needs to be smaller than the cross-sectional area of ​​the second semiconductor region 13, while the cross-sectional area of ​​the third semiconductor region 14 and the cross-sectional area of ​​the first semiconductor region 12 are not limited and can be designed to be close to each other to obtain a larger avalanche zone size.

[0086] In addition, each component of the avalanche photodiode 1 can be arranged symmetrically with respect to a longitudinal surface of the epitaxial layer 11, thereby improving the uniformity of the electric field distribution and the detection efficiency. The electrode lead-out and the back-end processing circuit can be made on another wafer, and the signal readout can be realized by stacking the wafers.

[0087] When the avalanche photodiode 1 of the present invention uses the fifth semiconductor region 17, the sixth semiconductor region 19 and the seventh semiconductor region 20 that wrap the gettering region 16, the dark count rate can be systematically reduced from the perspectives of getting rid of metal contamination and isolating defect carriers. Moreover, the gettering region 16 is close to the main junction, and can achieve full absorption of metal impurities under a low thermal budget, so it can adapt to miniaturized avalanche photodiodes 1.

[0088] The present invention further discloses a detector (not shown), the detector comprising a plurality of avalanche photodiodes 1 as described above, the plurality of avalanche photodiodes 1 being arranged in an array. Since the avalanche photodiode 1 of the detector comprises the structure of the avalanche photodiode 1 of any of the above embodiments, the beneficial effects brought about by any of the above embodiments are not described in detail here.

[0089] The substrate of the plurality of photodiodes can be an integrated structure, and can be divided by setting an isolation region 18 between two adjacent avalanche photodiodes 1, so as to facilitate processing. Of course, the external circuit of the detector can also be an integrated structure, that is, it is set as an integrated circuit, so as to serve as a structure for export and back-end processing, further simplifying the process and facilitating assembly.

[0090] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the concept of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. An avalanche photodiode, characterized in that: include: an epitaxial layer having a first doping type, the epitaxial layer being formed with a first surface and a second surface opposite to each other; a first semiconductor region having a second doping type, the first semiconductor region being disposed on the first surface and extending from the first surface to the second surface, the first semiconductor region being a cathode; a second semiconductor region having the second doping type, the second semiconductor region extending from the first surface to the second surface and wrapping around the periphery of the first semiconductor region, the doping concentration of the second semiconductor region being less than the doping concentration of the first semiconductor region; a third semiconductor region having the first doping type, the third semiconductor region extending from a side of the second semiconductor region away from the first surface toward the second surface, the third semiconductor region at least partially overlapping with the first semiconductor region in a direction from the first surface to the second surface, and forming a main junction with the second semiconductor region; a gettering region, the gettering region being disposed in the epitaxial layer and close to the second surface, the gettering region at least partially overlapping with the main junction in the direction from the first surface to the second surface, and being spaced apart from the third semiconductor region in the direction from the first surface to the second surface; as well as The fourth semiconductor region has the first doping type, the doping concentration of the fourth semiconductor region is greater than the doping concentration of the third semiconductor region, and is an anode. The fourth semiconductor region is arranged on the second surface, and there is a gap between the fourth semiconductor region and the doping region in a direction parallel to the first surface.

2. The avalanche photodiode according to claim 1, characterized in that A distance D1 is between a side of the gettering region facing away from the second surface and a side of the third semiconductor region facing the second surface, wherein D1 is less than 10 μm; And / or, in a direction parallel to the first surface, a distance between an edge of the gettering region and an edge of the fourth semiconductor region is D2, wherein D2 is less than 15 μm.

3. The avalanche photodiode according to claim 1, wherein: The avalanche photodiode further includes a fifth semiconductor region, the fifth semiconductor region has a second doping type, the doping concentration of the fifth semiconductor region is less than the doping concentration of the first semiconductor region, and the fifth semiconductor region is wrapped around the periphery of the doping region.

4. The avalanche photodiode according to claim 1, wherein: The avalanche photodiode also includes an isolation region and a sixth semiconductor region. The sixth semiconductor region has a first doping type and extends from the first surface to the second surface. The sixth semiconductor region is arranged around the edge of the second semiconductor region and is spaced apart from the second semiconductor region. The isolation region is arranged around the outer periphery of the sixth semiconductor region and is adjacent to the sixth semiconductor region.

5. The avalanche photodiode according to claim 4, characterized in that The isolation region extends from the first surface to the second surface, the fourth semiconductor region is located at the inner peripheral side of the isolation region, and the depth of the sixth semiconductor region away from the first surface is greater than the depth of the third semiconductor region away from the first surface; And / or, in a direction parallel to the first surface, a distance between the second semiconductor region and the sixth semiconductor region is D3, wherein D3 ≥ 0.3 μm.

6. The avalanche photodiode according to any one of claims 1 to 5, characterized in that The avalanche photodiode also includes a seventh semiconductor region, which has a first doping type and a doping concentration less than that of the fourth semiconductor region. The seventh semiconductor region extends from the second surface to the first surface and covers the periphery of the fourth semiconductor region.

7. The avalanche photodiode according to any one of claims 1 to 5, characterized in that The implantation element of the gettering region is oxygen.

8. The avalanche photodiode according to claim 7, characterized in that The implantation concentration of oxygen in the epitaxial layer is less than 10 17 cm -3 .

9. The avalanche photodiode according to claim 8, characterized in that The second surface is a light incident surface.

10. The avalanche photodiode according to any one of claims 1 to 5, characterized in that The first doping type is P type, and the second doping type is N type.

11. The avalanche photodiode according to any one of claims 1 to 5, characterized in that In a direction parallel to the first surface, a distance between an edge of the second semiconductor region and an edge of the first semiconductor region is D4, where D4≥0.2 μm.

12. A detector, characterized in that: The invention comprises a plurality of avalanche photodiodes according to any one of claims 1 to 11, wherein the plurality of avalanche photodiodes are arranged in an array.

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