Resist pattern inspection method, resist pattern manufacturing method, substrate sorting method, and semiconductor package substrate or printed wiring board manufacturing method

Abstract

The method for inspecting a resist pattern includes an appearance inspection step for inspecting the appearance of the resist pattern on the basis of light emitted from a substrate on which the resist pattern is formed. The method for manufacturing a resist pattern includes: a resist pattern forming step of forming a resist pattern on a substrate; and a light-emitting material attachment step for attaching a light-emitting material to the conductor surface of the substrate. The substrate sorting method includes: an appearance inspection step of inspecting the appearance of a resist pattern on the basis of light emitted from a substrate on which the resist pattern is formed; and an evaluation step for evaluating the resist pattern on the basis of the appearance inspection in the appearance inspection step. The method for manufacturing a semiconductor package substrate or a printed wiring board includes a conductor pattern forming step of forming a conductor pattern by etching or plating the substrate for which the evaluation of the resist pattern in the substrate sorting method satisfies a reference.

Description

Technical Field

[0001] The present invention relates to a method for inspecting a resist pattern, a method for manufacturing a resist pattern, a substrate sorting method, and a method for manufacturing a semiconductor package substrate or a printed wiring board. Background Art

[0002] In the case of manufacturing a semiconductor package substrate or a printed wiring board, first, a photosensitive layer is laminated on the substrate. Then, a prescribed portion of the photosensitive layer is irradiated with active light through a photomask to cure the exposed portion. Then, after peeling off the support, the unexposed portion of the photosensitive layer is removed with a developer, thereby forming a resist pattern on the substrate. Next, using the formed resist pattern as a mask, an etching process or a plating process is performed on the substrate with the resist pattern formed, thereby forming a conductor pattern on the substrate, and finally the cured portion (resist pattern) of the photosensitive layer is peeled off from the substrate.

[0003] In the manufacturing process of such semiconductor package substrates or printed wiring boards, if the exposure of active light is blocked by foreign matter attached to the photomask or the photosensitive layer, defects may occur in the resist pattern, thereby causing disconnection or short circuit in the conductor pattern. Therefore, conventionally, disconnection or short circuit in the conductor pattern has been checked by visual inspection of the conductor pattern.

[0004] Previous technical literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Publication No. 2005-207802 Summary of the invention

[0007] Technical issues to be solved by the invention

[0008] By performing a visual inspection on a resist pattern before forming a conductor pattern, it is possible to detect defects at an earlier stage in the manufacture of a semiconductor package substrate or a printed wiring board. In addition, by evaluating the yield of resist pattern formation, it is possible to help improve resist pattern formation. Conventionally, a scanning electron microscope (hereinafter also referred to as "SEM") is used to perform a visual inspection on a resist pattern (for example, refer to Patent Document 1).

[0009] However, the inspection using SEM is limited to 1 mm 2 Therefore, it takes a lot of time to inspect the resist pattern of the semiconductor package substrate or the printed wiring board as a whole using SEM. In addition, the inspection accuracy varies greatly depending on the inspector and the SEM used during the inspection.

[0010] Therefore, an object of the present invention is to provide a resist pattern inspection method, a resist pattern manufacturing method, a substrate sorting method, and a semiconductor package substrate or printed wiring board manufacturing method that can evaluate the resist pattern with high accuracy in a short time.

[0011] Means for solving technical problems

[0012] [1] The resist pattern inspection method of the present invention includes an appearance inspection step of inspecting the appearance of the resist pattern based on light emission from a substrate on which the resist pattern is formed.

[0013] In this resist pattern inspection method, the resist pattern is visually inspected based on light emission from a substrate on which the resist pattern is formed. Therefore, defects of the resist pattern can be detected in a short time with high accuracy compared to visual inspection using an SEM.

[0014] [2] In the appearance inspection step of the resist pattern inspection method described in [1], the contour of the resist pattern may be detected based on the light emission from the substrate, and the appearance inspection of the resist pattern may be performed based on the detected contour. In this resist pattern inspection method, the contour of the resist pattern detected based on the light emission from the substrate is used as the appearance inspection of the resist pattern, thereby enabling the appearance inspection of the resist pattern to be appropriately performed.

[0015] [3] In the appearance inspection step of the resist pattern inspection method described in [2], the detected contour can be compared with the pattern data used to form the resist pattern. In this resist pattern inspection method, as a visual inspection of the resist pattern, the detected contour is compared with the pattern data used to form the resist pattern, thereby enabling defects in the resist pattern to be detected with high accuracy.

[0016] [4] In the appearance inspection step of the resist pattern inspection method described in [2], the line width of the resist pattern can be measured based on the detected contour. In this resist pattern inspection method, as the appearance inspection of the resist pattern, the line width of the resist pattern is measured based on the detected contour, thereby enabling the formation state of the resist pattern to be evaluated.

[0017] [5] In the inspection method of the resist pattern described in any one of [1] to [4], it may further include: a resist pattern forming step of forming a resist pattern on a substrate; and a light-emitting material attaching step of attaching the light-emitting material to the conductor surface of the substrate. In the inspection method of the resist pattern, the light-emitting material is attached to the conductor surface of the substrate, thereby enhancing the intensity of the light emission from the conductor surface of the substrate, thereby increasing the contrast between the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is not formed and the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is formed. Therefore, the detection accuracy of the contour of the resist pattern based on the light emission from the substrate can be improved.

[0018] [6] In the resist pattern forming step in the resist pattern inspection method described in [5], a resist pattern having a thickness of 0.05 μm or more and 500 μm or less can be formed. In the resist pattern inspection method, a resist pattern having a thickness of 0.05 μm or more and 500 μm or less is formed, thereby preventing the resist pattern from becoming too thick, and increasing the contrast between the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is not formed and the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is formed. Therefore, the detection accuracy of the contour of the resist pattern based on the light emission from the substrate can be improved.

[0019] [7] The method for manufacturing a resist pattern of the present invention includes: a resist pattern forming step of forming a resist pattern on a substrate; and a light emitting material attaching step of attaching a light emitting material to a conductive surface of the substrate.

[0020] In the manufacturing method of the resist pattern, the luminescent material is attached to the conductor surface of the substrate, thereby enhancing the luminescence intensity from the conductor surface of the substrate, so that the contrast between the luminescence from the area of ​​the conductor surface of the substrate where the resist pattern is not formed and the luminescence from the area of ​​the conductor surface of the substrate where the resist pattern is formed becomes larger. Therefore, for example, in the case of detecting the contour of the resist pattern based on the luminescence from the substrate where the resist pattern is formed, the detection accuracy can be improved. In addition, in the case of measuring the line width of the resist pattern, it is easy to focus on the surface of the resist pattern or the contour of the resist pattern.

[0021] [8] In the resist pattern forming step in the resist pattern manufacturing method described in [7], a resist pattern having a thickness of 0.05 μm or more and 500 μm or less can be formed. In the resist pattern manufacturing method, a resist pattern having a thickness of 0.05 μm or more and 500 μm or less is formed, thereby preventing the resist pattern from becoming too thick and increasing the contrast between the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is not formed and the light emission from the area of ​​the conductor surface of the substrate where the resist pattern is formed. Therefore, for example, the detection accuracy of the contour of the resist pattern based on the light emission from the substrate can be improved.

[0022] [9] The substrate sorting method of the present invention includes: an appearance inspection step of performing an appearance inspection on a resist pattern based on light emission from a substrate on which a resist pattern is formed; and an evaluation step of evaluating the resist pattern based on the appearance inspection in the appearance inspection step.

[0023] In this substrate sorting method, since the resist pattern is evaluated by visual inspection of the resist pattern based on light emission from the substrate, the substrate can be sorted in a short time with high accuracy compared to visual inspection using an SEM.

[0024]

[10] In the evaluation step of the substrate sorting method described in [9], the resist pattern can be evaluated based on the number or shape of defects in the resist pattern. In this substrate sorting method, the resist pattern is evaluated based on the number or shape of defects in the resist pattern, thereby enabling appropriate evaluation of the substrate.

[0025]

[11] In the appearance inspection process of the substrate sorting method described in [9] or

[10] , a luminescent material may be attached to the conductor surface of the substrate to be inspected. In the appearance inspection process of the substrate sorting method, a luminescent material is attached to the conductor surface of the substrate to be inspected, so that the contrast between the luminescence from the area of ​​the conductor surface of the substrate where the resist pattern is not formed and the luminescence from the area of ​​the conductor surface of the substrate where the resist pattern is formed becomes larger. Therefore, the appearance inspection of the resist pattern can be performed with high precision.

[0026]

[12] The method for manufacturing a semiconductor package substrate or a printed wiring board of the present invention includes a conductor pattern forming step of etching or plating a substrate whose resist pattern evaluation meets a benchmark in the substrate sorting method described in any one of [9] to

[11] to form a conductor pattern.

[0027] In the manufacturing method of the semiconductor package substrate or printed wiring board, the substrate whose anti-etching pattern evaluation in the above-mentioned substrate sorting method meets the benchmark is etched or plated to form a conductor pattern, thereby being able to suppress the occurrence of adverse conditions such as disconnection or short circuit of the conductor pattern.

[0028] Effects of the Invention

[0029] According to the present invention, a resist pattern can be evaluated in a short time with high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 middle, Figure 1 (a) is a schematic perspective view for explaining a photosensitive layer forming step in a resist pattern forming step, Figure 1 (b) is a schematic perspective view for explaining an exposure step in a resist pattern forming step, Figure 1 (c) is a schematic perspective view for explaining a development step in the resist pattern forming step.

[0031] Figure 2 middle, Figure 2 (a) Figure 2 (b) and Figure 2 (c) is a schematic perspective view for explaining formation of a conductor pattern based on a resist pattern having defects.

[0032] Figure 3 This is a schematic perspective view for explaining the appearance inspection process.

[0033] Figure 4 It is a schematic diagram for explaining light emission from a substrate.

[0034] Figure 5 It is a schematic diagram for explaining pattern data.

[0035] Figure 6 middle, Figure 6 (a) Figure 6 (b) and Figure 6 (c) is a schematic perspective view for explaining formation of a conductor pattern. DETAILED DESCRIPTION

[0036] Hereinafter, embodiments of the resist pattern inspection method, resist pattern manufacturing method, substrate sorting method, and semiconductor package substrate or printed wiring board manufacturing method of the present invention are described with reference to the drawings. In addition, in all the drawings, the same or corresponding parts are marked with the same symbols. Moreover, "A or B" only needs to include either A or B, and may also include both.

[0037] [Resist pattern inspection method]

[0038] The inspection method of the resist pattern of the embodiment includes an appearance inspection process of performing an appearance inspection on the resist pattern based on the luminescence from the substrate on which the resist pattern is formed. The inspection method of the resist pattern may include a resist pattern forming process of forming the resist pattern on the substrate before the appearance inspection process. Furthermore, the inspection method of the resist pattern may include a light-emitting material attaching process of attaching the light-emitting material to the conductor surface of the substrate. Furthermore, the inspection method of the resist pattern may also include other processes. In this specification, the term "process" includes not only independent processes, but also includes this term if the desired effect of the process can be achieved even if it cannot be clearly distinguished from other processes. The resist pattern is called a photocured material pattern of a photosensitive resin composition, also known as a relief pattern.

[0039] <Resist pattern forming step>

[0040] like Figure 1 As shown, the resist pattern forming step includes a photosensitive layer forming step of laminating a photosensitive layer on a substrate (refer to Figure 1 (a)) an exposure step of irradiating a predetermined portion of the photosensitive layer with active light to form a photocured portion (refer to Figure 1 (b)) and a developing step of removing the photosensitive layer from the substrate except for the predetermined portion (reference Figure 1 (c) The resist pattern forming step may include other steps as necessary.

[0041] (Photosensitive layer forming step)

[0042] like Figure 1 As shown in (a), in the photosensitive layer forming step, a photosensitive layer 2 and a support 3 are formed on a substrate 1. The substrate 1 includes, for example, an insulating layer 1a and a conductive layer 1b formed on the insulating layer 1a. The photosensitive layer 2 is formed on the conductive layer 1b of the substrate 1. The conductive layer 1b is, for example, electroless copper plating.

[0043] The photosensitive layer 2 is a layer formed of a photosensitive resin composition whose properties are changed by irradiation with light (for example, photocuring). The photosensitive resin composition forming the photosensitive layer 2 contains, for example, a binder polymer, a photopolymerizable compound, and a photopolymerization initiator. The photosensitive resin composition forming the photosensitive layer 2 may also contain a photosensitizer, a polymerization inhibitor, or other components as required. The photosensitive resin composition forming the photosensitive layer 2 may contain, for example, dyes such as malachite green, Victoria blue, brilliant green, and methyl violet, photochromic agents such as tribromophenyl sulfone, colorless crystal violet, diphenylamine, benzylamine, triphenylamine, diethylaniline, and o-chloroaniline, thermochromic inhibitors, plasticizers such as p-toluenesulfonamide, pigments, fillers, defoamers, flame retardants, adhesion enhancers, leveling agents, peeling promoters, antioxidants, fragrances, imaging agents, thermal crosslinking agents, and other additives.

[0044] As the support 3 , for example, a heat-resistant and solvent-resistant polymer film (support film) such as polyester such as polyethylene terephthalate (PET) or polyolefin such as polypropylene and polyethylene can be used.

[0045] As a method for forming the photosensitive layer 2 and the support 3 on the substrate 1, there is, for example, a method using a photosensitive element (not shown). The photosensitive element, for example, includes a support, a photosensitive layer, and a protective layer in sequence. After removing the protective layer, the photosensitive layer of the photosensitive element is heated and pressed against the substrate 1, thereby forming the photosensitive layer 2 and the support 3 on the substrate 1. Thus, a laminate 4 including the substrate 1, the photosensitive layer 2, the support 3, and a support film (not shown) in sequence is obtained. In addition, an intermediate layer or the like may be arranged between the support 3 and the photosensitive layer 2.

[0046] (Exposure process)

[0047] like Figure 1 As shown in (b), in the exposure process, the photosensitive layer 2 is exposed to active light via the support 3. As a result, the exposed portion irradiated with active light is photocured to form a photocured portion 2a (latent image). As an exposure method, a known exposure method can be applied, for example, a method of irradiating active light in an image form via a photomask 5 called an original image (mask exposure method), an LDI (Laser Direct Imaging) exposure method, or a method of irradiating an image form via a lens using active light projected with an image of a photomask (projection exposure method), etc.

[0048] (Development Process)

[0049] like Figure 1 As shown in (c), in the development process, the uncured portion 2b of the photosensitive layer 2 is removed from the substrate 1. Through the development process, a resist pattern 6 composed of the photocured portion 2a of the photosensitive layer 2 is formed on the substrate 1. In addition, on the surface of the conductor layer 1b of the substrate 1, there are formed an area 1c where the resist pattern 6 is not formed and an area 1d where the resist pattern 6 of the conductor surface of the substrate 1 is formed. The area 1c is also an area on the surface of the conductor layer 1b that is not covered by the resist pattern 6. The area 1d is also an area on the surface of the conductor layer 1b that is covered by the resist pattern 6.

[0050] The thickness of the resist pattern 6 formed on the substrate 1 can be set to, for example, 0.05 μm or more, 0.1 μm or more, 1 μm or more, or 5 μm or more. Furthermore, the thickness of the resist pattern 6 formed on the substrate 1 can be set to, for example, 500 μm or less, 300 μm or less, 100 μm or less, or 60 μm or less. The minimum and maximum values ​​of the thickness of these resist patterns 6 can be appropriately combined. For example, the thickness of the resist pattern 6 formed on the substrate 1 can be set to 0.05 μm or more and 500 μm or less, 0.1 μm or more and 300 μm or less, 1 μm or more and 100 μm or less, or 5 μm or more and 60 μm or less. The thickness of the resist pattern 6 is the height relative to the substrate 1 in a direction perpendicular to the main surface of the substrate 1.

[0051] The resist pattern 6 formed on the substrate 1 has, for example, luminescence. Luminescence is also called cold light (LUMINESCENCE), for example, it means that when irradiated with excitation light such as inspection light, it absorbs excitation light and emits light. And, luminescence refers to light emitted in this way. As luminescence, there are fluorescence and phosphorescence. Fluorescence is luminescence that stops immediately if the irradiation of excitation light stops. Phosphorescence is luminescence that continues to emit light even if the irradiation of light such as inspection light stops. Having luminescence means having the property of such luminescence, that is, having the property of absorbing excitation light and emitting light when irradiated with excitation light. In addition, the resist pattern 6 may not have luminescence.

[0052] <Light-emitting material attachment process>

[0053] In the luminescent material attaching step, in order to increase the luminescent intensity of the substrate 1, the luminescent material is attached to the conductor surface of the substrate 1. The conductor surface of the substrate 1 is, for example, the surface of the conductor layer 1b on the opposite side to the insulating layer 1a, and is the surface on the side where the resist pattern 6 of the conductor layer 1b is formed. Therefore, in the luminescent material attaching step, the luminescent material is attached to the surface of the conductor layer 1b of the substrate 1. The luminescent material is a material that emits light when irradiated with excitation light. In the case where the luminescent material is a fluorescent material, the luminescence becomes fluorescence. In the case where the luminescent material is a phosphorescent material, the luminescence becomes phosphorescence. As the luminescent material (fluorescent material or phosphorescent material), for example, a luminescent pigment (fluorescent pigment or phosphorescent pigment) that emits light when irradiated with excitation light can be used. As the luminescent pigment, for example, xanthene pigment, coumarin pigment, pyrazoline pigment, dipyrromethene dispromethene pigment, anthracene pigment, pyrene pigment, perylene pigment, Ro fin pigment (also called Ro fin, Ro fin compound, etc.) and the like can be used. And, as the luminescent material, for example, a fluorescent dye liquid containing a luminescent pigment can be used. The light emitting material attaching step can be performed at any time, for example, before the resist pattern forming step, during the resist pattern forming step, or after the resist pattern forming step.

[0054] In the luminescent material attachment process, for example, it can be immersed in a fluorescent dye liquid with substrate 1 as the luminescent material. As the fluorescent dye liquid, for example, saturated solutions of xanthene pigments, coumarin pigments, pyrazoline pigments, dipyrromethene dipromethene pigments, anthracene pigments, pyrene pigments, perylene pigments, and Rofin pigments and their mixed solvents can be cited. The above-mentioned pigments, for example, can also contain imidazole, pyridine, oxazole, pyrazole, thiazole, triazine, triazole, benzotriazole, 5-carboxybenzotriazole, tetrazole, 5-aminotetrazolyl, thiol, thiophene, and benzoxazolylthiophene as substituents. These substituents can be used alone or in combination of two or more. For example, a saturated aqueous solution of Rhodamine B (F UJIFILM Wako Pure Chemical Corporation) as a xanthene pigment can be used. As the solvent, for example, water, methanol, ethanol, acetone, methyl ethyl ketone, methyl cellosolve, ethyl cellosolve, toluene, N,N-dimethylformamide, propylene glycol monomethyl ether, and mixed solvents thereof can be cited. At this time, the entire substrate 1 can be immersed in the fluorescent dye liquid, or a part of the substrate 1 can be immersed in the fluorescent dye liquid in such a manner that the entire substrate 1 is immersed in the fluorescent dye liquid. Moreover, for example, the fluorescent dye liquid can be dripped onto the substrate 1 on which the resist pattern 6 is formed. At this time, the fluorescent dye liquid can be dripped onto the entire substrate 1, or a part of the substrate 1 on which the resist pattern 6 is formed can be dripped onto the entire substrate 1. Moreover, for example, in the developing step in the resist pattern forming step, a luminescent material can be added to the developing solution and the rinsing solution for removing the uncured portion 2b of the photosensitive layer 2 from the substrate 1. After the fluorescent dye is attached to the conductor surface of the substrate 1, the fluorescent dye liquid is removed from the area other than the conductor surface of the substrate 1. As a method of removing the fluorescent dye liquid, for example, after the fluorescent dye is attached to the conductor surface of the substrate 1, it can be thoroughly washed with water and then air-dried.

[0055] Before being immersed in the fluorescent dyeing liquid with the substrate 1 as the luminescent material, the conductor surface of the substrate 1 can also be treated with a rust inhibitor. That is, before the luminescent material attachment process, a rust inhibitor attachment process of attaching the rust inhibitor to the conductor surface of the substrate 1 can also be performed. As the rust inhibitor, for example, imidazole, imidazole derivatives, pyridine, pyridine derivatives, oxazole, oxazole derivatives, pyrazole, pyrazole derivatives, thiazole, thiazole derivatives, triazine, triazine derivatives, triazole, triazole derivatives, benzotriazole, benzotriazole derivatives, 5-carboxybenzotriazole, 5-carboxybenzotriazole derivatives, tetrazole, tetrazole derivatives, 5-aminotetrazole, 5-aminotetrazole derivatives, thiol, thiol derivatives, thiophene, thiophene derivatives, benzoxazolylthiophene and benzoxazolylthiophene derivatives can be cited. The rust inhibitor can be diluted with a solvent. These rust inhibitors can be used alone or in combination of two or more. As the solvent, for example, water, methanol, ethanol, acetone, methyl ethyl ketone, methyl cellosolve, ethyl cellosolve, toluene, N,N-dimethylformamide, propylene glycol monomethyl ether and mixed solvents thereof can be cited. At this time, the entire substrate 1 can be immersed in the rust inhibitor, or a part of the substrate 1 can be immersed in the rust inhibitor in such a manner that the entire substrate 1 is immersed in the rust inhibitor. Moreover, for example, the rust inhibitor can also be dripped on the substrate 1 on which the resist pattern 6 is formed. At this time, the rust inhibitor can be dripped on the entire substrate 1, or a part of the substrate 1 on which the resist pattern 6 is formed can be dripped in such a manner that the rust inhibitor is dripped on the entire substrate 1. Moreover, for example, in the developing process in the resist pattern forming process, the rust inhibitor can be added to the developer and the rinse solution for removing the uncured portion 2b of the photosensitive layer 2 from the substrate 1. After the rust inhibitor is attached to the conductor surface of the substrate 1, the rust inhibitor is removed from the area other than the substrate 1. As a method of removing the rust preventive, for example, after the rust preventive is attached to the conductor surface of the substrate 1 , it may be sufficiently washed with water and then air-dried.

[0056] The luminescent material and the rust inhibitor may be mixed, and the treatment of the conductor surface of the substrate 1 by the rust inhibitor and the treatment of the conductor surface of the substrate 1 by the luminescent material may be performed at the same time. That is, the luminescent material attachment step and the rust inhibitor attachment step may be performed together. Alternatively, only one of the treatment of the conductor surface of the substrate 1 by the rust inhibitor and the treatment of the conductor surface of the substrate 1 by the luminescent material may be performed.

[0057] <Appearance inspection process>

[0058] In the appearance inspection process, the resist pattern 6 is inspected for appearance based on light emission (fluorescence or phosphorescence) from the substrate 1 on which the resist pattern 6 is formed. That is, in the appearance inspection process, the resist pattern 6 is inspected for appearance based on light emitted from the substrate 1.

[0059] In the above exposure process, if the exposure of the active light is caused by foreign matter 7 attached to the photomask 5, the support 3 or the photosensitive layer 2 (refer to Figure 1 ) and the like, a defect 8 may be generated on the resist pattern 6. In more detail, if Figure 2 (a) Figure 2 (b) and Figure 2 As shown in (c), when manufacturing a semiconductor package substrate or a printed wiring board, a substrate 1 having a resist pattern 6 is subjected to an etching process or a plating process to form a conductor pattern 9. Therefore, if a defect 8 exists on the resist pattern 6, a disconnection or a short circuit may occur on the conductor pattern 9 formed by the etching process or the plating process. In addition, in the exposure process, the line width of the resist pattern 6 may become thicker or thinner depending on the exposure state of the active light.

[0060] Therefore, in the appearance inspection process, the resist pattern 6 is visually inspected to detect defects before forming the conductor pattern. In the appearance inspection process, for example, the contour of the resist pattern 6 is detected based on the light emission from the substrate 1, and the resist pattern 6 is visually inspected based on the detected contour.

[0061] like Figure 3 As shown, first, inspection light as excitation light is emitted to the substrate 1 on which the resist pattern 6 is formed, and the light emitted from the substrate 1 is received. That is, the light emitted by the substrate 1 is received. The wavelength of the inspection light can be set to, for example, less than 390nm, less than 380nm, or less than 370nm. In addition, the wavelength of the inspection light can be set to, for example, more than 190nm, more than 250nm, or more than 300nm. The minimum and maximum values ​​of these wavelengths can be appropriately combined. For example, the wavelength of the inspection light can be set to less than 390nm and more than 190nm, less than 380nm and more than 250nm, or less than 370nm and more than 300nm. In addition, in the light source of the inspection light, a carbon arc lamp, a mercury vapor arc lamp, a high-pressure mercury lamp, an ultra-high-pressure mercury lamp, a xenon lamp, a gas laser such as an argon laser, a solid laser such as a YAG laser, a semiconductor laser, an LED, etc. can be used, and only the light of the wavelength of the above-mentioned inspection light can be used through a filter. The wavelength region for sensing luminescence can be changed arbitrarily, for example, it can be a visible light of 400nm to 800nm. Regarding the wavelength region for luminescence sensing, it can be set to 400nm to 500nm blue light, 500nm to 600nm green light, or 600nm to 800nm ​​red light. The wavelength can be used in one region alone or in combination of two or more regions. In the appearance inspection process, the light receiving region of the substrate 1 that receives the luminescence can be set to 1cm, for example. 2 Above and 2500cm 2 Below, 5cm 2 Above and 1200cm 2Below, 25cm 2 Over 600cm 2 the following.

[0062] Then, if Figure 3 and Figure 4 As shown, the contour 10 of the resist pattern 6 is determined based on the contrast between the light emission from the area 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the area 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. For example, in the light-receiving image of the light emission, a boundary where the contrast such as brightness or chromaticity becomes large is detected. And the detected boundary is determined as the contour 10 of the resist pattern 6. In the detection of the contour 10 of the resist pattern 6 based on the light emission from the substrate 1, for example, an optical automatic appearance inspection device such as AOIOrbotech Ultra Dimension 800 (manufactured by Orbotech Ltd., product name) can be used.

[0063] As appearance inspections of the resist pattern 6, for example, there can be cited inspections for investigating whether the resist pattern 6 has defects 8, inspections for investigating the shape, position, size, etc. (hereinafter also referred to as "shape, etc.") of the defects 8 of the resist pattern 6, inspections for investigating the shape of the resist pattern 6, or inspections for measuring the line width of the resist pattern 6.

[0064] In the inspection for checking whether the resist pattern 6 has a defect 8, for example, Figure 4 and Figure 5 As shown, the contour 10 of the resist pattern 6 detected based on the light emission from the substrate 1 is compared with the pattern data 11 used to form the resist pattern 6 in the resist pattern forming process. As the pattern data 11, for example, CAD data of the resist pattern 6 can be used. Then, with respect to the pattern data 11, a portion 10a different from the detected contour 10 is detected as a defect 8 of the resist pattern 6. Then, the number of the detected defects 8 is calculated.

[0065] In the inspection for investigating the shape of the defect 8 of the resist pattern 6, for example, Figure 4 and Figure 5 As shown, the contour 10 of the resist pattern 6 detected based on the light emission from the substrate 1 is compared with the pattern data 11 used to form the resist pattern 6 in the resist pattern forming process. Then, a portion 10a different from the detected contour 10 is detected as a defect 8 of the resist pattern 6 with respect to the pattern data 11. Then, based on the contour of the detected defect 8, the shape of the detected defect 8 and the like are investigated.

[0066] In the inspection to check the shape of the resist pattern 6, for example, Figure 4 and Figure 5As shown, the contour 10 of the resist pattern 6 detected based on the light emission from the substrate 1 is compared with the pattern data 11 used to form the resist pattern 6 in the resist pattern forming step. Then, the degree of difference between the shape of the resist pattern 6 and the pattern data 11 is examined.

[0067] In the inspection of measuring the line width of the resist pattern 6 , for example, the line width of the resist pattern 6 is measured by measuring the interval of the outline 10 of the resist pattern 6 detected based on the light emission from the substrate 1 .

[0068] [Method for producing resist pattern]

[0069] The method for manufacturing a resist pattern of the embodiment includes: a resist pattern forming step of forming a resist pattern 6 on a substrate 1; and a light-emitting material attaching step of attaching a light-emitting material to a conductor surface of the substrate 1. The resist pattern forming step of the method for manufacturing a resist pattern may be, for example, the same as the resist pattern forming step of the method for inspecting a resist pattern described above. Furthermore, the light-emitting material attaching step of the method for manufacturing a resist pattern may be, for example, the same as the light-emitting material attaching step of the method for inspecting a resist pattern described above. The method for manufacturing a resist pattern may include other steps.

[0070] [Substrate sorting method]

[0071] The substrate sorting method of the present embodiment includes: an appearance inspection step of performing an appearance inspection on the resist pattern 6 based on the luminescence from the substrate 1 on which the resist pattern 6 is formed; and an evaluation step of evaluating the resist pattern 6 based on the appearance inspection in the appearance inspection step. The appearance inspection step of the substrate sorting method may be, for example, the same as the appearance inspection step of the resist pattern inspection method described above. For example, a luminescent material may be attached to the conductor surface of the substrate to be inspected in the appearance inspection step of the substrate sorting method. The substrate sorting method may include other steps.

[0072] <Evaluation process>

[0073] In the evaluation step, the resist pattern 6 is evaluated based on a predetermined standard.

[0074] For example, when a visual inspection is performed in the visual inspection process to check whether the resist pattern 6 has defects 8, in the evaluation process, the resist pattern 6 is evaluated based on the number of defects 8 in the resist pattern 6. For example, in the evaluation process, if the number of defects 8 in the resist pattern 6 is less than a predetermined reference number, the resist pattern 6 is evaluated as good, and if the number of defects 8 in the resist pattern 6 is more than the predetermined reference number, the resist pattern 6 is evaluated as poor.

[0075] Furthermore, for example, when the shape of the defect 8 of the resist pattern 6 is inspected in the appearance inspection process, in the evaluation process, the resist pattern 6 is evaluated based on the size of the defect 8 of the resist pattern 6. For example, in the evaluation process, if the shape of the defect 8 of the resist pattern 6 is within a predetermined allowable range, it is evaluated as good, and if the shape of the defect 8 of the resist pattern 6 is outside the predetermined allowable range, it is evaluated as bad.

[0076] Furthermore, for example, when the inspection of investigating the shape of the resist pattern 6 is performed in the appearance inspection process, in the evaluation process, the resist pattern 6 is evaluated based on the shape of the resist pattern 6. For example, in the evaluation process, if the degree of difference between the shape of the resist pattern 6 and the pattern data 11 is within a predetermined allowable range, it is considered good, and if the degree of difference between the shape of the resist pattern 6 and the pattern data 11 is outside the predetermined allowable range, it is considered bad.

[0077] Furthermore, for example, when a visual inspection of measuring the line width of the resist pattern 6 is performed in the visual inspection process, in the evaluation process, the resist pattern 6 is evaluated based on the line width of the resist pattern 6. For example, in the evaluation process, if the line width of the resist pattern 6 is within a predetermined reference range, it is evaluated as good, and if the line width of the resist pattern 6 is outside the predetermined reference range, it is evaluated as bad.

[0078] [Method for manufacturing semiconductor package substrate or printed wiring board]

[0079] The manufacturing method of the semiconductor package substrate or printed wiring board of the present embodiment includes a conductor pattern forming process of etching or plating the substrate whose evaluation of the resist pattern in the above-mentioned substrate sorting method meets the benchmark to form a conductor pattern. That is, in the conductor pattern forming process, the substrate whose evaluation of the resist pattern in the substrate sorting method does not meet the benchmark will not be etched or plated to form a conductor pattern. The manufacturing method of the semiconductor package substrate or printed wiring board of the present embodiment may also include other processes such as the resist pattern removal process as needed. In addition, the manufacturing method of the semiconductor package substrate or printed wiring board is a method for manufacturing a semiconductor package substrate or a printed wiring board, and is a manufacturing method of a semiconductor package substrate or a manufacturing method of a printed wiring board. According to this manufacturing method, a semiconductor package substrate or a printed wiring board can be manufactured.

[0080] In the etching process, the resist pattern formed on the substrate having the conductor layer is used as a mask to etch away the conductor layer of the substrate that is not covered with the resist. After the etching process, the resist is removed by removing the resist pattern 6 to form a conductor pattern.

[0081] like Figure 6As shown in (a), in the plating process, the resist pattern 6 formed on the substrate 1 having the conductor layer 1b is used as a mask, and copper or solder is plated on the conductor layer 1b of the substrate 1 not covered by the resist. Figure 6 As shown in (b), after the plating process, the resist is removed by removing the resist pattern 6, as shown in FIG. Figure 6 As shown in (c), the conductor layer 1b covered with the resist is etched to form a conductor pattern 9. The plating method may be electrolytic plating or electroless plating, but electrolytic plating is preferred.

[0082] As described above, in the resist pattern inspection method of this embodiment, the resist pattern 6 is visually inspected based on the light emission from the substrate 1 on which the resist pattern 6 is formed. Therefore, compared with the visual inspection using SEM, the defect 8 of the resist pattern 6 can be detected in a short time with high accuracy.

[0083] Furthermore, in this resist pattern inspection method, as the appearance inspection of the resist pattern 6 , the appearance inspection of the resist pattern 6 can be appropriately performed by utilizing the profile 10 of the resist pattern 6 detected based on the light emission from the substrate 1 on which the resist pattern 6 is formed.

[0084] Furthermore, in this resist pattern inspection method, the detected outline 10 is compared with pattern data 11 for forming the resist pattern 6 as an appearance inspection of the resist pattern 6, thereby making it possible to detect defects 8 of the resist pattern 6 with high accuracy.

[0085] Furthermore, in this resist pattern inspection method, as the appearance inspection of the resist pattern 6 , the line width of the resist pattern 6 is measured based on the detected profile 10 , thereby making it possible to evaluate the formation state of the resist pattern 6 .

[0086] Furthermore, in this resist pattern inspection method, the light emitting material is attached to the conductor surface of the substrate 1, thereby increasing the light emission intensity from the conductor surface of the substrate, and thus increasing the contrast between the light emission from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. Therefore, the detection accuracy of the contour 10 of the resist pattern 6 based on the light emission from the substrate 1 can be improved.

[0087] The thinner the resist pattern 6 becomes, the easier it is for the light emission from the resist pattern 6 to become dark. Therefore, the thinner the resist pattern 6 becomes, the greater the contrast between the light emission from the area 1c of the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the area 1d of the conductor surface of the substrate 1 where the resist pattern 6 is formed becomes. Therefore, from the viewpoint that the contrast between the light emission from the area 1c of the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the area 1d of the conductor surface of the substrate 1 where the resist pattern 6 is formed becomes larger, the thickness of the resist pattern 6 formed on the substrate 1 can be set to, for example, 500 μm or less, 300 μm or less, 100 μm or less, or 60 μm or less. Furthermore, the thickness of the resist pattern 6 formed on the substrate 1 can be set to, for example, 0.05 μm or more, 0.1 μm or more, 1 μm or more, or 5 μm or more. The minimum and maximum values ​​of the thickness of these resist patterns 6 can be appropriately combined. For example, the thickness of the resist pattern 6 formed on the substrate 1 may be 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm.

[0088] In the inspection method of the resist pattern, the resist pattern 6 is formed to have a thickness of 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm, thereby preventing the resist pattern 6 from becoming too thick and increasing the contrast between the light emission from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. Therefore, the detection accuracy of the contour 10 of the resist pattern 6 based on the light emission from the substrate 1 can be improved.

[0089] In the method for manufacturing a resist pattern of the present embodiment, a light emitting material is attached to the conductor surface of the substrate 1, thereby increasing the contrast between the light emission from the region 1c of the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the region 1d of the conductor surface of the substrate 1 where the resist pattern 6 is formed. Therefore, for example, when the contour 10 of the resist pattern 6 is detected based on the light emission from the substrate where the resist pattern 6 is formed, the detection accuracy can be improved. In addition, when the line width of the resist pattern 6 is measured, it is easy to focus on the surface of the resist pattern 6 or the contour of the resist pattern 6.

[0090] Furthermore, in the method for manufacturing the resist pattern, the resist pattern 6 is formed to have a thickness of 0.05 μm to 500 μm, 0.1 μm to 300 μm, 1 μm to 100 μm, or 5 μm to 60 μm, thereby preventing the resist pattern 6 from becoming too thick, and increasing the contrast between the light emission from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the region 1d on the conductor surface of the substrate 1 where the resist pattern 6 is formed. Therefore, for example, the detection accuracy of the contour 10 of the resist pattern 6 based on the light emission from the substrate 1 can be improved.

[0091] In the substrate sorting method of the present embodiment, the resist pattern 6 is evaluated by visual inspection of the resist pattern 6 based on light emission from the substrate 1 , so that the substrate 1 can be sorted with high accuracy in a short time compared to visual inspection using an SEM.

[0092] Furthermore, in this substrate sorting method, the substrate 1 is evaluated based on the number or shape of defects in the resist pattern 6 , thereby being able to appropriately evaluate the substrate 1 .

[0093] Furthermore, since a light-emitting material is attached to the conductor surface of the substrate 1 to be visually inspected in the visual inspection step of the substrate sorting method, the contrast between the light emission from the region 1c on the conductor surface of the substrate 1 where the resist pattern 6 is not formed and the light emission from the region 1d on the conductor surface of the substrate 1 where the resist pattern is formed is increased. Therefore, the visual inspection of the resist pattern 6 can be performed with high accuracy.

[0094] In the manufacturing method of the semiconductor package substrate or printed circuit board of the present embodiment, the substrate 1 whose anti-etching pattern 6 in the above-mentioned substrate sorting method satisfies the evaluation benchmark is etched or plated to form a conductor pattern 9, thereby being able to suppress the occurrence of adverse conditions such as disconnection or short circuit of the conductor pattern 9.

[0095] The present invention is not limited to the above-described embodiment, and can be modified as appropriate without departing from the gist of the present invention.

[0096] Example

[0097] Next, examples of the present invention will be described. However, the present invention is not limited to the following examples.

[0098] 1. Photosensitive elements and substrates

[0099] The photosensitive elements and substrates shown in Table 1 and below were used in Examples 1 to 5 and Comparative Example 1. The last two digits of the product name of the photosensitive element represent the film thickness of the photosensitive layer (unit: μm).

[0100] (Photosensitive element)

[0101] F-1: A photosensitive element produced by using ME-3606SG (manufactured by Showa Denko Materials Co., Ltd., product name) as a photopolymerization initiator at a 0.5-fold amount and a sensitizer at a 0.3-fold amount

[0102] F-2: A photosensitive element produced by removing MKG (malachite green) from RY-5115 (manufactured by Showa Denko Materials Co., Ltd., product name) and adding 0.5 times the amount of the photopolymerization initiator and 0.3 times the amount of the sensitizer.

[0103] F-3: A photosensitive element produced by removing MKG (malachite green) from RY-5125 (manufactured by Showa Denko Materials Co., Ltd., product name, same photosensitive layer composition as (F-2)) and adding 0.5 times the amount of the photopolymerization initiator and 0.3 times the amount of the sensitizer.

[0104] F-4: FL-7225 (manufactured by Showa Denko Materials Co., Ltd., product name)

[0105] (Base material)

[0106] S-1: Cu sputtered PET film (manufactured by GEOMATEC Co., Ltd., thickness: 125 μm, Ra < 50 nm)

[0107] S-2: GL-102 (manufactured by Ajinomoto Fine-Techno Co., Inc., product name, Ra: about 100 nm)

[0108] S-3: MCL-E67 (manufactured by Showa Denko Materials Co., Ltd., product name, Ra: about 300 nm)

[0109] 2. Fabrication of laminated body

[0110] In Examples 1, 3 to 4 and Comparative Example 1, S-1 stored under dehumidified conditions was used as a substrate having a copper layer as a conductive layer. In Examples 2 and 5, the substrate having a copper layer as a conductive layer was acid-washed and washed with water, and then dried with an air stream, and then heated to 80°C. Thereafter, the substrates S-1, S-2 and S-3 were immersed in a saturated aqueous solution of 1H-benzotriazole-5-carboxylic acid (FUJIFILM Wako Pure Chemical Corporation) at 23°C for 60 minutes, washed with water and dried with an air stream, and then immersed in a saturated aqueous solution of Rhodamine B (FUJIFILM Wako Pure Chemical Corporation) at 23°C for 10 minutes, so that the fluorescent dye was attached to the copper surface of the substrates S-1, S-2 and S-3. After washing with water and drying with an air stream, the substrate was heated to 80°C. Thereafter, in Examples 1 to 5 and Comparative Example 1, a photosensitive element was laminated (stacked) on the surface of the copper layer of the substrate. The protective layer of the photosensitive element was peeled off, and lamination was performed using a hot roller at 110° C. at a pressing pressure of 0.4 MPa and a roller speed of 1.0 m / min so that the photosensitive layer of the photosensitive element was in contact with the surface of the copper layer of the substrate. In this way, a laminated body of Examples 1 to 5 and Comparative Example 1 in which a substrate, a photosensitive layer, and a support were laminated in this order was obtained. The obtained laminated body was used as a test piece for the test shown below.

[0111] 3. Fabrication of patterned substrate

[0112] [Examples 1 to 4 and Comparative Example 1]

[0113] A glass chrome type photomask (for resolution evaluation or pattern inspection) was used, and the photosensitive layer was exposed to a predetermined energy using a projection exposure device (manufactured by Ushio Inc., product name "UX-2240S M") using an ultra-high pressure mercury lamp (365 nm) as a light source (exposure treatment). In addition, a line pattern having a line width / space width of x / x (x: 1 to 30, unit: μm) was used in the photomask for resolution evaluation, and a line pattern having a line width / space width of x / x (x: 20, 30, 40, unit: μm) was used in the photomask for pattern inspection (pattern area: 90 mm×90 mm).

[0114] After exposure, the support is peeled off to expose the photosensitive layer, and a 1% by mass sodium carbonate aqueous solution at 30°C is sprayed for twice the shortest development time (the shortest time to remove the unexposed portion) to remove the unexposed portion (development treatment). The substrate after the development treatment exposed using a photomask for resolution evaluation is called a pattern substrate for resolution evaluation, and the substrate after the development treatment exposed using a photomask for pattern inspection is called a pattern substrate for inspection. In the pattern substrate for resolution evaluation, the resolution is evaluated based on the value of the minimum line width / space width in the resist pattern formed by cleanly removing the spacer portion (unexposed portion) and without distortion, winding and defect in the line portion (exposed portion). At this time, when a resist pattern is formed using a resolution evaluation photomask in which the line width / space width of the line pattern becomes 30μm / 30μm, the exposure amount at which the line width of the resist pattern becomes 30.0μm is set to the above-mentioned specified energy.

[0115] [Example 5]

[0116] The photosensitive layer was exposed to a predetermined energy using a direct writing exposure device (Orbotech Ltd., product name "NuvogoFine 8") using a semiconductor laser (mixed beams of 375 nm and 405 nm, the ratio of wavelengths can be arbitrarily changed (375 nm:405 nm = 0:100 to 100:0)) as a light source. After exposure, the development treatment was performed in the same steps as in Examples 1 to 4 and Comparative Example 1 to produce a pattern substrate for resolution evaluation and a pattern substrate for inspection.

[0117] 4. Visual inspection of resist pattern

[0118] In Examples 1 to 5, as an appearance inspection of the resist pattern, AOIOrbotech UltraDimension 800 (manufactured by Orbotech Ltd., product name) was used to irradiate UV light on the inspection pattern substrate to make the copper surface of substrates S-1, S-2 and S-3 fluoresce, thereby detecting the defects of the resist pattern. In Comparative Example 1, as an appearance inspection of the resist pattern, the defects of the resist pattern were observed using an SEM of SU-1500 (manufactured by Hitachi High-Tech Corporation., product name). At this time, the acceleration voltage was set to 15kV and the current value was set to 80μA. In addition, the time of the appearance inspection was evaluated for Examples 1 to 5 and Comparative Example 1, and the pattern detection rate of the defects of the resist pattern was also evaluated for Examples 1 to 5 as the inspection accuracy. The pattern detection rate (inspection accuracy) refers to the probability that the inspection device recognizes the outline of the resist pattern and can recognize the pattern when performing an appearance inspection. That is, before the appearance inspection is performed, the inspection device sets the appropriate grayscale (threshold value for binarization of light and dark) corresponding to Examples 1 to 5, respectively, and sets the grayscale (threshold value for binarization of light and dark) setting to be acceptable if the setting is completed, and unacceptable if the setting is not completed and an error occurs. Furthermore, in the evaluation of the pattern detection rate of defects in the resist pattern, the case where the pattern is always acceptable is set to A, the case where the pattern is not always acceptable but the probability of being unacceptable is low is set to B, and the case where the probability of being unacceptable is high is set to C. In the evaluation of the time for the appearance inspection, the case where the pattern is less than 10 minutes / cm 2 Let A be 10 points / cm 2 Above and less than 5000 points / 100cm 2 Set it as B, and set 5000 points / 100cm 2 The above is set as C.

[0119] [Table 1]

[0120] project Example 1 Example 2 Example 3 Example 4 Example 5 Comparative Example 1 Photosensitive element F-1 F-1 F-2 F-3 F-4 F-1 Photosensitive layer thickness (μm) 6 6 15 25 25 6 Base material of substrate S-1 S-2 S-1 S-1 S-3 S-1 Surface roughness of substrate Ra(nm) <50 100 <50 <50 300 <50 Check time A A A A A C Check accuracy A A A A A -

[0121] 5. Evaluation

[0122] As shown in Table 1, in Examples 1 to 5, the inspection time was significantly shortened compared to Comparative Example 1. From this result, it can be seen that by performing appearance inspection of a resist pattern based on fluorescence from a substrate on which a resist pattern is formed, defects in the resist pattern can be detected in a shorter time than by appearance inspection using a SEM.

[0123] Furthermore, the pattern detection rate was high in Examples 1 to 5. From these results, it is understood that in the appearance inspection of the resist pattern based on the fluorescence from the substrate on which the resist pattern is formed, the contour of the resist pattern is easily detected and the inspection accuracy is high.

[0124] Explanation of symbols

[0125] 1-substrate, 1a-insulating layer, 1b-conductor layer, 1c-area of ​​the conductor surface of the substrate where the resist pattern is not formed, 1d-area of ​​the conductor surface of the substrate where the resist pattern is formed, 2-photosensitive layer, 2a-photocured portion, 2b-uncured portion, 3-support body, 4-laminated body, 5-photomask, 6-resist pattern, 7-foreign matter, 8-defect, 9-conductor pattern, 10-contour, 11-pattern data.

Claims

1. A method for inspecting a resist pattern, comprising an appearance inspection step of inspecting the appearance of the resist pattern based on light emission from a substrate on which the resist pattern is formed.

2. The method for inspecting a resist pattern according to claim 1, wherein: In the appearance inspection step, the contour of the resist pattern is detected based on the light emission from the substrate, and the appearance inspection of the resist pattern is performed based on the detected contour.

3. The method for inspecting a resist pattern according to claim 2, wherein: In the appearance inspection step, the detected contour is compared with pattern data for forming the resist pattern.

4. The method for inspecting a resist pattern according to claim 2, wherein: In the appearance inspection step, a line width of the resist pattern is measured based on the detected contour.

5. The method for inspecting a resist pattern according to any one of claims 1 to 4, further comprising: a resist pattern forming step of forming the resist pattern on the substrate; and The light emitting material attaching step is to attach the light emitting material to the conductor surface of the substrate.

6. The method for inspecting a resist pattern according to claim 5, wherein: In the resist pattern forming step, the resist pattern is formed to have a thickness of 0.05 μm or more and 500 μm or less.

7. A method for manufacturing a resist pattern, comprising: A resist pattern forming step of forming a resist pattern on a substrate; and The light emitting material attaching step is to attach the light emitting material to the conductor surface of the substrate.

8. The method for producing a resist pattern according to claim 7, wherein: In the resist pattern forming step, the resist pattern is formed to have a thickness of 0.05 μm or more and 500 μm or less.

9. A substrate sorting method, comprising: an appearance inspection step of inspecting the appearance of the resist pattern based on light emission from a substrate on which the resist pattern is formed; and An evaluation step of evaluating the resist pattern based on the appearance inspection in the appearance inspection step.

10. The substrate sorting method according to claim 9, wherein: In the evaluation step, the resist pattern is evaluated based on the number of defects in the resist pattern.

11. The substrate sorting method according to claim 9 or 10, wherein: A light emitting material is attached to the conductor surface of the substrate that is visually inspected in the visual inspection step.

12. A method for manufacturing a semiconductor package substrate or a printed circuit board, comprising: The conductor pattern forming step is to form a conductor pattern by etching or plating the substrate whose evaluation of the resist pattern satisfies a reference in the substrate separation method according to any one of claims 9 to 11.

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