Interleaved parallel ANPC circuit

Abstract

The invention provides an interleaved ANPC circuit comprising N (N > = 2) parallel bridge arms, comprising: a DC terminal comprising a positive DC terminal and a negative DC terminal; an AC end; the switching circuit is connected between the positive DC end and the negative DC end and comprises a first switching transistor, a second switching transistor, a third switching transistor and a fourth switching transistor which are sequentially connected in series; the series connection nodes of the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are a first node, a second node and a third node in sequence, and the second node is connected to a neutral line; the N high-frequency switching circuits are connected between the first node and the third node in parallel, each of the N high-frequency switching circuits comprises a first high-frequency switching transistor and a second high-frequency switching transistor which are connected in series, and the phase difference between two adjacent high-frequency switching circuits in the N high-frequency switching circuits is 2pi / N.

Description

Technical Field

[0001] The invention belongs to the field of electric power supply, and in particular relates to an interleaved parallel ANPC circuit. Background Art

[0002] In the scenario of high voltage and high power output, the Neutral Point Clamped (NPC) and Active Neutral Point Clamped (ANPC) multilevel inverter topology are usually used. In particular, the ANPC circuit can achieve high efficiency and high quality power conversion.

[0003] Interleaved parallel circuits are widely used in multi-phase converters because they can reduce input current ripple and switching losses. For example, if each phase of the system is composed of N bridge arms in parallel, a phase difference of 2π / N is used between each adjacent bridge arm to drive the gate circuit. However, the current interleaved parallel ANPC circuit has many switching devices, complex structure, low power density, high cost, and low thermal balance performance. Summary of the invention

[0004] Therefore, the object of the present invention is to overcome the defects of the prior art and provide an interleaved parallel ANPC circuit, which includes N parallel bridge arms, wherein N≥2, and the interleaved parallel ANPC circuit includes:

[0005] A DC terminal, including a positive DC terminal and a negative DC terminal;

[0006] AC end;

[0007] a switching circuit connected between the positive DC terminal and the negative DC terminal and comprising a first switching transistor, a second switching transistor, a third switching transistor and a fourth switching transistor connected in series in sequence, wherein the series nodes of the first switching transistor, the second switching transistor, the third switching transistor and the fourth switching transistor are a first node, a second node and a third node in sequence, wherein the second node is connected to a neutral line; and

[0008] N high-frequency switching circuits connected in parallel to each other are connected between the first node and the third node, each of the N high-frequency switching circuits includes a first high-frequency switching transistor and a second high-frequency switching transistor connected in series to each other, wherein a phase difference between two adjacent high-frequency switching circuits in the N high-frequency switching circuits is 2π / N.

[0009] According to the interleaved parallel ANPC circuit of the present invention, preferably, the frequency of the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor is the industrial frequency.

[0010] According to the interleaved parallel ANPC circuit of the present invention, preferably, the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are IGBTs or MOSFETs.

[0011] According to the interleaved parallel ANPC circuit of the present invention, preferably, the frequency of the first high-frequency switching transistor and the second high-frequency switching transistor is greater than or equal to 1 kHz.

[0012] According to the interleaved parallel ANPC circuit of the present invention, preferably, the first high-frequency switching transistor and the second high-frequency switching transistor are SiC MOSFET or GaN.

[0013] According to the interleaved parallel ANPC circuit of the present invention, preferably, it further comprises N LC filter circuits, one end of which is connected to a node between the first high-frequency switching transistor and the second high-frequency switching transistor of the corresponding high-frequency switching circuit, and the other end is connected to the AC end.

[0014] According to the interleaved parallel ANPC circuit of the present invention, preferably, the N LC filter circuits share one capacitor or multiple parallel capacitors.

[0015] According to the interleaved parallel ANPC circuit of the present invention, preferably, the phase difference between the first high-frequency switching transistors of two adjacent high-frequency switching circuits among the N high-frequency switching circuits is 2π / N, and the phase difference between the second high-frequency switching transistors of two adjacent high-frequency switching circuits among the N high-frequency switching circuits is 2π / N.

[0016] According to the interleaved parallel ANPC circuit of the present invention, preferably, the interleaved parallel ANPC circuit is configured to perform DC-AC conversion or AC-DC conversion.

[0017] According to the interleaved parallel ANPC circuit of the present invention, preferably, the industrial frequency switch circuit and the high frequency switch circuit are configured to perform the following operations:

[0018] In a positive half cycle, the first switch transistor and the third switch transistor are turned on, the second switch transistor and the fourth switch transistor are turned off, and the first high-frequency switch transistor and the second high-frequency switch transistor are alternately turned on; and

[0019] In the negative half cycle, the first switch transistor and the third switch transistor are turned off, the second switch transistor and the fourth switch transistor are turned on, and the first high-frequency switch transistor and the second high-frequency switch transistor are turned on alternately.

[0020] Compared with the prior art, the interleaved parallel ANPC circuit of the present invention has a simple structure, low cost, high power density and high thermal balance performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The embodiments of the present invention are further described below with reference to the accompanying drawings, in which:

[0022] Figure 1 A circuit topology of an interleaved parallel ANPC circuit according to an embodiment of the present invention;

[0023] Figure 2 is a pulse width modulation (PWM) waveform diagram of the switching transistors T1 to T6 according to an embodiment of the present invention;

[0024] Figure 3 is an output voltage waveform diagram according to an embodiment of the present invention; and

[0025] Figure 4 FIG. 4 is a circuit topology of an interleaved parallel ANPC circuit according to another embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail by specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0027] An embodiment of the present invention provides an interleaved parallel ANPC circuit comprising two parallel bridge arms, wherein the circuit topology is as follows: Figure 1As shown, it includes 8 switching transistors T1-T8, 8 diodes D1-D8, 3 capacitors C1-C3, 2 inductors L1-L2 and a relay RY1. Among them, the first end (collector) of T1 is connected to the DC positive bus DC+, the second end (emitter) of T1 is connected to the first ends of T2, T5 and T7 and forms a node N1, the first end of T4 is connected to the second ends of T3, T6 and T8 and forms a node N3, the second end of T5 is connected to the first end of T6 and forms a node N2, the second end of T2 is connected to the first end of T3 and forms a node M1, the second end of T7 is connected to the first end of T8 and forms a node M2, the second end of T4 is connected to the DC negative bus DC-, and the node N2 is connected to the DC bus The neutral point N of the power supply is connected to the AC terminal through the inductor L1 and the relay RY1, the node M2 ​​is connected to the AC terminal through the inductor L2 and the relay RY1, the node between the inductor L1 and the relay RY1 is grounded through the capacitor C3, the capacitor C1 is connected between DC+ and the neutral point N, the capacitor C2 is connected between DC- and the neutral point N, T1-T8 are respectively connected in anti-parallel with D1-D8, wherein T1 and T4-T6 are power frequency switching transistors, and T2-T3 and T7-T8 are high frequency switching transistors. In particular, the frequency of T1 and T4-T6 is 50Hz or 60Hz, and the frequency of T2-T3 and T7-T8 is higher than 1kHz, preferably higher than 10kHz, and more preferably higher than 30kHz.

[0028] In this embodiment, the switch transistors T1-T6, the diodes D1-D6, the capacitors C1-C3, the inductor L1 and the relay RY1 constitute the first bridge arm circuit, the switch transistors T1 and T4-T8, the diodes D1 and D4-D8, the capacitors C1-C3, the inductor L2 and the relay RY1 constitute the second bridge arm circuit, the first high-frequency switch series circuit of the first bridge arm circuit is connected in parallel to the second high-frequency switch series circuit of the second bridge arm circuit and the phase difference between the two is π, that is, the phase shift of the high-frequency switch transistor T7 compared to T2 is π and the phase shift of the high-frequency switch transistor T8 compared to T3 is π. Compared with the traditional staggered parallel ANPC circuit, this embodiment shares the power frequency switch transistor, saves at least four power frequency switch transistors, has low cost and high power density.

[0029] In order to facilitate understanding of the present invention, the working principle of the first bridge arm circuit is explained below.

[0030] When the above ANPC circuit is used as an inverter for DC-AC conversion, see Figure 2 The pulse width modulation (PWM) waveform of the switching transistors T1 to T6 of the embodiment of the present invention is shown as follows:

[0031] 1) In the first half cycle 0 to T / 2, the switching transistors T1 and T6 are turned on, the switching transistors T4 and T5 are turned off, and the switching transistors T2 and T3 are turned on alternately.

[0032] When T2 is turned on and T3 is turned off,

[0033] The current path is: DC+→T1→T2→L1→RY1→AC. At this time, the voltage at point M1 is V M1 The voltage U of DC+ D / 2;

[0034] When T2 is turned off and T3 is turned on,

[0035] The current path is: N→T6→D3(T3)→L1→RY1→AC. At this time, the voltage at point M1 is V M1 The neutral point voltage is 0, where “D3(T3)” indicates that D3 is the built-in diode of T3. Similar expressions appearing in the following text are also explained similarly.

[0036] 2) In the second half cycle T / 2 to T, the switching transistors T1 and T6 are turned off, the switching transistors T4 and T5 are turned on, and the switching transistors T2 and T3 are turned on alternately.

[0037] When T2 is turned off and T3 is turned on,

[0038] The current path is: AC→RY1→L1→T3→T4→DC-. At this time, the voltage at point M1 is V M1 The voltage of DC-U D / 2;

[0039] When T2 is turned on and T3 is turned off,

[0040] The current path is: AC→RY1→L1→D2(T2)→T5→N. At this time, the voltage at point M1 is V M1 The neutral point voltage is 0.

[0041] Thus, in a period from 0 to T, point M1 forms Figure 3 The pulse voltage V M1 The frequency of change is consistent with the on-off frequency of the switching transistors T2 and T3. The high-frequency pulse at point M1 is filtered by the filter circuit composed of inductor L1 and capacitor C3 to form a sinusoidal voltage V at the output end AC. AC Therefore, when direct current is input at the DC end, alternating current can be output at the AC end by controlling the switching logic of the switching transistor.

[0042] When the above ANPC circuit is used as an inverter for AC-DC conversion, its working principle is as follows:

[0043] 1) When the AC input is in the positive half cycle, the input voltage of the AC is filtered by L1 and C3, and the voltage at point M1 has the same sign as the AC voltage:

[0044] The switching transistors T1 and T6 are turned on, the switching transistors T4 and T5 are turned off, and the switching transistors T2 and T3 are turned on alternately.

[0045] When T2 is turned off and T3 is turned on,

[0046] The current path is: AC→RY1→L1→T3→D6(T6)→N. At this time, the neutral point N is connected to the point M1, and the voltage is 0.

[0047] When T2 is turned on and T3 is turned off,

[0048] The current path is: AC→RY1→L1→D2(T2)→D1(T1)→DC+. At this time, the voltage at the DC+ terminal is consistent with the voltage at point M1 and is positive.

[0049] 2) When the AC input is in the negative half cycle, the input voltage of the AC is filtered by L1 and C3, and the voltage at point M1 has the same sign as the AC voltage:

[0050] The switching transistors T1 and T6 are turned off, the switching transistors T4 and T5 are turned on, and the switching transistors T2 and T3 are turned on alternately.

[0051] When T2 is turned on and T3 is turned off,

[0052] The current path is: N→D5(T5)→T2→L1→RY1→AC. At this time, the neutral point N is connected to the point M1, and the voltage is 0.

[0053] When T2 is turned off and T3 is turned on,

[0054] The current path is: DC-→D4(T4)→D3(T3)→L1→RY1→AC. At this time, the voltage at the DC- terminal is consistent with point M1 and is negative.

[0055] In this way, when alternating current is input at the AC end, by controlling the control logic of the switching transistors, especially the period of the switching transistors T1 and T4~T6 is exactly equal to the period of the alternating current, a positive voltage can always be output at the DC+ end and a negative voltage can be output at the DC- end, thereby realizing DC output and charging the battery.

[0056] Those skilled in the art will appreciate that the working principle of the second bridge arm circuit is the same as that of the first bridge arm circuit. In particular, the switch transistors T7 and T8 lag behind the switch transistors T2 and T3 by π, respectively. While the switch transistors T1 and T4 to T6 maintain the same switch logic as above, T7 and T8 are still turned on alternately, and the same power conversion process as above can be achieved.

[0057] For this embodiment, the inventor uses the following parameters for simulation experiments: DC terminal voltage 1500V; output phase line voltage 690V; rated power 200kW; high-frequency switching transistor uses SiC MOSFET, frequency 36kHz; power frequency switching transistor uses Si IGBT (i.e. IGBT), frequency 50Hz. The simulation results show that the staggered parallel ANPC circuit of this embodiment can work normally, and the chip temperature rise characteristics are normal, indicating that sharing the power frequency switching transistor will not affect the working characteristics of the staggered parallel ANPC circuit.

[0058] Another embodiment of the present invention provides an interleaved parallel ANPC circuit including three parallel bridge arms, wherein the circuit topology is as follows: Figure 4 As shown, compared Figure 1 The circuit topology shown in the figure adds a third high-frequency switch series circuit, namely, high-frequency switch transistors T9-T10 and diodes D9-D10 respectively connected in anti-parallel with T9 and T10, and the third high-frequency switch series circuit is connected in parallel with the first and second high-frequency switch series circuits. Specifically, the input end of T9 is connected to the output end of T1, the output end of T9 is connected to the input end of T10, the output end of T10 is connected to the input end of T4, and the node M3 between T9 and T10 is connected to the AC end through the inductor L3 and the relay RY1. The first, second and third high-frequency switch series circuits are phase-shifted by 2π / 3 in sequence, namely, the high-frequency switch transistors T2, T7 and T9 are phase-shifted by 2π / 3 in sequence, and the high-frequency switch transistors T3, T8 and T10 are phase-shifted by 2π / 3 in sequence. Compared with the traditional staggered parallel ANPC circuit, this embodiment shares the power frequency switch transistor, saves at least eight power frequency switch transistors, has low cost and high power density.

[0059] Another embodiment of the present invention provides an interleaved parallel ANPC circuit comprising four parallel bridge arms. Figure 4 On the basis of this, a group of high-frequency switch series circuits are continued to be connected in parallel, and the phases of each group of high-frequency switch series circuits are shifted by π / 2 with respect to each other.

[0060] According to other embodiments of the present invention, there is provided an interleaved parallel ANPC circuit comprising N (N≥2) parallel bridge arms, which shares an industrial frequency switching transistor circuit and comprises N groups of high-frequency switching transistor series circuits connected in parallel with each other, and the N groups of high-frequency switching transistor series circuits are phase-shifted by 2π / N in sequence.

[0061] In an embodiment of the present invention, the industrial frequency switching transistor adopts a switching device with low conduction loss, such as IGBT or MOSFET, and the high frequency switching transistor adopts a switching device with low switching loss, such as SiC MOSFET or GaN.

[0062] In the embodiment of the present invention, the inductors L1, L2 and L3 respectively form an LC filter circuit with the capacitor C3, and those skilled in the art can select the inductors and capacitors according to the actual application environment. Those skilled in the art can understand that all LC filter circuits can share capacitors, including a single capacitor or multiple capacitors in parallel, or different capacitors can be used respectively.

[0063] Those skilled in the art will appreciate that, in the embodiments of the present invention, the diode is a freewheeling diode, which may be a diode built into the switching transistor or a separately provided diode.

[0064] The interleaved parallel ANPC circuit of the present invention can realize bidirectional power conversion, share industrial frequency switch transistors, and has simple structure, low cost, high power density, and high thermal balance performance.

[0065] Although the present invention has been described through preferred embodiments, the present invention is not limited to the embodiments described herein but includes various changes and modifications that may be made without departing from the scope of the present invention.

Claims

1. An interleaved parallel ANPC circuit, comprising N parallel bridge arms, wherein N ≥ 2, the interleaved parallel ANPC circuit comprising: A DC terminal, including a positive DC terminal and a negative DC terminal; AC end; a switching circuit connected between the positive DC terminal and the negative DC terminal and comprising a first switching transistor, a second switching transistor, a third switching transistor and a fourth switching transistor connected in series in sequence, wherein the series nodes of the first switching transistor, the second switching transistor, the third switching transistor and the fourth switching transistor are a first node, a second node and a third node in sequence, wherein the second node is connected to a neutral line; and N high-frequency switching circuits connected in parallel to each other are connected between the first node and the third node, each of the N high-frequency switching circuits includes a first high-frequency switching transistor and a second high-frequency switching transistor connected in series to each other, wherein a phase difference between two adjacent high-frequency switching circuits in the N high-frequency switching circuits is 2π / N.

2. The interleaved parallel ANPC circuit according to claim 1, wherein: The frequencies of the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are industrial frequencies.

3. The interleaved parallel ANPC circuit according to claim 1, wherein: The first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are IGBTs or MOSFETs.

4. The interleaved parallel ANPC circuit according to claim 1, wherein: The frequencies of the first high-frequency switching transistor and the second high-frequency switching transistor are greater than or equal to 1 kHz.

5. The interleaved parallel ANPC circuit according to claim 1, wherein: The first high-frequency switching transistor and the second high-frequency switching transistor are SiC MOSFET or GaN.

6. The interleaved parallel ANPC circuit according to claim 1 further comprises N LC filter circuits, one end of which is connected to a node between the first high-frequency switching transistor and the second high-frequency switching transistor of the corresponding high-frequency switching circuit, and the other end is connected to the AC terminal.

7. The interleaved parallel ANPC circuit according to claim 6, wherein: The N LC filter circuits share one capacitor or multiple capacitors connected in parallel.

8. The interleaved parallel ANPC circuit according to any one of claims 1 to 7, wherein: The phase difference between the first high-frequency switch transistors of two adjacent high-frequency switch circuits among the N high-frequency switch circuits is 2π / N, and the phase difference between the second high-frequency switch transistors of two adjacent high-frequency switch circuits among the N high-frequency switch circuits is 2π / N.

9. The interleaved parallel ANPC circuit according to any one of claims 1 to 7, wherein: The interleaved parallel ANPC circuit is configured to perform DC-AC conversion or AC-DC conversion.

10. The interleaved parallel ANPC circuit according to claim 9, wherein: The industrial frequency switching circuit and the high frequency switching circuit are configured to perform the following operations: In a positive half cycle, the first switch transistor and the third switch transistor are turned on, the second switch transistor and the fourth switch transistor are turned off, and the first high-frequency switch transistor and the second high-frequency switch transistor are turned on alternately; as well as In the negative half cycle, the first switch transistor and the third switch transistor are turned off, the second switch transistor and the fourth switch transistor are turned on, and the first high-frequency switch transistor and the second high-frequency switch transistor are turned on alternately.

Images