Current equalization dual-phase COT BUCK circuit and current equalization method

Abstract

The invention discloses a current equalization biphase COT BUCK circuit and a current equalization method. The circuit comprises two BUCK circuits (4) and a current equalization circuit (6). The output ends of the two BUCK circuits (4) are connected together and output a required output voltage, the two BUCK circuits (4) are alternately conducted, and the two BUCK circuits (4) are turned off after being maintained for a period of conduction time every time; two input ends of the current equalization circuit (6) are respectively connected with voltage measuring points of the two BUCK circuits (4), an output end of the current equalization circuit (6) is indirectly connected with a switching tube of the second BUCK circuit (4), and the current equalization circuit (6) is used for sampling signals of the voltage measuring points of the two BUCK circuits (4) at the same time and comparing the signals. And the conduction time of the second BUCK circuit (4) is adjusted according to the comparison result, so that the duty ratio of the second BUCK circuit (4) tracks the duty ratio of the first BUCK circuit (4), and the purpose of balancing the inductive current of the two BUCK circuits is achieved.

Description

Technical Field

[0001] The present invention relates to the field of analog integrated circuits and power supplies, and in particular to a current-balanced dual-phase COT BUCK circuit and a current-balanced method. Background Art

[0002] With the development of technology, multi-phase parallel technology is widely used in the field of power management to improve output current and efficiency. In theory, the parameters of each phase circuit are exactly the same, and the generated inductor current should be equal, but in reality, due to process errors, the influence of parasitic parameters, etc., the output current will have obvious deviations. When the two currents are not equal or even differ too much, one of them will deviate too much from the normal value, resulting in reduced efficiency, heating and reliability problems, and even damage to the chip.

[0003] The above information disclosed in this Background section is included only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not form the prior art that is currently known to a person of ordinary skill in the art. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a current-balanced dual-phase COT BUCK circuit and a current-balanced method in view of the above-mentioned defects of the prior art.

[0005] The technical solution adopted by the present invention to solve its technical problem is: On the one hand, a current-balanced dual-phase COT BUCK circuit is constructed, including two BUCK circuits and a current-balanced circuit; The output ends of the two BUCK circuits are connected together and output the required output voltage, and the two BUCK circuits are turned on alternately, and each time they are turned on for a period of time, they are turned off; The two input ends of the current balancing circuit are respectively connected to the voltage measurement points of the two BUCK circuits, and the output end of the current balancing circuit is indirectly connected to the switch tube of the second BUCK circuit. The current balancing circuit is used to simultaneously sample and compare the signals of the voltage measurement points of the two BUCK circuits, and adjust the conduction time of the second BUCK circuit according to the comparison result, so that the duty cycle of the second BUCK circuit tracks the duty cycle of the first BUCK circuit.

[0006] Furthermore, in the current balancing dual-phase COT BUCK circuit of the present invention, the on-time is determined by the charging time required for the current source to charge the capacitor to a charging reference voltage, and the current balancing circuit includes: A voltage difference amplifier circuit, whose two input terminals are respectively connected to the voltage measurement points of the two BUCK circuits, is used to subtract the signal of the voltage measurement point of the first BUCK circuit from the signal of the voltage measurement point of the second BUCK circuit and perform difference amplification processing to output an error voltage; A voltage-to-current circuit, whose input end is connected to the error voltage and whose output end is connected to the current source, is used to convert the error voltage into an error current, and superimpose the error current on the current source to adjust the charging time.

[0007] Furthermore, in the current-balanced dual-phase COT BUCK circuit of the present invention, two COT circuits corresponding to the two BUCK circuits are also included, and the start of conduction of the BUCK circuit is triggered by a conduction signal, and the end of conduction of the BUCK circuit is triggered by a shutdown signal output by the corresponding COT circuit; The COT circuit is used to control the current source to start charging the capacitor when the on signal starts to be triggered, compare the voltage of the capacitor with the charging reference voltage, and generate the off signal according to the comparison result.

[0008] Furthermore, in the current-balanced dual-phase COT BUCK circuit of the present invention, the current source is related to the input voltage of the BUCK circuit, and the charging reference voltage is related to the output voltage.

[0009] Further, in the current-balanced dual-phase COT BUCK circuit described in the present invention, the COT circuit includes a first current mirror, a charging capacitor, a discharging switch tube, and a first comparator, the current source is connected in series in the control branch of the first current mirror, the charging capacitor is connected in series in the mirror branch of the first current mirror, the positive electrode of the charging capacitor is connected to the positive input terminal of the first comparator, the positive electrode of the charging capacitor is also grounded via the discharging switch tube, the control terminal of the discharging switch tube receives the turn-on signal to quickly discharge the charging capacitor under the triggering of the turn-on signal, the negative input terminal of the first comparator is connected to the charging reference voltage, and the output terminal of the first comparator outputs the turn-off signal; Wherein, the positive electrode of the current source in the COT circuit corresponding to the second BUCK circuit is also connected to the voltage-to-current circuit to superimpose the error current.

[0010] Furthermore, in the current-balanced dual-phase COT BUCK circuit described in the present invention, it also includes two filter circuits corresponding to the two BUCK circuits, and the two input ends of the voltage difference amplifier circuit are respectively connected to the voltage measurement points of the corresponding BUCK circuits via the corresponding filter circuits, and the filter circuit is used to filter the signal of the voltage measurement point to obtain a duty cycle signal and then input it into the corresponding BUCK circuit.

[0011] Further, in the current-balanced dual-phase COT BUCK circuit of the present invention, the voltage-to-current circuit includes an error amplifier, a bias current source, a current conversion resistor, and a second current mirror; The positive input terminal of the error amplifier is connected to the error voltage, the second terminal of the current conversion resistor is grounded, the output terminal of the error amplifier is connected to the gates of the control tube and the mirror tube of the second current mirror, the drain of the control tube of the second current mirror, the first terminal of the current conversion resistor, and the negative input terminal of the error amplifier are connected together and then connected to the output terminal of the error amplifier via a compensation network, the second terminal of the current conversion resistor is grounded, the source of the control tube and the source of the mirror tube of the second current mirror are connected to a power supply, the drain of the mirror tube of the second current mirror is grounded via a bias current source, and the drain of the mirror tube of the second current mirror outputs the error current.

[0012] Furthermore, in the current-balanced dual-phase COT BUCK circuit described in the present invention, it also includes a dual-phase conduction control circuit, whose input end is connected to the common point of the output ends of the two BUCK circuits, and whose two output ends respectively output the two conduction signals corresponding to the two BUCK circuits; the dual-phase conduction control circuit is used to compare the output voltage with the reference voltage, and control the two conduction signals to be triggered alternately according to the comparison result.

[0013] Furthermore, in the current-balanced dual-phase COT BUCK circuit of the present invention, two driving circuits corresponding to the two BUCK circuits are also included; The two output ends of the two-phase conduction control circuit are connected to the first input ends of the two drive circuits one by one, the second input end of the drive circuit is connected to the output end of the corresponding COT circuit, and the output end of the drive circuit is connected to the control end of the switch tube of the corresponding BUCK circuit; the drive circuit is used to output a drive signal for controlling the switch tube of the BUCK circuit according to the conduction signal and the shutdown signal.

[0014] In another aspect, a current balancing method based on the current balancing dual-phase COT BUCK circuit is constructed, the method comprising: The signals of the voltage measurement points of the two BUCK circuits are sampled and compared at the same time, and the conduction time of the second BUCK circuit is adjusted according to the comparison result, so that the duty cycle of the second BUCK circuit tracks the duty cycle of the first BUCK circuit.

[0015] The current-balanced dual-phase COT BUCK circuit and current-balanced method of the present invention have the following beneficial effects: the present invention utilizes a current-balanced circuit to be respectively connected to the voltage measurement points of two BUCK circuits, the output end of the current-balanced circuit is indirectly connected to the switch tube of the second BUCK circuit, the current-balanced circuit simultaneously samples the signals of the voltage measurement points of the two BUCK circuits and compares them, and adjusts the conduction time of the second BUCK circuit according to the comparison result, so that the duty cycle of the second BUCK circuit tracks the duty cycle of the first BUCK circuit, thereby achieving the purpose of balancing the inductor currents of the two BUCK circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings in the following description are only embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on the provided drawings without creative work: Figure 1 It is a structural schematic diagram of a current-balanced dual-phase COT BUCK circuit of the present invention; Figure 2 is a control signal waveform diagram of an embodiment of the present invention; Figure 3 This is the schematic diagram of the COT circuit corresponding to the main BUCK; Figure 4 This is the schematic diagram of the COT circuit corresponding to BUCK; Figure 5 is a circuit diagram of a specific implementation of a current balancing circuit; Figure 6 yes Figure 5 Equivalent circuit diagram of Figure 7 This is a comparison chart of the current deviation of the dual-phase buck. DETAILED DESCRIPTION

[0017] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Typical embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solutions of the present application, rather than limitations on the technical solutions of the present application. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.

[0018] refer to Figure 1The current balancing dual-phase COT BUCK circuit of the present invention includes a dual-phase conduction control circuit 1, two BUCK circuits 4, two driving circuits 3 corresponding to the two BUCK circuits 4, two COT circuits 2 corresponding to the two BUCK circuits 4, two filter circuits 5 corresponding to the two BUCK circuits 4, and a current balancing circuit 6.

[0019] BUCK circuit, also known as step-down conversion circuit, is a DCDC converter based on the principle of inductor energy storage. Figure 1 In the embodiment, the BUCK circuit 4 is used to convert the input voltage Vin into DCDC and then output it. The output ends of the two BUCK circuits 4 are connected together and the required output voltage Vout is output. The first BUCK circuit 4 is recorded as the master BUCK (BUCK_MST), and the second BUCK circuit 4 is recorded as the slave BUCK (BUCK_SLV). The two BUCK circuits 4 have the same structure and size, and the peripheral components (including inductors and capacitors) are also the same. For example, in a specific embodiment, the BUCK circuit 4 includes two upper and lower bridge arms, an inductor, and an output capacitor. Each bridge arm can be composed of one or more switch tubes. For example, in this embodiment, M1 and M2 respectively constitute the upper and lower bridge arms of a BUCK circuit 4, and M3 and M4 respectively constitute the upper and lower bridge arms of another BUCK circuit 4. The upper and lower bridge arms are connected in series between the input voltage Vin and the ground, and the connection point of the upper and lower bridge arms in the BUCK circuit 4 is the voltage measurement point mentioned in this article. The voltage measurement point is connected to the positive electrode of the output capacitor via the inductor, and the negative electrode of the output capacitor is grounded. The positive electrode of the output capacitor is the output end of the BUCK circuit 4. The positive electrodes of the output capacitors of the two BUCK circuits 4 are connected together to output Vout. The purpose of the present invention is to achieve inductor current balancing of the two BUCK circuits 4 .

[0020] The two BUCK circuits 4 are turned on alternately, and each time they are turned on, they are turned off after being turned on for a period of time. Figure 2 The driving signals of the switch tubes of the two BUCK circuits 4 are PMW_MST (controlling M1 and M2) and PMW_SLV (controlling M3 and M4). The driving signal is that a high level turns on the corresponding switch, and a low level turns off the corresponding switch.

[0021] Specifically, each BUCK circuit 4 starts conducting when triggered by a conduction signal (specifically, the rising edge of the conduction signal), and ends conducting when triggered by a shutdown signal output by the corresponding COT circuit 2 (specifically, the rising edge of the shutdown signal). Figure 2, the on-signals for triggering the two BUCK circuits 4 to start conducting are on_start_MST and on_start_SLV, respectively, and the off-signals for triggering the two BUCK circuits 4 to end conducting are on_end_MST and on_end_SLV, respectively. Specifically, on_start_MST and on_end_MST generate PMW_MST. Because the PWM signal generated in this embodiment is based on the rising edge being effective, the rising edge of on_start_MST determines the rising edge of PMW_MST, and the rising edge of on_end_MST determines the falling edge of PMW_MST; similarly, on_start_SLV and on_end_SLV generate PMW_SLV, the rising edge of on_start_SLV determines the rising edge of PMW_SLV, and the rising edge of on_end_SLV determines the falling edge of PMW_SLV.

[0022] The current sharing scheme of the present invention is to adjust the inductor current of the slave BUCK by adjusting only the on-time of the switches M3 and M4 of the slave BUCK to make it track the inductor current of the master BUCK, specifically, to adjust the falling edge of PMW_SLV, that is, to adjust the triggering time of on_end_SLV. Specifically, in order to adjust the triggering moment of on_end_SLV, the present invention is designed on the one hand that the on-time of the BUCK circuit 4 is determined by the charging time required for the current source to charge the capacitor to the charging reference voltage. For example, the COT circuit 2 controls the current source to start charging the capacitor when the on-signal starts to be triggered, compares the voltage of the capacitor with the charging reference voltage, and generates the off signal according to the comparison result; on the other hand, the signals of the voltage measurement points of the two BUCK circuits 4 are collected, and the error current is obtained through comparison amplification and voltage-to-current processing. The error current is superimposed on the current source used for charging the COT circuit 2 corresponding to the BUCK. In this way, the charging time of the COT circuit 2 corresponding to the BUCK can be adjusted by superimposing the error current on the current source, and the on-time of the BUCK can also be adjusted.

[0023] The detailed description is given below in conjunction with the specific circuit structure.

[0024] refer to Figure 1, a two-phase conduction control circuit 1, whose input end is connected to the common point of the output ends of the two BUCK circuits 4, and whose two output ends respectively output two conduction signals on_start_MST and on_start_SLV corresponding to the two BUCK circuits 4. The two-phase conduction control circuit 1 is used to compare the output voltage Vout with the reference voltage VREF, and control the two conduction signals on_start_MST and on_start_SLV to be triggered in turn, that is, to cut the high level in turn according to the comparison result. The so-called alternating triggering specifically means that when the output voltage Vout is lower than the reference voltage VREF, one conduction signal, such as on_start_MST, is controlled to be triggered, and the next time the output voltage Vout is lower than the reference voltage VREF, another conduction signal, such as on_start_SLV, is controlled to be triggered, and so on and so forth.

[0025] Specifically, the two-phase conduction control circuit 1 includes a comparator and a two-phase control logic circuit, the positive input terminal of the comparator is connected to the output voltage Vout, and the negative input terminal of the comparator is connected to the reference voltage VREF, so when Vout is less than VREF, the comparator outputs a low level. The output terminal of the comparator is connected to the two-phase control logic, and when the comparator outputs a low level, the two-phase control logic will generate a rectangular wave (low-level triggering to generate rectangular waves is a common technology, which will not be expanded here), and the two-phase control logic has two output terminals, and the two-phase control logic will send the generated rectangular waves to the two output terminals in turn. For example, the last time Vout was less than VREF, the first output terminal outputted a rectangular wave, and the next time Vout was less than VREF, the second output terminal outputted a rectangular wave. It can be understood that outputting a signal alternately between the two output terminals can be achieved through a two-way switch, such as giving the generated rectangular wave to the input terminal of the two-way switch, and using the generated rectangular wave to trigger the switching of the output path of the two-way switch. This technology is already available and relatively mature, and will not be repeated here.

[0026] The two conduction signals on_start_MST and on_start_SLV generated by the two-phase conduction control circuit 1 are provided to the drive circuit 3 on the one hand and to the COT circuit 2 on the other hand. Specifically, the two output ends of the two-phase conduction control circuit 1 are connected to the first input ends of the two drive circuits 3 in a one-to-one correspondence, and the two output ends of the two-phase conduction control circuit 1 are also connected to the input ends of the two COT circuits 2 in a one-to-one correspondence. The second input end of the drive circuit 3 is connected to the output end of the corresponding COT circuit 2, and the output end of the drive circuit 3 is connected to the control end of the switch tube of the corresponding BUCK circuit 4.

[0027] The first driving circuit 3 is used to output the driving signal PMW_MST for controlling the switch tubes M1 and M2 of the master BUCK according to the on-signal on_start_MST and the off-signal on_end_MST. The second driving circuit 3 is used to output the driving signal PMW_SLV for controlling the switch tubes M3 and M4 of the slave BUCK according to the on-signal on_start_SLV and the off-signal on_end_SLV. As mentioned above, the driving PWM signal of the switch tube is generated by rising edge triggering: the rising edge of on_start_MST triggers the rising edge of PMW_MST, the rising edge of on_end_MST triggers the falling edge of PMW_MST, the rising edge of on_start_SLV triggers the rising edge of PMW_SLV, and the rising edge of on_end_SLV triggers the falling edge of PMW_SLV.

[0028] refer to Figure 3-4 , the structures of the two COT circuits 2 are the same, except that the COT circuit 2 corresponding to the BUCK is also connected to a current balancing circuit 6. The two input ends of the current balancing circuit 6 are respectively connected to the voltage measurement points of the two BUCK circuits 4, and the output end of the current balancing circuit 6 is indirectly connected to the switch tube of the second BUCK circuit 4 through the COT circuit 2. The current balancing circuit 6 is used to simultaneously sample and compare the signals of the voltage measurement points of the two BUCK circuits 4, and adjust the conduction time of the second BUCK circuit 4 according to the comparison result, so that the duty cycle of the second BUCK circuit 4 tracks the duty cycle of the first BUCK circuit 4.

[0029] Please refer to the following Figure 3 , taking the COT circuit 2 corresponding to the main BUCK as an example, the basic structure and working principle of the COT circuit 2 are introduced.

[0030] Specifically, the COT circuit 2 includes a first current mirror, a charging capacitor C, a discharge switch tube M0, and a first comparator U1. The first current mirror is a single-tube current mirror, including a control branch and a mirror branch. The current source I1 is connected in series in the control branch of the first current mirror, and the charging capacitor C is connected in series in the mirror branch of the first current mirror. Specifically, the control branch mainly includes a control tube, and the mirror branch includes a mirror tube. The source of the control tube of the first current mirror is connected to the power supply, and the current source I1 is connected in series between the drain of the control tube of the first current mirror and the ground. The current source I1 is related to the input voltage Vin of the BUCK circuit 4, I1=A*Vin, A is the conductivity constant, which is specifically determined according to the circuit parameters. The source of the mirror tube of the first current mirror is connected to the power supply, the drain of the mirror tube of the first current mirror is connected in series with the charging capacitor C, the positive electrode of the charging capacitor C is connected to the positive input of the first comparator U1, and the positive electrode of the charging capacitor C is also grounded via the discharge switch tube M0. The control end of the discharge switch tube M0 receives the on-signal on_start_MST as the input of the COT circuit 2, so as to quickly discharge the charging capacitor C under the high level trigger of the on-signal on_start_MST. The negative input of the first comparator U1 is connected to the charging reference voltage, which is related to the output voltage. In this embodiment, the charging reference voltage is directly taken as Vout. The output end of the first comparator outputs the shutdown signal on_end_MST.

[0031] Figure 3 In the example, when the on-signal on_start_MST is at a high level, the charging capacitor C is discharged quickly. On_start_MST is a short rectangular wave. After the charging capacitor C is discharged, it will return to a low level as soon as possible. At this time, the charging capacitor C can be charged. The first current mirror controls the current IP1 ( Figure 3 IP1=I1) is mirrored to obtain IP2, and IP2 is used to charge the charging capacitor C. When the capacitor charging voltage V1 reaches Vout, the output of the comparator U1 will switch to a high level, that is, the on_end_MST signal has a rising edge, such as Figure 2 The rising edge of the on_end_MST signal can trigger the falling edge of PMW_MST, which will cause M1 and M2 of the main BUCK to be turned off.

[0032] according to Figure 3 From the circuit, it can be seen that the conduction time of the switch tube of the main BUCK circuit 4 is for:

[0033] Duty cycle of the BUCK working in CCM mode for:

[0034] Combining the above equations (2) and (3) we can get the operating frequency of the switch tube of the main BUCK circuit 4: for:

[0035] Where A is the conductivity constant set inside the circuit. It can be seen that the PWM switching frequency of the main BUCK circuit 4 is It is approximately independent of the input voltage Vin and the output voltage Vout. When the internal parameters A and C are determined, the CCM switching frequency basically does not change with external conditions.

[0036] refer to Figure 4 , and the structure of COT circuit 2 corresponding to the BUCK Figure 3 The difference is that the positive electrode of the current source I1 in the COT circuit 2 is also connected to the current balancing circuit 6 to superimpose the error current, that is, the charging current of the capacitor C in the COT circuit 2 corresponding to the BUCK is changed, thereby affecting the charging time of the capacitor C, and also affecting the triggering time of the on_end_SLV signal, thereby affecting the conduction time of the switch tube of the BUCK.

[0037] The following describes the structure and working principle of the current balancing circuit 6 and how it affects the on_end_SLV signal generated by the COT circuit 2 corresponding to the BUCK.

[0038] refer to Figure 5-6 The current balancing circuit 6 includes a voltage difference amplifier circuit 61 and a voltage-to-current circuit 62 .

[0039] The two input terminals of the voltage difference amplifier circuit 61 are respectively connected to the voltage measurement points of the two BUCK circuits 4, and are used to subtract the signal of the voltage measurement point of the first BUCK circuit 4 from the signal of the voltage measurement point of the second BUCK circuit 4 and perform difference amplification to output an error voltage VO.

[0040] The input end of the voltage-to-current circuit 62 is connected to the error voltage VO, and the output end of the voltage-to-current circuit 62 is connected to the current source, so as to convert the error voltage VO into an error current I BAL , the error current I BAL The error current I BALBy superimposing it on the current source I1, the charging time can be adjusted, that is, the timing of the rising edge of the on_end_SLV signal can be adjusted, and then the closing timing of the switching tubes M3 and M4 of the BUCK can be adjusted, that is, the conduction time of M3 and M4 can be adjusted.

[0041] Specifically, the voltage difference amplifier circuit 61 includes an error amplifier EA1 and a capacitor Ccomp. The two input terminals of the error amplifier EA1 are connected to the voltage measurement points of the corresponding BUCK circuit 4 via the corresponding filter circuit 5. The signals of the two voltage measurement points of the master and slave BUCK are respectively recorded as SW_MST and SW_SLV. The filter circuit 5 is used to filter the signals SW_MST and SW_SLV of the voltage measurement points to obtain the duty cycle signals D_MST and D_SLV. Figure 1 As shown, RC filtering can be used. The positive input of the error amplifier EA1 is connected to D_MST, and the negative input of the error amplifier EA1 is connected to D_SLV. The output of the error amplifier EA1 is grounded via the capacitor Ccomp. The voltage at one end of the capacitor Ccomp connected to the output of the error amplifier EA1 is the error voltage VO.

[0042] Specifically, the voltage-to-current circuit 62 includes an error amplifier EA2, a bias current source I PD , current conversion resistor R6, and second current mirror. The positive input terminal of the error amplifier EA2 is connected to the error voltage VO, the second terminal of the current conversion resistor R6 is grounded, the output terminal of the error amplifier EA2 is connected to the gates of the control tube and the mirror tube of the second current mirror, the drain of the control tube of the second current mirror, the first terminal of the current conversion resistor R6, and the negative input terminal of the error amplifier EA2 are connected together and then connected to the output terminal of the error amplifier EA2 via a compensation network (consisting of Rc and Cc connected in series), the second terminal of the current conversion resistor R6 is grounded, the source of the control tube and the source of the mirror tube of the second current mirror are connected to the power supply, and the drain of the mirror tube of the second current mirror is connected via a bias current source I PD The drain of the mirror tube of the second current mirror is grounded and outputs the error current.

[0043] Combine the following Figure 6 ,introduce Figure 5 Working principle.

[0044] refer to Figure 5, VBP1 and VBP2 are bias voltages generated by other circuits; MN1 and MN2 constitute the input pair of the voltage difference amplifier circuit 61, MP2 and MP5, MP1 and MP3, MN4 and MN6 respectively constitute current mirrors. MN9 and MN10 constitute the input pair of the voltage-to-current circuit 62, MP10 and MP12, MN13 and MN15, MP14 and MP16 respectively constitute current mirrors. The circuit structure of Figure 5 can be simplified to Figure 6, and the working principle is as follows: SW_MST and SW_SLV pass through RC filters respectively, which are equivalent to the duty cycles D_MST and D_SLV of the master buck and the slave buck, and are connected to the positive and negative ends of EA1. After amplification, the error voltage VO is output, and Ccomp is used for loop stability compensation.

[0045]

[0046] in, is the gain of EA1. PD is the bias current. MP16 and MP14 form a current mirror, then:

[0047] Taking the direction of current flowing into the circuit as positive, we have:

[0048] certainly, Figure 5 This is only an illustration and is not intended to limit the present invention.

[0049] The working process of the embodiment of the present invention is summarized as follows: (1): The waveform of the circuit control signal is as follows: Figure 2 As shown, the output voltage Vout is compared with the reference voltage VREF and the error is amplified, and the on_start_MST and on_start_SLV signals are generated by the two-phase conduction control circuit 1 to control the rising edges of the switch control signals PMW_MST and PMW_SLV of the two BUCK circuits respectively.

[0050] (2): Figure 3 The COT circuit 2 generates the on_end_MST signal to control the falling edge of the main BUCK switch control signal.

[0051] (3): By sampling the voltages of the two nodes SW_MST and SW_SLV, the duty cycle signals D_MST and D_SLV of the master BUCK and the slave BUCK are obtained respectively after filtering circuit 5, and serve as the two inputs of the current balancing circuit 6. Figure 5 , D_MST and D_SLV are processed by EA1 to obtain VO. VO is processed by voltage-to-current circuit 62 to obtain IBAL .

[0052] (4): If Figure 2-5 In the figure, IL_MST is the inductor current generated by the master BUCK, and IL_SLV is the inductor current generated by the slave BUCK. When the inductor current IL_MST of the master BUCK is greater than the inductor current IL_SLV of the slave BUCK, and SW_MST is greater than the SW_SLV voltage, VO increases, increases, so Ipu rises, I BAL Decreases, Ip1 = I1 + Ibal, so Ip1 decreases, the charging current of capacitor C decreases, and the rising edge of the on_end_ SLV signal of comparator U1 is delayed. Because the on_end_ SLV signal controls the falling edge of the slave BUCK switch control signal to adjust the duty cycle, the delay of the rising edge of the on_end_ SLV signal will increase the conduction time of the slave BUCK, so the slave BUCK current increases; When the inductor current of the master BUCK is smaller than the inductor current of the slave BUCK, SW_MST is smaller than SW_SLV voltage, VO decreases, decreases, so Ipu decreases, I BAL Rising, Ip1 = I1 + Ibal, so Ip1 rises, the charging current of capacitor C increases, and the rising edge of the on_end_ SLV signal of comparator U1 appears earlier. Because the on_end_ SLV signal controls the falling edge of the switch control signal of the slave BUCK, the early rising edge of the on_end_ SLV signal will cause the conduction time of the slave BUCK to decrease, so the current of the slave BUCK decreases. When the loop is finally stable, D_MST = D_SLV, at this time the average current of the master BUCK and the slave BUCK are equal.

[0053] After adopting the present invention, the current consistency of the two-phase BUCK is significantly improved. Figure 7, the input voltage Vin of the two-phase COT BUCK circuit is 5V, the output voltage Vout of the two-phase COT BUCK circuit is 1.1V, and the output current Iout of the two-phase COT BUCK circuit is 8A. The horizontal axis represents the two-phase current deviation, which is the difference between the two-phase currents and the total current (that is, the output current Iout = 8A). Assuming that the currents of the master and slave BUCKs are I_MST and I_SLV respectively, the two-phase current deviation = (I_MST- I_SLV) / (Iout / 2). For example, if the two currents are completely equal, the deviation is 0; for example, I_MST = 4.1A, I_SLV = 3.9A, then the deviation is (4.1-3.9) / 4 = 5%. The vertical axis is the chip distribution ratio, which means: what proportion of chips are within the corresponding two-phase current deviation ratio, such as Figure 7 It is shown in Figure 2 that 99% of the balanced chips of the present invention are within 5% deviation, while 99% of the unbalanced chips of the prior art are within 15% deviation. Figure 7 It can be seen that in the prior art, when there is no balancing, the current deviation of the two-phase buck is 15%; and after the balancing current is increased in the embodiment of the present invention, the current deviation is reduced to 5%.

[0054] Based on the same inventive concept, the present invention also discloses a current balancing method based on the current balancing dual-phase COT BUCK circuit, the method comprising: simultaneously sampling and comparing the signals of the voltage measurement points of the two BUCK circuits 4, and adjusting the conduction time of the second BUCK circuit 4 according to the comparison result, so that the duty cycle of the second BUCK circuit 4 tracks the duty cycle of the first BUCK circuit 4. For more information, please refer to the circuit embodiment part, which will not be repeated here.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0056] Terms including ordinal numbers such as "first" and "second" used in this specification may be used to describe various components, but these components are not limited by these terms. The purpose of using these terms is only to distinguish one component from other components. For example, without departing from the scope of the present invention, the first component may be named as the second component, and similarly, the second component may also be named as the first component.

[0057] The words "equal", "same", "simultaneous" or other similar terms are not limited to absolute equality or sameness in mathematical terms. When implementing the rights described in this patent, they can be close in the engineering sense or within an acceptable error range. Unless otherwise specified, the "connection" or "connection" of the present invention not only includes directly connecting two entities, but also indirectly connecting through other entities with beneficial improvement effects. In the claims, any reference signs placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The term "or / and" as used herein includes any and all combinations of one or more of the relevant listed items.

[0058] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known structures and technologies are not shown in detail so as not to obscure the understanding of this description.

[0059] Similarly, it should be understood that in order to streamline the disclosure and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, this disclosure should not be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim, each of which stands on its own as a separate embodiment of the invention.

[0060] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A current balancing dual-phase COT BUCK circuit, characterized in that: It includes two BUCK circuits (4) and a current balancing circuit (6); The output ends of the two BUCK circuits (4) are connected together and output a required output voltage, and the two BUCK circuits (4) are turned on alternately, and each time the conduction is maintained for a certain period of time before being turned off; The two input ends of the current balancing circuit (6) are respectively connected to the voltage measurement points of the two BUCK circuits (4); the output end of the current balancing circuit (6) is indirectly connected to the switch tube of the second BUCK circuit (4); the current balancing circuit (6) is used to simultaneously sample the signals of the voltage measurement points of the two BUCK circuits (4) and compare them; and adjust the conduction time of the second BUCK circuit (4) according to the comparison result, so that the duty cycle of the second BUCK circuit (4) tracks the duty cycle of the first BUCK circuit (4).

2. The current balancing dual-phase COT BUCK circuit according to claim 1, characterized in that: The on-time is determined by the charging time required by the current source to charge the capacitor to a charging reference voltage. The current balancing circuit (6) comprises: A voltage difference amplifier circuit (61), two input ends of which are respectively connected to the voltage measurement points of the two BUCK circuits (4), and is used to subtract the signal of the voltage measurement point of the first BUCK circuit (4) from the signal of the voltage measurement point of the second BUCK circuit (4), perform difference amplification processing, and output an error voltage; A voltage-to-current circuit (62) has an input end connected to the error voltage and an output end connected to the current source, and is used to convert the error voltage into an error current, and to superimpose the error current on the current source to adjust the charging duration.

3. The current balancing dual-phase COT BUCK circuit according to claim 2, characterized in that: It also includes two COT circuits (2) corresponding to the two BUCK circuits (4), wherein the start of conduction of the BUCK circuit (4) is triggered by a conduction signal, and the end of conduction of the BUCK circuit (4) is triggered by a shutdown signal output by the corresponding COT circuit (2); The COT circuit (2) is used to control the current source to start charging the capacitor when the on-signal starts to be triggered, compare the voltage of the capacitor with the charging reference voltage, and generate the off-signal according to the comparison result.

4. The current balancing dual-phase COT BUCK circuit according to claim 3, characterized in that: The current source is related to the input voltage of the BUCK circuit (4), and the charging reference voltage is related to the output voltage.

5. The current balancing dual-phase COT BUCK circuit according to claim 3, characterized in that: The COT circuit (2) comprises a first current mirror, a charging capacitor, a discharging switch tube, and a first comparator, wherein the current source is connected in series in a control branch of the first current mirror, the charging capacitor is connected in series in a mirror branch of the first current mirror, the positive electrode of the charging capacitor is connected to a positive input terminal of the first comparator, the positive electrode of the charging capacitor is also connected to ground via the discharging switch tube, the control terminal of the discharging switch tube receives the on-signal to quickly discharge the charging capacitor under the triggering of the on-signal, the negative input terminal of the first comparator is connected to the charging reference voltage, and the output terminal of the first comparator outputs the off-signal; The positive electrode of the current source in the COT circuit (2) corresponding to the second BUCK circuit (4) is also connected to the voltage-to-current circuit (62) to superimpose the error current.

6. The current balancing dual-phase COT BUCK circuit according to claim 2, characterized in that: It also includes two filter circuits (5) corresponding to the two BUCK circuits (4); the two input ends of the voltage difference amplifier circuit (61) are respectively connected to the voltage measurement points of the corresponding BUCK circuits (4) via the corresponding filter circuits (5); the filter circuits (5) are used to filter the signals at the voltage measurement points to obtain duty cycle signals, which are then input into the corresponding BUCK circuits (4).

7. The current balancing dual-phase COT BUCK circuit according to claim 2, characterized in that: The voltage-to-current circuit (62) comprises an error amplifier (EA2), a bias current source (I PD ), current conversion resistor (R6), second current mirror; The positive input terminal of the error amplifier (EA2) is connected to the error voltage, the second terminal of the current conversion resistor (R6) is grounded, the output terminal of the error amplifier (EA2) is connected to the gates of the control tube and the mirror tube of the second current mirror, the drain of the control tube of the second current mirror, the first terminal of the current conversion resistor (R6), and the negative input terminal of the error amplifier (EA2) are connected together and then connected to the output terminal of the error amplifier (EA2) via a compensation network, the second terminal of the current conversion resistor (R6) is grounded, the source of the control tube of the second current mirror and the source of the mirror tube are connected to a power supply, and the drain of the mirror tube of the second current mirror is connected via a bias current source (I PD ) is grounded, and the drain of the mirror tube of the second current mirror outputs the error current.

8. The current balancing dual-phase COT BUCK circuit according to claim 3, characterized in that: It also includes a two-phase conduction control circuit (1), whose input end is connected to the common point of the output ends of the two BUCK circuits (4), and whose two output ends respectively output two conduction signals corresponding to the two BUCK circuits (4); the two-phase conduction control circuit (1) is used to compare the output voltage with the reference voltage, and control the two conduction signals to be triggered in turn according to the comparison result.

9. The current balancing dual-phase COT BUCK circuit according to claim 8, characterized in that: It also includes two driving circuits (3) corresponding to the two BUCK circuits (4); The two output ends of the two-phase conduction control circuit (1) are connected to the first input ends of the two drive circuits (3) in a one-to-one correspondence, the second input end of the drive circuit (3) is connected to the output end of the corresponding COT circuit (2), and the output end of the drive circuit (3) is connected to the control end of the switch tube of the corresponding BUCK circuit (4); the drive circuit (3) is used to output a drive signal for controlling the switch tube of the BUCK circuit (4) according to the conduction signal and the shutdown signal.

10. A current balancing method for a current balancing dual-phase COT BUCK circuit according to any one of claims 1 to 9, characterized in that: The method comprises: The signals of the voltage measurement points of the two BUCK circuits (4) are sampled and compared simultaneously, and the conduction time of the second BUCK circuit (4) is adjusted according to the comparison result, so that the duty cycle of the second BUCK circuit (4) tracks the duty cycle of the first BUCK circuit (4).

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