Half-duplex RS485 bus high-speed automatic transmitting and receiving circuit and transmitting and receiving control method
By using the combination of the MCU communication control unit, the automatic transceiver control unit and the RS485 transceiver chip in the RS485 bus communication, automatic transceiver control is used to perform automatic transceiver control using the primary inverter and the secondary inverter, the problem of difficult to achieve high-speed automatic transceiver in the prior art is solved, and efficient and simplified transceiver control logic is realized.
Patent Information
- Application Number
- CN202411714832.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-27
- Publication Date
- 2025-03-18
AI Technical Summary
When the prior art realizes high-speed automatic transmission and reception of half-duplex RS485 bus, it is difficult to balance high communication rate and high driving capability, and the software logic is complex and resource overhead is large.
The combination of the MCU communication control unit, the automatic transceiver control unit and the RS485 transceiver chip is adopted, and the combination of the primary and secondary inverter is automatically transceived and received control to ensure that the transceiver control timing occurs before data transmission.
It realizes that the transmission and reception direction control logic is simplified while ensuring high communication speed and high driving capabilities, and reduces the complexity of software logic and resource overhead.
Smart Images

Figure CN119652482A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of industrial control, and in particular relates to a method for realizing a half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method. Background Art
[0002] Half-duplex is a data transmission mode in which data can be transmitted in two directions, but only one direction is allowed to be transmitted on a channel at the same time.
[0003] In the prior art, in order to realize high-speed automatic transceiver of half-duplex RS485 bus, one way is to add a microcontroller unit, and the communication signal relies on the control chip for the commutation timing logic control, which will increase the hardware cost and software control design cost. In the commonly used RS485 node deployment, in the application occasions with direction switching control, the communication control unit needs to negotiate the transceiver control timing at the software layer, involving complex active transceiver commutation logic control. And often the communication control unit also has to undertake many complex tasks such as data processing, logic control or process control. Frequent use of interrupt jumps to realize transceiver logic control not only increases a large amount of system resource overhead, but also increases the difficulty of software design. Another way is to use a triode as a direction switching control, and a resistor and capacitor device is placed between the collector and the ground, which will have the effect of direction control delay, but the delay depends on the resistor and capacitor control, and the transmission rate will have a high-pass filtering situation at certain characteristic frequencies, causing communication abnormality. Usually, the purpose of RS485 automatic transceiver at a short distance and low rate is achieved at the premise of sacrificing communication rate and driving capability. Therefore, the market is in urgent need of an implementation solution for an RS485 automatic transceiver circuit that can realize the automatic transceiver function and balance the high-speed and high-driving capability. Summary of the invention
[0004] To solve the above problems, the present invention provides a method for realizing half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control, which ensures the advantages of high communication rate and high driving capability of RS485 bus while automatically controlling transceiver.
[0005] The technical solution provided by the present invention is: a half-duplex RS485 bus high-speed automatic transceiver circuit, comprising: an MCU communication control unit, an automatic transceiver control unit and an RS485 transceiver chip, wherein the MCU communication control unit is connected to the automatic transceiver control unit by signal, the automatic transceiver control unit is connected to the RS485 transceiver chip by signal, and the RS485 transceiver chip is connected to the bus signal;
[0006] Among them, the automatic transceiver control unit includes a first inverter and a second inverter connected in sequence, the input end of the first inverter is electrically connected to the TXD pin of the MCU communication control unit, the output end of the first inverter is electrically connected to the input end of the second inverter, the RE pin and the DE pin of the RS485 transceiver chip, the output end of the second inverter is electrically connected to the D pin of the RS485 transceiver chip, and the RXD pin of the MCU communication control unit is electrically connected to the R pin of the RS485 transceiver chip through the automatic transceiver control unit.
[0007] Preferably, the model of the MCU communication control unit is GD32F303. In the initial state, the TXD pin and RXD pin of the MCU communication control unit are configured as weak pull-ups. The electrical signal output by the TXD pin of the MCU communication control unit is converted by the first inverter and sent to the RE pin and DE pin of the RS485 transceiver chip. The RS485 transceiver chip enables reception and disables transmission, and is in a receiving waiting state.
[0008] Preferably, the TXD pin and the RXD pin of the MCU communication control unit are configured as weak pull-ups, specifically including: when initializing the GPIO, the GPIO mode can be configured as internal weak pull-ups.
[0009] Preferably, when the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on a preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
[0010] Preferably, the MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit, the RE pin and DE of the RS485 transceiver chip are high, and the RS485 transceiver chip is disabled for receiving and enabled for sending;
[0011] When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0';
[0012] When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
[0013] Based on the same concept, the present invention provides a half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method, comprising the following steps:
[0014] Configure the TXD and RXD pins of the MCU communication control unit as weak pull-ups;
[0015] The high-level signal output by the TXD pin of the MCU communication control unit is converted into a low-level signal by the first-level inverter of the automatic transceiver control unit and sent to the RE pin and DE pin of the RS485 transceiver chip;
[0016] The RS485 transceiver chip is enabled for reception and disabled for transmission, and is in a receiving waiting state.
[0017] Preferably, it also includes:
[0018] When the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on the preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
[0019] Preferably, it also includes:
[0020] The MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit. The RE pin and DE pin of the RS485 transceiver chip are high-level, and the RS485 transceiver chip is disabled for receiving and enabled for sending;
[0021] When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0';
[0022] When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
[0023] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art:
[0024] The present invention adopts a primary inverter (first inverter) as automatic transceiver control, and a secondary inverter (second inverter) for data output control, which ensures that the transceiver control timing occurs before data transmission, and avoids communication failure caused by timing confusion during high-speed communication. This technical solution not only effectively controls the communication node deployment cost, increases the communication driving capability, and solves the defects of the conventional solution that resources need to be coordinated for transceiver enable control, the software logic is complex, and the overhead is too large under the premise of ensuring the communication rate. The technical solution of this embodiment can be implemented as a communication network node for long-distance, high-speed, multi-node communication. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] The specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings, wherein:
[0026] Figure 1 The present invention is a schematic diagram of a half-duplex RS485 bus high-speed automatic transceiver circuit. DETAILED DESCRIPTION
[0027] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.
[0028] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0029] First embodiment
[0030] like Figure 1 As shown, this embodiment provides a half-duplex RS485 bus high-speed automatic transceiver circuit, including: an MCU communication control unit, an automatic transceiver control unit and an RS485 transceiver chip, the MCU communication control unit is connected to the automatic transceiver control unit signal, the automatic transceiver control unit is connected to the RS485 transceiver chip signal, and the RS485 transceiver chip is connected to the bus signal;
[0031] Among them, the automatic transceiver control unit includes a first inverter and a second inverter connected in sequence, the input end of the first inverter is electrically connected to the TXD pin of the MCU communication control unit, the output end of the first inverter is electrically connected to the input end of the second inverter, the RE pin and the DE pin of the RS485 transceiver chip, the output end of the second inverter is electrically connected to the D pin of the RS485 transceiver chip, and the RXD pin of the MCU communication control unit is electrically connected to the R pin of the RS485 transceiver chip through the automatic transceiver control unit.
[0032] The technical solution of this embodiment uses a primary inverter (first inverter) as automatic transceiver control and a secondary inverter (second inverter) for data output control, which ensures that the transceiver control timing occurs before data transmission, avoiding communication failures caused by timing confusion during high-speed communication. This technical solution not only effectively controls the communication node deployment cost and increases the communication driving capability, but also solves the defects of the conventional solution that resources need to be coordinated for transceiver enable control, the software logic is complex, and the overhead is too large, while ensuring the communication rate. The technical solution of this embodiment can be implemented as a communication network node for long-distance, high-speed, multi-node communication.
[0033] Preferably, the model of the MCU communication control unit is GD32F303. In the initial state, the TXD pin and RXD pin of the MCU communication control unit are configured as weak pull-ups. The electrical signal output by the TXD pin of the MCU communication control unit is converted by the first inverter and sent to the RE pin and DE pin of the RS485 transceiver chip. The RS485 transceiver chip enables reception and disables transmission, and is in a receiving waiting state.
[0034] Configure the TXD pin and RXD pin of the MCU communication control unit to be weakly pulled up, that is, the TXD pin and RXD pin are high. The TXD pin outputs a low level to the RE pin and DE pin of the RS485 transceiver chip through a first-level inverter, then the RS485 transceiver chip enables receiving and disables sending, and is in a receiving waiting state.
[0035] Preferably, the TXD pin and the RXD pin of the MCU communication control unit are configured as weak pull-ups, specifically including: when initializing the GPIO, the GPIO mode can be configured as internal weak pull-ups.
[0036] Preferably, when the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on a preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
[0037] Preferably, the MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit, the RE pin and DE of the RS485 transceiver chip are high, and the RS485 transceiver chip is disabled for receiving and enabled for sending;
[0038] When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0';
[0039] When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
[0040] This embodiment simplifies the control logic of the sending and receiving directions, while being able to effectively ensure the RS485 bus communication capability with high speed and high driving capability.
[0041] Second embodiment
[0042] This embodiment provides a half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method, comprising the following steps:
[0043] Configure the TXD and RXD pins of the MCU communication control unit as weak pull-ups;
[0044] The high-level signal output by the TXD pin of the MCU communication control unit is converted into a low-level signal by the first-level inverter of the automatic transceiver control unit and sent to the RE pin and DE pin of the RS485 transceiver chip;
[0045] The RS485 transceiver chip is enabled for reception and disabled for transmission, and is in a receiving waiting state.
[0046] The technical solution of this embodiment simplifies the control logic of the transceiver direction while being able to effectively guarantee the RS485 bus communication capability with high speed and high driving capability. Since a primary inverter (first inverter) is used as the automatic transceiver control and a secondary inverter (second inverter) is used for data output control, it is ensured that the transceiver control timing occurs before the data is sent, thus avoiding communication failures caused by timing confusion during high-speed communication. This technical solution not only effectively controls the communication node deployment cost and increases the communication driving capability, but also solves the defects of the conventional solution that resources need to be coordinated internally for transceiver enable control, the software logic is complex, and the overhead is too large, while ensuring the communication rate. The technical solution of this embodiment can be implemented as a communication network node for long-distance, high-speed, multi-node communication.
[0047] Preferably, it also includes:
[0048] When the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on the preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
[0049] Preferably, it also includes:
[0050] The MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit. The RE pin and DE pin of the RS485 transceiver chip are high-level, and the RS485 transceiver chip is disabled for receiving and enabled for sending;
[0051] When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0';
[0052] When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
[0053] If the half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method is implemented in the form of program instructions and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of software, and the computer software is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-only memory, ROM), random access memory (Random access memory, RAM), disk or optical disk and other media that can store program codes.
[0054] Those skilled in the art can clearly understand that, for the sake of convenience and brevity in description, the identification content specifically executed by the above-described system and device can refer to the corresponding process in the aforementioned method embodiment.
[0055] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, if these changes fall within the scope of the claims of the present invention and their equivalents, they still fall within the protection scope of the present invention.
Claims
1. A half-duplex RS485 bus high-speed automatic transceiver circuit, characterized in that: include: MCU communication control unit, automatic transceiver control unit and RS485 transceiver chip, the MCU communication control unit is connected to the automatic transceiver control unit signal, the automatic transceiver control unit is connected to the RS485 transceiver chip signal, and the RS485 transceiver chip is connected to the bus signal; Among them, the automatic transceiver control unit includes a first inverter and a second inverter connected in sequence, the input end of the first inverter is electrically connected to the TXD pin of the MCU communication control unit, the output end of the first inverter is electrically connected to the input end of the second inverter, the RE pin and the DE pin of the RS485 transceiver chip, the output end of the second inverter is electrically connected to the D pin of the RS485 transceiver chip, and the RXD pin of the MCU communication control unit is electrically connected to the R pin of the RS485 transceiver chip through the automatic transceiver control unit.
2. The half-duplex RS485 bus high-speed automatic transceiver circuit according to claim 1, characterized in that: The model of the MCU communication control unit is GD32F303. In the initial state, the TXD pin and RXD pin of the MCU communication control unit are configured as weak pull-ups. The electrical signal output by the TXD pin of the MCU communication control unit is converted by the first inverter and sent to the RE pin and DE pin of the RS485 transceiver chip. The RS485 transceiver chip is enabled for reception and disabled for transmission, and is in a receiving waiting state.
3. The half-duplex RS485 bus high-speed automatic transceiver circuit according to claim 2, characterized in that: The TXD pin and RXD pin of the MCU communication control unit are configured as weak pull-ups, specifically including: when initializing GPIO, the GPIO mode can be configured as internal weak pull-up.
4. The half-duplex RS485 bus high-speed automatic transceiver circuit according to claim 1, characterized in that: When the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on the preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
5. The half-duplex RS485 bus high-speed automatic transceiver circuit according to claim 4, characterized in that: The MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit. The RE pin and DE pin of the RS485 transceiver chip are high-level, and the RS485 transceiver chip is disabled for receiving and enabled for sending; When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0'; When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
6. A half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method, characterized in that: The steps include: Configure the TXD and RXD pins of the MCU communication control unit as weak pull-ups; The high-level signal output by the TXD pin of the MCU communication control unit is converted into a low-level signal by the first-level inverter of the automatic transceiver control unit and sent to the RE pin and DE pin of the RS485 transceiver chip; The RS485 transceiver chip is enabled for reception and disabled for transmission, and is in a receiving waiting state.
7. The half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method according to claim 6, characterized in that: Also includes: When the bus inputs a data signal, the RS485 transceiver chip receives the input data and converts it, and then outputs it from the R pin of the RS485 transceiver chip to the RXD pin of the MCU communication control unit. Based on the preset program receiving mechanism, after the data is received, it is saved in the internal queue of the MCU communication control unit through the wake-up buffer.
8. The half-duplex RS485 bus high-speed automatic transceiver circuit transceiver control method according to claim 6 or 7, characterized in that: Also includes: The MCU communication control unit sends a start signal, controls the TXD pin to change from high to low, and outputs a high-level signal through the second inverter of the automatic transceiver control unit. The RE pin and DE pin of the RS485 transceiver chip are high-level, and the RS485 transceiver chip is disabled for receiving and enabled for sending; When the MCU communication control unit sends a logic '0', the TXD pin is at a low level, outputs a high level through the first inverter, and then outputs a low level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output a logic '0'; When the MCU communication control unit sends logic '1', the TXD pin is high level, outputs low level through the first inverter, and then outputs high level through the second inverter and sends it to the D pin of the RS485 transceiver chip. The RS485 transceiver chip controls the bus data to output logic '1'.
Citation Information
Patent Citations
Enabling signal control circuit used for improving data transmission reliability of RS485 bus
CN104216317A
Method for adaptively controlling transmitting and receiving directions of RS485 chip by aid of FPGA (field programmable gate array)
CN104317762A
RS485 communication flow control isolation circuit
CN112052212A
Control circuit based on RS485 transceiver
CN116232362A
RS485 direction control circuit
CN204117139U