Selective deposition of inhibitor material and deposition assembly

By selectively deposition of inhibitor materials on the first surface of the substrate in semiconductor device manufacturing, the problem of difficult to achieve selective deposition in the prior art is solved, and the effect of reducing processing costs and improving structural scaling capabilities is achieved.

CN119663227APending Publication Date: 2025-03-21ASM IP HLDG BV
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Patent Information

Application Number
CN202411283913.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-19
Filing Date
2024-09-13
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

The prior art is difficult to achieve selective deposition in semiconductor device manufacturing, resulting in high processing costs and limited structural scaling.

Method used

Selective deposition between the dielectric material and the conductive material is achieved by selectively deposition of the inhibitor material on the first surface of the substrate using alkoxyalkylsilane bonded to the silicon atom as the inhibitor reactant.

Benefits of technology

The goal of selective deposition in semiconductor device manufacturing is achieved, reducing processing costs, improving structural scaling capabilities, and simplifying the device manufacturing process.

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Abstract

The present disclosure relates to a method for selective vapor deposition of an inhibitor material on a substrate comprising two surfaces, a processing assembly. In some embodiments of the present disclosure, an inhibiting material is deposited on the first conductive surface of the substrate, with substantially no inhibiting material deposited on the second surface of the substrate. The inhibitor material is formed by contacting a substrate with a gas phase inhibitor reactant, the gas phase inhibitor reactant comprising an alkylsilane having at least one alkoxy group bonded to a silicon atom.
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